Preparation method of polycrystalline silicon layer structure of solar cell and solar cell

Abstract

This application discloses a method for fabricating a polycrystalline silicon layer structure for a solar cell and the solar cell itself, relating to the field of photovoltaic cells. The method for fabricating a polycrystalline silicon layer structure for a solar cell includes the following steps: forming a tunneling oxide layer on a silicon substrate at a first temperature; cooling the first temperature to a second temperature; forming an amorphous silicon layer on the tunneling oxide layer at the second temperature; raising the second temperature to a third temperature; and forming a polycrystalline silicon layer on the amorphous silicon layer at the third temperature. The embodiments of this application can improve the deposition rate, shorten the process time, and reduce production costs.

Description

Technical Field

[0001] This application belongs to the field of photovoltaic cell technology, specifically relating to a method for preparing a polycrystalline silicon layer structure for a solar cell and the solar cell itself. Background Technology

[0002] TBC (Transient Carbon Cell) batteries use N-type silicon wafers as substrates and poly-doped layers as the dopant layer. A tunneling oxide layer is deposited in the electrode region to suppress minority carrier drift to the surface and transfer the grid lines to the back side. This results in no grid line obstruction on the front side and excellent passivation, achieving a large open-circuit voltage and short-circuit current, with a mass production efficiency of up to 26.5%. Currently, in TBC batteries, P-poly deposition of polycrystalline silicon mainly employs low-pressure chemical vapor deposition (LPCVD) technology. This technology decomposes silane (SiH4) gas at high temperatures to form a polycrystalline silicon thin film on the substrate. However, this method has a slow deposition rate, typically requiring several hours to complete.

[0003] The P-poly process primarily uses LPCVD equipment to deposit the tunnel oxide layer and poly layer. Currently, the deposited poly layer thickness is 350 nm. After the solar cell enters the furnace tube, the temperature is first raised to 615°C for oxide layer deposition, and then gradually lowered to 570°C for poly layer deposition. With fixed pressure and flow rate settings, for every 10°C decrease in deposition temperature, the time required to deposit the target poly layer thickness increases by more than 10 minutes. To ensure better contact between the deposited poly layer and the tunnel oxide layer, resulting in better boron doping passivation, a single low-temperature deposition method is used. However, this method prolongs the process time. Summary of the Invention

[0004] The purpose of this application is to provide a method for preparing a polycrystalline silicon layer structure for a solar cell and a solar cell, which can at least solve problems such as long process time.

[0005] To solve the above-mentioned technical problems, this application is implemented as follows:

[0006] This application provides a method for fabricating a polycrystalline silicon layer structure for a solar cell, including the following steps:

[0007] A tunneling oxide layer is formed on a silicon substrate at a first temperature;

[0008] Cool the first temperature down to the second temperature;

[0009] At the second temperature, an amorphous silicon layer is formed on the tunneling oxide layer;

[0010] Raise the second temperature to the third temperature;

[0011] At the third temperature, a polycrystalline silicon layer is formed on the amorphous silicon layer.

[0012] This application also provides a polycrystalline silicon layer structure, wherein the polycrystalline silicon layer is prepared by the above-described preparation method.

[0013] This application also provides a solar cell, which includes the above-described polycrystalline silicon layer structure.

[0014] This application provides a method for fabricating a polycrystalline silicon layer structure for a solar cell. An amorphous silicon layer is formed on a tunneling oxide layer at a relatively low second temperature, and a polycrystalline silicon layer is formed on the amorphous silicon layer at a relatively high third temperature, thus forming a polycrystalline silicon layer structure comprising a silicon substrate, a tunneling oxide layer, an amorphous silicon layer, and a polycrystalline silicon layer. Compared to methods that use a single cooling process to achieve the target thickness of the polycrystalline silicon layer, this application employs a cooling-then-heating approach, eliminating the time required for cooling and thus shortening the process time. Attached Figure Description

[0015] Figure 1 This is a flowchart illustrating the method for fabricating a polycrystalline silicon layer structure for a solar cell disclosed in this application.

[0016] Figure 2 This is a schematic diagram of the polycrystalline silicon layer structure disclosed in the embodiments of this application.

[0017] Explanation of reference numerals in the attached figures:

[0018] 100-Silicon substrate;

[0019] 200-Tunneling oxide layer;

[0020] 300-Amorphous silicon layer;

[0021] 400-Polycrystalline silicon layer. Detailed Implementation

[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0023] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0024] The embodiments of this application will be described in detail below with reference to the accompanying drawings and specific examples and application scenarios.

[0025] refer to Figure 1 and Figure 2 This application discloses a method for fabricating a polycrystalline silicon layer structure for solar cells. The disclosed fabrication method includes the following steps:

[0026] Step 1: At a first temperature, a tunneling oxide layer 200 is formed on a silicon substrate 100;

[0027] The second step is to cool the first temperature down to the second temperature.

[0028] The third step is to form an amorphous silicon layer 300 on the tunneling oxide layer 200 at the second temperature.

[0029] Step 4: Increase the temperature from the second temperature to the third temperature;

[0030] Step 5: At the third temperature, a polycrystalline silicon layer 400 is formed on the amorphous silicon layer 300.

[0031] This application provides a method for fabricating a polycrystalline silicon layer structure for a solar cell. An amorphous silicon layer 300 is formed on a tunneling oxide layer 200 at a relatively low second temperature, and a polycrystalline silicon layer 400 is formed on the amorphous silicon layer 300 at a relatively high third temperature, thereby forming a polycrystalline silicon layer structure including a silicon substrate 100, a tunneling oxide layer 200, an amorphous silicon layer 300, and a polycrystalline silicon layer 400. Compared to a method that uses a single cooling process to achieve the target thickness of the polycrystalline silicon layer 400, this application uses a cooling-then-heating approach, eliminating the time required for cooling and thus shortening the process time.

[0032] The steps of the above preparation method will be described in detail below:

[0033] Optionally, in the first step, a tunneling oxide layer 200 is formed on the silicon substrate 100, including:

[0034] An appropriate amount of oxygen is introduced into the process chamber, so that the oxygen reacts chemically with the silicon substrate 100 at a first temperature to form a silicon dioxide layer on the silicon substrate 100, and the silicon dioxide layer is the tunneling oxide layer 200.

[0035] Among them, the tunnel oxide layer 200 can be formed by deposition.

[0036] Based on this, the formation of the tunnel oxide layer 200 can effectively reduce the recombination in the metal contact area while also providing good contact performance.

[0037] The aforementioned process chamber can be a furnace tube, or of course, other components; no specific limitation is made here.

[0038] The flow rate of oxygen introduced into the process chamber can be in the range of 30,000 sccm to 40,000 sccm, including, for example, 30,000 sccm, 32,000 sccm, 35,000 sccm, 38,000 sccm, 40,000 sccm, etc. Of course, other flow rates are also possible, which are not specifically limited here.

[0039] In addition, the time range for introducing oxygen into the process chamber can be from 300s to 500s, such as 300s, 400s, 500s, etc.; while the time range for not introducing oxygen can be from 600s to 1000s, such as 600s, 700s, 800s, 900s, 1000s, etc.

[0040] In order for oxygen to react on the surface of silicon substrate 100, a suitable reaction temperature needs to be ensured. In this embodiment, the reaction temperature is a first temperature, which can be in the range of 605°C to 630°C, such as 605°C, 610°C, 615°C, 620°C, 625°C, 630°C, etc. Of course, other temperature values ​​are also possible, which are not specifically limited here.

[0041] In addition, the pressure inside the process chamber is at atmospheric pressure during the process reaction to meet the pressure requirements of the process reaction.

[0042] Optionally, cooling the first temperature to the second temperature includes:

[0043] An inert gas is introduced into the process chamber to assist in cooling, thereby reducing the temperature inside the process chamber from the first temperature to the second temperature.

[0044] It should be noted that the temperature of the inert gas introduced into the process chamber is lower than the temperature inside the process chamber. As the inert gas is introduced into and discharged from the process chamber, it carries away some of the heat, thus lowering the temperature inside the process chamber. Alternatively, the temperature of the inert gas introduced into the process chamber can be relatively low. In this case, the inert gas absorbs more heat when introduced into the process chamber, thereby lowering the temperature inside the process chamber.

[0045] For example, inert gases may include nitrogen, helium, argon, etc.

[0046] Optionally, the flow rate of the inert gas ranges from 1000 sccm to 2000 sccm, including, for example, 1000 sccm, 1200 sccm, 1500 sccm, 1800 sccm, 2000 sccm, etc. Of course, other flow rate values ​​may also be included, which are not specifically limited here.

[0047] Furthermore, in an inert gas environment, the temperature within the process chamber is reduced from 605°C to 630°C to 565°C to 575°C over a period ranging from 500 seconds to 1500 seconds, for example, 500 seconds, 800 seconds, 1000 seconds, 1200 seconds, and 1500 seconds. This allows for a temperature reduction to meet the formation conditions of the amorphous silicon layer 300.

[0048] Optionally, an amorphous silicon layer 300 is formed on the tunneling oxide layer 200, comprising:

[0049] Silane is introduced into the process chamber and decomposes at a second temperature to form an amorphous silicon layer 300 on the tunneling oxide layer 200.

[0050] Among them, an amorphous silicon layer 300 can be formed by deposition.

[0051] Based on this, in the embodiments of this application, the amorphous silicon layer 300 is formed at a relatively low temperature (i.e., the second temperature), which enables the amorphous silicon layer 300 to contact the tunneling oxide layer 200 better, and does not damage the uniformity and flatness of the tunneling oxide layer 200.

[0052] The flow rate of silane ranges from 1500 sccm to 2000 sccm, including, for example, 1500 sccm, 1600 sccm, 1800 sccm, 2000 sccm, etc. Of course, other flow rates are also possible, but no specific limit is made here.

[0053] In order to decompose silane, a suitable temperature needs to be maintained. In the embodiments of this application, the decomposition temperature is a second temperature, which can be in the range of 565°C to 575°C, such as 565°C, 568°C, 570°C, 573°C, 575°C, etc. Of course, it can also be other temperature values, which are not specifically limited here.

[0054] In addition, during the process reaction, the pressure range in the process chamber is from 220 mtorr to 240 mtorr, including, for example, 220 mtorr, 225 mtorr, 230 mtorr, 235 mtorr, 240 mtorr, etc. Of course, other values ​​are also possible, which are not specifically limited here.

[0055] The process time range for forming the amorphous silicon layer 300 on the tunneling oxide layer 200 can be from 1000s to 2000s, for example, including 1000s, 1200s, 1500s, 1800s, 2000s, etc. Of course, other values ​​are also possible, which are not specifically limited here.

[0056] Optionally, a polycrystalline silicon layer 400 is formed on the amorphous silicon layer 300, including:

[0057] Silane is introduced into the process chamber and decomposed at a third temperature to form a polycrystalline silicon layer 400 on the amorphous silicon layer 300.

[0058] Among them, a polycrystalline silicon layer 400 can be formed by deposition.

[0059] Based on this, in the embodiments of this application, the polysilicon layer 400 is formed at a relatively high temperature (i.e., the third temperature), which can accelerate the formation rate of the polysilicon layer 400 and help reduce the process time.

[0060] The flow rate of silane can range from 1500 sccm to 2000 sccm, including, for example, 1500 sccm, 1600 sccm, 1800 sccm, 2000 sccm, etc. Of course, other flow rates are also possible, but no specific limit is made here.

[0061] In order to decompose silane, a suitable temperature needs to be maintained. In the embodiments of this application, the decomposition temperature is a third temperature, which can be in the range of 580°C to 585°C, such as 585°C, 582°C, 584°C, 585°C, etc. Of course, it can also be other temperature values, which are not specifically limited here.

[0062] In addition, during the process reaction, the pressure range in the process chamber is from 220 mtorr to 240 mtorr, including, for example, 220 mtorr, 225 mtorr, 230 mtorr, 235 mtorr, 240 mtorr, etc. Of course, other values ​​are also possible, which are not specifically limited here.

[0063] The process time range for forming a polycrystalline silicon layer 400 on the amorphous silicon layer 300 can be from 3000s to 5000s, for example, including 3000s, 3500s, 4000s, 4500s, 5000s, etc. Of course, other values ​​are also possible, which are not specifically limited here.

[0064] Optionally, raising the temperature from the second temperature to the third temperature includes:

[0065] In a vacuum environment, the temperature is raised from 565℃ to 575℃ to 580℃ to 585℃ over a time range of 100s to 200s, including, for example, 100s, 120s, 150s, 180s, 200s, etc. Of course, other values ​​are also possible, but no specific limitation is made here.

[0066] Example 1

[0067] 1. Oxidation: Adjust the temperature in multiple areas (e.g., six temperature zones) within the process chamber to 610℃, the pressure within the process chamber to 1080 mtorr, the oxygen flow rate to 36000 sccm, and the oxygen introduction time to 300 s.

[0068] 2. Temperature control: Maintain the temperature of multiple areas in the process chamber at 610℃, stop the oxygen supply, maintain the pressure in the process chamber at 1080 mtorr, and set the reaction time to 900 s to allow the oxygen that has been introduced to fully react with the silicon substrate to form a stable silicon dioxide film as a tunneling oxide layer.

[0069] 3. Cooling: Nitrogen gas is introduced for auxiliary cooling to reduce the temperature in the process chamber to 575℃. The nitrogen flow rate is 1500 sccm and the pressure in the process chamber is 200 mtorr.

[0070] 4. Vacuuming: The nitrogen gas in the process chamber is extracted to create a vacuum environment in preparation for the formation of the polycrystalline silicon layer. At this time, the temperature in the process chamber is 575℃, the pressure is 0 mtorr, and the vacuuming time is 180s.

[0071] 5. Low-temperature deposition: An amorphous silicon layer is deposited on the tunneling oxide layer. During this process, the temperature in the process chamber is 570℃, the pressure is set to 230 mtorr, the silane flow rate is set to 1700 sccm, and the process time is 2000 s.

[0072] 6. Heating: The temperature inside the process chamber is raised to 585℃, the pressure inside the process chamber is 230 mtorr, and the heating time is 180s.

[0073] 7. High-temperature deposition: A polycrystalline silicon layer is deposited on the amorphous silicon layer. During this process, the temperature in the process chamber is 585℃, the pressure is 230 mtorr, the silane flow rate is set to 1700 sccm, and the process time is 4000 s.

[0074] Comparative Example 1:

[0075] 1. Oxidation: Adjust the temperature in multiple areas (e.g., six temperature zones) within the process chamber to 610℃, the pressure within the process chamber to 1080 mtorr, the oxygen flow rate to 36000 sccm, and the oxygen introduction time to 300 s.

[0076] 2. Temperature control: Maintain the temperature of multiple areas in the process chamber at 610℃, stop the oxygen supply, maintain the pressure in the process chamber at 1080 mtorr, and set the reaction time to 900 s to allow the oxygen that has been introduced to fully react with the silicon substrate to form a stable silicon dioxide film as a tunneling oxide layer.

[0077] 3. Cooling: Nitrogen gas is introduced for auxiliary cooling to reduce the temperature in the process chamber to 575℃. The nitrogen flow rate is 1500 sccm and the pressure in the process chamber is 200 mtorr.

[0078] 4. Vacuuming: The nitrogen gas in the process chamber is extracted to create a vacuum environment in preparation for the formation of the polycrystalline silicon layer. At this time, the temperature in the process chamber is 575℃, the pressure is 0 mtorr, and the vacuuming time is 180s.

[0079] 5. Deposition: An amorphous silicon layer is deposited on the tunneling oxide layer. During this process, the temperature in the process chamber is 570℃, the pressure is set to 230 mtorr, the silane flow rate is set to 1700 sccm, and the process time is 7200 s.

[0080] Based on Example 1 and Comparative Example 1 above, the electrical performance of the boron-doped silicon wafer was tested, and the results are shown in Table 1.

[0081]

[0082] As can be seen from Table 1, the polycrystalline silicon layer structure formed by combining low-temperature deposition and high-temperature deposition has no negative impact on the electrical performance after boron doping.

[0083] Based on the above preparation method, this application also discloses a solar cell, which includes a polycrystalline silicon layer 400, which is prepared by the above preparation method.

[0084] In summary, the embodiments of this application utilize a combination of low and high temperatures to prepare polycrystalline silicon layer structures. Compared to methods using only high or low temperatures, this approach can improve process efficiency and shorten process time to a certain extent. Furthermore, by optimizing process conditions, such as temperature, pressure, and gas flow rate, the growth process of polycrystalline silicon can be effectively controlled, thereby improving the quality of the polycrystalline silicon. Specifically, initial deposition can be performed at a low temperature, followed by subsequent deposition at a high temperature, effectively mitigating the problem of uneven grain size that may result from rapid deposition at high temperatures. Additionally, the preparation method described in this application can effectively shorten process time, reduce energy consumption during the process, and decrease the need for precise control of complex equipment, thus reducing process costs. Therefore, the embodiments of this application can effectively improve process efficiency and the quality of polycrystalline silicon layer structures, thereby enhancing the performance of solar cells and meeting the requirements of the photovoltaic industry for product quality and cost.

[0085] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A method for preparing a polycrystalline silicon layer structure for a solar cell, characterized in that, Includes the following steps: A tunneling oxide layer is formed on a silicon substrate at a first temperature; Cool the first temperature down to the second temperature; Forming an amorphous silicon layer on the tunneling oxide layer at the second temperature includes: introducing silane into a process chamber, wherein the silane decomposes at the second temperature to form the amorphous silicon layer on the tunneling oxide layer, wherein the flow rate of the silane is in the range of 1500 sccm to 2000 sccm, the second temperature is in the range of 565°C to 575°C, the pressure in the process chamber is in the range of 220 mtorr to 240 mtorr, and the process time is in the range of 1000 s to 2000 s; Raise the second temperature to the third temperature; At the third temperature, a polycrystalline silicon layer is formed on the amorphous silicon layer to form the polycrystalline silicon layer structure by means of cooling down and then heating up. This includes: introducing silane into a process chamber, wherein the silane decomposes at the third temperature to form the polycrystalline silicon layer on the amorphous silicon layer, wherein the flow rate of the silane is in the range of 1500 sccm to 2000 sccm, the third temperature is in the range of 580°C to 585°C, the pressure in the process chamber is in the range of 220 mtorr to 240 mtorr, and the process time is in the range of 3000 s to 5000 s.

2. The preparation method according to claim 1, characterized in that, Forming a tunneling oxide layer on a silicon substrate includes: Oxygen is introduced into the process chamber, and the oxygen reacts chemically with the silicon substrate at the first temperature to form a silicon dioxide layer, which is the tunneling oxide layer.

3. The preparation method according to claim 2, characterized in that, The oxygen flow rate ranges from 30,000 sccm to 40,000 sccm; And / or, the first temperature ranges from 605°C to 630°C; And / or, the pressure inside the process chamber is atmospheric pressure; And / or, the oxygen is introduced for a period of 300s to 500s, and the oxygen is not introduced for a period of 600s to 1000s.

4. The preparation method according to claim 1, characterized in that, Cooling the first temperature to the second temperature includes: An inert gas is introduced into the process chamber, and the flow rate of the inert gas is in the range of 1000 sccm to 2000 sccm. In an inert gas environment, the temperature is cooled from 605℃ to 630℃ to 565℃ to 575℃ over a period of 500s to 1500s.

5. The preparation method according to claim 1, characterized in that, Raising the temperature from the second temperature to the third temperature includes: In a vacuum environment, the temperature is raised from 565℃ to 575℃ to 580℃ to 585℃ over a period of 100s to 200s.

6. A solar cell, characterized in that, The solar cell includes a polycrystalline silicon layer structure, which is prepared by the preparation method described in any one of claims 1 to 5.

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