Method for improving matching effect of blind via of HDI circuit board
By optimizing the inner layer circuit fabrication, lamination inspection, drilling inspection, and outer layer circuit exposure alignment processes, as well as the drilling spindle precision correction, the problem of poor matching effect of blind vias in HDI circuit boards was solved, the alignment accuracy and drilling accuracy of blind vias were improved, and the quality of circuit boards was improved.
Patent Information
- Application Number
- CN202410889046.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-04
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2044-07-04
AI Technical Summary
The existing HDI circuit board blind via matching effect is not good, which makes it difficult to conduct between layers and install electronic components.
By controlling the standards for inner layer circuit fabrication, optimizing processes such as lamination testing, drilling testing, and outer layer circuit exposure alignment, and combining this with drill spindle precision calibration, the alignment accuracy of blind through holes and the accuracy of drilling positions are ensured.
It improves the alignment and drilling accuracy of blind vias, enhances the quality of circuit boards, and improves the conductivity between layers and the installation effect of components.
Smart Images

Figure CN118612978B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit board manufacturing technology, and specifically to a method for improving the matching effect of blind vias in HDI circuit boards. Background Technology
[0002] Circuit boards are the substrates that carry electronic components. With the miniaturization of electronic products, circuit boards are becoming thinner, denser, and smaller in size. Due to space limitations, traditional mechanical drilling through holes cannot meet the interconnection between layers of such circuit boards. Therefore, laser blind holes, which have the advantage of smaller apertures, have emerged.
[0003] Circuit boards (PCBs) are classified by hole type. Besides traditional through-hole boards, they also include HDI blind via boards and through-blind via boards (PCBs with both mechanically drilled through-holes and laser-drilled blind vias on the same board). Through-blind via PCBs not only allow for conductivity between layers in fine circuitry but also facilitate the insertion of electronic components. However, the alignment of through-holes and blind vias has always been a challenging problem in the industry. Often, through-holes are perfectly aligned, but blind vias break, or vice versa, resulting in misaligned and broken through-holes, thus affecting conductivity between layers and the insertion and mounting of electronic components. Therefore, the alignment and matching of blind vias and through-holes within a through-blind via board is a crucial indicator of quality.
[0004] Therefore, it is necessary to provide a method to improve the matching effect of blind vias in HDI circuit boards to solve the above-mentioned technical problems. Summary of the Invention
[0005] The technical problem to be solved by the present invention is to provide a method for improving the matching effect of blind vias in HDI circuit boards, which can improve the alignment accuracy of blind vias and thus improve the quality of circuit boards.
[0006] The technical solution of the present invention is as follows:
[0007] A method for improving the matching effect of blind vias in HDI circuit boards includes:
[0008] For inner layer circuit fabrication, the standard for the edge margin of inner layer circuit film / coating is controlled to be 0.5-1mm to ensure the integrity of the target holes after the inner layer circuit is etched, and the allowable deviation of line width / line spacing is controlled to be ±15%, the allowable deviation of impedance line width is ±8%, and the allowable deviation of PAD and BGA size is ±10%.
[0009] Pressing is performed, and X-ray inspection is used to check whether the positioning target holes / pressing target holes of the inner layer plate are concentric circles. If they are concentric circles, the pressing is qualified.
[0010] Mechanical drilling of through holes and laser drilling of blind holes are performed, and X-ray inspection is used to check whether the through holes / blind holes are within the inner hole ring or inner PAD. If they are within the inner hole ring or inner PAD, the alignment of the through / blind hole is deemed qualified.
[0011] For outer layer circuit fabrication, outer layer CCD alignment holes are drilled on the outer layer circuit board using the lamination target hole as the alignment target, and exposure is performed using the lamination target hole and the outer layer CCD alignment hole as alignment targets. During exposure, the PE value is ≤30 and the average score is ≤15.
[0012] Furthermore, during the fabrication of the inner layer circuitry, the film expansion and contraction coefficient is controlled according to different board materials, board thicknesses, and lamination cycles.
[0013] Furthermore, the method for checking whether the positioning target holes / pressing target holes of the inner layer plate are concentric circles after pressing is by sampling inspection, and the sampling inspection ratio is 1-2pnl / 60pnl.
[0014] Furthermore, the method for detecting whether the through holes / blind holes are within the inner hole ring or inner PAD after mechanical drilling and laser drilling is by sampling, and the sampling ratio is 1-2 pnl / 60 pnl.
[0015] Furthermore, during exposure, two lamination target holes and two outer CCD alignment holes are used as alignment targets, and the two lamination target holes and two outer CCD alignment holes are diagonally distributed.
[0016] Furthermore, it also includes: after maintenance of mechanical drilling rigs and laser drilling rigs, the first piece to be inspected is the CPK of each spindle, and the CPK must be ≥1.33.
[0017] Furthermore, drilling through holes / blind holes also includes: calibrating the accuracy of the drilling rig spindle.
[0018] Furthermore, the accuracy of the drilling rig spindle is calibrated, including:
[0019] A test probe is clamped in the drill spindle, and the diameter of the test probe is the same as the diameter of the pin.
[0020] The drilling rig spindle moves, causing the test probe to move to the pin. The sensor on the drilling rig spindle detects the actual coordinates of the test probe and sends the coordinate signal to the equipment computer.
[0021] The drilling rig spindle moves, causing the test probe to move to points B and C of the PIN slot. The sensor on the drilling rig spindle detects the actual coordinates of the test probe at the corresponding position and sends the coordinate signal to the equipment computer.
[0022] The actual coordinates of the detected points are compared with the set coordinates of the corresponding positions to calculate the offset of each point. Then, based on the offset, it is determined whether to replace the spindle chuck or calibrate the spindle.
[0023] Furthermore, the accuracy of the drilling rig spindle is calibrated once every 3-4 days.
[0024] Compared with the prior art, the method for improving the matching effect of blind vias in HDI circuit boards provided by the present invention has the following advantages:
[0025] I. The method for improving the matching effect of blind vias in HDI circuit boards provided by this invention, during the fabrication of inner layer circuits, controls the margin standards for inner layer line film / coating, as well as the allowable deviation values for line width / spacing, impedance line width, PADs, and BGAs, to make the fabrication of inner layer circuits more standardized, thereby ensuring the integrity and positional accuracy of inner layer target points; after lamination, it checks whether the positioning target holes / lamination target holes of the inner layer board are concentric circles to ensure high alignment accuracy of the inner layer circuit board after lamination; it further improves the alignment rate of through holes / blind vias by checking whether they are within the inner layer hole ring or inner layer PADs; and it improves the alignment between inner and outer layers by optimizing the exposure alignment and target-grabbing alignment method of outer layer circuits.
[0026] II. The method for improving the matching effect of blind through holes in HDI circuit boards provided by the present invention ensures that the drilling position is consistent with the pre-fabricated position by correcting the accuracy of the drilling spindle, thereby further ensuring the drilling accuracy. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 This is a schematic diagram of coordinate detection during the accuracy correction process of the drilling rig spindle in this invention. Detailed Implementation
[0029] To enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, and to make the above-mentioned objectives, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be further described below.
[0030] It should be noted that the descriptions of these embodiments are for the purpose of aiding understanding the present invention, but do not constitute a limitation thereof. Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0031] A method for improving the matching effect of blind vias in HDI circuit boards includes:
[0032] (1) Inner layer circuit fabrication: control the standard of the inner layer circuit film / coating margin to be 0.5-1mm, ensure the integrity of the target hole after the inner layer circuit is etched, and control the allowable deviation of line width / line spacing to be ±15%, the allowable deviation of impedance line width to be ±8%, and the allowable deviation of PAD and BGA size to be ±10%; and when fabricating the inner layer circuit, control the film expansion and contraction coefficient according to different board materials, different board thicknesses and different lamination times.
[0033] (2) Pressing, and X-ray inspection is used to check whether the positioning target hole / pressing target hole of the inner layer plate is a concentric circle. If it is a concentric circle, the pressing is qualified. The inspection method is sampling inspection, and the sampling ratio is 1-2pnl / 60pnl.
[0034] (3) Mechanically drill through holes and laser drill blind holes, and use X-ray to check whether the through holes / blind holes are in the inner hole ring or inner PAD. If they are in the inner hole ring or inner PAD, they are considered to be aligned. The inspection method is sampling inspection, and the sampling ratio is 1-2pnl / 60pnl.
[0035] During the process of mechanical drilling through holes and laser drilling blind holes, the mechanical drilling machine and laser drilling machine need to be maintained regularly. After maintenance, the CPK of each spindle needs to be checked as the first piece and it must meet the requirement of CPK≥1.33.
[0036] To improve drilling accuracy, the accuracy of the drilling rig spindle needs to be calibrated. Specific methods include:
[0037] Clamp a test probe onto the drill spindle, the diameter of the test probe being the same as the diameter of the pin.
[0038] The origin (0,0) of the pin is set to coordinate A. The drilling rig spindle moves, causing the test probe to move to the edge of the pin. The sensor on the drilling rig spindle detects the actual coordinates of the probe and sends the detection signal back to the equipment computer. For example, if the origin coordinates of the pin are set to A(0,0), and the actual detection coordinates are A1(-0.5, -1), then... Figure 1 As shown;
[0039] The drilling rig spindle drives the test probes to points B and C of the PIN slot, respectively. The sensors on the drilling rig spindle detect the actual coordinates of the test probes at the corresponding positions and feed the coordinate signals back to the equipment computer. For example, the set coordinates of point B are (0,5), and the set coordinates of point C are (0,4); while the actual detected coordinates are B1(-0.6, 4.8) and C1(-0.5, 4), respectively. Figure 1 As shown;
[0040] The actual coordinates of the detected points are compared with the set coordinates of the corresponding positions to calculate the offset of each point. Then, based on the offset, it is determined whether to replace the spindle chuck or calibrate the spindle.
[0041] By calibrating the precision of the drilling rig spindle, the drilling position is ensured to be consistent with the pre-drilled position, thereby further ensuring drilling accuracy. Preferably, the precision of the drilling rig spindle is calibrated once every 3-4 days, and more preferably, it is calibrated once every 3 days.
[0042] (4) Outer layer circuit fabrication: using the lamination target hole as the alignment target, drill the outer layer CCD alignment hole on the outer layer circuit board, and use the lamination target hole and the outer layer CCD alignment hole as alignment targets for exposure. During exposure, the PE value is ≤30 and the average score is ≤15.
[0043] During the fabrication of the outer layer circuitry, the alignment between the inner and outer layers is improved by optimizing the exposure alignment and target-grabbing method. Specifically, the lamination target holes are punched out by an X-ray machine after lamination, using the positioning target holes of the inner layer board as positioning holes. The outer layer CCD alignment holes are drilled using the lamination target holes as positioning holes, representing holes drilled using two different alignment reference systems. This invention improves the alignment accuracy between the inner and outer layer patterns by using two lamination targets and two outer layer CCD alignment holes as alignment targets, thereby improving the alignment of through-holes / blind holes. Preferably, the two outer layer CCD alignment holes and the two lamination target holes are diagonally distributed.
[0044] In the exposure process, PE value refers to Pitch Error, which is the size difference between the exposed film and the substrate. The higher the PE value, the worse the match between the exposed film and the substrate. It is necessary to adjust the parameters of the exposure machine to reduce the PE value. To ensure the accuracy of exposure, the PE value should be set ≤30 and the average value ≤15.
[0045] The present invention provides a method for improving the matching effect of blind vias in HDI circuit boards. By controlling the process from multiple aspects, the alignment of vias / blind vias is improved, thereby improving the matching effect of blind vias and enhancing the quality of the circuit board.
[0046] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations made to these embodiments without departing from the principles and spirit of the present invention still fall within the protection scope of the present invention.
Claims
1. A method for improving the blind via matching effect of an HDI circuit board, characterized in that, The method comprises the following steps: Inner layer circuit manufacturing, the control inner layer circuit film / coating reserved edge standard is 0.5-1mm, the line width / line spacing allowed deviation is ±15%, the impedance line width allowed deviation is ±8%, the PAD and BGA size allowed deviation is ±10%; Pressing, and detecting whether the positioning target hole / pressing target hole of the inner layer plate is a concentric circle through X-RAY, if it is a concentric circle, the pressing is qualified; Mechanical drilling through hole and laser drilling blind hole, and detecting whether the through hole / blind hole is in the inner layer hole ring or inner layer PAD through X-RAY, if it is in the inner layer hole ring or inner layer PAD, it is determined that the through hole / blind hole alignment is qualified; The drilling machine spindle is clamped with a test probe, the diameter of the test probe is consistent with the diameter of the pin PIN; The drilling machine spindle moves to drive the test probe to move to the pin PIN, the sensor of the drilling machine spindle detects the actual coordinates of the test probe, and sends the coordinate signal to the equipment computer; The drilling machine spindle moves to drive the test probe to move to the B point and C point of the PIN slot, the sensor of the drilling machine spindle detects the actual coordinates of the test probe at the corresponding position, and sends the coordinate signal to the equipment computer; The detected actual coordinates are compared with the set coordinates at the corresponding position, the offset of each point is calculated, and then the spindle chuck or the spindle is replaced or corrected according to the offset; Outer layer circuit manufacturing, drilling outer layer CCD alignment holes on the outer layer circuit board with the pressing target hole as the alignment target, and exposing with the pressing target hole and the outer layer CCD alignment hole as the alignment target, the PE value is ≤30, and the average value is ≤15; When exposing, two pressing target holes and two outer layer CCD alignment holes are used as alignment targets, and the two pressing target holes and the two outer layer CCD alignment holes are diagonally distributed. During the inner layer circuit manufacturing, the film shrinkage coefficient is controlled according to different plate materials, different plate thicknesses and different pressing times.
2. The method of claim 1, wherein the method is performed by a computer system. After pressing, the way to detect whether the positioning target hole / pressing target hole of the inner layer plate is a concentric circle is sampling inspection, and the sampling inspection ratio is 1-2pnl / 60pnl.
3. The method of claim 1, wherein the method is performed by a computer system. After mechanical drilling through hole and laser drilling blind hole, the way to detect whether the through hole / blind hole is in the inner layer hole ring or inner layer PAD is sampling inspection, and the sampling inspection ratio is 1-2pnl / 60pnl.
4. The method of claim 1, wherein the method is performed by a computer system. After the maintenance of the mechanical drill and the laser drill, the CPK of each spindle needs to be checked, and the CPK is greater than or equal to 1.
33.
5. The method of claim 1, wherein the method is performed by a computer system. The frequency of correcting the accuracy of the drilling machine spindle is once every 3-4 days. 6. The method of claim 1, wherein the method is performed by a computer system.
Citation Information
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CN104244589A
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