Test fixtures, methods, systems, equipment, media and products

Abstract

The present application provides a test fixture, method, system, device, medium and product, which relate to the field of interface testing technology, including: multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces and a configuration file storage module, the multiple first PCIe interfaces are used to connect with the corresponding multiple second PCIe interfaces of a device to be tested, the configuration file storage module stores a configuration file, the first optional module is used to select a second PCIe interface to be tested from the multiple second PCIe interfaces according to the configuration file; the second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested; and the multiple bridges are used to allocate the bandwidth of the second PCIe interface to be tested to the PCIe device on the PCIe slot to be tested for testing.

Description

Technical Field

[0001] The present application relates to the field of interface testing technology, and in particular to a test fixture, method, system, equipment, medium and product. Background Art

[0002] The demands for server products are becoming more and more diversified. The configurations of general server products are increasing. The number of PCLE Lanes supported by processors is also increasing. There are also more and more PCIe interfaces on the motherboard. In addition, the number of components supported by servers is increasing, and components with different bandwidths and rates need to be supported. How to verify whether the PCIe interface function on the motherboard can meet the component requirements and whether the interface function is normal during testing? Within the limited test cycle, it is currently necessary to test by replacing different components. Different types of test components are frequently replaced during the test, which increases the testing workload. Summary of the invention

[0003] In view of this, embodiments of the present application provide a test fixture, method, system, device, medium and product to overcome the above-mentioned problems or at least partially solve the above-mentioned problems.

[0004] PCIe (Peripheral Component Interconnect Express) is a high-speed serial computer expansion bus standard used to achieve high-speed data transmission in computer systems. There is a close relationship between the PCIe interface and bandwidth and rate.

[0005] MCIO: Mini Cool Edge IO, full name multi-channel input / output, is an interface technology that merges multiple physical channels into a high-speed data stream. It is a high-performance, high-density internal interface solution designed to meet the needs of next-generation high-speed signal transmission. It supports multiple data transmission protocols, such as PCIe, CXL, etc., and adapts to the needs of new-generation technical specifications such as PCle6.0.

[0006] GPIO: General-purpose input / output, short for general-purpose input / output, functions similar to P0-P3 of 8051, its pins can be freely used by users through program control, and the pins can be used as general-purpose input (GPI) or general-purpose output (GPO) or general-purpose input and output (GPIO) according to practical considerations.

[0007] FRU: Field Replace Unit Field replaceable unit.

[0008] A first aspect of an embodiment of the present application provides a test fixture, the test fixture comprising a plurality of bridges, a first optional module, a second optional module, a plurality of PCIe slots, a plurality of first PCIe interfaces, and a configuration file storage module, the plurality of first PCIe interfaces being used to connect to a plurality of corresponding second PCIe interfaces of a device under test, the configuration file storage module storing a configuration file, the configuration file comprising information of the plurality of second PCIe interfaces and information of the plurality of PCIe slots;

[0009] The first selection module is used to select a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file;

[0010] The second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module;

[0011] The multiple bridges are used to allocate the bandwidth of the second PCIe interface that needs to be tested to the PCIe device on the PCIe slot that needs to be tested for testing.

[0012] Optionally, the second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module, including:

[0013] The second matching module is used to determine multiple bandwidth specifications that can be satisfied by the total bandwidth according to the total bandwidth that can be provided by the second PCIe interface that needs to be tested;

[0014] The second optional module is used to select multiple PCIe slots that can meet the bandwidth specifications as the PCIe slots required for testing based on each bandwidth specification and the information of multiple PCIe slots in the configuration file, so that the test fixture tests the second PCIe interface to be tested based on the bandwidth specification.

[0015] Optionally, the test fixture further includes a control circuit;

[0016] The second optional module is further used to send a control signal to the control circuit based on the PCIe slot required for testing;

[0017] The control circuit is used to control the PCIe slot required for testing to be turned on based on the control signal, and to control the PCIe slots of the multiple PCIe slots that are not required for testing to be shielded except for the PCIe slot required for testing.

[0018] Optionally, the control circuit includes at least an output driver, a P-MOS tube, an N-MOS tube, and an I / O port; the control circuit is used to control the PCIe slot required for testing to be turned on based on the control signal, and to control the PCIe slots of the plurality of PCIe slots other than the PCIe slot required for testing to be shielded, including:

[0019] The control circuit is used for controlling the P-MOS tube to be turned off and the N-MOS tube to be turned on when the output control of the output driver outputs a first value, so that the I / O port outputs a low level, and the low level is used to control the first general input and output value corresponding to the PCIe slot required for testing, and control the PCIe slot required for testing to be turned on through the first general input and output value;

[0020] The control circuit is used to control the P-MOS tube to be turned on and the N-MOS tube to be turned off when the output control of the output driver outputs a second value, so that the I / O port outputs a high level, and the high level is used to control the second general input and output value corresponding to the PCIe slot that needs to be tested, and through the second general input and output value, control the shielding of the PCIe slot that does not need to be used for testing.

[0021] Optionally, the control circuit is further used for, after determining the second PCIe interface to be tested and the second PCIe interface to be tested, controlling the connection of the second PCIe interface to be tested and the PCIe slot to be tested through the multiple bridges, with the purpose of each of the second PCIe interfaces to be tested being able to be allocated a bandwidth of the selected bandwidth specification;

[0022] The control circuit is also used to shield the PCIe slots that do not meet the selected bandwidth specification.

[0023] A second aspect of an embodiment of the present application provides a testing method, which is applied to a test fixture, wherein the test fixture includes a plurality of bridges, a first optional module, a second optional module, a plurality of PCIe slots, a plurality of first PCIe interfaces, and a configuration file storage module, wherein the plurality of first PCIe interfaces are used to connect to a plurality of corresponding second PCIe interfaces of a device to be tested, and the configuration file storage module stores a configuration file, wherein the configuration file includes information about the plurality of second PCIe interfaces and information about the plurality of PCIe slots;

[0024] Selecting, through the first selection module, a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file;

[0025] Selecting, through the second optional module, a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module;

[0026] The bandwidth of the second PCIe interface that needs to be tested is allocated to the PCIe device on the PCIe slot that needs to be tested for testing through the multiple bridges.

[0027] In a third aspect of an embodiment of the present application, a test system is provided, the test system comprising a test fixture, a device under test and a plurality of PCIe devices, the test fixture comprising a plurality of bridges, a first optional module, a second optional module, a plurality of PCIe slots, a plurality of first PCIe interfaces and a configuration file storage module, the configuration file storage module storing a configuration file, the configuration file comprising information of the plurality of second PCIe interfaces and information of the plurality of PCIe slots, the information of the plurality of second PCIe interfaces and the information of the plurality of PCIe slots being used to generate a preset matching rule, the test fixture being connected to the plurality of second PCIe interfaces corresponding to the device under test through the plurality of first PCIe interfaces, the test fixture being connected to the plurality of PCIe devices through the plurality of PCIe slots, and after the device under test is connected to the test fixture, bandwidth is provided to the plurality of PCIe devices through the plurality of bridges.

[0028] According to a fourth aspect of an embodiment of the present application, an electronic device is provided, comprising a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the method described in the second aspect.

[0029] In a fifth aspect of the embodiments of the present application, a computer program product is provided, including a computer program, which, when executed by a processor, implements the method described in the second aspect.

[0030] According to a sixth aspect of the embodiments of the present application, a computer-readable storage medium is provided, on which a computer program is stored, wherein when the computer program is executed by a processor, the method described in the second aspect is implemented.

[0031] Beneficial effects of this application:

[0032] The embodiments of the present application provide a test fixture, method, system, device, medium and product, wherein the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces and a configuration file storage module, wherein the multiple first PCIe interfaces are used to connect to the corresponding multiple second PCIe interfaces of a device to be tested, and the configuration file storage module stores a configuration file, wherein the configuration file includes information of the multiple second PCIe interfaces and information of the multiple PCIe slots; the first optional module is used to select a second PCIe interface to be tested from the multiple second PCIe interfaces according to the configuration file; the second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module; and the multiple bridges are used to allocate the bandwidth of the second PCIe interface to be tested to the PCIe device on the PCIe slot to be tested for testing.

[0033] Through the technical solution of the present application, multiple first PCIe interfaces and multiple PCIe slots configured on the test fixture can be respectively connected to multiple second PCIe interfaces and multiple PCIe devices that need to be tested of the device under test, and the information of the multiple second PCIe interfaces and the multiple PCIe slots are written into the configuration file. The first optional module traverses the multiple second PCIe interfaces in the configuration file, and each time one or two second PCIe interfaces that need to be tested are selected for testing, so that the second optional module selects the second PCIe interfaces that can adapt to the second PCIe interfaces that need to be tested according to the information of the multiple PCIe slots in the configuration file and the information of the one or two second PCIe interfaces that have been selected to be tested. The PCIe interface has multiple PCIe slots, and through multiple bridges, the bandwidth of the selected second PCIe interface that needs to be tested is allocated to the PCIe device on the PCIe slot that needs to be tested, so that the test fixture automatically performs the test of the second PCIe interface, bandwidth, and PCIe device. Since the multiple second PCIe interfaces and PCIe devices of the PCIe slots have been pre-connected to the test fixture, the tester does not need to perform the matching process of the configuration combination of the second PCIe interface that needs to be tested and the PCIe slot that needs to be tested each time, but can use the pre-set configuration file, the first matching module and the second matching module for automatic selection, thereby saving labor costs and improving test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application.

[0035] In order to more clearly illustrate the technical solution of the present application, the drawings required for use in the description of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0036] Figure 1 is a schematic diagram of a test fixture provided in one embodiment of the present application;

[0037] Figure 2 is a schematic diagram of a control circuit provided in one embodiment of the present application;

[0038] Figure 3 It is a flowchart of a testing method provided in one embodiment of the present application;

[0039] Figure 4 It is a structural schematic diagram of a testing device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0040] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application may be combined with each other.

[0041] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0042] Figure 1 is a schematic diagram of a test fixture provided by an embodiment of the present application, such as Figure 1 As shown, an embodiment of the present application provides a test fixture, the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces and a configuration file storage module, the multiple first PCIe interfaces are used to connect with the corresponding multiple second PCIe interfaces of the device to be tested, the configuration file storage module stores a configuration file, and the configuration file includes information of the multiple second PCIe interfaces and information of the multiple PCIe slots;

[0043] The first selection module is used to select a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file;

[0044] The second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module;

[0045] The multiple bridges are used to allocate the bandwidth of the second PCIe interface that needs to be tested to the PCIe device on the PCIe slot that needs to be tested for testing.

[0046] Specifically, the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces and a configuration file storage module, wherein one side of the test fixture is provided with multiple first PCIe interfaces, the multiple first PCIe interfaces are used to pre-establish connections with multiple second PCIe interfaces of the device to be tested, the second PCIe interfaces are all PCIe interfaces that need to be tested, and the other side of the test fixture is provided with multiple PCIe slots, the multiple PCIe slots are used to pre-establish connections with PCIe devices with multiple different bandwidth requirements.

[0047] The test fixture is also provided with a configuration file storage module storing configuration files, the configuration files include information of multiple second PCIe interfaces and multiple PCIe slots, the information of multiple second PCIe interfaces and multiple PCIe slots are used to indicate the PCIe interfaces that the test fixture needs to test, and various bandwidth specifications of the PCIe bandwidth of the PCIe devices that need to be supported, for example, the configuration file includes 16 X8 MCIOs under PE0 on the CPU of the device under test to be tested, and the PCIe slots are 1 X16 device, 2 X8 devices, and 4 X4 devices. Among them, the configuration file can be a FRU (Field Replace Unit, field replaceable unit).

[0048] After the device to be tested and multiple PCIe devices are connected to both sides of the test fixture, the first optional module selects one or two second PCIe interfaces from the multiple pre-established second PCIe interfaces as the second PCIe interfaces that need to be tested each time according to the information of the multiple second PCIe interfaces and the information of the multiple PCIe slots in the configuration file, until all the second PCIe interfaces in the configuration file are traversed. The first optional module can select the corresponding second PCIe interface through the Swithc (switch) chip, for example: PE PORT.

[0049] The device under test may be a server product.

[0050] After the first optional module selects the second PCIe interface that needs to be tested each time, the second optional module can select the PCIe slot that needs to be used for testing according to the second PCIe interface that has been selected and needs to be tested, wherein the PCIe slot that needs to be used for testing is a plurality of PCIe slots that can adapt to the second PCIe interface that needs to be tested.

[0051] After selecting the second PCIe interface to be tested and the PCIe slot to be tested, the corresponding configuration combination of the second PCIe interface to be tested and the PCIe slot to be tested can be obtained. For the configuration combination selected for each test, the bandwidth of the selected second PCIe interface to be tested is allocated to the PCIe device on the PCIe slot to be tested through multiple bridges on the test fixture to perform tests on the second PCIe interface, bandwidth, and PCIe device.

[0052] Through the above embodiment, the multiple first PCIe interfaces and the multiple PCIe slots configured on the test fixture can be respectively connected to the multiple second PCIe interfaces and the multiple PCIe devices that need to be tested of the device under test, and the information of the multiple second PCIe interfaces and the multiple PCIe slots are written into the configuration file. The first selection module traverses the multiple second PCIe interfaces in the configuration file, and each time one or two second PCIe interfaces that need to be tested are selected for testing, so that the second selection module selects the second PCIe interface that can adapt to the second PCIe interface that needs to be tested according to the information of the multiple PCIe slots in the configuration file and the information of the one or two second PCIe interfaces that have been selected and need to be tested. The invention relates to a PCIe interface having multiple PCIe slots and a plurality of bridges, so as to allocate the bandwidth of the selected second PCIe interface to be tested to the PCIe device on the PCIe slot to be tested, so that the test fixture automatically performs the test of the second PCIe interface, the bandwidth and the PCIe device. Due to the multiple second PCIe interfaces and the PCIe devices in the PCIe slots and the pre-connected test fixture, the tester does not need to perform the matching process of the configuration combination of the second PCIe interface to be tested and the PCIe slot to be tested each time, but can automatically select through the pre-set configuration file, the first matching module and the second matching module, thereby saving labor costs and improving test efficiency.

[0053] Optionally, the second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module, including:

[0054] The second matching module is used to determine multiple bandwidth specifications that can be satisfied by the total bandwidth according to the total bandwidth that can be provided by the second PCIe interface that needs to be tested;

[0055] The second optional module is used to select multiple PCIe slots that can meet the bandwidth specifications as the PCIe slots required for testing based on each bandwidth specification and the information of multiple PCIe slots in the configuration file, so that the test fixture tests the second PCIe interface to be tested based on the bandwidth specification.

[0056] Specifically, in one embodiment, the process of the second optional module selecting the PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module specifically includes the following steps: First, according to the second PCIe interface to be tested that has been selected by the first optional module, the total bandwidth that can be provided by the second PCIe interface to be tested is calculated. For example, when two X8 PCIe interfaces are selected, the total bandwidth that can be provided is X16. Further, according to the calculated total bandwidth that can be provided by the second PCIe interface, multiple bandwidth specifications that can be satisfied by the total bandwidth are determined. For example, when the total bandwidth is X16, the multiple bandwidth specifications that can be satisfied are bandwidth specifications not greater than X16, including X16, X8, and X4.

[0057] Further, the second optional module selects multiple PCIe slots that can meet the bandwidth specifications as the PCIe slots needed for testing based on each bandwidth specification that can be met and information on multiple PCIe slots in the configuration file, for example, X16, X8, and X4, that is, determines the PCIe slots of X16, X8, and X4 as the PCIe slots needed for testing, so that the test fixture tests the second PCIe interface to be tested according to each bandwidth specification.

[0058] Through the above embodiment, the second optional module can be used to calculate the total bandwidth that can be provided by the second PCIe interface that needs to be tested, and the PCIe slot that needs to be used for testing can be determined in combination with the configuration file, so that all bandwidth specifications for testing can be quickly determined, which not only improves the test efficiency, but also ensures the quality of the test, and ultimately can improve the product quality of the device under test.

[0059] Optionally, the test fixture further includes a control circuit;

[0060] The second optional module is further used to send a control signal to the control circuit based on the PCIe slot required for testing;

[0061] The control circuit is used to control the PCIe slot required for testing to be turned on based on the control signal, and to control the PCIe slots of the multiple PCIe slots that are not required for testing to be shielded except for the PCIe slot required for testing.

[0062] Figure 2 It is a schematic diagram of a control circuit provided in one embodiment of the present application.

[0063] Specifically, in one embodiment, a control circuit is also provided inside the test fixture, such as Figure 2 As shown, the control circuit can control the connection and shielding of multiple PCIe slots on the test fixture according to the control signal used to represent the selected PCIe slots that need to be tested, connect the PCIe slots that need to be tested, and shield the PCIe slots that do not need to be tested except the PCIe slots that need to be tested.

[0064] For example, through the test fixture, according to the configuration file in the test fixture, the second PCIe interface of the device under test that needs to be tested is selected as 2 X8 MCIOs under PE0 on the CPU. At this time, the PCIe slots on the test fixture are 1 X16, 2 X8, and 4 X4.

[0065] When the bandwidth specification of an X16 bandwidth device is to be tested, only the X16 PCIe slot is enabled, and the remaining X8 PCIe slot and two x4 PCIe slots are shielded, so that the PCIe devices on the X8 PCIe slot and the two x4 PCIe slots will not be recognized.

[0066] When you want to test the bandwidth specifications of two X8 bandwidth devices, only the X16 PCIe slot and the X8 PCIe slot are enabled, and the two x4 PCIe slots are shielded. The PCIe devices on the x4 PCIe slots will not be identified, and the bandwidth allocated to the x16 PCIe slot and the x8 PCIe slot is x8.

[0067] When testing the bandwidth specification of a 4*X4 bandwidth device, four X4 PCIe slots will be enabled, and the PCIe bandwidth of each X4 will be allocated as X4.

[0068] The same applies to other situations.

[0069] Through the above-mentioned embodiments, the PCIe slots that do not need to be tested currently can be shielded through the control circuit, and the PCIe devices in the selected PCIe slots can be tested in a targeted manner without manual operation, thereby preventing the PCIe devices on the shielded PCIe slots from participating in the current test process. In addition, the test cycle of the current test and the influence of external interference can be reduced, thereby improving the accuracy of the test results.

[0070] Optionally, the control circuit includes at least an output driver, a P-MOS tube, an N-MOS tube, and an I / O port; the control circuit is used to control the PCIe slot required for testing to be turned on based on the control signal, and to control the PCIe slots of the plurality of PCIe slots other than the PCIe slot required for testing to be shielded, including:

[0071] The control circuit is used for controlling the P-MOS tube to be turned off and the N-MOS tube to be turned on when the output control of the output driver outputs a first value, so that the I / O port outputs a low level, and the low level is used to control the first general input and output value corresponding to the PCIe slot required for testing, and control the PCIe slot required for testing to be turned on through the first general input and output value;

[0072] The control circuit is used to control the P-MOS tube to be turned on and the N-MOS tube to be turned off when the output control of the output driver outputs a second value, so that the I / O port outputs a high level, and the high level is used to control the second general input and output value corresponding to the PCIe slot that needs to be tested, and through the second general input and output value, control the shielding of the PCIe slot that does not need to be used for testing.

[0073] Specifically, in one embodiment, the specific control process of the control circuit is as follows: Figure 2 As shown, first,

[0074] After the second selection module selects the PCIe slot for testing, it sends a control signal to the control circuit, wherein one control signal is sent correspondingly to each PCIe slot that needs to be used for testing.

[0075] In the first case, after receiving the control signal, the control circuit writes the control signal into the set / clear register, and configures the output value sent to the output data register in combination with the on-chip peripherals. The output value needs to be combined with the multiplexing function output to perform an AND operation to obtain the first value of the output control output of the output driver, and the first value can be represented as 0, wherein the multiplexing function output is determined according to whether the PCIe device on the selected PCIe slot is in place. When the PCIe device is in place and the output value output by the output data register indicates the PCIe slot where the PCIe device in place is located, an AND operation is performed, and the first value is obtained through output control, and the first value is input into the P-MOS tube and the N-MOS tube, so that the P-MOS tube is turned off and the N-MOS tube is turned on. The P-MOS tube and the N-MOS tube are connected to the I / O port and can output a low level through the I / O port, thereby controlling the first general input and output value (GPIO) corresponding to the PCIe slot to be tested through the low level, and controlling the PCIe slot to be tested corresponding to the control signal to be turned on.

[0076] In the second case, after receiving the control signal, the control circuit writes the control signal into the set / clear register, and configures the output value sent to the output data register in combination with the on-chip peripherals. The output value needs to be combined with the multiplexing function output to perform an AND operation to obtain the second value of the output control output of the output driver. The second value can be expressed as 1, wherein the multiplexing function output is determined based on whether the PCIe device on the selected PCIe slot is in place. When the PCIe device is in place and the output value output by the output data register indicates that the PCIe slot where the PCIe device in place is located is selected, an AND operation is performed, and the second value is obtained through output control. The second value is input into the P-MOS tube and the N-MOS tube, so that the P-MOS tube is turned on and the N-MOS tube is turned off. The P-MOS tube and the N-MOS tube are connected to the I / O port and can output a high level through the I / O port, thereby controlling the second general input and output value corresponding to the PCIe slot that does not need to be used for testing through the high level, and controlling the shielding of the PCIe slot that does not need to be used for testing corresponding to the control signal.

[0077] As an example, Figure 1 As shown, when the included PCIe slots include 1 X16 PCIe slot, 1 X8 PCIe slot and 2 X4 PCIe slots, after connecting multiple second PCIe interfaces for testing of CPU0 PE0 of the device under test to the test fixture, and plugging a PCIe device with a bandwidth matching the PCIe slot into the PCIe slot of the test fixture.

[0078] After reading the FRU information in the configuration file and completing the configuration combination selection

[0079] 1. First, test the support of a PCIe device with X16 bandwidth specification. Select the X16 PCIe slot by setting the GPIO tool.

[0080] The relevant commands are as follows:

[0081] ① gpiofind uses gpio-line-names to find the corresponding PCIe slot;

[0082] ② Gpioset can set the current GPIO value (i.e. general input and output value) of each PCIe slot;

[0083] gpioset --mode=waitgpiochip0 12=0 #Select the PCIe slot of X16;

[0084] gpioset --mode=waitgpiochip0 12=1 #Shield the PCIe slot of X8;

[0085] gpioset --mode=waitgpiochip0 12=1 #Shield the first X4 PCIe slot;

[0086] gpioset --mode=waitgpiochip0 12=1 #Shield the second X4 PCIe slot;

[0087] ③Perform relevant tests on the PCIe device on the x16 slot. At this time, the x16 slot allocates x16 bandwidth

[0088] 2. After testing the X16 bandwidth specification, test the PCIe device that supports two X8 bandwidth specifications. Select the X16 PCIe slot and the X8 PCIe slot by setting the GPIO tool.

[0089] The relevant commands are as follows:

[0090] ① gpiofind uses gpio-line-names to find the corresponding PCIe slot;

[0091] ② Gpioset can set the current GPIO value of each PCIe slot

[0092] gpioset --mode=waitgpiochip0 12=0 #Select the PCIe slot of X16;

[0093] gpioset --mode=waitgpiochip0 12=0 #Select the PCIe slot of X8;

[0094] gpioset --mode=waitgpiochip0 12=1 #Shield the first X4 PCIe slot;

[0095] gpioset --mode=waitgpiochip0 12=1 #Shield the second X4 PCIe slot;

[0096] ③Perform relevant tests on the PCIe devices on the X16 PCIe slot and the X8 PCIe slot. At this time, the X16 PCIe slot is only allocated with the bandwidth of X8.

[0097] 3. Test the PCIe devices that support 4 x4 bandwidth specifications. Select 1 x16 PCIe slot, 1 x8 PCIe slot, and 2 x4 PCIe slots by setting the GPIO tool.

[0098] The relevant commands are as follows:

[0099] ① gpiofind uses gpio-line-names to find the corresponding position;

[0100] ② Gpioset can set the current GPIO value of each PCIe slot

[0101] gpioset --mode=waitgpiochip0 12=0 #Select the PCIe slot of X16;

[0102] gpioset --mode=waitgpiochip0 12=0 #Select the PCIe slot of X8;

[0103] gpioset --mode=waitgpiochip0 12=0 #Select the first X4 PCIe slot;

[0104] gpioset --mode=waitgpiochip0 12=0 #Select the second X4 PCIe slot;

[0105] ③Perform relevant tests on PCIe devices on the X16 PCIe slot, the X8 PCIe slot, and two X4 PCIe slots. At this time, each PCIe slot is allocated a bandwidth of x4.

[0106] When it is necessary to test whether the second PCIe interface supports other PCIe devices, the PCIe hot-swap function can be supported to achieve the replacement of PCIe devices without powering off, thereby improving test efficiency.

[0107] Similarly, the high and low levels of the output can be read by the input data register in the control circuit. When the output level state is set to a high level, the P-MOS tube is in the on state and the N-MOS tube is in the off state. At this time, the level of the I / O port is determined by the P-MOS tube: high level; when the output level state is set to a low level, the P-MOS tube is in the off state and the N-MOS tube is in the on state. At this time, the level of the I / O port is determined by the N-MOS tube: low level.

[0108] Through the above embodiments, the GPIO of each PCIe slot can be set by realizing high-level and low-level outputs through the P-MOS tube and the N-MOS tube in the control circuit, so as to control the connection and shielding of each PCIe slot, thereby improving the efficiency of the test.

[0109] Optionally, the control circuit is further used for, after determining the second PCIe interface to be tested and the second PCIe interface to be tested, controlling the connection of the second PCIe interface to be tested and the PCIe slot to be tested through the multiple bridges, with the purpose of each of the second PCIe interfaces to be tested being able to be allocated a bandwidth of the selected bandwidth specification;

[0110] The control circuit is also used to shield the PCIe slots that do not meet the selected bandwidth specification.

[0111] Specifically, in the test fixture, the second PCIe interface on the mainboard end of the device to be tested can be connected to the PCIe slot through the control circuit, so as to test the PCIe interface of the corresponding PCIe slot. Through the connection between multiple bridges, the total bandwidth that can be provided by the second PCIe interface to be tested can be allocated to the PCIe slot to be tested according to the selected bandwidth specification. For example, when the total bandwidth that can be provided by the second PCIe interface to be tested is X16 and the bandwidth specification is X8, the X16 bandwidth can be allocated to multiple X8 bandwidths to the PCIe devices of the PCIe slot to be tested through the connection between multiple bridges. If there is a PCIe slot that does not meet the selected bandwidth specification, such as an X4 PCIe slot, the X4 PCIe slot is shielded.

[0112] Through the above embodiment, the connection between multiple bridges can be controlled by the control circuit to allocate the bandwidth of the second PCIe interface that currently needs to be tested to the PCIe slot that can meet the bandwidth specification according to the bandwidth specification, without the need for manual bandwidth allocation, thereby improving the test efficiency.

[0113] Optionally, when the PCIe device is also an NVMe (Non-Volatile Memory Express) hard disk, firstly, the configuration file stored in the configuration file storage module can be prepared to write the information of all second PCIe interfaces and the corresponding PCIe slots. Such information is crucial for identifying the NVMe hard disk to be tested and determining the location of its PCIe interface.

[0114] Further, through the first matching module, according to the PCIe interface information of the NVMe hard disk provided in the configuration file, all interfaces adapted by the NVMe hard disk are selected from the plurality of second PCIe interfaces. This process can be performed based on the serial number, label or other unique identifier of the NVMe hard disk.

[0115] Furthermore, through the second optional module, the most suitable PCIe slot for testing is determined from multiple PCIe slots according to the detailed information of the PCIe slot provided in the configuration file (such as slot location, hardware type, etc.) and the required PCIe interface information (i.e. the selected NVMe hard disk interface). This process may require consideration of the compatibility between the PCIe interface and the PCIe slot, system stability, and test efficiency.

[0116] Further, connect the NVMe drive to the selected PCIe slot via a bridge. Ensure proper physical connection and may need to configure the PCIe settings according to the drive manufacturer's recommendations or PCIe standards to ensure optimal performance.

[0117] Furthermore, use the test software built into the test fixture (such as CrystalDiskMark, ATTO DiskBenchmark, HDTune, etc.) or external test tools to perform performance tests on NVMe hard drives.

[0118] Through the above embodiments, the performance of NVMe hard disks in different PCIe slots can be tested, which can not only help identify the best hardware configuration, but also provide a basis for subsequent hardware optimization and system design.

[0119] Figure 3 is a flow chart of a testing method provided by an embodiment of the present application, such as Figure 3As shown, a test method provided by an embodiment of the present application is applied to a test fixture, wherein the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces, and a configuration file storage module, wherein the multiple first PCIe interfaces are used to connect to the corresponding multiple second PCIe interfaces of a device under test, and the configuration file storage module stores a configuration file, wherein the configuration file includes information about the multiple second PCIe interfaces and information about the multiple PCIe slots;

[0120] Step S101, selecting a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file through the first matching module;

[0121] Step S102, selecting a PCIe slot to be tested through the second optional module according to the configuration file and the second PCIe interface to be tested selected by the first optional module;

[0122] Step S103: Allocate the bandwidth of the second PCIe interface that needs to be tested to the PCIe device on the PCIe slot that needs to be tested through the multiple bridges for testing.

[0123] Optionally, selecting a PCIe slot to be tested by the second optional module according to the configuration file and the second PCIe interface to be tested selected by the first optional module includes:

[0124] Determine, by the second optional module, multiple bandwidth specifications that can be satisfied by the total bandwidth according to the total bandwidth that can be provided by the second PCIe interface that needs to be tested;

[0125] Through the second optional module, according to each bandwidth specification and the information of multiple PCIe slots in the configuration file, multiple PCIe slots that can meet the bandwidth specification are selected as the PCIe slots needed for testing, so that the test fixture tests the second PCIe interface to be tested based on the bandwidth specification.

[0126] Optionally, the test fixture further includes a control circuit, and the method further includes:

[0127] Sending a control signal to the control circuit based on the PCIe slot required for testing through the second optional module;

[0128] Through the control circuit, based on the control signal, the PCIe slot required for testing is controlled to be turned on, and the PCIe slots not required for testing among the multiple PCIe slots except the PCIe slot required for testing are controlled to be shielded.

[0129] Optionally, the control circuit includes at least an output driver, a P-MOS tube, an N-MOS tube, and an I / O port; the controlling the PCIe slot required for testing to be turned on and the controlling the PCIe slots not required for testing other than the PCIe slot required for testing to be shielded by the control circuit based on the control signal comprises:

[0130] By means of the control circuit, when the output control of the output driver outputs a first value, the P-MOS tube is controlled to be turned on and the N-MOS tube is turned off, so that the I / O port outputs a low level, and the low level is used to control the first general input and output value corresponding to the PCIe slot required for testing, and the PCIe slot required for testing is controlled to be turned on by means of the first general input and output value;

[0131] Through the control circuit, when the output control of the output driver outputs the second value, the P-MOS tube is controlled to be turned on and the N-MOS tube is controlled to be turned off, so that the I / O port outputs a high level, and the high level is used to control the second general input and output value corresponding to the PCIe slot that needs to be tested. Through the second general input and output value, the PCIe slot that does not need to be tested is controlled to be shielded.

[0132] Optionally, the method further comprises:

[0133] After determining the second PCIe interface to be tested and the second PCIe interface to be tested, the control circuit controls the connection of the second PCIe interface to be tested and the PCIe slot to be tested through the multiple bridges, with the purpose of allocating a bandwidth of the selected bandwidth specification to each of the second PCIe interfaces to be tested;

[0134] The control circuit is used to shield the PCIe slots that do not meet the selected bandwidth specification.

[0135] Optionally, the method further includes: when it is necessary to test whether the multiple second PCIe interfaces support other PCIe devices, replacing the PCIe devices on the multiple PCIe slots through the hot plug function of PCIe while the test fixture is not powered off.

[0136] Figure 4is a schematic diagram of a test device provided in one embodiment of the present application. Figure 4 As shown, a test device provided by an embodiment of the present application is applied to a test fixture, wherein the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces, and a configuration file storage module, wherein the multiple first PCIe interfaces are used to connect to the corresponding multiple second PCIe interfaces of a device under test, and the configuration file storage module stores a configuration file, wherein the configuration file includes information about the multiple second PCIe interfaces and information about the multiple PCIe slots;

[0137] A first selection module 11 is used to select a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file through the first selection module;

[0138] A second selection module 12 is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first selection module through the second selection module;

[0139] The allocation module 13 is used to allocate the bandwidth of the second PCIe interface that needs to be tested to the PCIe device on the PCIe slot that needs to be tested for testing through the multiple bridges.

[0140] Optionally, the second selection module 12 includes:

[0141] a calculation unit, configured to determine, through the second optional module, a plurality of bandwidth specifications that can be satisfied by the sum of bandwidths according to the sum of bandwidths that can be provided by the second PCIe interface that needs to be tested;

[0142] The second selection unit is used to select, through the second optional module, multiple PCIe slots that can meet the bandwidth specification as the PCIe slots needed for testing according to each bandwidth specification and the information of multiple PCIe slots in the configuration file, so that the test fixture tests the second PCIe interface to be tested based on the bandwidth specification.

[0143] Optionally, the test fixture further includes a control circuit, and the device further includes:

[0144] A sending module, configured to send a control signal to the control circuit through the second optional module based on the PCIe slot required for testing;

[0145] The control module is used to control the connection of the PCIe slot required for testing based on the control signal through the control circuit, and to control the shielding of the PCIe slots that are not required for testing among the multiple PCIe slots except the PCIe slots required for testing.

[0146] Optionally, the control circuit at least includes an output driver, a P-MOS tube, an N-MOS tube and an I / O port; the control module includes:

[0147] A first control unit is used to control the P-MOS tube to be turned on and the N-MOS tube to be turned off through the control circuit when the output control of the output driver outputs a first value, so that the I / O port outputs a low level, and the low level is used to control a first general input and output value corresponding to the PCIe slot required for testing, and control the PCIe slot required for testing to be turned on through the first general input and output value;

[0148] The second control unit is used to control the P-MOS tube to be turned on and the N-MOS tube to be turned off through the control circuit when the output control of the output driver outputs the second value, so that the I / O port outputs a high level, and the high level is used to control the second general input and output value corresponding to the PCIe slot that needs to be tested, and the PCIe slot that does not need to be tested is shielded through the second general input and output value.

[0149] Optionally, the device further comprises:

[0150] a third control unit, configured to, after determining the second PCIe interface to be tested and the second PCIe interface to be tested through the control circuit, control the connection of the second PCIe interface to be tested and the PCIe slot to be tested through the plurality of bridges, with the purpose of allocating a bandwidth of the selected bandwidth specification to each of the second PCIe interfaces to be tested;

[0151] The fourth control unit is used to shield the PCIe slots that do not meet the selected bandwidth specification through the control circuit.

[0152] Optionally, the device also includes: a replacement module, which is used to replace the PCIe devices on the multiple PCIe slots through the hot plug function of PCIe when it is necessary to test whether the multiple second PCIe interfaces support other PCIe devices without powering off the test fixture.

[0153] Based on the same inventive concept, another embodiment of the present application further provides a test system, which includes a test fixture, a device under test and multiple PCIe devices, the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces and a configuration file storage module, the configuration file storage module stores a configuration file, the configuration file includes information about the multiple second PCIe interfaces and information about the multiple PCIe slots, the information about the multiple second PCIe interfaces and the information about the multiple PCIe slots are used to generate preset matching rules, the test fixture is connected to the multiple second PCIe interfaces corresponding to the device under test through the multiple first PCIe interfaces, the test fixture is connected to the multiple PCIe devices through the multiple PCIe slots, and after the device under test is connected to the test fixture, bandwidth is provided to the multiple PCIe devices through the multiple bridges.

[0154] Based on the same inventive concept, another embodiment of the present application further provides an electronic device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the test method described in any of the above embodiments.

[0155] Based on the same inventive concept, another embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored, wherein the computer program is executed by a processor to implement the testing method described in any of the above embodiments.

[0156] Based on the same inventive concept, another embodiment of the present application further provides a computer program product, including a computer program, which, when executed by a processor, implements the testing method described in any of the above embodiments.

[0157] As for the method, system, and device, since they are basically similar to the embodiments of the test fixture, the description is relatively simple, and the relevant parts can be referred to the partial description of the embodiments of the test fixture.

[0158] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0159] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, devices, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0160] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0161] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0162] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable terminal device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0163] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

[0164] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0165] The above is a detailed introduction to a test fixture, method, system, equipment, product and medium provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A test fixture, It is characterized in that The test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces, and a configuration file storage module, wherein the multiple first PCIe interfaces are used to connect to the corresponding multiple second PCIe interfaces of the device under test, and the configuration file storage module stores a configuration file, wherein the configuration file includes information of the multiple second PCIe interfaces and information of the multiple PCIe slots; The first selection module is used to select a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file; The second optional module is used to select a PCIe slot to be tested according to the configuration file and the second PCIe interface to be tested selected by the first optional module, including: the second optional module is used to determine multiple bandwidth specifications that can be satisfied by the total bandwidth provided by the second PCIe interface to be tested; the second optional module is used to select multiple PCIe slots that can meet the bandwidth specification as the PCIe slots to be tested according to each bandwidth specification and information of multiple PCIe slots in the configuration file, so that the test fixture tests the second PCIe interface to be tested based on the bandwidth specification; The multiple bridges are used to allocate the bandwidth of the second PCIe interface that needs to be tested to the PCIe device on the PCIe slot that needs to be tested for testing.

2. The test fixture according to claim 1, It is characterized in that The test fixture also includes a control circuit; The second optional module is further used to send a control signal to the control circuit based on the PCIe slot required for testing; The control circuit is used to control the PCIe slot required for testing to be turned on based on the control signal, and to control the PCIe slots of the multiple PCIe slots that are not required for testing to be shielded except for the PCIe slot required for testing.

3. The test fixture according to claim 2, It is characterized in that The control circuit at least includes an output driver, a P-MOS tube, an N-MOS tube and an I / O port; the control circuit is used to control the PCIe slot required for testing to be turned on based on the control signal, and to control the PCIe slots that are not required for testing among the multiple PCIe slots except the PCIe slot required for testing to be shielded, including: The control circuit is used for controlling the P-MOS tube to be turned off and the N-MOS tube to be turned on when the output control of the output driver outputs a first value, so that the I / O port outputs a low level, and the low level is used to control the first general input and output value corresponding to the PCIe slot required for testing, and control the PCIe slot required for testing to be turned on through the first general input and output value; The control circuit is used to control the P-MOS tube to be turned on and the N-MOS tube to be turned off when the output control of the output driver outputs a second value, so that the I / O port outputs a high level, and the high level is used to control the second general input and output value corresponding to the PCIe slot that needs to be tested, and through the second general input and output value, control the shielding of the PCIe slot that does not need to be used for testing.

4. The test fixture according to claim 2, It is characterized in that The control circuit is further configured to, after determining the second PCIe interface to be tested and the PCIe slot to be tested, control the connection of the second PCIe interface to be tested and the PCIe slot to be tested through the multiple bridges, with the goal of allocating a bandwidth of the selected bandwidth specification to each of the second PCIe interfaces to be tested; The control circuit is also used to shield the PCIe slots that do not meet the selected bandwidth specification.

5. A testing method, It is characterized in that Applied to a test fixture, the test fixture includes multiple bridges, a first optional module, a second optional module, multiple PCIe slots, multiple first PCIe interfaces, and a configuration file storage module, the multiple first PCIe interfaces are used to connect to the corresponding multiple second PCIe interfaces of the device under test, the configuration file storage module stores a configuration file, and the configuration file includes information about the multiple second PCIe interfaces and the multiple PCIe slots; Selecting, through the first selection module, a second PCIe interface to be tested from the plurality of second PCIe interfaces according to the configuration file; The method comprises: determining, through the second optional module, a plurality of bandwidth specifications that can be satisfied by the sum of bandwidths that can be provided by the second PCIe interface that needs to be tested according to the configuration file and the second PCIe interface that needs to be tested selected by the first optional module; selecting, through the second optional module, a plurality of PCIe slots that can meet the bandwidth specification as the PCIe slots that need to be tested according to each bandwidth specification and information of the plurality of PCIe slots in the configuration file, so that the test fixture tests the second PCIe interface that needs to be tested based on the bandwidth specification; The bandwidth of the second PCIe interface that needs to be tested is allocated to the PCIe device on the PCIe slot that needs to be tested for testing through the multiple bridges.

6. The test method according to claim 5, It is characterized in that The test fixture further includes a control circuit, and the method further includes: Sending a control signal to the control circuit based on the PCIe slot required for testing through the second optional module; Through the control circuit, based on the control signal, the PCIe slot required for testing is controlled to be turned on, and the PCIe slots not required for testing among the multiple PCIe slots except the PCIe slot required for testing are controlled to be shielded.

7. The testing method according to claim 6, It is characterized in that The control circuit at least includes an output driver, a P-MOS tube, an N-MOS tube, and an I / O port; the control circuit controls the PCIe slots required for testing to be turned on based on the control signal, and controls the PCIe slots not required for testing other than the PCIe slots required for testing to be shielded, including: By means of the control circuit, when the output control of the output driver outputs a first value, the P-MOS tube is controlled to be turned on and the N-MOS tube is turned off, so that the I / O port outputs a low level, and the low level is used to control the first general input and output value corresponding to the PCIe slot required for testing, and the PCIe slot required for testing is controlled to be turned on by means of the first general input and output value; Through the control circuit, when the output control of the output driver outputs the second value, the P-MOS tube is controlled to be turned on and the N-MOS tube is controlled to be turned off, so that the I / O port outputs a high level, and the high level is used to control the second general input and output value corresponding to the PCIe slot that needs to be tested. Through the second general input and output value, the PCIe slot that does not need to be tested is controlled to be shielded.

8. The testing method according to claim 6, It is characterized in that The method further comprises: After determining the second PCIe interface to be tested and the PCIe slot to be tested, the control circuit controls the second PCIe interface to be tested and the PCIe slot to be tested to be connected through the plurality of bridges, with the goal of allocating a bandwidth of the selected bandwidth specification to each of the second PCIe interfaces to be tested; The control circuit is used to shield the PCIe slots that do not meet the selected bandwidth specification.

9. The test method according to any one of claims 5 to 8, It is characterized in that The method also includes: when it is necessary to test whether the multiple second PCIe interfaces support other PCIe devices, using the hot plug function of PCIe, when the test fixture is not powered off, replacing the PCIe devices on the multiple PCIe slots.

10. A testing system, It is characterized in that The test system includes a test fixture, a device to be tested, and a plurality of PCIe devices. The test fixture includes a plurality of bridges, a first optional module, a second optional module, a plurality of PCIe slots, a plurality of first PCIe interfaces, and a configuration file storage module. The configuration file storage module stores a configuration file. The configuration file includes information of a plurality of second PCIe interfaces and information of the plurality of PCIe slots. The information of the plurality of second PCIe interfaces and the information of the plurality of PCIe slots are used to generate a preset matching rule. The test fixture is connected to the plurality of second PCIe interfaces corresponding to the device to be tested through the plurality of first PCIe interfaces. The PCIe slot is connected to the multiple PCIe devices, and after the device to be tested is connected to the test fixture, bandwidth is provided to the multiple PCIe devices through the multiple bridges. The second optional module is used to determine the multiple bandwidth specifications that can be met by the sum of bandwidths that can be provided by the second PCIe interface to be tested as needed; the second optional module is used to select multiple PCIe slots that can meet the bandwidth specifications as the PCIe slots needed to be tested according to each bandwidth specification and the information of the multiple PCIe slots in the configuration file, so that the test fixture tests the second PCIe interface to be tested based on the bandwidth specification.

11. An electronic device, It is characterized in that The method comprises a memory, a processor and a computer program stored in the memory, wherein the processor executes the computer program to implement the testing method according to any one of claims 5 to 8.

12. A computer-readable storage medium, It is characterized in that A computer program is stored thereon, wherein when the computer program is executed by a processor, the testing method according to any one of claims 5 to 8 is implemented.

13. A computer program product comprising a computer program, It is characterized in that When the computer program is executed by a processor, the testing method according to any one of claims 5 to 8 is implemented.

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