Virtual circuit generation device and method, equipment, storage medium, and program product thereof

Abstract

The present invention provides a virtual circuit generation device and method, apparatus, storage medium, and program product that can shorten the time and save labor for virtual circuit generation while improving the diversity of virtual circuits. The virtual circuit generation device includes a control unit; the control unit is configured to perform the following processing: variable setting processing, after receiving a device identifier for determining the category of a semiconductor device from a user terminal, setting multiple numerical variables related to the numerical values ​​of the components of the semiconductor device of the category indicated by the device identifier; variable selection processing, for a basic circuit associated with the semiconductor device, randomly selecting a numerical variable whose value can be changed from multiple numerical variables; variable change processing, randomly changing the value of the selected numerical variable; and virtual circuit generation processing, generating a virtual circuit based on the changed value.

Description

Technical Field

[0001] The present invention relates to a virtual circuit generation device and method, apparatus, storage medium, and program product for generating multiple virtual circuits using the circuit of the semiconductor device as a basic circuit based on specified design information, especially design information of a semiconductor device provided as a PDK (Process Design Kit). Background Art

[0002] Currently, when designing a circuit of a semiconductor device, a material required for the design, called a PDK, is provided from a foundry that is a consignee of semiconductor manufacturing, and then a semiconductor PDK designer needs to verify the correctness of the PDK.

[0003] Semiconductor devices have multiple parameters. In addition, when verifying the correctness of a PDK, PDK designers usually manually set the values ​​of each parameter one by one. In order to improve the accuracy of verifying the correctness of a PDK, it is necessary to generate multiple virtual circuit identifiers (hereinafter referred to as "virtual circuits") while making various changes to the values ​​of each parameter. As a result, it takes a lot of time to verify the correctness of a PDK. Summary of the invention

[0004] Problem that the invention aims to solve

[0005] Verifying the correctness of the PDK requires input operations related to parameters. In addition, the type of the final virtual circuit becomes a combination of the type and value of the input parameters. Therefore, setting only the values ​​of some parameters by the PDK designer is sometimes not enough for the type of virtual circuit.

[0006] The present invention is made in view of the above situation. That is, in view of the above problem, the present invention provides a virtual circuit generation device and method, equipment, storage medium, and program product that can improve the diversity of virtual circuits while achieving time reduction and labor saving for virtual circuit generation.

[0007] Means used to solve problems

[0008] In order to achieve the above object, a virtual circuit generating device in one embodiment of the present invention has the following features.

[0009] In order to achieve the above-mentioned object, in a first aspect, some embodiments of the present disclosure provide a virtual circuit generation device, including a control unit, wherein the control unit is configured to perform the following processing:

[0010] a variable setting process of, upon receiving a device identifier for specifying a type of a semiconductor device from a user terminal, setting a plurality of numerical variables associated with numerical values ​​among constituent elements constituting the semiconductor device of the type indicated by the device identifier;

[0011] a variable selection process of randomly selecting a numerical variable whose value can be changed from among the plurality of numerical variables set by the variable setting process for a basic circuit associated with the semiconductor device;

[0012] a variable changing process of randomly changing the value of the numerical variable selected by the variable selecting process; and

[0013] The virtual circuit generation process generates a virtual circuit based on the value changed by the variable change process.

[0014] According to the virtual circuit generating device described in the above-mentioned embodiment, for the basic circuit associated with the semiconductor device, a numerical variable whose value can be changed can be randomly selected from a plurality of numerical variables, the value of the selected numerical variable can be randomly changed, and a virtual circuit can be generated based on the changed value, thereby improving the diversity of the virtual circuit while achieving time shortening and labor saving for the generation of the virtual circuit.

[0015] In some embodiments of the present disclosure, based on the above-mentioned virtual circuit generation device, the control unit can be further configured to: perform a maximum / minimum value setting process of setting the maximum and minimum values ​​of the multiple numerical variables set by the variable setting process. Correspondingly, the control unit is also configured to: in the variable change process, for the numerical variable selected by the variable selection process, randomly change the value within the range between the minimum value and the maximum value of the numerical variable. In this way, the virtual circuit generation device can randomly change the value within the range between the minimum value and the maximum value of the numerical variable, further improving the diversity of the virtual circuit.

[0016] In some embodiments of the present disclosure, as objects that can be set in the variable setting process and objects that can be selected in the variable selection process, in addition to the numerical variables, they also include layout variables related to the layout of the circuits among the constituent elements constituting the semiconductor device.

[0017] The control unit in the virtual circuit generation device is capable of obtaining at least a first content corresponding to the basic circuit and a second content different from the first content as the value of the layout variable. Accordingly, the control unit is further configured to: when a layout variable is selected by the variable selection process, determine whether the value of the layout variable is the first content or the second content in the variable change process.

[0018] In the embodiments of the present disclosure, objects that can be set in the variable setting process and objects that can be selected in the variable selection process, in addition to numerical variables, also include layout variables related to the layout of the circuits among the constituent elements that constitute the semiconductor device, thereby further improving the diversity of virtual circuits.

[0019] In some embodiments of the present disclosure, as objects that can be set in the variable setting process and objects that can be selected in the variable selection process, in addition to numerical variables, state variables related to whether specific numerical variables can be changed are also included.

[0020] The control unit in the virtual circuit generation device is also capable of obtaining at least an unchangeable state in which the specific numerical variable is not allowed to be changed and a changeable state in which the specific numerical variable is allowed to be changed as the value of the state variable. Accordingly, the control unit is further configured to: when the state variable is selected by the variable selection process, determine whether the value of the state variable is the unchangeable state or the changeable state in the variable change process, and when the state variable is the changeable state, change the value of the specific numerical variable in the variable change process.

[0021] In the disclosed embodiment, as an object that can be set in the variable setting process and an object that can be selected in the variable selection process, in addition to the numerical variable, there is also a state variable related to whether a specific numerical variable can be changed, and the control unit can at least obtain an unchangeable state in which the specific numerical variable is not allowed to be changed and a changeable state in which the specific numerical variable is allowed to be changed as the value of the state variable, thereby improving the randomness of the virtual circuit generation process, and as a result, the diversity of the virtual circuit can be further improved.

[0022] In any of the above embodiments of the present disclosure, when there are multiple selected objects in the variable selection process, the control unit is configured to: select the selected objects in a random order for each virtual circuit in the variable selection process. In this way, the randomness of the virtual circuit generation process can be improved by selecting the selected objects in a random order for each virtual circuit, and as a result, the diversity of virtual circuits can be further improved.

[0023] In any of the above-mentioned embodiments of the present disclosure, when the number of variables that can be selected in the variable selection process is less than the number of variables set in the variable setting process, the control unit is configured to randomly select a selection object for each virtual circuit in the variable selection process, wherein the variable selected in the variable selection process related to a certain virtual circuit is different from the variable selected in the variable selection process related to other virtual circuits.

[0024] In the disclosed embodiment, a selection object is randomly selected for each virtual circuit, and the variables selected in the variable selection process related to a certain virtual circuit are made different from the variables selected in the variable selection process related to other virtual circuits. Therefore, under the condition that the number of variables that can be selected in the variable selection process is less than the number of variables set in the variable setting process, the randomness of the virtual circuit generation process is improved, and as a result, the diversity of the virtual circuits can be further improved.

[0025] In order to achieve the above-mentioned purpose, in a second aspect, some embodiments of the present disclosure provide a virtual circuit generation method, which has the following characteristics: The virtual circuit generation method includes a first process, a second process, a third process and a fourth process.

[0026] The first step is to set a plurality of numerical variables related to numerical values ​​of components constituting the semiconductor device of the type indicated by the device identifier after receiving the device identifier for identifying the type of the semiconductor device from the user terminal.

[0027] The second step is to randomly select a numerical variable whose value can be changed from among the plurality of numerical variables set in the first step for a basic circuit associated with the semiconductor device.

[0028] The third step is to randomly change the value of the numerical variable selected in the second step.

[0029] A fourth step is to generate a virtual circuit based on the value changed in the third step.

[0030] In the disclosed embodiment, for a basic circuit associated with a semiconductor device, a numerical variable whose value can be changed is randomly selected from a plurality of numerical variables, the value of the selected numerical variable is randomly changed, and a virtual circuit based on the changed value is generated. Thus, the time and effort required for generating the virtual circuit can be shortened while the diversity of the virtual circuit is improved.

[0031] In a third aspect, the embodiments of the present disclosure further provide a computer device, wherein the computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the method steps described in any of the embodiments of the first aspect are implemented.

[0032] In a fourth aspect, the embodiments of the present disclosure further provide a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the method steps described in any of the embodiments of the first aspect are implemented.

[0033] In a fifth aspect, an embodiment of the present disclosure further provides a program product, including a computer program, which, when executed by a processor, implements the steps of the method described in any of the embodiments of the first aspect.

[0034] The unexpected effects that the present invention can produce are:

[0035] The virtual circuit generation device and method, apparatus, storage medium, and program product of the present invention can improve the diversity of virtual circuits while achieving time reduction and labor saving for virtual circuit generation. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 It is a structural diagram of a virtual circuit generation system involved in some embodiments of the present disclosure.

[0038] Figure 2 It is a structural block diagram of various characteristic functional modules in a management database involved in some embodiments of the present disclosure.

[0039] Figure 3 It is a schematic diagram of different databases involved in some embodiments of the present disclosure.

[0040] Figure 4 It is a flowchart of a virtual circuit generation process involved in some embodiments of the present disclosure.

[0041] Figure 5 It is a flowchart of an initial setting process involved in some embodiments of the present disclosure.

[0042] Figure 6 The present invention is a flowchart of a virtual circuit generation execution process involved in some embodiments of the present disclosure.

[0043] Figure 7 It is a generated distribution graph of values ​​involved in some embodiments of the present disclosure, with the gate length (variable 2) as the horizontal axis and the width of a single interpolation finger (variable 3) as the vertical axis.

[0044] Figure 8 It is a flowchart of a virtual circuit generation method involved in some embodiments of the present disclosure.

[0045] Fig. 9It is an internal structure diagram of a computer device involved in some embodiments of the present disclosure.

[0046] Description of reference numerals:

[0047] 1…virtual circuit generation system, 2…management database (virtual circuit generation device) 3…user terminal, 4…communication network, 21…server communication unit, 22…server control unit, 22a…semiconductor category setting unit, 22b…initial setting unit, 22c…virtual circuit generation unit, 23…server storage unit, 23b…PDK storage area, 23c1…semiconductor category database, 23c2…variable database, 23c3…maximum / minimum value database, 23c4…test result database, 23d1…circuit generation counter, 23e…circuit diagram file area. DETAILED DESCRIPTION

[0048] (First embodiment)

[0049] The first embodiment of the present invention is described below. It is worth noting that in this specification, "information" and "data" are synonymous and are used without special distinction. In addition, when "information" and "data" are recorded, their quantity and form are not limited. In addition, data stored in a so-called table form and stored in a storage medium are also "information" and "data" described in this specification.

[0050] (Overall Configuration of Virtual Circuit Generation System 1)

[0051] Figure 1 1 is a schematic diagram showing the overall structure of the virtual circuit generation system 1 involved in the present embodiment. The virtual circuit generation system 1 is a system for generating multiple virtual circuits for verifying the correctness of the semiconductor device model included in a certain PDK. In addition, the virtual circuit generation system 1 is referred to as "system 1" hereinafter. In addition, in the following embodiments, the generation of multiple virtual circuits by the virtual circuit generation system 1 is referred to as "testing".

[0052] like Figure 1 As shown, the system 1 includes a management database 2 managed by an operator of the system 1 and a user terminal 3 used by a user. The management database 2 and the user terminal 3 are connected to each other via a communication network 4 so as to be able to receive / transmit information (data) to each other. The communication network 4 may be composed of, for example, the Internet, a LAN, a telephone line, a mobile communication network, Wi-Fi (Wireless Fidelity) (registered trademark), other communication lines, or a combination thereof, and may be wired or wireless.

[0053] The management database 2 is composed of a common information processing device. Although the information processing device is not shown in the figure, the information processing device has, for example, a CPU (Central Processing Unit) capable of overall control, a RAM (Random Access Memory) functioning as a CPU work area, a ROM (Read Only Memory) storing various programs, a storage device storing various data, an input unit including a keyboard or a mouse, a display unit for displaying images, and a receiving / transmitting unit for communicating with external devices, etc. Optionally, the management database 2 can be composed of one information processing device (one physical computer), or it can be composed of multiple information processing devices (multiple physical computers) working together to realize its functions (it can be composed of a cloud environment). The details of the management database 2 are described later.

[0054] The user terminal 3 is composed of a common communication terminal. Although the communication terminal is not shown in the figure, the communication terminal includes, for example, a CPU capable of overall control, a RAM functioning as a working area of ​​the CPU, a ROM storing various programs, a storage device storing various data, an input unit including a keyboard or a mouse, a display unit for displaying images, and a receiving / transmitting unit for communicating with an external device, etc. Specifically, as the user terminal 3, a desktop computer, a notebook computer, a PDA (Personal Digital Assistant), a tablet terminal, and a smart phone can be used. In this embodiment, it is assumed that the user terminal 3 is composed of a desktop computer.

[0055] From the above, the PDK designer of the semiconductor device can input a device identifier for determining the category (semiconductor category) of the semiconductor device into the user terminal 3. After the device identifier is input, the user terminal 3 sends the device identifier to the management database 2. After receiving the device identifier sent from the user terminal 3, the management database 2 generates multiple virtual circuits with the circuit of the semiconductor device indicated by the device identifier as the basic circuit. At this time, the management database 2 repeatedly controls the PDK designer to change the value of the variable of the basic circuit to generate the virtual circuit. It can be seen that the management database 2 (information processing device) is the virtual circuit generation device provided by the present invention.

[0056] (Management Database 2)

[0057] Next, the management database 2 will be described. Figure 2 It is used to represent each characteristic functional module in the management database 2. The management database 2 includes a server communication unit 21, a server control unit 22, and a server storage unit 23, for example.

[0058] The server communication unit 21 is composed of an interface for communicating with the user terminal 3 to transmit and receive data. The communication method between the server communication unit 21 and the user terminal 3 may be either wireless or wired.

[0059] The server storage unit 23 is composed of a storage device such as a memory or a disk drive provided in a storage area of ​​a physical device composed of a computer-readable storage medium. The server storage unit 23 can store various programs including operating system programs and driver programs and various data used in the execution of these programs.

[0060] For example, the server storage unit 23 stores a management program 23 a to be executed by the server control unit 22 .

[0061] For example, the server storage unit 23 has a PDK storage area 23b for storing PDKs. The PDK storage area 23b stores PDKs provided by a plurality of foundries. In addition, a PDK provided by a new foundry can be added to the PDK storage area 23b.

[0062] It can be understood that the PDK includes SPICE models (microscopic models) related to various semiconductor components and libraries of various semiconductor components, as well as circuits based on each semiconductor component, and information necessary for designing the layout (such as basic design information). For example, the basic design information may include information such as the type of semiconductor component, components included in various semiconductor components, and dimensions related to various components, and may also include information related to the structure (circuit layout) of various semiconductor components.

[0063] In addition, in some embodiments, the server storage unit 23 has a database 23c storing various data used in the execution of the management program 23a, or a database 23c storing various data that can be edited in the execution of the management program 23a. For example, the database 23c can be a semiconductor category database 23c1, a variable database 23c2, a maximum / minimum value database 23c3, and a test result database 23c4. Figure 3 This is an exemplary description of the aforementioned databases.

[0064] The semiconductor category database 23c1, the variable database 23c2, and the maximum / minimum value database 23c3 can store various data that form a record using a device identifier as a key. The device identifier is identification information for determining the category (semiconductor category) of a specific semiconductor device; in other words, the device identifier can be identification information assigned to various semiconductor categories.

[0065] The test result database 23c4 stores various data constituting one record using a virtual circuit identifier as a key. The virtual circuit identifier is assigned to each virtual circuit generated in a virtual circuit generation process described later and is used to identify the virtual circuit.

[0066] The semiconductor category database 23c1 stores semiconductor category data that is a record with the device identifier as a key. In each semiconductor category data, a plurality of semiconductor category identification information for identifying a specific semiconductor category such as a first category and a second category, etc., is associated with the device identifier.

[0067] For example, the semiconductor category determination information includes the foundry that provides the PDK, the component category, and information related to the classification used to subdivide the component category. The classification includes, for example, a first classification, a second classification below the first classification, a third classification below the second classification, and so on.

[0068] For further example, an example of a foundry that provides a PDK includes Company A, Company B, Company C, etc. An example of a component category includes a diode, a transistor, a light emitting device, a photosensitive device, and a sensor, etc. However, depending on the foundry, the component categories included in the PDK are also different.

[0069] As an example of the first classification, for example, in the case where the component category is a transistor of company A, as a classification standard for classifying the structure, there are bipolar transistors and MOS field effect transistors (MOSFET), etc. Furthermore, as an example of the second classification, in the case where the first classification is a bipolar transistor, there are NPN transistors and PNP transistors, etc. In addition, as an example of the second classification, in the case where the first classification is a MOS field effect transistor, there are N-channel MOSFET, P-channel MOSFET, and complementary MOSFET, etc. However, the classifications included in the PDK vary depending on the foundry.

[0070] Furthermore, it is assumed that the server control unit 22 can acquire basic design information of the semiconductor type corresponding to the device identifier from the PDK storage area 23 b based on the device identifier.

[0071] The variable database 23c2 stores variable data that constitutes one record using the device identifier as a key. Each variable data contains information related to a plurality of variables set for the semiconductor type associated with the device identifier. The value of the variable can be changed by the server control unit 22 during the virtual circuit generation process.

[0072] Optionally, there are variables related to numerical values ​​(numerical variables), variables related to the layout of the circuit (layout variables), and variables indicating states related to whether or not a specific item is possible (state variables). Each variable needs to be set to an initial value. The following describes some possible specific implementations of the variables.

[0073] The maximum / minimum value database 23c3 stores maximum / minimum value data that constitutes one record using the device identifier as a key. Each maximum / minimum value data includes information related to the maximum / minimum value of a numerical variable described later, such as the maximum / minimum value related to a specific part of a specific component among the components of the semiconductor category associated with the device identifier. That is, as described later, the server control unit 22 can make various changes to the size of the specific part of the specific component within the range between the minimum value and the maximum value indicated in the maximum / minimum value data.

[0074] For example, when the semiconductor device is an N-channel MOSFET, the maximum / minimum values ​​of the gate length, the width of a single finger, the drain diffusion area, the source diffusion area, the drain perimeter, and the source perimeter are appropriately set as the maximum / minimum values.

[0075] The test result database 23c4 stores test result data that constitutes a record using a virtual circuit identifier as a keyword. Each test result data contains the values ​​of various variables set in the semiconductor category associated with the device identifier that is the object of the virtual circuit generation process. As described later, the server control unit 22 can generate a virtual circuit corresponding to the virtual circuit identifier of the test result data based on the test result data and the basic design information stored in the PDK storage area 23b.

[0076] As described above, the server storage unit 23 also has a circuit generation counter 23d1, a device identifier storage area 23d2, a variable storage area 23d3, a maximum / minimum value storage area 23d4, a test identifier storage area 23d5, a virtual circuit identifier storage area 23d6 and a selected variable storage area 23d7.

[0077] The circuit generation counter 23d1 is capable of counting the number of circuit generation times. The number of circuit generation times refers to the number of times a virtual circuit is generated in the virtual circuit generation execution process described later. The number of circuit generation times in one virtual circuit generation execution process can be preset. For example, in the initial setting process described later, the set number of circuit generation times is set in the circuit generation counter 23d1. Then, each time a virtual circuit is generated in the virtual circuit generation execution process, the count value of the circuit generation counter 23d1 is reduced by "1". In addition, the number of circuit generation times preset in the virtual circuit generation execution process is referred to as the "circuit generation specified number of times", and the number of circuit generation times at the current moment represented by the count value of the circuit generation counter 23d1 is referred to as the "circuit generation measurement number".

[0078] The device identifier storage area 23d2 stores the device identifier. The variable storage area 23d3 stores various variables associated with the semiconductor category indicated by the device identifier. The maximum / minimum value storage area 23d4 stores the maximum / minimum values ​​of various numerical variables among various variables associated with the semiconductor category indicated by the device identifier, which will be described later.

[0079] The test identifier storage area 23d5 stores a test identifier. The test identifier is identification information for specifying one test assigned to a test performed by the virtual circuit generation process. The virtual circuit identifier storage area 23d6 stores virtual circuit identifier data indicating the virtual circuit identifier. The selected variable storage area 23d7 stores selected variable data indicating variables selected in the generation process of one virtual circuit.

[0080] In addition, the server storage unit 23 has a circuit diagram file area 23e. The circuit diagram file area 23e stores circuit diagram files for representing circuit diagrams showing each circuit generated by the virtual circuit generation process. The circuit diagram file is generated corresponding to one test related to one semiconductor type. In addition, the circuit diagram includes a circuit diagram of a basic circuit that is the basis of the semiconductor type, and a circuit diagram of a virtual circuit that is changed based on the basic circuit.

[0081] Next, the server control unit 22 is described. The server control unit 22 is, for example, a processor, that is, a processing device that can perform data calculation, processing, transmission, program execution, and control of other devices, and is composed of a CPU and various registers.

[0082] The server control unit 22 centrally controls the management database 2 by executing various programs stored in the server storage unit 23. In addition, the server control unit 22 executes the management program 23a to realize a function of generating a plurality of virtual circuits in such a manner that a PDK designer changes a component of a circuit (basic circuit) serving as a basis and designs a plurality of new circuits (virtual circuits).

[0083] The following describes the various functional modules that can be implemented by the server control unit 22. Figure 2 As shown, the server control unit 22 includes a semiconductor type setting unit 22a, an initial setting unit 22b, and a virtual circuit generating unit 22c. The semiconductor type setting unit 22a, the initial setting unit 22b, and the virtual circuit generating unit 22c correspond to the functions that can be realized by the server control unit 22. In addition, the configuration of each part 22a~22c corresponding to the function of the server control unit 22 is not limited thereto, and these parts 22a~22c can be appropriately unified and merged, or each part 22a~22c can be appropriately refined.

[0084] The semiconductor category setting unit 22a displays a semiconductor category input screen on the display unit of the user terminal 3. The semiconductor category input screen refers to a screen that can determine the semiconductor category of the object of the virtual circuit to be designed if it is accessed from the user terminal 3. Although not shown in the figure, an area for inputting a device identifier associated with the semiconductor category is formed in the semiconductor category input screen. In addition, if the device identifier is input in the area through a prescribed operation on the user terminal 3 and sent to the management database 2, the semiconductor category setting unit 22a stores (stores) the device identifier in the device identifier storage area 23d2. That is, it becomes a situation where the semiconductor category can be determined by the user. In addition, the method for determining the semiconductor category is not particularly limited and can be changed appropriately. For example, the semiconductor category setting unit 22a can display an overview of the semiconductor category accompanied by a selection button on the display unit of the user terminal 3, and the selected device identifier associated with the semiconductor category is sent to the management database by the user selecting the selection button.

[0085] The initial setting unit 22b can perform initial settings for generating a virtual circuit of a semiconductor type determined by a user. Specifically, the initial setting unit 22b performs settings of various variables associated with the semiconductor type determined by the user, settings of maximum / minimum values ​​of various numerical variables among various variables associated with the semiconductor type determined by the user, settings of a predetermined number of circuit generation times, assignment of a test identifier, and creation of a circuit diagram file. In addition, the initial settings performed by the initial setting unit 22b are performed after the determination of the semiconductor type by the semiconductor type setting unit 22a.

[0086] The virtual circuit generation unit 22c can generate a virtual circuit in which a part or the whole of the constituent elements of the basic circuit associated with the semiconductor category determined by the user is changed by a predetermined number of circuit generation. Specifically, the virtual circuit generation unit 22c first changes a part or the whole of the constituent elements of the basic circuit associated with the semiconductor category determined by the user to generate a virtual circuit. Then, the virtual circuit generation unit 22c changes a part or the whole of the constituent elements of the first virtual circuit to further generate a second virtual circuit. Then, the virtual circuit generation unit 22c repeatedly generates a new virtual circuit based on the virtual circuit generated last time until the circuit generation measurement number reaches the predetermined number of circuit generation.

[0087] As described above, after receiving the device identifier, which is an identifier for determining the category of the semiconductor device, from the user terminal 3, the management database 2 sets a plurality of numerical variables related to the numerical values ​​of the components of the semiconductor device of the category indicated by the device identifier, and can randomly select a numerical variable whose value can be changed from the set plurality of numerical variables for the basic circuit associated with the semiconductor device, randomly change the value of the selected numerical variable, and generate a virtual circuit based on the changed value. That is, the management database 2 constitutes the virtual circuit generation device of the present invention.

[0088] (Virtual Circuit Generation Processing)

[0089] The following is based on Figure 4~Figure 6 , describing the control related to virtual circuit generation performed by the server control unit 22. Figure 4 The flowchart is a flowchart showing a virtual circuit generation process which is an overall process for generating a virtual circuit by circuit generation a predetermined number of times, in other words, a virtual circuit generation process corresponding to one test. Figure 5 is a flowchart showing the initial setting process in the virtual circuit generation process, Figure 6 The flowchart of the virtual circuit generation execution process in the virtual circuit generation process is shown. In addition, the flowcharts of each process related to the virtual circuit generation described below are examples. In addition, for multiple processes in the flowchart, the execution order can be appropriately changed or executed in parallel within the range that the processing contents do not conflict.

[0090] The server control unit 22 performs virtual circuit generation processing after being accessed by the user terminal 3. In the virtual circuit generation processing, the server control unit 22 sequentially performs semiconductor type setting processing (S1), initial setting processing (S2), and virtual circuit generation execution processing (S3).

[0091] In the semiconductor category setting process (S1), the server control unit 22 first displays a semiconductor category input screen on the display unit of the user terminal 3. As described above, the semiconductor category input screen has an area for inputting a device identifier. Then, if the device identifier is sent to the management database 2 by a predetermined operation on the user terminal 3, the semiconductor category setting unit 22a can store (store) the device identifier in the device identifier storage area 23d2.

[0092] In some of the following embodiments, the device identifier representing the N-channel MOSFET is stored in the device identifier storage area 23d2 as an example, and the corresponding initial setting process (S2) and the change circuit generation execution process (S3) are exemplarily described.

[0093] Before describing the initial setting process ( S2 ) and the change circuit generation execution process ( S3 ), some variables and variable attributes related to N-channel MOSFET are illustrated as examples, and the variables are described first.

[0094] Table 1 is a table for explaining variables related to an N-channel MOSFET.

[0095]

[0096] Table 1

[0097] As shown in Table 1, as variables related to N-channel MOSFET, multiplier (variable 1), gate length (variable 2), width of a single finger (variable 3), gate width maximum value presence or absence state (variable 4), number of gates (variable 5), gate width change maximum value applicable state (variable 6), gate width change maximum value (variable 7), S / D connection (variable 8), switch S / D (variable 9), specific variable change previous stage state (variable 10), specific variable change next stage state (variable 11), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), source perimeter (variable 15) are set. In addition, the content of the change that can obtain the variable is sometimes referred to as a "change pattern".

[0098] For example, the multiplier (variable 1) refers to the number of N-channel MOSFETs configuring the object; as a change pattern, a range between the minimum value and the maximum value of the multiplier can be obtained. In addition, the value, minimum value, and maximum value of the multiplier are composed of integers. In addition, the minimum value of the multiplier is at least "1".

[0099] For example, the gate length (variable 2) refers to the distance between the drain and the source; as a change mode, a range between a minimum value and a maximum value of the gate length can be obtained.

[0100] For example, the width of a single interdigital finger (variable 3) refers to a so-called “gate width” associated with a gate; as a change mode, a range between a minimum value and a maximum value of the gate width can be obtained.

[0101] For example, the state of whether or not there is a maximum value of the gate width (variable 4) is a state related to the maximum value of the total number of gate widths; as a change mode, a state in which no maximum value is set (no maximum value state) and a state in which the maximum value of the total number of gate widths is set to a prescribed maximum value, i.e., 50 μm (prescribed maximum value state) can be obtained.

[0102] For example, the number of gates (variable 5) refers to the number of gates included in one N-channel MOSFET of the object; as a change pattern, a range between the minimum value and the maximum value of the number of gates can be obtained. In addition, the value, minimum value, and maximum value of the number of gates are composed of integers. In addition, the minimum value of the number of gates is at least "1".

[0103] For example, the state of whether the maximum value of the gate width change is applicable (variable 6) refers to whether the maximum value of the total number of gate widths can be applied to other change values ​​(maximum value of change) other than the specified maximum value; as a change mode, a state in which the change value is not applicable (not applicable change value state) and a state in which the change value is applicable (applicable change value state) can be obtained.

[0104] For example, the maximum gate width change value (variable 7) refers to the maximum value (change maximum value) of the total gate width that is different from the specified maximum value; as a change mode, a range between the minimum value and the maximum value of the gate width change value can be obtained. In addition, when the gate width change maximum value applicable status (variable 6) is the applicable change value status, the gate width change maximum value (variable 7) can be changed.

[0105] For example, the S / D connection (variable 8) refers to whether it is a short connection and the state of the connection method when the short connection is performed; as a change mode, there are a state where the short connection is not performed (no connection state), a state where the source is connected (source connection state), a state where the drain is connected (drain connection state), and a state where both the source and the drain are connected (dual connection state).

[0106] For example, the switch S / D (variable 9) refers to a state related to the positions of the source and the drain; as a change mode, a normal state (normal state) and a state where the positions of the source and the drain are reversed (special state) can be obtained.

[0107] For example, the state of the previous stage whether a specific variable can be changed (variable 10) refers to a state related to whether the state of the next stage whether the specific variable can be changed (variable 11) can be changed; as a change mode, a state in which the state of the next stage whether the specific variable can be changed cannot be obtained (previous stage unchangeable state) and a state in which the state of the next stage whether the specific variable can be changed can be obtained (previous stage changeable state).

[0108] For example, whether a specific variable can be changed in the next stage state (variable 11) refers to a state related to whether a specific variable can be changed; as a change mode, a state in which a specific variable cannot be changed (an unchangeable state in the next stage) and a state in which a specific variable can be changed (a changeable state in the next stage) can be obtained. In addition, the specific variable can be, for example, a drain diffusion area (variable 12), a source diffusion area (variable 13), a drain perimeter (variable 14), or a source perimeter (variable 15). In addition, when the previous stage state (variable 10) of whether a specific variable can be changed is a changeable state in the previous stage, the next stage state (variable 11) of whether a specific variable can be changed can be changed.

[0109] For example, the drain diffusion area (variable 12) refers to the total area of ​​the diffusion region of the drain terminal which is one of the terminals of the MOSFET; as a change pattern, a range between a minimum value and a maximum value of the drain diffusion area can be obtained.

[0110] For example, the source diffusion area (variable 13) refers to the total area of ​​the diffusion region of the source terminal which is one of the terminals of the MOSFET; as a change pattern, a range between the minimum value and the maximum value of the source diffusion area can be obtained.

[0111] For example, the drain perimeter (variable 14) refers to the perimeter of the diffusion region of the drain terminal; as a variation mode, a range between a minimum value and a maximum value of the drain perimeter can be obtained.

[0112] For example, the source perimeter (variable 15) refers to the perimeter of the diffusion region of the source terminal; as a variation mode, a range between a minimum value and a maximum value of the source perimeter can be obtained.

[0113] In some embodiments, as categories of variables related to N-channel MOSFET, there are numerical variables whose contents consist of numerical values, layout variables whose contents consist of components related to the layout of the circuit, and state variables whose contents consist of states related to whether a specific matter is related.

[0114] From the above, optionally, multiplier (variable 1), gate length (variable 2), width of a single finger (variable 3), number of gates (variable 5), maximum change of gate width (variable 7), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14) and source perimeter (variable 15) are numerical variables.

[0115] Optionally, the maximum value of gate width with or without state (variable 4), S / D connection (variable 8) and switch S / D (variable 9) are layout variables.

[0116] Optionally, the state variables include whether the maximum gate width change state is applicable (variable 6), whether the specific variable is changed in the previous stage (variable 10), and whether the specific variable is changed in the next stage (variable 11).

[0117] In addition, as described above, the maximum / minimum value database 23c3 stores the maximum / minimum value of the numerical variable associated with each semiconductor category. In addition, although the description of the specific numerical value is omitted, the maximum / minimum value of the numerical variable associated with each semiconductor category including the N-channel MOSFET can be reasonably set.

[0118] In addition, each of the aforementioned variables can be set to an initial value. Among them, the numerical variables related to the semiconductor category and the basic design information corresponding to the layout variables can constitute the initial values ​​of the numerical variables and the layout variables. For state variables, the state related to negation can be set to the initial value. For example, the initial value of the gate width change maximum value applicable state (variable 6) is the inapplicable change value state, the initial value of the specific variable change state in the previous stage (variable 10) is the unchangeable state in the previous stage, and the initial value of the specific variable change state in the next stage (variable 11) is the unchangeable state in the next stage.

[0119] Optionally, the total number of gate widths is a value calculated by the width of a single interpolation finger (variable 3) × the number of gates (variable 5). As the maximum value of the total number of gate widths, there is a prescribed maximum value related to the maximum gate width presence or absence state (variable 4) and a changeable maximum value related to the change maximum gate width (variable 7).

[0120] Furthermore, when the maximum value change applicable status (variable 6) is the applicable change value status, the value (the changed maximum value) of the gate width change maximum value (variable 7) is applied to the maximum value of the total number of gate widths regardless of the content of the gate width maximum value presence or absence status (variable 4). When the maximum value change applicable status (variable 6) is the non-applicable change value status, the maximum value of the total number of gate widths is set in accordance with the content of the gate width maximum value presence or absence status (variable 4). That is, in the non-maximum state, the maximum value of the total number of gate widths is not set; in the specified maximum value state, "50μm" as the specified maximum value is set as the maximum value of the total number of gate widths.

[0121] Thus, in some embodiments, depending on the order in which the maximum gate width value state (variable 4), the maximum change state (variable 6), and the maximum gate width change state (variable 7) are selected, the maximum value of the total number of gate widths reflected may sometimes be different. In addition, when the total number of gate widths calculated by the width of a single interpolation finger (variable 3) × the number of gates (variable 5) exceeds the maximum value of the total number of gate widths reflected at this time, the width of a single interpolation finger or the number of gates may be adjusted in a manner that converges to the maximum value of the gate width obtained by a predetermined process. Such a situation in which a predetermined process is performed when inputting data may be referred to as a callback process.

[0122] In addition, in some embodiments, a change judgment is performed in the virtual circuit generation process to determine whether each variable has been changed. And, the server control unit 22 randomly determines whether to "change the value of the selected variable" in the change judgment. "Random" here means that even the same variable does not have a fixed probability but uses a different probability each time a change judgment is made. However, the server control unit 22 may also determine "change the value of the selected variable" with a specified probability in the change judgment. In this case, for example, the probability of determining "changing the value of the selected variable" (change judgment probability) can be pre-set for each variable and stored in the maximum / minimum value database 23c3. The server control unit 22 performs a change judgment on each variable in the change judgment in a manner that becomes a change judgment probability related to each variable. In addition, the change judgment probability can be appropriately set.

[0123] The following embodiments illustrate the variable attributes. Variable attributes refer to attributes related to whether variables 1 to 15 can be changed. There are changeable states that can be changed and unchangeable states that cannot be changed. In addition, there are variables that maintain a changeable state regardless of the contents of other variables (changeable maintaining variables) and variables whose variable attributes change in accordance with the contents of other variables (changeable changing variables).

[0124] For example, the multiplier (variable 1), gate length (variable 2), width of a single finger (variable 3), the maximum value of the gate width (variable 4), the number of gates (variable 5), the maximum value of the gate width change applicable state (variable 6), S / D connection (variable 8), switch S / D (variable 9), and the previous stage state of whether the change is possible (variable 10) are changeable and maintained variables.

[0125] For example, the maximum change value of the gate width (variable 7), the state of the next stage after the change (variable 11), the drain diffusion area (variable 12), the source diffusion area (variable 13), the drain perimeter (variable 14), and the source perimeter (variable 15) are changeable variables.

[0126] For example, when the gate width change maximum value applicable status (variable 6) is the applicable change maximum value status, the gate width change maximum value (variable 7) becomes the changeable status; when the gate width change maximum value applicable status (variable 6) is not the unapplicable change maximum value status, the gate width change maximum value (variable 7) is the unchangeable status. When the change permission previous stage status (variable 10) is the previous stage changeable status, the change permission next stage status (variable 11) becomes the changeable status; when the change permission previous stage status (variable 10) is not the previous stage changeable status, the change permission next stage status (variable 11) is the unchangeable status. The drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15) become changeable states when the state at the previous stage of whether the change is possible (variable 10) is a changeable state at the previous stage and the state at the next stage of whether the change is possible (variable 11) is a changeable state at the next stage, and become unchangeable states when the state at the previous stage of whether the change is possible (variable 10) is not a changeable state at the previous stage and the state at the next stage of whether the change is possible (variable 11) is not a changeable state at the next stage.

[0127] Furthermore, the variable attributes of each changeable variable when the virtual circuit generation execution process (S3) after the circuit change is started are appropriately set corresponding to the semiconductor type. However, the variable attributes of each changeable variable when the virtual circuit generation execution process (S3) after the circuit change is started can be arbitrarily set according to the PDK library, unit type and purpose.

[0128] See the following examples for more details. Figure 5The initial setting process (S2) is described by way of example. In the initial setting process (S2), the server control unit 22 first sets various variables (S201). As described above, the various variables involved in S201 correspond to the device identifier. Thus, the server control unit 22 reads the variable data associated with the device identifier stored (stored) in the device identifier storage area 23d2 by the semiconductor category setting process (S1) from the variable database 23c2, and stores (stores) it in the variable storage area 23d3.

[0129] The server control unit 22 sets the maximum / minimum values ​​of various numerical variables after S201 in the initial setting process (S2) (S202). As described above, the maximum / minimum values ​​of various numerical variables involved in S202 correspond to the device identifier. Thus, the server control unit 22 reads the maximum / minimum value data associated with the device identifier stored (stored) in the device identifier storage area 23d2 by the semiconductor category setting process (S1) from the maximum / minimum value database 23c3, and stores (stores) the maximum / minimum values ​​of various numerical variables in association with the numerical variables in the maximum / minimum value storage area 23d4.

[0130] In the initial setting process ( S2 ), the server control unit 22 sets a predetermined number of circuit generation times in a circuit generation counter after S202 ( S203 ), assigns a test identifier ( S204 ), creates a circuit diagram file ( S205 ), and then terminates the initial setting process.

[0131] In S203, the server control unit 22 sets the count value of the circuit generation counter to the predetermined number of circuit generation corresponding to the semiconductor type indicated by the device identifier. In the first embodiment, for example, the predetermined number of circuit generation for the N-channel MOSFET may be set to 2000 times.

[0132] The server control unit 22 may appropriately generate a test identifier corresponding to the generation of the virtual circuit thereafter in S204, and may store the test identifier in the test identifier storage area 23d5.

[0133] In S205, the server control unit 22 appropriately generates a circuit diagram file for writing a circuit diagram of a virtual circuit to be generated therefrom in correspondence with the test identifier, and stores the file in the circuit diagram file area 23e.

[0134] See the following examples for more details. Figure 6The virtual circuit generation execution process (S3) is described by way of example. In the virtual circuit generation execution process (S3), the server control unit 22 first generates a basic circuit (S301) of a semiconductor type (here, N-channel MOSFET) represented by a device identifier stored (stored) in the device identifier storage area 23d2. In S301, the server control unit 22 generates a virtual circuit identifier representing the "0th" virtual circuit and stores it in the virtual circuit identifier storage area 23d6. In addition, in S301, the server control unit 22 stores variable data representing initial values ​​of various variables in the test result database 23c4 in association with the generated virtual circuit identifier, and writes the basic circuit that is the basis for subsequent changes into the circuit diagram file.

[0135] In addition, when storing variable data in the test result database 23c4 in S301, the server control unit 22 can read the numerical variable of the semiconductor type (here, N-channel MOSFET) associated with the device identifier and the basic design information related to the layout variable from the PDK storage area 23b, and store the numerical variable and the basic design information as the initial value of the layout variable in the test result database 23c4. In addition, for each state variable, the server control unit 22 can store a preset state as an initial value in the test result database 23c4.

[0136] After S301, the server control unit 22 then prepares to generate a new virtual circuit. Specifically, the server control unit 22 adds "1" to the virtual circuit identifier stored in the virtual circuit identifier storage area 23d6d and updates the virtual circuit identifier. In addition, the server control unit 22 associates the variable data related to the numerical variables, layout variables and state variables associated with the previous virtual circuit identifier before the update stored in the test result database 23c4 with the updated new virtual circuit identifier and re-stores them in the test result database 23c4. From then on, a new virtual circuit is generated by changing and updating the variable data stored in the test result database 23c4. In addition, the server control unit 22 clears the selected variable storage area 23d7 in S302.

[0137] After S302, the server control unit 22 selects a variable (S303). Here, the server control unit 22 randomly selects a variable by a prescribed algorithm. Random means that the order in which the variables involved in the generation process (S302~S314) of each virtual circuit are selected is irregular. Therefore, the order in which the variables involved in the generation process of all virtual circuits in the virtual circuit generation process (S3) are selected can be different from each other, or the order in which the variables involved in the generation process of a certain virtual circuit are selected can be accidentally the same as the order in which the variables involved in the generation process of other virtual circuits are selected. In addition, the server control unit 22 can be made not to select the same variable more than twice in the generation process of the virtual circuit by a prescribed algorithm. That is, the server control unit 22 will not repeatedly select a variable that has been selected once in the generation process of the virtual circuit by a prescribed algorithm. Therefore, there are also variables in the generation process of a virtual circuit that are not the object of the change judgment described later.

[0138] After S303, the server control unit 22 stores the selected variable data indicating the variable selected in S303 in the selected variable storage area 23d7 (S304). The server control unit 22 can understand the variable selected in the generation process of the virtual circuit by confirming the selected variable storage area 23d7. Thus, the server control unit 22 can also prevent the same variable from being selected twice or more in the generation of the virtual circuit by confirming the selected variable storage area 23d7, for example.

[0139] After S304 , the server control unit 22 confirms the variable attribute of the variable selected in S303 ( S305 ).

[0140] After S305, the server control unit 22 then determines whether the variable attribute of the selected variable is in a changeable state (S306). As shown above, there are variables in the variables that cannot be changed according to the content of other variables. For example, here, even if the drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15) are selected, they cannot be determined as a changeable state when the state of the next stage after the specific variable can be changed (variable 11) is not a changeable state in the next stage. In addition, if the state of the previous stage after the specific variable can be changed (variable 10) is not a changeable state in the previous stage, the state of the next stage after the specific variable can be changed (variable 11) cannot be determined as a changeable state. In addition, for the maximum value of the gate width change (variable 7), if the state of the maximum value of the gate width change applicable (variable 6) is not the applicable maximum value state, it cannot be determined as a changeable state. On the other hand, if the multiplier (variable 1), gate length (variable 2), width of a single finger (variable 3), maximum gate width status (variable 4), number of gates (variable 5), maximum gate width change applicable status (variable 6), S / D connection (variable 8), switch S / D (variable 9) and previous stage status of whether a specific variable can be changed (variable 10) are selected in S303, they will definitely be judged as changeable status in S306.

[0141] If the server control unit 22 determines in S306 that the variable attribute is not in a changeable state (No in S306 ), the process proceeds to S311 . On the other hand, if the server control unit 22 determines in S306 that the variable attribute is in a changeable state (Yes in S306 ), the process proceeds to S307 .

[0142] If the server control unit 22 determines in S306 that the variable attribute is in the changeable state, it performs a change determination as to whether to change the value of the selected variable ( S307 ). As described above, the probability of determining to “change the value of the selected variable” in the change determination is random.

[0143] After S307, the server control unit 22 determines whether the result of the change determination is "changing the value of the variable" (S308). If the server control unit 22 determines in S308 that the result of the change determination is not "changing the value of the variable" ("No" in S308), the process proceeds to S310. On the other hand, if the server control unit 22 determines in S308 that the result of the change determination is "changing the value of the variable" ("Yes" in S308), the process proceeds to S309.

[0144] After advancing to S309, the server control unit 22 changes the value of the variable (S309). Here, the server control unit 22 randomly generates a value between the minimum value and the maximum value related to the variable by a prescribed algorithm when the variable is a multiplier (variable 1), a gate length (variable 2), a width of a single interpolation finger (variable 3), the number of gates (variable 5), a maximum value of gate width change (variable 7), a drain diffusion area (variable 12), a source diffusion area (variable 13), a drain perimeter (variable 14), and a source perimeter (variable 15). In addition, the server control unit 22 randomly changes to other states by a prescribed algorithm when the variable is a maximum value state of gate width (variable 4), S / D connection (variable 8), and switch S / D (variable 9). In addition, the server control unit 22 changes to another state when the variable is a state of applicability of the maximum value of gate width change (variable 6), a state of the previous stage of whether a specific variable can be changed (variable 10), and a state of the next stage of whether a specific variable can be changed (variable 11). Furthermore, in S309, the server control unit 22 reflects the changed variable value in the variable data associated with the virtual circuit identifier stored in the test result database 23c4.

[0145] After S308 or S309 , the server control unit 22 executes a callback on the virtual circuit based on the variable data at the current time associated with the virtual circuit identifier ( S310 ).

[0146] After S310, the server control unit 22 confirms the selected variable storage area 23d7 and determines whether all variables are stored, in other words, whether all variables are selected in S303 and the variable attributes of all variables are confirmed in S305 in the generation process of the virtual circuit (S311). If the server control unit 22 determines in S311 that not all variables are selected ("No" in S311), it returns to S303. On the other hand, if it determines in S311 that all variables are selected ("Yes" in S311), it proceeds to S312.

[0147] After the server control unit 22 proceeds to S303, it repeats the processing of S303 to S311 until all variables are selected in S303. On the other hand, after the server control unit 22 proceeds to S312, it generates a virtual circuit based on the variable data associated with the virtual circuit identifier stored in the test result database 23c4, and appends the circuit diagram of the virtual circuit to the circuit diagram file. In addition, when the circuit diagram of the virtual circuit is appended to the circuit diagram file, it is written to the right side of the latest circuit layout.

[0148] After S312 , the server control unit 22 decrements the count value of the circuit generation counter 23 d 1 by “1” ( S313 ).

[0149] After S313, the server control unit 22 determines whether the count value of the circuit generation counter 23d1 is 0, that is, whether the generation of the virtual circuit has been performed for the specified number of circuit generation times (S314). If the server control unit 22 determines in S314 that the generation of the virtual circuit has not been performed for the specified number of circuit generation times ("No" in S314), the process proceeds to S302. On the other hand, if the server control unit 22 determines in S314 that the generation of the virtual circuit has been performed for the specified number of circuit generation times ("Yes" in S314), the virtual circuit generation execution process is terminated.

[0150] After proceeding to S302, the server control unit 22 repeats the processing of S302 to S313 until it is determined in S314 that the virtual circuit is generated a predetermined number of times. In addition, the processing for generating one virtual circuit consisting of S302 to S313 is hereinafter referred to as "virtual circuit generation unit processing".

[0151] In the following embodiments, examples of prescribed algorithms related to value generation of numerical variables performed by the server control unit 22 are provided. As the algorithm, a known algorithm or a new algorithm can be used. In addition, the randomness of the value of the numerical variable can be generated by changing it evenly throughout the entire range between the minimum and maximum values, or by biasing it toward a specific range within the range between the minimum and maximum values. The specific range can be, for example, a range that is smaller than the center of the range between the minimum and maximum values, or a range that is larger than the center of the range between the minimum and maximum values. That is, the randomness can be weighted.

[0152] Here is an example of generating the value of a numeric variable in Figure 7 Shown in. Figure 7 This is a distribution graph of the gate length (variable 2) and the width of a single finger (variable 3) of each virtual circuit identifier, with the gate length (variable 2) as the horizontal axis and the width of a single finger (variable 3) as the vertical axis. Figure 7 In the example, the gate length (variable 2) and the width of a single interpolation finger (variable 3) are both generated to be biased toward the lower side than the center. In this way, by weighting the randomness of the values ​​of the numerical variables, it is possible to focus on verifying the desired range.

[0153] (Virtual Circuit Generation Method)

[0154] In the following embodiments, a virtual circuit generation method is provided by taking the generation of a virtual circuit by the management database 2 by executing the management program 23a as an example. Figure 8The virtual circuit generation method includes a variable setting step S10 (first step), a variable selecting step S20 (second step), a variable changing step S30 (third step), and a virtual circuit generation step S40 (fourth step).

[0155] In the variable setting step S10 (first step), after receiving a device identifier for identifying a type of a semiconductor device from the user terminal 3 , a plurality of numerical variables related to numerical values ​​of components constituting the semiconductor device of the type indicated by the device identifier are set.

[0156] In the variable selection step S20 (second step), a numerical variable whose value can be changed is randomly selected from among the plurality of numerical variables set in the variable setting step S10 (first step) for the underlying circuit associated with the semiconductor device.

[0157] In the variable changing step S30 (third step), the value of the numerical variable selected in the variable selecting step S20 (second step) is randomly changed.

[0158] In the virtual circuit generating step S40 (fourth step), a virtual circuit is generated based on the value changed in the variable changing step S30 (third step).

[0159] In summary, the virtual circuit generating device involved in the first embodiment of the embodiment of the present disclosure includes a control unit (for example, a server control unit 22) capable of performing the following processing: after receiving an identifier for determining the category of a semiconductor device, namely a device identifier, from a user terminal 3, setting a variable setting process of a plurality of numerical variables [for example, multiplier (variable 1), gate length (variable 2), width of a single finger (variable 3), number of gates (variable 5), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14) and source perimeter (variable 15)] related to the numerical values ​​of the constituent elements of the semiconductor device of the category indicated by the device identifier (performing the server control unit 22 of S201); Server control unit 22: part of initial setting unit 22b); variable selection processing of randomly selecting a numerical variable whose value can be changed from a plurality of numerical variables set by variable setting processing for a basic circuit associated with a semiconductor device (performed by server control unit 22: part of virtual circuit generation unit 22c of S303); variable change processing of randomly changing the value of the numerical variable selected by the variable selection processing (performed by server control unit 22: part of virtual circuit generation unit 22c of S309); and virtual circuit generation processing of generating a virtual circuit based on the value changed by the variable change processing (performed by server control unit 22: part of virtual circuit generation unit 22c of S312). Since a numerical variable whose value can be changed is randomly selected from a plurality of numerical variables for a basic circuit associated with a semiconductor device, the value of the selected numerical variable is randomly changed, and a virtual circuit based on the changed value is generated, it is possible to achieve a reduction in time and labor for generating a virtual circuit while increasing the diversity of virtual circuits.

[0160] In addition, according to the virtual circuit generating device of the first embodiment, the control unit is further configured to perform a maximum value / minimum value setting process (a part of the server control unit 22: initial setting unit 22b that performs S202d) for setting the maximum value and the minimum value of the plurality of numerical variables set by the variable setting process, and in the variable changing process, for the numerical variable selected by the variable selecting process, the value is randomly changed within the range between the minimum value and the maximum value of the numerical variable. Since the value is randomly changed within the range between the minimum value and the maximum value of the numerical variable, the diversity of the virtual circuit is improved.

[0161] In addition, in the virtual circuit generation device according to the first embodiment, as an object that can be set in the variable setting process and can be selected in the variable selection process, in addition to the numerical variables, there are also layout variables related to the layout of the circuit among the components constituting the semiconductor device [for example: the maximum value of the gate width (variable 4), S / D connection (variable 8) and switch S / D (variable 9)], so that at least the first content corresponding to the basic circuit and the second content different from the first content can be obtained as the value of the layout variable. When the control unit selects the layout variable through the variable selection process, it determines whether the value of the layout variable is the first content or the second content in the variable change process. Since as an object that can be set in the variable setting process and can be selected in the variable selection process, in addition to the numerical variables, there are also layout variables related to the layout of the circuit among the components constituting the semiconductor device, the diversity of the virtual circuit is further improved.

[0162] In addition, in the virtual circuit generating device according to the first embodiment, as objects that can be set in the variable setting process and can be selected in the variable selection process, in addition to the numerical variables, there are state variables [gate width change maximum value applicable state (variable 6), specific variable change state (variable 10), specific variable change state (variable 11)] related to whether specific numerical variables [for example, gate width change maximum value (variable 7), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15)] can be changed, so that at least an unchangeable state in which the change of the specific numerical variable is not permitted and a changeable state in which the change of the specific numerical variable is permitted can be obtained as the value of the state variable. When the state variable is selected in the variable selection process, the control unit determines whether the value of the state variable is an unchangeable state or a changeable state in the variable change process, and can change the value of the specific numerical variable in the variable change process when the state variable is in the changeable state. Since the object that can be set in the variable setting process and the object that can be selected in the variable selection process have, in addition to the numerical variables, state variables related to whether the specific numerical variables can be changed, at least an unchangeable state in which the change of the specific numerical variables is not allowed and a changeable state in which the change of the specific numerical variables is allowed can be obtained as the value of the state variable, thereby improving the randomness of the virtual circuit generation process, and as a result, the diversity of the virtual circuits can be further improved.

[0163] In addition, in the virtual circuit generation device according to the first embodiment, when there are multiple selected objects in the variable selection process, the control unit selects the selected objects in a random order for each virtual circuit in the variable selection process. Since the selected objects are selected in a random order for each virtual circuit, the randomness of the virtual circuit generation process is improved, and as a result, the diversity of virtual circuits can be further improved.

[0164] Furthermore, the virtual circuit generating method according to the first embodiment includes a first step, a second step, a third step, and a fourth step.

[0165] The first step is to set a plurality of numerical variables related to numerical values ​​among the constituent elements of the semiconductor device of the category indicated by the device identifier after receiving an identifier for determining the category of the semiconductor device from the user terminal 3 [for example: multiplier (variable 1), gate length (variable 2), width of a single finger (variable 3), number of gates (variable 5), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14) and source perimeter (variable 15)].

[0166] The second step is to randomly select a numerical variable whose value can be changed from among the plurality of numerical variables set in the first step for a basic circuit associated with the semiconductor device.

[0167] The third step is to randomly change the value of the numerical variable selected in the second step.

[0168] The fourth step is to generate a virtual circuit based on the value changed in the third step.

[0169] For the basic circuit associated with the semiconductor device, a numerical variable whose value can be changed is randomly selected from a plurality of numerical variables, the value of the selected numerical variable is randomly changed, and a virtual circuit based on the changed value is generated. Therefore, the time and effort for generating the virtual circuit can be shortened while the diversity of the virtual circuit is improved.

[0170] (Variant Implementation)

[0171] The present invention has been described above based on some possible embodiments. The first embodiment described above is only an example, and those skilled in the art will appreciate that various modifications can be implemented by combining the above-described components, and these modifications are also included in the scope of the present invention.

[0172] For example, in the first embodiment, all variables must be selected in S303 in the process of generating a virtual circuit and used as the objects of confirmation of variable attributes in S305. However, the number and types of variables selected in the process of generating a virtual circuit may be appropriately set.

[0173] For example, the server control unit 22 may select the same number of variables in the generation process of a certain virtual circuit and the generation process of other virtual circuits, but may also randomly select variables in such a way that the types of variables selected in the generation process of a certain virtual circuit are different from the types of variables selected in the generation process of other virtual circuits. In this case, the randomness of the generation process of the virtual circuit becomes higher, and as a result, the diversity of the virtual circuit is further improved. In addition, the server control unit 22 may also make the number of variables selected in the generation process of a certain virtual circuit different from the number of variables selected in the generation process of other virtual circuits.

[0174] In addition, in the first embodiment, the order in which the variables related to the generation process (S302 to S314) of each virtual circuit are selected is irregular, but the order may be regular. For example, the type of the order may be one, but the type of the order may be multiple, and the type of the order may be selected in the generation process (S302 to S314) of each virtual circuit. In addition, in the first embodiment, the same variable is not selected more than two times in the generation process of the one virtual circuit, but it may be selected more than two times. In this case, the number of times the variable is selected in S303 or the number of times the change judgment is performed in S307 may be used as the condition for the end of the generation process of one virtual circuit. In addition, in addition to "all variables are selected" as in the first embodiment, the number of times the variable is selected in S303 or the number of times the change judgment is performed in S307 may be used as the condition for the end of the generation process of one virtual circuit, and the end condition may be randomly set for the generation process (S302 to S314) of each virtual circuit.

[0175] In the first embodiment, numerical variables, layout variables, and state variables are set as the types of variables related to virtual circuits, but numerical variables and layout variables may be set, or numerical variables and state variables may be set.

[0176] In the first embodiment, the provided PDK is stored in the management database 2, but it may be stored in another server other than the management database 2, and the basic design information related to the semiconductor device of the type indicated by the device identifier may be acquired by accessing the other server.

[0177] In addition, in some of the aforementioned embodiments, the server control unit 22 implements various functions based on the various programs and information stored in the server storage unit 23 of the management database 2, but the various programs stored in the server storage unit 23 can also be stored in a cloud database connected to the management database 2 via the communication network 4.

[0178] In addition, the processing disclosed in the aforementioned embodiments can be performed by a single CPU, multiple CPUs, hardware such as an ASIC, or a combination thereof. In addition, the processing disclosed in the aforementioned embodiments can be implemented in various ways such as a storage medium storing a program for executing the processing, or a method for executing the processing.

[0179] In addition, by generating a layout based on a circuit diagram configured with a high-diversity virtual circuit generated in the first embodiment and executing DRC (design rule check), LVS (Layout versus schematic), etc., the possibility of detecting errors when executing DRC and LVS can be increased, thereby improving the quality of the PDK library.

[0180] Similarly, by executing SPICE (Simulation Program with Integrated Circuit Emphasis) based on the circuit diagram generated in the first embodiment, SPICE results for highly diverse input data can be obtained. By executing SPICE in multiple states, the validity of the obtained characteristic values ​​can be verified, and the quality of the PDK library can be improved.

[0181] From the above, the unexpected effect that the present invention can produce is: it can shorten the time and save labor for generating virtual circuits while increasing the diversity of virtual circuits; and, when the circuit diagram in the first embodiment is generated, multiple variable changes are performed, and by analyzing the situation, it is possible to detect whether there are errors or abnormal conditions during the generation of virtual circuits and layout generation, that is, the present invention can also increase the possibility of detecting errors or abnormal conditions by generating a variety of virtual circuits.

[0182] In addition, in some embodiments, the present disclosure also provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the steps of the virtual circuit generation method involved in the above embodiments are implemented.

[0183] For example, the computer device may be a terminal, and its internal structure diagram may be as follows: Fig. 9 shown.

[0184] The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, the virtual circuit generation method involved above is realized. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0185] Those skilled in the art will understand that Fig. 9 The structure shown in the figure is only a block diagram of a part of the structure related to the scheme of the present disclosure, and does not constitute a limitation on the computer device to which the scheme of the present disclosure is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0186] In some embodiments, the embodiments of the present disclosure further provide a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of the virtual circuit generation method involved in the above embodiments are implemented.

[0187] In some embodiments, the embodiments of the present disclosure further provide a program product, including a computer program, which implements the steps of the virtual circuit generation method involved in the above embodiments when the computer program is executed by a processor.

[0188] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided by the present disclosure can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided by the present disclosure may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided by the present disclosure may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, etc., but are not limited to this.

[0189] In the description of this specification, the technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0190] The above-described embodiments only express several implementation methods of the present disclosure, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present disclosure, and these all belong to the protection scope of the present disclosure. Therefore, the protection scope of the patent of the present disclosure shall be subject to the attached claims.

Claims

1. A virtual circuit generating device, characterized in that: The invention comprises a control unit; the control unit is configured to perform the following processing: a variable setting process of, upon receiving a device identifier for specifying a category of a semiconductor device from a user terminal, setting a plurality of numerical variables associated with numerical values ​​among constituent elements constituting the semiconductor device of the category indicated by the device identifier; a variable selection process of randomly selecting a numerical variable whose value can be changed from among the plurality of numerical variables set by the variable setting process for a basic circuit associated with the semiconductor device; A variable changing process of randomly changing the value of the numerical variable selected by the variable selecting process; as well as A virtual circuit generation process, generating a virtual circuit based on the value changed by the variable change process; Wherein, when the number of variables that can be selected in the variable selection process is less than the number of variables set in the variable setting process, the control unit is configured to: randomly select a selection object for each virtual circuit in the variable selection process; The variable selected in the variable selection process related to a certain virtual circuit is different from the variable selected in the variable selection process related to another virtual circuit.

2. The virtual circuit generating device according to claim 1, characterized in that: The control unit is further configured to: perform a maximum value / minimum value setting process for setting the maximum value and the minimum value of the plurality of numerical variables set by the variable setting process, The control unit is further configured to: in the variable changing process, for the numerical variable selected by the variable selecting process, randomly change the value within a range between a minimum value and a maximum value of the numerical variable.

3. The virtual circuit generating device according to claim 1, characterized in that: As objects that can be set in the variable setting process and objects that can be selected in the variable selection process, in addition to the numerical variables, layout variables related to the layout of circuits among the components constituting the semiconductor device are included; The control unit is capable of acquiring at least a first content corresponding to the basic circuit and a second content different from the first content as the value of the layout variable; The control unit is further configured to, when the layout variable is selected in the variable selection process, determine in the variable change process whether a value of the layout variable is the first content or the second content.

4. The virtual circuit generating device according to claim 1, characterized in that: As objects that can be set in the variable setting process and objects that can be selected in the variable selection process, in addition to the numerical variables, state variables related to whether a specific numerical variable can be changed are included; The control unit is capable of obtaining at least an unchangeable state in which the specific numerical variable is not allowed to be changed and a changeable state in which the specific numerical variable is allowed to be changed as the value of the state variable; The control unit is further configured to: when the state variable is selected through the variable selection process, determine whether the value of the state variable is the unchangeable state or the changeable state in the variable change process, and when the state variable is the changeable state, be able to change the value of the specific numerical variable in the variable change process.

5. The virtual circuit generating device according to any one of claims 1 to 4, characterized in that: When there are a plurality of selection targets in the variable selection process, the control unit is configured to select the selection targets in a random order for each of the virtual circuits in the variable selection process.

6. The virtual circuit generating device according to any one of claims 1 to 4, characterized in that: The virtual circuit generated later is generated by changing part or all of the constituent elements of the virtual circuit generated previously.

7. A method for generating a virtual circuit, characterized in that: include: A first step is to, after receiving a device identifier for identifying a type of a semiconductor device from a user terminal, set a plurality of numerical variables associated with numerical values ​​of components constituting the semiconductor device of the type indicated by the device identifier; A second step of randomly selecting a numerical variable whose value can be changed from among the plurality of numerical variables set in the first step for a basic circuit associated with the semiconductor device; A third step of randomly changing the value of the numerical variable selected in the second step; as well as A fourth step of generating a virtual circuit based on the value changed in the third step; wherein, when the number of variables that can be selected in the second step is less than the number of variables set in the first step, a selection object is randomly selected for each of the virtual circuits in the second step; The variable selected in the second process related to a certain virtual circuit is different from the variable selected in the second process related to another virtual circuit.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to claim 7 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to claim 7 are implemented.

10. A program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to claim 7 are implemented.

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