Metal semiconductor contact structure and preparation method thereof, solar cell, photovoltaic module

Abstract

The present application relates to the field of solar cells, and in particular to a metal semiconductor contact structure and a preparation method thereof, a solar cell, and a photovoltaic module. The metal semiconductor contact structure includes a metal electrode and a semiconductor layer in contact with each other, the metal electrode has a metal element, and the semiconductor layer has a semiconductor element and a doping element for doping the semiconductor layer; there are holes and a conductive structure at the contact interface between the metal electrode and the semiconductor layer, the conductive structure includes a conductive eutectic close to the semiconductor layer, and a conductive crystal extending from the conductive eutectic toward the hole, the conductive eutectic includes a eutectic formed by a metal element and a semiconductor element, and the conductive crystal includes a crystal formed by crystallization of the metal element. The metal semiconductor contact structure can improve the contact performance of the metal semiconductor contact structure, thereby promoting the improvement of performance indicators such as the open circuit voltage and photoelectric conversion efficiency of the solar cell.

Description

Technical Field

[0001] The present application relates to the field of solar cells, and in particular to a metal semiconductor contact structure and a preparation method thereof, a solar cell, and a photovoltaic module. Background Art

[0002] The metal semiconductor contact structure is an important component of solar cells and has a significant impact on the performance of solar cells. Usually, the metal semiconductor contact structure can be formed by printing and sintering a slurry containing metal materials, but the current practice will lead to problems such as large contact resistance in the conductive contact area between the metal material and the semiconductor material, and the contact performance needs to be optimized urgently, thus affecting the further improvement of the open circuit voltage and photoelectric conversion efficiency of solar cells. Summary of the invention

[0003] In order to solve the above technical problems, the present application discloses a metal semiconductor contact structure and a preparation method, a solar cell, and a photovoltaic module, which can effectively improve the contact performance of the metal semiconductor contact structure and optimize the performance of the solar cell.

[0004] In a first aspect, the present application provides a metal semiconductor contact structure, the metal semiconductor contact structure comprising a metal electrode and a semiconductor layer in contact with each other, the metal electrode having a metal element, the semiconductor layer having a semiconductor element and a doping element for doping the semiconductor layer;

[0005] There are holes and conductive structures at the contact interface between the metal electrode and the semiconductor layer. The conductive structure includes a conductive eutectic close to the semiconductor layer and a conductive crystal extending from the conductive eutectic toward the hole. The conductive eutectic includes a eutectic formed by the metal element and the semiconductor element, and the conductive crystal includes a crystal formed by crystallization of the metal element.

[0006] Further, the metal electrode comprises a silver electrode; and / or,

[0007] The semiconductor element includes silicon; and / or,

[0008] The semiconductor layer includes a doped silicon layer or an intrinsic silicon layer, wherein the doped silicon layer includes one of a doped amorphous silicon layer, a doped polycrystalline silicon layer or a diffusion-doped crystalline silicon layer, and the intrinsic silicon layer includes an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer or an intrinsic polycrystalline silicon layer.

[0009] Further, the doped silicon layer includes one of a doped amorphous silicon layer, a doped polycrystalline silicon layer, a doped microcrystalline silicon layer or a doped crystalline silicon layer; wherein the doped crystalline silicon layer is prepared by thermally diffusing the doping element on crystalline silicon;

[0010] The semiconductor layer includes an intrinsic silicon layer, and the intrinsic silicon layer includes an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer or an intrinsic polycrystalline silicon layer.

[0011] Furthermore, the metal semiconductor contact structure has a first conductive region and a second conductive region located outside the first conductive region, the first conductive region has the hole and the conductive structure, the second conductive region has glass material and metal particles, the glass material is in contact with the semiconductor layer and burns part of the passivation layer on the semiconductor layer, wherein the metal particles form a direct conductive contact with the semiconductor layer through the burnt part of the passivation layer; the metal particles and the conductive crystals have the same metal element.

[0012] Furthermore, the conductive crystal is contained in the hole.

[0013] Furthermore, the conductive crystal includes a crystalline main chain and a crystalline side chain extending from the crystalline main chain in a growth direction different from that of the crystalline main chain.

[0014] Furthermore, the density of the holes is greater than or equal to 10 / mm 2 And less than 100 / mm 2 ;

[0015] And / or, the pores have a pore diameter of 100 nm to 2000 nm;

[0016] And / or, the size of the conductive crystal is 10nm to 100nm.

[0017] Furthermore, the metal electrode is a silver electrode, and the aluminum impurity content in the silver electrode is less than 0.1 wt %.

[0018] In a second aspect, an embodiment of the present application provides a method for preparing the metal semiconductor contact structure as described in the first aspect, the preparation method comprising the following steps:

[0019] Printing electrode paste on the semiconductor layer; the electrode paste includes glass frit, metal particles and organic carrier;

[0020] Sintering the electrode paste at a low temperature to form an electrode precursor on the semiconductor layer, wherein the electrode precursor includes glass frit and metal particles wrapped in the glass frit; the sintering temperature of the low temperature sintering is lower than the peak sintering temperature of the electrode paste;

[0021] A reverse bias voltage is applied to the electrode precursor and a laser induced contact process is performed simultaneously to form the metal electrode, and the hole and the conductive structure are formed in the contact interface region between the metal electrode and the semiconductor layer.

[0022] Furthermore, in the step of sintering the electrode slurry at a low temperature, the sintering temperature is 500°C to 650°C.

[0023] Furthermore, in the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, the reverse bias voltage has a voltage of 9V to 15V.

[0024] Furthermore, in the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, the reverse bias voltage has a voltage of 11V to 15V.

[0025] Furthermore, in the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, the conditions of the laser induced contact treatment include: a wavelength of 500nm to 1100nm, a current density of 1000A / cm 2 ~1400A / cm 2 , the scanning rate is 35m / s~55m / s.

[0026] Furthermore, the preparation method further comprises: after the step of sintering the electrode slurry at a low temperature and before the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, performing light injection;

[0027] Alternatively, the preparation method further comprises: performing light injection after the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment.

[0028] Furthermore, the light injection step includes:

[0029] Heating the electrode precursor once, wherein the peak temperature of the heating once is 200° C. to 600° C.;

[0030] The electrode precursor is heated for a second time and irradiated with light, wherein the peak temperature of the second heating is 100°C to 300°C, and the energy density of the light irradiation is 10 kW / m 2 ~100kW / m 2 The wavelength of the light is a continuous spectral band of 500nm to 1100nm.

[0031] In a third aspect, the present application provides a solar cell, wherein the solar cell comprises the metal semiconductor contact structure as described in the first aspect, or comprises the metal semiconductor contact structure prepared by the preparation method as described in the second aspect.

[0032] Furthermore, the solar cell further comprises:

[0033] A silicon substrate, wherein the light-receiving surface of the silicon substrate has a suede structure;

[0034] The metal semiconductor contact structure is arranged on the light-receiving surface and / or the backlight surface of the silicon substrate, wherein the semiconductor layer is arranged close to the silicon substrate, and the semiconductor layer also has the velvet structure.

[0035] Furthermore, the velvet structure is a pyramid structure, and the holes in the metal semiconductor contact structure are located at the top of the pyramid structure and its vicinity.

[0036] Furthermore, the solar cell further comprises a passivation layer, wherein the passivation layer is arranged on a side of the semiconductor layer away from the silicon substrate, and the metal electrode penetrates the passivation layer and contacts the semiconductor layer.

[0037] Furthermore, the solar cell includes a PERC cell, a HJT cell, a TOPCon cell, an IBC cell or a perovskite-crystalline silicon tandem solar cell.

[0038] As an implementation mode, the solar cell is a TOPCon cell, and the solar cell comprises:

[0039] the silicon substrate;

[0040] On the light-receiving surface of the silicon substrate, a PN junction region, a first passivation layer, and a first metal electrode are sequentially provided in a direction away from the light-receiving surface, wherein the PN junction region is a first semiconductor layer;

[0041] On the backlight surface of the silicon substrate, a passivation contact structure, a second passivation layer and a second metal electrode are sequentially arranged in a direction away from the backlight surface, wherein the passivation contact structure comprises a tunneling passivation layer arranged close to the silicon substrate and a doped silicon layer arranged away from the silicon substrate, the doped silicon layer has the same conductivity type as the silicon substrate, and the doped silicon layer is a second semiconductor layer;

[0042] The first metal electrode penetrates the first passivation layer and contacts the PN junction region, so that the PN junction region and the first metal electrode form the metal-semiconductor contact structure, and / or the second metal electrode penetrates the second passivation layer and contacts the doped silicon layer, so that the doped silicon layer and the second metal electrode form the metal-semiconductor contact structure.

[0043] Further, the first semiconductor layer is formed by thermally diffusing the doping element into the silicon substrate, or the first semiconductor layer is a doped polysilicon layer or a doped amorphous silicon layer deposited on the light-receiving surface of the silicon substrate; and / or,

[0044] The first passivation layer is one or more of an aluminum oxide layer, a silicon oxide layer, a silicon oxynitride layer or a silicon nitride layer deposited on the PN junction region; and / or,

[0045] The tunnel passivation layer is at least one of a silicon oxide layer, an amorphous silicon layer, a polysilicon layer, and a silicon carbide layer; and / or,

[0046] The second passivation layer is one or more of a silicon oxide layer, a silicon oxynitride layer or a silicon nitride layer deposited on the second semiconductor layer.

[0047] As an implementation mode, the solar cell is a HJT cell, and the solar cell comprises:

[0048] Silicon substrate;

[0049] A first intrinsic layer, a first semiconductor layer, a first transparent conductive layer, and a first metal electrode are sequentially arranged on the light-receiving surface of the silicon substrate;

[0050] A second intrinsic layer, a second semiconductor layer, a second transparent conductive layer, and a second metal electrode disposed on the backlight surface of the silicon substrate are sequentially disposed on the backlight surface of the silicon substrate;

[0051] The metal-semiconductor contact structure is formed between the first metal electrode and the first semiconductor layer and the first transparent conductive layer, and / or the metal-semiconductor contact structure is formed between the second metal electrode and the second semiconductor layer and the second transparent conductive layer.

[0052] Further, the first intrinsic layer includes one or more layers of an intrinsic amorphous silicon layer and a hydrogenated amorphous silicon layer; and / or,

[0053] The first semiconductor layer is one or more doped silicon layers; and / or,

[0054] The first transparent conductive layer is one or more of an indium tin oxide layer, an aluminum-doped zinc oxide layer, a zinc oxide layer, an indium oxide layer or a tin oxide layer; and / or,

[0055] The second intrinsic layer includes one or more layers of an intrinsic amorphous silicon layer and a hydrogenated amorphous silicon layer; and / or,

[0056] The second semiconductor layer is one or more doped silicon layers; and / or,

[0057] The second transparent conductive layer is one or more of an indium tin oxide layer, an aluminum-doped zinc oxide layer, a zinc oxide layer, an indium oxide layer or a tin oxide layer.

[0058] As an embodiment, the solar cell is a PERC solar cell, and the solar cell includes:

[0059] Silicon substrate;

[0060] A first semiconductor layer and a first passivation layer are sequentially formed on the light-receiving surface of the silicon substrate;

[0061] The first metal electrode penetrates the first passivation layer and forms the metal-semiconductor contact structure with the first semiconductor layer.

[0062] Further, the first semiconductor layer is one or more doped silicon layers; and / or,

[0063] The solar cell further comprises: a second semiconductor layer and a back surface field passivation layer sequentially arranged on the backlight side of the silicon substrate, and a second metal electrode is also arranged on the backlight side of the silicon substrate, and the second metal electrode is in ohmic contact with the second semiconductor layer.

[0064] As an embodiment, the solar cell is an IBC solar cell, and the solar cell comprises:

[0065] Silicon substrate;

[0066] A tunnel passivation layer, a first semiconductor layer, a first passivation layer and a first metal electrode are sequentially arranged in the N-type conductive region of the backlight surface of the silicon substrate;

[0067] The tunnel passivation layer, the second semiconductor layer, the second passivation layer and the second metal electrode are sequentially arranged in the P-type conductive area of ​​the backlight surface of the silicon substrate; one of the first semiconductor layer and the second semiconductor layer has an N-type doping element and the other has a P-type doping element;

[0068] Among them, the first metal electrode penetrates the first passivation layer and contacts the first semiconductor layer, so that the first metal electrode and the first semiconductor layer form the metal-semiconductor contact structure, and / or the second metal electrode penetrates the second passivation layer and contacts the second semiconductor layer, so that the second metal electrode and the second semiconductor layer form the metal-semiconductor contact structure.

[0069] In a fourth aspect, the present application provides a photovoltaic module, wherein the photovoltaic module comprises the solar cell as described in the third aspect.

[0070] Compared with the prior art, this application has at least the following beneficial effects:

[0071] The present application provides a new metal-semiconductor contact structure, which can effectively improve the carrier transport capacity from the semiconductor layer to the metal-semiconductor contact area, and from the metal-semiconductor contact area to the metal electrode, improve the contact performance of the metal-semiconductor contact structure, and thereby promote the improvement of performance indicators such as the open-circuit voltage and photoelectric conversion efficiency of solar cells.

[0072] In the above structure, the conductive structure includes both the conductive eutectic near the semiconductor layer at the contact interface and the conductive crystal that grows and extends from the conductive eutectic toward the hole. Since the conductive eutectic includes a eutectic formed by metal elements and semiconductor elements, it is not only conducive to the carriers being transported from the substrate of the solar cell to the semiconductor layer, but also has a lower contact resistivity than the non-eutectic state of the metal nanoparticles and the semiconductor material, that is, the conductive eutectic has a lower contact resistivity, which is conducive to optimizing the contact performance between the metal electrode and the semiconductor layer.

[0073] At the same time, the conductive crystals growing from the conductive eutectic toward the hole include crystals formed by the crystallization of metal elements. Compared with the structure in which metal nanoparticles are in contact with semiconductor materials, the conductive crystals formed by the crystallization of such metal elements have higher purity single-substance characteristics, and thus have lower resistivity and better carrier transmission capacity. Having such conductive crystals in the hole can further reduce the loss of carriers transported from the conductive eutectic to the metal electrode on the basis of reducing the contact resistance between the metal electrode and the semiconductor layer by the conductive eutectic, thereby optimizing the contact performance between the metal electrode and the semiconductor layer through the cooperation of the conductive eutectic and the conductive crystals located in the hole, thereby improving the open circuit voltage and photoelectric conversion efficiency of the solar cell and other performance indicators. BRIEF DESCRIPTION OF THE DRAWINGS

[0074] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0075] Figure 1 It is a schematic diagram of the structure of the first solar cell in the embodiment of the present application;

[0076] Figure 2 yes Figure 1 A magnified schematic diagram of the structure at center A;

[0077] Figure 3 is a schematic structural diagram of a first conductive region in a metal semiconductor contact structure according to an embodiment of the present application;

[0078] Figure 4 is a schematic diagram of the structure of a second solar cell in an embodiment of the present application;

[0079] Figure 5 is a schematic diagram of the structure of a third solar cell in the embodiment of the present application;

[0080] Figure 6 is a schematic structural diagram of a fourth solar cell according to an embodiment of the present application;

[0081] Figure 7 is a SEM image of the contact interface of the metal semiconductor contact structure in the solar cell of Example 1 of the present application;

[0082] Figure 8 This is another SEM image of the contact interface of the metal semiconductor contact structure in the solar cell of Example 1 of the present application.

[0083] Description of reference numerals:

[0084] 100, silicon substrate; 200, semiconductor layer; 201, first semiconductor layer; 202, second semiconductor layer; 300, metal electrode; 301, first metal electrode; 302, second metal electrode; 400, passivation layer; 401, first passivation layer; 4011, aluminum oxide passivation layer; 4012, anti-reflection layer; 402, second passivation layer; 403, third passivation layer; 500, tunneling passivation layer; 601, first intrinsic layer; 602, second intrinsic layer; 701, first transparent conductive layer; 702, second transparent conductive layer; 800, back surface field passivation layer;

[0085] 1. Metal semiconductor contact structure; 11. Holes; 12. Conductive structure; 121. Conductive eutectic; 122. Conductive crystal; 1221. Crystalline main chain; 1222. Crystalline side chain; 13. Contact interface; 14. Glass material; 15. Metal particles; 1a. First conductive region; 1b. Second conductive region 1b. DETAILED DESCRIPTION

[0086] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0087] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings. These terms are mainly used to better describe the present application and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0088] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in this application can be understood according to specific circumstances.

[0089] In addition, the terms "installed", "set", "provided with", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0090] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, "plurality" means two or more.

[0091] In solar cells, the contact performance of the metal-semiconductor contact structure has an important impact on the photoelectric conversion efficiency and other performance of the solar cell. The metal-semiconductor contact structure is a structure formed by the contact between the metal electrode and the conductive semiconductor layer, in which the semiconductor layer is used to transport the photogenerated carriers from the substrate (such as the silicon substrate), and the metal electrode is used to collect the carriers, and then collect the collected carriers through the busbar. The contact performance between the semiconductor layer and the metal electrode directly affects the transmission capacity of the carriers between the semiconductor layer and the metal electrode, and thus affects the performance indicators such as the photoelectric conversion efficiency of the solar cell.

[0092] A method for a metal semiconductor contact structure is to screen print an electrode paste on the surface of a passivation layer set on a semiconductor layer, and then sinter the electrode paste at a high temperature (generally the peak sintering temperature is 750°C to 850°C), so that the electrode paste burns through the passivation layer and contacts the semiconductor layer to form a patterned metal electrode, thereby realizing a metal semiconductor contact structure. In the above method, the main components of the electrode paste include glass frit, metal powder (such as silver powder) and organic carrier. Among them, the metal powder is mainly used to transport carriers; the organic carrier mainly plays a role in dispersing the metal powder, so that the metal powder can be fully mixed in the glass frit, and the metal powder can be dispersed in the organic solvent, and can be fixed on the semiconductor layer in the form of slurry by screen printing; the glass frit mainly plays a corrosive role under high temperature, burns through the passivation layer and brings part of the metal powder to the surface of the semiconductor layer, and achieves the purpose of conductivity through the metal and silicon contact of the semiconductor layer.

[0093] However, in addition to promoting the conductive contact between the metal electrode and the semiconductor layer, the overly hot glass powder will also cause irreversible large-scale corrosion to the contact interface of the metal semiconductor contact structure, resulting in a large number of corrosion structural defects at the contact interface, destroying the passivation film structure on the surface of the semiconductor layer, and then causing the carrier recombination rate at the contact interface to increase, greatly reducing the open circuit voltage and series resistance of the solar cell, and thus reducing the photoelectric conversion efficiency of the solar cell. In addition, the metal semiconductor contact structure obtained by the above method will also increase the contact resistivity between the metal and the semiconductor layer, since the glass material component that burns through the passivation film layer is a high-resistivity medium, thereby weakening the carrier transport capacity at the metal semiconductor contact structure. From the above analysis, it can be seen that the contact performance of the metal semiconductor contact structure still needs to be further optimized to improve indicators such as the photoelectric conversion efficiency of solar cells.

[0094] Based on the discovery and analysis of the above problems, this application proposes a new metal semiconductor contact structure and its preparation method, solar cell, and photovoltaic module. By solving the problems of irreversible large-area corrosion and low carrier transport capacity of the metal semiconductor contact structure, the contact performance of the metal semiconductor contact structure is optimized, thereby improving the electrical performance indicators such as the photoelectric conversion efficiency of the solar cell.

[0095] Since the metal semiconductor contact structure of the embodiment of the present application is applied to solar cells (especially in crystalline silicon solar cells), the metal semiconductor contact structure and its preparation method will be introduced when introducing the solar cell of the embodiment of the present application below, and the metal semiconductor contact structure and its preparation method will not be described separately.

[0096] In a first aspect, the present application provides a solar cell having a metal semiconductor contact structure. Figure 1 As shown, Figure 1 Schematic diagram of the structure of the first solar cell of the present application embodiment, the solar cell comprises:

[0097] Silicon substrate 100;

[0098] A semiconductor layer 200 and a passivation layer 400 are sequentially arranged on the surface of a silicon substrate 100;

[0099] The metal electrode 300 penetrates the passivation layer 400 and comes into physical contact with the semiconductor layer 200 .

[0100] That is, the metal electrode 300 and the semiconductor layer 200 in physical contact form a metal-semiconductor contact structure 1. The physical contact refers to direct contact between the structure of the metal electrode and the structure of the semiconductor layer.

[0101] The semiconductor layer 200 may be disposed on the light-receiving surface and / or the backlight surface of the silicon substrate 100, and correspondingly, the metal-semiconductor contact structure 1 may also be disposed on the light-receiving surface and / or the backlight surface of the silicon substrate 100. Figure 1 As shown, the semiconductor layer 200 includes a first semiconductor layer 201 disposed on the light-receiving surface of the silicon substrate 100 and a second semiconductor layer 202 disposed on the backlight surface of the silicon substrate 100; the passivation layer 400 includes a first passivation layer 401 disposed on the side of the first semiconductor layer 201 away from the silicon substrate 100, and a second passivation layer 402 disposed on the side of the second semiconductor layer 202 away from the silicon substrate 100; the metal electrode 300 includes a first metal electrode 301 in contact with the first semiconductor layer 201, and a second metal electrode 302 in contact with the second semiconductor layer 202. The first semiconductor layer 201 is in contact with the first metal electrode 301 to form a metal-semiconductor contact structure 1 located on the light-receiving surface of the silicon substrate 100. The second semiconductor layer 202 is in contact with the second metal electrode 302 to form a metal-semiconductor contact structure 1 located on the backlight surface of the silicon substrate 100.

[0102] The metal-semiconductor contact structure 1 located on the light-receiving surface of the silicon substrate 100 is taken as an example below to further illustrate the metal-semiconductor contact structure 1 of the embodiment of the present application.

[0103] Combination Figure 2 and Figure 3 As shown, Figure 2 yes Figure 1 The enlarged schematic diagram of the structure at A in the figure is also a schematic diagram of the structure of the metal semiconductor contact structure 1 in the embodiment of the present application. Figure 3 1 is a schematic diagram of the structure of the first conductive region in the metal semiconductor contact structure of the embodiment of the present application. In the metal semiconductor contact structure 1, the first metal electrode 301 has a metal element, and the first semiconductor layer 201 has a semiconductor element and a doping element for doping the semiconductor layer. A hole 11 and a conductive structure 12 are provided at the contact interface 13 between the first metal electrode 301 and the first semiconductor layer 201. The conductive structure 12 includes a conductive eutectic 121 close to the first semiconductor layer 201, and a conductive crystal 122 extending from the conductive eutectic 121 toward the hole 11, wherein the conductive eutectic 121 includes a eutectic formed by a metal element and a semiconductor element, and wherein the conductive crystal 122 includes a crystal formed by crystallization of the metal element.

[0104] The first metal electrode 301 has a metal element, which means that the first metal electrode 301 has a material corresponding to the metal element as the main component. For example, when the first metal electrode 301 is a silver electrode, the main component of the first metal electrode 301 is the silver element. However, since the first metal electrode 301 is usually made by processing an electrode paste after screen printing, and the electrode paste includes glass material and an organic carrier in addition to metal powder, the first metal electrode 301 finally made may include other components that are not completely decomposed in the electrode paste in addition to the metal element as the main component. In addition, when the metal electrode is a silver electrode, the content of metal aluminum impurities in the silver electrode is less than 0.1wt%.

[0105] The first semiconductor layer 201 has a semiconductor element and a doping element for doping the semiconductor layer, which means that the first semiconductor layer 201 has a material corresponding to the semiconductor element as a main component, for example, when the semiconductor element is silicon and the first semiconductor layer 201 is a PN junction region, the main component of the first semiconductor layer 201 is a silicon film layer corresponding to the silicon element. The PN junction region can be a diffused silicon layer formed by diffusing and doping doping elements of different types from the silicon substrate 100 into the silicon substrate 100, or a crystalline silicon layer doped with doping elements formed on the silicon substrate 100 by in-situ doping. The doping element is, for example, phosphorus or boron, indicating that a certain concentration of doping elements can be doped when the main component is a silicon layer.

[0106] Optionally, the first metal electrode 301 includes one or more silver electrodes. Optionally, the first semiconductor layer 201 includes a doped silicon layer or an intrinsic silicon layer, wherein the doped silicon layer includes one of a doped amorphous silicon layer, a doped polycrystalline silicon layer or a crystalline silicon layer doped by thermal diffusion, and the intrinsic silicon layer includes an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer or an intrinsic polycrystalline silicon layer. For example, in a passivated contact solar cell, the first semiconductor layer 201 may be a doped silicon layer, such as a doped amorphous silicon layer or a PN junction region (the PN junction region may be a diffused silicon layer formed on the silicon substrate 100 by high-temperature diffusion). Optionally, the semiconductor element in the first semiconductor layer 201 may be silicon element. Exemplarily, the silicon substrate 100 is an N-type silicon substrate 100, the first metal electrode 301 is a silver electrode, and the first semiconductor layer 201 is a PN junction region formed by boron diffusion into the N-type silicon substrate 100. The above-mentioned metal semiconductor contact structure 1 is a contact structure of a silver electrode and a PN junction. In the conductive structure 12 at the contact interface 13, the conductive eutectic 121 is a eutectic structure formed by silver and silicon, and the conductive crystal 122 is a crystal formed by the crystallization of the silver element, that is, a silver element in a crystal form.

[0107] The intrinsic in the intrinsic silicon layer means that the doping concentration of the doping element in the silicon is less than 10 10 Pieces / cm 3 .

[0108] The metal-semiconductor contact structure 1 can reduce the contact resistance between the first metal electrode 301 and the semiconductor by forming a hole 11 and a specific conductive structure 12 at the interface where the first metal electrode 301 contacts the first semiconductor layer 201, thereby improving the carrier transport capacity and enhancing the open circuit voltage and photoelectric conversion efficiency of the solar cell.

[0109] In the above structure, the conductive structure 12 includes both a conductive eutectic 121 near the first semiconductor layer 201 at the contact interface 13 and a conductive crystal 122 growing and extending from the conductive eutectic 121 toward the hole 11. Since the conductive eutectic 121 includes a eutectic formed by metal elements and semiconductor elements, it is not only conducive to the carriers being transported from the substrate of the solar cell to the first semiconductor layer 201, but also has a lower contact resistance than the non-eutectic contact between the metal particles and the semiconductor material. Among them, there are at least two carrier transport paths for photogenerated carriers in the interface region of the metal semiconductor contact structure. The first carrier transport path is: silicon substrate 100, semiconductor layer 200, conductive eutectic 121, conductive crystal 122; the second carrier transport path is: silicon substrate 100, semiconductor layer 200, glass material 14 containing metal particles 15. It can be seen that the first carrier transport path has a lower resistivity, which is conducive to optimizing the contact performance between the first metal electrode 301 and the first semiconductor layer 201. For example, when the metal electrode is a silver electrode and the semiconductor layer is a doped silicon layer, since the conductive eutectic is a eutectic formed by silver elements and silicon elements, it has lower resistivity and better conductivity than the direct contact between nano silver powder and the silicon layer, that is, non-eutectic contact.

[0110] At the same time, the conductive crystals 122 growing from the conductive eutectic 121 toward the hole 11 include crystals formed by crystallization of metal elements. Compared with the structure in which metal particles are in contact with semiconductor materials, the conductive crystals 122 formed by crystallization of such metal elements have higher purity, lower resistivity, and better carrier transmission capacity. The presence of such high-purity conductive crystals 122 in the hole 11 can further reduce the loss of carriers transported from the conductive eutectic 121 to the first metal electrode 301 on the basis of reducing the contact resistance between the first metal electrode 301 and the first semiconductor layer 201 by the conductive eutectic 121, thereby optimizing the contact performance between the first metal electrode 301 and the first semiconductor layer 201 through the cooperation of the conductive eutectic 121 and the conductive crystals 122 located in the hole 11, thereby improving the open circuit voltage of the solar cell, reducing the series resistance of the solar cell, and reducing the performance indicators such as the photoelectric conversion efficiency.

[0111] Furthermore, in the metal semiconductor contact structure 1 of the embodiment of the present application, the density of the holes 11 is greater than or equal to 10 / mm 2 And less than 100 / mm 2 , the pore size of the hole 11 is 100nm~2000nm. When the density and pore size of the hole 11 are controlled within the above range, a conductive structure 12 with a suitable number and distribution density can be provided, so that the conductive eutectic 121 and the conductive crystal 122 in these conductive structures 12 work together to improve the carrier transmission capacity and reduce the contact resistance; at the same time, the degree of structural damage to the contact interface caused by the existence of the hole 11 structure can be reduced, and the carrier recombination rate in the contact interface area can be reduced. It should be noted that although the hole 11 in the embodiment of the present application will inevitably cause certain damage to the contact interface 13 between the first metal electrode and the first semiconductor layer, compared with the large-area structural corrosion defects caused by the corrosion of the glass material 14 to the contact interface, the damage area of ​​the structure caused by the hole 11 is obviously much smaller. Therefore, the embodiment of the present application can optimize the carrier transport capability by using the conductive eutectic 121 and the conductive crystal 122 in the conductive structure 12 by providing the holes 11 and the conductive structure 12 at the contact interface, and can also reduce the contact recombination phenomenon caused by the large-area corrosion of the contact interface by the glass material 14 by using the small-area damage of the contact interface by the holes 11. Further optimizing and controlling the density and pore size of the holes 11 can further optimize the above effects.

[0112] The positions of the holes 11 on the first semiconductor layer 201 are randomly distributed. In the SEM image of the metal semiconductor contact structure 1 with holes 11, according to the number of holes 11 and the area of ​​holes 11 within a specified range, it can be calculated that the density of the holes 11 is greater than or equal to 10 / mm 2 And less than 100 / mm 2 By measuring the size of the holes 11, it can be determined that the pore size of the holes 11 ranges from 100 nm to 2000 nm. For example, the density of the holes 11 is 10 / mm 2 , 15 pieces / mm 2 , 18 pieces / mm 2 , 20 pieces / mm 2 , 25 pieces / mm 2 , 30 pieces / mm 2 , 40 pieces / mm 2 , 50 pieces / mm 2 , 60 pieces / mm 2 , 70 pieces / mm 2 , 80 pieces / mm 2 , 90 pieces / mm 2 or 100 pcs / mm 2Exemplarily, the pore 11 has a pore diameter of 100 nm, 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, 1150 nm, 1200 nm, 1250 nm, 1300 nm, 1350 nm, 1400 nm, 1500 nm, 1600 nm, 1700 nm, 1800 nm, 1900 nm or 2000 nm.

[0113] The aperture of the hole 11 is defined as follows: the hole is not limited to a circle in a geometric sense. When the hole is a circle in a non-geometric sense, the hole is defined as the maximum length in the horizontal direction in the SEM image.

[0114] Further, in the metal semiconductor contact structure 1 of the embodiment of the present application, the size of the conductive crystal 122 is 10nm to 100nm. The conductive crystal 122 of the above length range can grow in the hole 11 with good crystal quality, and improve the carrier transmission capacity with high-purity metal single crystal. Among them, the size of the conductive crystal 122 can be measured in the SEM image of the metal semiconductor contact structure 1 with the hole 11 and the conductive structure 12, and the size of the conductive crystal 122 refers to the maximum length of the conductive crystal 122 measured in the SEM image along the direction perpendicular to the thickness of the first semiconductor layer 201 (i.e., the horizontal direction in the SEM image). Exemplarily, the size of the conductive crystal 122 is 10nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 55nm, 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm or 100nm.

[0115] Further integration Figure 3As shown, in the metal semiconductor contact structure 1 of the embodiment of the present application, the conductive crystal 122 includes a crystalline main chain 1221 and a crystalline side chain 1222 extending from the crystalline main chain 1221 in a growth direction different from the crystalline main chain 1221. In the embodiment of the present application, the crystalline main chain 1221 and the side chains growing laterally from the crystalline main chain 1221 make the conductive crystal 122 present a tree-like structure as a whole. Compared with the conductive crystal 122 that only grows and crystallizes in a single direction (such as a rod-shaped conductive crystal 122), the tree-like conductive crystal 122 can provide more transport channels for carriers from the first semiconductor layer 201, and the tree-like conductive crystal 122 has a more divergent structural morphology, which is also conducive to increasing the contact probability between the conductive crystal 122 and other conductive materials (such as metal particles 15 from the electrode slurry) around the hole 11, and comprehensively improving the conductive crystal 122's ability to transport carriers from multiple aspects.

[0116] Continue reading Figure 2 and Figure 3 The metal semiconductor contact structure 1 of the embodiment of the present application has a first conductive region 1a and a second conductive region 1b located outside the first conductive region 1a. The first conductive region 1a has the aforementioned holes 11 and conductive structures 12, and is the main conductive region of the metal semiconductor contact structure 1. The second conductive region 1b has glass frit 14 and metal particles 15, the glass frit 14 is in contact with the first semiconductor layer 201 and does not corrode the first semiconductor layer 201, and some of the metal particles 15 are in direct contact with the first semiconductor layer 201. In addition, the metal particles 15 and the conductive crystals 122 in the first conductive region 1a are the same metal element. The second conductive region 1b is a secondary conductive region of the metal semiconductor contact structure 1. Among them, the glass frit 14 in the second conductive region 1b is in contact with the first semiconductor layer 201 but does not corrode the first semiconductor layer 201. The sintering temperature of the glass frit 14 can be reduced to ensure that the glass frit 14 does not corrode a large area or cannot corrode the first semiconductor layer 201.

[0117] Compared with the first conductive region 1a, the second conductive region 1b has the following differences: First, although the metal particles 15 of the second conductive region 1b and the conductive crystals 122 of the first conductive region 1a have the same metal element, the metal particles 15 are a single substance formed by a conventional metal element (for example, when the metal element is silver, the metal particles 15 are nanosilver particles or agglomerated silver particles after nanosilver particles are agglomerated), which has a lower resistivity and good carrier transport capability; however, since the conductive crystals 122 are obtained by crystallization (for example, when the metal element is silver, the conductive crystals 122 are silver crystals), compared with the metal particles 15 formed by the same metal element, the conductive crystals 122 have higher purity, stronger carrier transport capability, and lower resistance. Second, the metal particles 15 in the second conductive region 1b are dispersed in the glass material 14 with a higher resistivity, and the metal particles 15 that can contact the first semiconductor layer 201 are also dispersed on the first semiconductor layer 201; the conductive eutectic 121 in the first conductive region 1a is a eutectic formed by the co-crystallization of metal elements and semiconductor elements. Figure 2 As can be seen from the schematic diagram, the structural characteristics of the eutectic make the resistivity of the eutectic lower, which is conducive to further improving the carrier transmission capacity. Third, the material of the second conductive region 1b includes glass material 14 and metal particles 15, combined with Figure 2 It can be seen that although the glass material 14 contacts the first semiconductor layer 201, it does not corrode the first semiconductor layer 201; the carrier transport of the first conductive area 1a needs to rely on the hole 11 structure, but the hole 11 structure will inevitably destroy the contact interface 13 structure between the first metal electrode and the first semiconductor layer in a small area.

[0118] From the above analysis, it can be seen that the first conductive region 1a has excellent carrier transmission capability, but will cause small area damage to the contact interface. Although the carrier transmission capability of the second conductive region 1b is significantly weaker than that of the first conductive layer, it does not cause damage to the contact interface. Therefore, through the complementary cooperation of the first conductive region 1a and the second conductive region 1b, it is possible to more fully exert the excellent carrier transmission capability and significantly reduce the structural damage to the contact interface, thereby ensuring that the structural integrity of the contact interface is high and the damage is less. The contact performance of the metal semiconductor contact structure 1 is improved through improvements in these two aspects, which is ultimately reflected in the improvement of electrical performance indicators such as the photoelectric conversion efficiency of solar cells.

[0119] Furthermore, some of the metal particles 15 of the second conductive region 1 b are also in contact with the conductive crystals 122 of the first conductive region 1 a .

[0120] In an optional embodiment, the hole 11 of the first conductive region 1a only has a conductive crystal 122. In this structure, the carrier transport in the hole 11 is realized by the conductive crystal 122 with higher purity, so that the metal semiconductor contact structure 1 has a more excellent carrier transport performance. In another optional embodiment, the hole 11 of the first conductive region 1a has a glass material 14 in addition to the conductive crystal 122, and the volume proportion of the conductive crystal 122 in the hole 11 is greater than the volume proportion of the glass material 14 in the hole 11, that is, the conductive crystal 122 is the main component and the glass material 14 is a small component. Compared with the structural feature of the second conductive region 1b in which the metal particles 15 are surrounded by glass material 14 and there are no holes 11, although a small amount of glass material 14 remains in the holes 11 of the first conductive region 1a, since the holes 11 are still mainly composed of conductive crystals 122, they are less affected by the glass material 14 with higher resistivity. The first conductive region 1a has a much better carrier transmission capability than the second conductive region 1b.

[0121] The preparation method of the metal semiconductor contact structure 1 is further introduced below.

[0122] The method for preparing the metal semiconductor contact structure 1 comprises the following steps:

[0123] Printing electrode paste on the first semiconductor layer 201; the electrode paste includes glass material 14, metal particles 15 and an organic carrier; wherein the metal particles 15 include nanosilver particles, and the aluminum impurity element content therein is less than 0.1wt%, for example, a commercially available DK-93T electrode paste can be used;

[0124] The electrode paste is sintered at low temperature to form an electrode precursor on the first semiconductor layer 201, wherein the electrode precursor includes glass material 14 and metal particles 15 wrapped in the glass material 14; the temperature range of the low temperature sintering is less than the peak sintering temperature of the electrode paste;

[0125] A reverse bias voltage is applied to the electrode precursor and a laser induced contact process is performed simultaneously to form a first metal electrode 301 , and a hole 11 and a conductive structure 12 are formed at a contact interface 13 between the first metal electrode and the first semiconductor layer.

[0126] Among them, the peak sintering temperature of the electrode slurry refers to: the sintering temperature range in which the glass phase in the electrode slurry can ablate the passivation layer film and can make the metal particles in the electrode slurry have a lower resistivity after sintering treatment, which is usually defined by those skilled in the art as the peak sintering temperature of the electrode slurry. The peak sintering temperature will cause the electrode slurry to cause large-area corrosion to the contact interface between the semiconductor layer and the metal electrode after ablating the passivation layer on the semiconductor layer. The present application controls the sintering temperature to be lower than the peak sintering temperature range to avoid large-area corrosion of the contact interface, while reducing the adverse thermal effects on the solar cell when the high-temperature sintering temperature is used. As for the impact on the conductive properties of the metal semiconductor contact structure caused by the lower sintering temperature, it is improved by the subsequent application of a reverse bias voltage and the operation of laser induced contact treatment. It can be seen that by combining the three technical means of reducing the peak sintering temperature of the electrode slurry with the application of a reverse bias voltage and laser induced contact treatment, it is possible to avoid the problem of large-area corrosion of the contact interface and improve the conductive properties of the metal semiconductor contact structure.

[0127] When preparing the metal semiconductor contact structure 1, the preparation method of the embodiment of the present application first prints and applies electrode paste on the first semiconductor layer 201, so that the electrode paste is fixed on the first semiconductor layer 201, wherein the electrode paste includes glass frit 14 and metal particles 15, so as to form an electrode precursor including glass frit 14 and metal particles 15 wrapped in the glass frit 14. In the process of low-temperature sintering of the electrode paste, the above-mentioned low-temperature sintering temperature can decompose the organic carrier in the electrode paste after printing, so that the electrode precursor including metal particles 15 and glass frit 14 wrapping metal particles 15 is fixed on the first semiconductor layer 201. Since the above-mentioned sintering temperature is lower than the peak sintering temperature of the electrode paste, the glass frit 14 is only softened to a certain extent, but cannot achieve the effect of ablating the passivation film on the first semiconductor layer 201 in contact with it. Therefore, under the condition of the low-temperature sintering temperature, although the glass frit 14 contacts the first semiconductor layer 201, it will not ablate the passivation layer on the first semiconductor layer 201. It can be seen that since the main purpose of the step of sintering the electrode slurry at low temperature is to decompose the organic carrier components in the electrode slurry, this step will not cause large-area corrosion damage to the surface of the first semiconductor layer 201.

[0128] On the basis of ensuring the surface structural integrity of the first semiconductor layer 201, the preparation method of the embodiment of the present application further applies a reverse bias voltage to the electrode precursor and performs a laser induced contact treatment. On the one hand, the reverse bias voltage is used to further enhance the built-in electric field of the solar cell at the contact interface between the first semiconductor layer 201 and the electrode precursor. On the other hand, a large number of photogenerated carriers (i.e., electron-hole pairs) are generated through the laser induced contact treatment. Through the combined effect of these two aspects, the electron carriers and the hole carriers are separated by the electric field, and the carriers of one charge property are rapidly transported to the first semiconductor layer 201 under the acceleration of the electric field. When the first semiconductor layer 201 has a pyramid-shaped velvet structure, the carriers are more easily transported to the top of the pyramid and the position near the top of the pyramid. When these carriers pass through the glass material 14 with a large resistivity, a large amount of heat is generated. This heat decomposes the glass material 14 at the position of the first semiconductor layer 201 with a strong conductivity to form a hole 11, and melts the metal particles 15 at this position, and the metal atoms therein diffuse into the semiconductor atom lattice of the first semiconductor layer 201, forming a conductive eutectic 121 in which the metal element and the semiconductor element co-crystallize near the position of the first semiconductor layer 201 corresponding to the hole 11. After the laser induced contact treatment condition is withdrawn, the temperature of the metal semiconductor contact structure area decreases, and metal atoms are continuously precipitated from the co-crystallized body composed of the metal element and the semiconductor element, and crystallize and grow with the conductive eutectic 121 at the contact interface as the nucleation point, forming a conductive crystal 122 located in the hole 11, forming the aforementioned metal semiconductor contact structure 1. Furthermore, in the process of crystallization and aggregation of the conductive crystal 122 toward the inside of the hole 11, a main crystalline chain 1221 will be crystallized and grown, and side crystalline chains 1222 different from the growth direction of the main crystalline chain 1221 will be grown on the side of the main crystalline chain 1221, and the main crystalline chain 1221 and the side crystalline chain 1222 have the characteristics of random distribution.

[0129] Among them, since the photogenerated carriers generated by the laser induced contact process are transported to the local position on the first semiconductor layer 201 under the action of the electric field to generate a large amount of heat, the holes 11 and the conductive structure 12 including the conductive eutectic 121 and the conductive crystal 122 are mainly distributed in the area corresponding to the first semiconductor layer 201 with strong conductivity, forming the first conductive area 1a. In the area outside the first conductive area 1a, since there is no large amount of heat generated by a large number of carriers passing through the glass material 14, no holes 11 and conductive structures 12 are formed. In this area, mainly glass material 14 and metal particles 15 are included, and the transmission of carriers is realized by using the contact between some metal particles 15 and the first semiconductor layer 201, forming the second conductive area 1b.

[0130] In summary, in the above preparation method, since the glass material 14 will not corrode the surface of the first semiconductor layer 201 on a large scale during the step of curing the electrode slurry, only the glass material 14 in the first conductive region 1a is sintered to form the hole 11 during the step of applying the reverse bias voltage and the laser induced contact treatment, and the glass material 14 in the second conductive region 1b is not further heated and sintered. Therefore, the above method can form the metal semiconductor contact structure 1 with the hole 11 and the conductive structure 12 while avoiding the problem of large-area corrosion damage to the first semiconductor layer 201 caused by high-temperature sintering of the glass material 14, so that the metal semiconductor contact structure 1 has excellent contact performance.

[0131] Furthermore, in the step of low-temperature sintering the electrode paste, the low-temperature (peak) sintering temperature is 500°C to 650°C. Compared with the practice of using a high-temperature peak sintering temperature of 750°C to 850°C after printing, which causes large-area corrosion of the first semiconductor layer by the glass material, the embodiment of the present application adopts a low-temperature sintering process with the opposite technical route, the purpose of which is to decompose the organic carrier in the electrode paste and weaken the ablation ability of the glass material 14 on the passivation layer on the first semiconductor layer 201, to ensure that after curing, the electrode precursor is only fixed on the first semiconductor layer 201, and will not cause ablation damage to the passivation layer on the first semiconductor layer 201. Exemplarily, in the step of curing the electrode paste, the heating temperature is 500°C, 520°C, 550°C, 580°C, 600°C, 620°C or 650°C.

[0132] Furthermore, in the step of applying a reverse bias voltage to the electrode precursor and performing a laser induced contact treatment, the reverse bias voltage is 9V to 15V. For the carriers generated by the laser induced contact treatment, the level of heat generated when passing through the contact interface between the first semiconductor layer 201 and the electrode precursor is closely related to the above-mentioned reverse bias voltage range. When the reverse bias voltage is within the above-mentioned range, it is beneficial to generate a higher heat of 1500K to 8000K when the carriers pass through the contact interface, and use this higher heat to decompose the glass material 14 at the corresponding position, thereby forming a hole 11 region. Under the above-mentioned reverse bias voltage conditions, the glass material 14 in the hole 11 region will be completely decomposed or mostly decomposed. When the reverse bias voltage is at a relatively small voltage value in the above range, the glass material 14 in the hole 11 will be mostly decomposed, and a small part will remain. Since the conductive crystal 122 will still grow in the hole 11 and the volume proportion of the glass material 14 is reduced, the cooperation between the hole 11 and the conductive structure 12 can still improve the carrier transport capacity of the first conductive area 1a. Exemplarily, the reverse bias voltage is 9V, 10V, 11V, 12V, 13V, 14V or 15V.

[0133] Preferably, in the step of applying a reverse bias voltage to the electrode precursor and performing a laser induced contact treatment, the reverse bias voltage is 11 V. Under the above preferred reverse bias voltage condition, a high temperature of 3000K to 5000K can be generated at the contact interface. This instantaneous high temperature can not only decompose the glass material 14, so that only the conductive crystal 122 or most of the conductive crystal 122 is present in the hole 11, but also melt the metal particles 15 and semiconductor atoms at the contact interface, so that the molten semiconductor atoms can accommodate more metal atoms, increase the atomic ratio of metal atoms in the semiconductor material, reduce the resistivity of the conductive eutectic 121, and improve the carrier transport capacity of the conductive eutectic 121.

[0134] Further, in the step of applying a reverse bias voltage to the electrode precursor and performing a laser induced contact treatment, the conditions of the laser induced contact treatment include: a single wavelength spectrum with a wavelength of 500nm to 1100nm, a current density of 1000A / cm 2 ~1400A / cm 2 , the scanning rate is 35m / s~55m / s.

[0135] For the above-mentioned laser induced contact treatment conditions, a single-wavelength laser is used to excite the photogenerated carriers of the first semiconductor layer 201. Exemplarily, the wavelength of the laser injected in the laser induced contact treatment is 532nm, 635nm, 650nm, 808nm, 980nm or 1064nm. When the semiconductor element of the first semiconductor layer 201 is silicon and laser induced contact treatment is performed by laser, a laser with a wavelength of 1064nm or 808nm is preferably used. When a laser with a wavelength of 1064nm or 808nm is selected, since the photon energy of this wavelength can just excite the carriers from the silicon substrate to produce electron-hole pairs (the band gap of silicon at room temperature of 300K is 1.12eV), no additional energy will be generated for the photogenerated carriers to cause heating of the silicon lattice, thereby avoiding the influence on the carrier transport capacity.

[0136] Preferably, the method for preparing the metal semiconductor contact structure further comprises the step of performing light injection.

[0137] In one embodiment, light injection is performed after the step of low temperature sintering the electrode slurry and before the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment. In another embodiment, light injection is performed after the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment.

[0138] Through light injection and heating operations during the light injection process, hydrogen atoms can be utilized to diffuse from the passivation film layer to the recombination centers with higher defect state density, thereby improving the passivation effect at these recombination centers, which is beneficial to further improve the open circuit voltage and fill factor of solar cells with this metal semiconductor contact structure, thereby improving the photoelectric conversion efficiency.

[0139] In addition, compared with the method of performing light injection after applying a reverse bias voltage to the electrode precursor and performing a laser induced contact treatment, the method of first sintering the electrode slurry at a low temperature, then performing light injection, and then applying a reverse bias voltage to the electrode precursor and performing a laser induced contact treatment is more conducive to optimizing the performance of the solar cell. This is because the light injection operation also has a certain amount of heat. When light injection is performed before applying a reverse bias voltage to the electrode precursor and performing a laser induced contact treatment, it can passivate the grain boundaries and defect states.

[0140] Furthermore, the light injection step includes: heating the electrode precursor once, wherein the peak temperature of the first heating is 200°C to 600°C; heating the electrode precursor twice and irradiating with light, wherein the peak temperature of the second heating is 100°C to 300°C, and the energy density of the light is 10kW / m 2 ~100kW / m 2 , the wavelength of the light is a continuous spectral band of 500nm to 1100nm. The light injection step controls the heating conditions and the light conditions within the above range, which can not only achieve a good passivation effect, but also avoid the situation where the glass material corrodes the first semiconductor layer due to excessive heating temperature. It should be noted that in the light injection step of the embodiment of the present application, a continuous spectral band with a wavelength of 500nm to 1100nm is injected, which is different from the single-wavelength laser used in the laser induced contact treatment step.

[0141] The other structural film layers of the solar cell of the embodiment of the present application are further described below.

[0142] See back Figure 1 In the solar cell of the embodiment of the present application, the silicon substrate 100 has an N-type conductivity type or a P-type conductivity type, for example, the silicon substrate 100 is an N-type silicon wafer. The light-receiving surface of the silicon substrate 100 has a velvet structure, for example, a pyramid-shaped velvet structure. The velvet structure is provided to reduce the reflectivity of the surface of the silicon substrate 100 and increase the refraction and scattering of light inside the silicon substrate 100.

[0143] On the light-receiving surface of the silicon substrate 100, the first semiconductor layer 201 may be a diffusion layer formed by diffusing N-type doping elements or P-type doping elements into the silicon substrate 100, or may be a doped polysilicon layer or a doped amorphous silicon layer formed on the light-receiving surface of the silicon substrate 100 by deposition. For example, the first semiconductor layer 201 of the silicon substrate may be a phosphorus diffusion layer or a boron diffusion layer, so that a PN junction is formed between the N-type silicon wafer and the first semiconductor layer 201, and when the silicon substrate 100 has a velvet structure, it means that the surface of the first semiconductor layer 201 also has the same velvet structure.

[0144] For the first semiconductor layer 201 having a velvet structure, the velvet structure is a pyramid structure, and the holes 11 in the metal semiconductor contact structure 1 are located at one or more of the top, side or bottom of the pyramid structure. In other words, the holes 11 can be located at the top of the pyramid structure or at the side of the pyramid. Generally speaking, when the thickness of the PN junction in the normal direction from the light-receiving surface of the solar cell is less than 2 microns, since the doping atoms are preferentially injected into the silicon substrate near the pyramid tip when preparing the PN junction, or the plasma used to deposit the passivation layer moves toward the PN junction at a certain speed, the thickness of the passivation film layer near the pyramid tip may be preferentially reduced due to the impact of the plasma near the pyramid tip, or the silicon wafer with a pyramid velvet structure is more likely to be scratched and the pyramid tip is worn off during the production line process flow, thereby causing the pyramid tip to be damaged. The above three possible reasons lead to a reduction in the thickness of the dielectric passivation layer at the pyramid tip and its vicinity, and the resistivity of the passivation layer is usually very high. Therefore, the conductivity at the pyramid tip and its vicinity is relatively high, and under the combined conditions of reverse bias voltage and laser induced contact treatment, it becomes the preferred transmission path for photogenerated carriers; wherein, the pyramid tip and its vicinity refers to a range of 2 microns extending outward along a direction parallel to the silicon substrate with the pyramid tip as the center point.

[0145] A first passivation layer 401 is also provided on the side of the first semiconductor layer 201 facing away from the silicon substrate 100. The first passivation layer 401 includes one or a composite layer of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride. Figure 1 In the solar cell shown, the first passivation layer 401 includes an aluminum oxide passivation layer 4011 disposed near the first semiconductor layer 201 and an anti-reflection layer 4012 with an anti-reflection function disposed away from the first semiconductor layer 201. The first metal electrode 301 sequentially penetrates the anti-reflection layer 4012 and the aluminum oxide passivation layer 4011 and contacts the first semiconductor layer 201.

[0146] The above is an introduction to the structural film layer of the light-receiving surface of the solar cell. It is understandable that, according to the structural characteristics of different types of solar cells, film layers with other structural characteristics can also be set on the light-receiving surface and the backlight surface of the solar cell. For example, when the film layer on the backlight surface has a second metal electrode 302 and a first semiconductor layer 201 in contact, the aforementioned metal semiconductor contact structure 1 can also be used. In addition, the method for forming the structural film layer can also adopt the conventional practices of the prior art. For example, a silicon substrate 100 with a velvet structure is obtained by texturing, and a first semiconductor layer 201 with a PN junction is obtained by doping with doping elements by thermal diffusion doping, and a first passivation layer 401 is obtained by ALD or PECVD process, and so on. In addition, the embodiments of the present application can also adopt conventional practices such as polishing and cleaning according to the formation of the winding coating layer, borosilicate glass layer or phosphorus silicon glass layer in the process of forming each structural film layer, and the present application does not limit this.

[0147] by Figure 1 The solar cell shown is a TOPCON solar cell as an example. Along the direction away from the silicon substrate 100, a tunneling passivation layer 500, a second semiconductor layer 202, a second passivation layer 402 and a patterned second metal electrode 302 are sequentially provided on the backlight surface of the silicon substrate 100. The second metal electrode 302 penetrates the second passivation layer 402 and contacts the second semiconductor layer 202.

[0148] Among them, the material of the tunnel passivation layer 500 may include a variety of dielectric materials, such as at least one of silicon oxide, amorphous silicon, polycrystalline silicon, and silicon carbide. Specifically, the tunnel passivation layer 500 may be composed of a silicon oxide layer containing silicon oxide. This is because the silicon oxide layer has excellent passivation properties, can minimize the recombination loss of minority carriers on the surface of the semiconductor substrate, and is a film with excellent durability for subsequent high-temperature processes. The tunnel passivation layer 500, as a barrier for electrons or holes, can be combined with a polycrystalline silicon layer to prevent minority carriers from passing through. The tunnel passivation layer 500 can also have a pinhole channel effect, so that the carriers in the solar cell can move freely, and the selective passage of the majority carriers is generated by heavily doped polycrystalline silicon, which is conducive to reducing the recombination loss of minority carriers. Among them, the second semiconductor layer 202 is a phosphorus-doped polycrystalline silicon layer, and the second passivation layer 402 is a passivation layer, and its material can be selected from any one material or any combination of materials of silicon oxide, aluminum oxide, silicon carbide, silicon nitride or silicon oxynitride layer.

[0149] Combination Figure 4 As shown, Figure 4 1 is a schematic diagram of the structure of the second solar cell of the embodiment of the present application, the solar cell is a HJT solar cell, and the solar cell includes:

[0150] Silicon substrate 100;

[0151] A first intrinsic layer 601, a first semiconductor layer 201, and a first transparent conductive layer 701 are sequentially arranged on the light-receiving surface of the silicon substrate 100;

[0152] A metal-semiconductor contact structure 1 is formed between the first metal electrode 301 , the first semiconductor layer 201 and the first transparent conductive layer 701 .

[0153] The silicon substrate 100 has an N-type conductivity type or a P-type conductivity type, for example, the silicon substrate 100 is an N-type crystalline silicon layer. The light-receiving surface of the silicon substrate 100 has a velvet structure, for example, a pyramid-shaped velvet structure. The first intrinsic layer 601 is one or more layers of superimposed intrinsic amorphous silicon layers and / or hydrogenated amorphous silicon layers. The first semiconductor layer 201 is an N-type doped silicon layer or a P-type doped silicon layer, the doped silicon layer can be one or more layers, and the doped silicon layer can be a doped amorphous silicon layer or a doped microcrystalline silicon layer. The first transparent conductive layer 701 is one or more of an indium tin oxide layer, an aluminum-doped zinc oxide layer, a zinc oxide layer, an indium oxide layer or a tin oxide layer.

[0154] In an optional implementation, the silicon substrate 100 is an N-type crystalline silicon layer, the first semiconductor layer 201 is a P-type doped microcrystalline silicon layer, the first transparent conductive layer 701 is an indium tin oxide layer, and the first metal electrode 301 is a silver electrode.

[0155] When preparing the metal semiconductor contact structure 1, the reverse bias voltage and laser-induced contact processing instantly generate a local heat concentration point, and a large amount of heat instantly melts the P-type doped microcrystalline silicon layer, the first transparent conductive layer 701 and the metal silver particles in the electrode slurry, so that part of the silver atoms diffuse into the first transparent conductive layer 701 and the P-type doped microcrystalline silicon film in turn, and in the subsequent cooling process, a metal semiconductor contact structure 1 doped with silicon, indium tin oxide and silver elements is formed.

[0156] It can be understood that the backlight surface of the silicon substrate 100 can have a structural film layer symmetrical to the light-receiving surface, that is, the second intrinsic layer 602, the second semiconductor layer 202 and the second transparent conductive layer 702 are sequentially arranged on the backlight surface of the silicon substrate 100, and a second metal electrode 302 is formed on the backlight surface, and a metal semiconductor contact structure 1 is formed between the second metal electrode 302, the second semiconductor layer 202 and the second transparent conductive layer 702.

[0157] Combination Figure 5 As shown, Figure 5 1 is a schematic diagram of the structure of a third solar cell in an embodiment of the present application, wherein the solar cell is a PERC solar cell, and the solar cell comprises:

[0158] Silicon substrate 100;

[0159] A first semiconductor layer 201 and a first passivation layer 401 are sequentially formed on the light-receiving surface of the silicon substrate 100;

[0160] A first metal electrode 301 penetrates the first passivation layer 401 and forms an ohmic contact with the first semiconductor layer 201;

[0161] A metal-semiconductor contact structure 1 is formed between the first metal electrode 301 and the first semiconductor layer 201 .

[0162] Wherein, the silicon substrate 100 has an N-type conductivity type or a P-type conductivity type, for example, the silicon substrate 100 is a P-type silicon substrate 100. The light-receiving surface of the silicon substrate 100 has a velvet structure, for example, a pyramid-shaped velvet structure. The setting of the velvet structure is conducive to reducing the reflectivity of the surface of the silicon substrate 100 and increasing the refraction and scattering of light inside the silicon substrate 100. Wherein, the first semiconductor layer 201 is an N-type doped silicon layer or a P-type doped silicon layer, and the doped silicon layer can be one layer or multiple layers. In an optional embodiment, the silicon substrate 100 is a P-type crystalline silicon layer, the first semiconductor layer 201 is an N-type doped crystalline silicon layer, and the metal electrode 300 is a silver electrode.

[0163] It is understandable that the backlight surface of the silicon substrate 100 may have other structural film layers corresponding to the structural characteristics of the PERC cell, for example: a back surface field passivation layer 800 with negative charge properties is provided on the backlight surface of the silicon substrate 100, and the second metal electrode 302 on the backlight surface is provided on the side of the back surface field passivation layer 800 away from the silicon substrate 100, and the second metal electrode 302 is in ohmic contact with the second semiconductor layer 202.

[0164] Combination Figure 6 As shown, Figure 6 : is a schematic diagram of the structure of the fourth solar cell of the embodiment of the present application, the solar cell is an IBC solar cell, and the solar cell includes:

[0165] Silicon substrate 100;

[0166] A tunneling passivation layer 500, a first semiconductor layer 201 and a first passivation layer 401 are sequentially arranged in an N-type conductive region on a backlight surface of a silicon substrate 100, and a tunneling passivation layer 500, a second semiconductor layer 202 and a second passivation layer 402 are sequentially arranged in a P-type conductive region on a backlight surface of the silicon substrate 100, wherein the first semiconductor layer 201 has an N-type doping element and the second semiconductor layer 202 has a P-type doping element;

[0167] The first metal electrode 301 penetrates the first passivation layer 401 of the N-type conductive region and makes ohmic contact with the first semiconductor layer 201, so that the first metal electrode 301 and the first semiconductor layer 201 form a first metal-semiconductor contact structure 1;

[0168] The second metal electrode 302 penetrates the second passivation layer 402 of the P-type conductive region and makes ohmic contact with the second semiconductor layer 202 , so that the second metal electrode 302 and the second semiconductor layer 202 form a second metal-semiconductor contact structure 1 .

[0169] Among them, the silicon substrate 100 has an N-type conductivity type or a P-type conductivity type, for example, the silicon substrate 100 is a P-type silicon substrate 100. The light-receiving surface of the silicon substrate 100 has a velvet structure, for example, a pyramid-shaped velvet structure. The velvet structure is provided to reduce the reflectivity of the surface of the silicon substrate 100 and increase the refraction and scattering of light inside the silicon substrate 100. In addition, other structural film layers can be provided on the light-receiving surface of the silicon substrate 100 according to actual needs. For example, a third passivation layer 403 is provided on the light-receiving surface of the silicon substrate 100.

[0170] The embodiment of the present application also provides a fifth solar cell (not shown in the figure), which is a perovskite-crystalline silicon tandem solar cell, in which the perovskite cell serves as the top cell, any one of the above-mentioned first to fourth solar cells, and only needs to set the metal semiconductor contact structure with holes and conductive structure on the backlight surface of the crystalline silicon bottom cell.

[0171] In a second aspect, an embodiment of the present application provides a photovoltaic module, which includes the solar cell as described in the first aspect. The photovoltaic module is formed by connecting and packaging a plurality of the above solar cells in series and / or in parallel.

[0172] The metal semiconductor contact structure and preparation method thereof, solar cell, and photovoltaic module of the present application are further described below in conjunction with more specific embodiments. In addition, the sodium hydroxide and TS40 additives, electrode slurry, etc. used in the following embodiments can all be purchased commercially, for example, the Al content in the electrode slurry accounts for 0.05-0.50%, and the oxygen content accounts for 1.0-5.0%.

[0173] Example 1

[0174] This embodiment provides a solar cell with a metal semiconductor contact structure, and the preparation method thereof is as follows:

[0175] (1) Texturing: In a tank-type device, sodium hydroxide and TS40 additives with a volume ratio of 7:1 are used, the temperature is maintained at 80°C, and the time is 7 minutes to quickly texturize the silicon substrate, and the thinning amount is controlled to be 5μm silicon substrate;

[0176] (2) Boron diffusion: Place the textured silicon substrate into a boron diffusion furnace and introduce BCl at 850°C-1050°C 3 performing boron diffusion to form a boron diffusion layer;

[0177] (3) Alkali polishing: Use chain HF equipment to remove the borosilicate glass on the backlight surface of the silicon substrate due to boron expansion, and then use a slot-type alkali polishing machine to remove the PN junction on the backlight surface and edge of the silicon substrate;

[0178] (4) Preparation of tunnel passivation layer: using a tubular PECVD device to deposit a silicon oxide tunnel passivation layer on the backlit surface of the silicon substrate;

[0179] (5) Preparing a phosphorus-doped amorphous silicon layer: depositing a phosphorus-doped polysilicon layer on the tunnel passivation layer using a tubular PECVD device;

[0180] (6) Annealing: Annealing is carried out in a tubular annealing furnace;

[0181] (7) RCA cleaning: First, the phosphorus-doped polysilicon layer and its mask layer that are plated on the light-receiving surface are removed by chain equipment using hydrofluoric acid with a mass concentration of 5%, and then the film is transferred to a tank-type alkaline polishing machine to remove the coating on the light-receiving surface.

[0182] (8) Depositing a passivation layer: using an ALD device to deposit an aluminum oxide layer as a first passivation layer on the boron diffusion layer, and then using a PECVD device to deposit a silicon oxynitride layer on the aluminum oxide layer as an anti-reflection layer; using a PECVD device to deposit a silicon oxynitride layer on the phosphorus-doped polysilicon layer as a second passivation layer; wherein the first passivation layer, the anti-reflection layer, and the second passivation layer can all be understood as passivation layers disposed on the semiconductor layer;

[0183] (9) Fabrication of metal semiconductor contact structure:

[0184] (9.1) screen printing electrode paste on the anti-reflection layer and the second passivation layer respectively;

[0185] (9.2) Low temperature sintering of electrode slurry: low temperature sintering of electrode slurry at a sintering temperature of 600°C to form an electrode precursor;

[0186] (9.3) Light injection: The electrode precursor is heated at a peak temperature of 500°C in the first heating and at a peak temperature of 200°C in the second heating, and the energy density of the light is 50 kW / m 2 Next, a continuous spectrum band with a wavelength of 500nm to 1100nm is used for light injection;

[0187] (9.4) Applying a reverse bias voltage to the electrode precursor after light injection and performing laser induced contact treatment, so that the electrode precursor located on the light-receiving surface and the backlight surface is transformed into a first metal electrode and a second metal electrode, and the first metal electrode penetrates the anti-reflection layer and the first passivation layer and contacts with the boron diffusion layer to form a first metal semiconductor contact structure, and the second metal electrode penetrates the second passivation layer and contacts with the phosphorus-doped polysilicon layer to form a second metal semiconductor contact structure; wherein the reverse bias voltage is 15V, and the laser induced contact treatment conditions include: the laser wavelength is 1064nm, the current density is 1200A / cm 2 , the scanning rate is 40m / s.

[0188] The metal semiconductor contact structure in the solar cell of this embodiment is photographed by scanning electron microscope at different magnifications, and the following is obtained: Figure 7 and Figure 8 The SEM images shown in Figure 7 This is a SEM image of the contact interface of the metal semiconductor contact structure at 10K magnification. Figure 8 This is a SEM image of the contact interface of the metal semiconductor contact structure at 50K magnification. Figure 7 It can be seen that Figure 7 The circled positions are holes formed at the contact interface. Apart from the holes, the pyramid structure in other areas is relatively intact and has not been corroded on a large scale. Figure 8 It can be further confirmed that holes are formed at the contact interface, and there are conductive crystals in the holes, and the corresponding conductive eutectic is below the holes. It can be seen that in this embodiment, the metal semiconductor contact structure only has holes located in the first conductive region that will cause small-area damage to the structure of the contact interface. In addition, the glass material and metal particles in the second conductive region will not cause large-area corrosion of the passivation layer on the pyramid structure of the contact interface. The pyramid structure can still maintain a high degree of integrity, and the top of the pyramid is not significantly damaged, thereby improving the contact performance of the metal semiconductor contact structure.

[0189] Example 2

[0190] The difference between this embodiment and embodiment 1 is that in the step of manufacturing the metal semiconductor contact structure, after the electrode slurry is sintered at low temperature, a reverse bias voltage is first applied and a laser induced contact treatment is performed, and then light injection is performed.

[0191] Example 3

[0192] The difference between this embodiment and the first embodiment is that in the step of manufacturing the metal semiconductor contact structure, light injection is not performed.

[0193] Performance test description:

[0194] Scanning Electron Microscope (SEM) test:

[0195] Using chemical etching methods, nitric acid is first used to corrode the blocky silver of the outermost metal electrode of the solar cell, exposing the glass component used to burn through the passivation layer. Then hydrofluoric acid is used to corrode the glass component layer, exposing the holes at the contact interface in the metal semiconductor contact structure. The holes are photographed using a scanning electron microscope to obtain the corresponding SEM image.

[0196] Hole density, hole diameter, conductive crystal size test:

[0197] The density of the holes is calculated based on the number and area of ​​holes within a specified range in the SEM image;

[0198] The pore diameters were measured based on SEM images;

[0199] The size of the conductive crystals was measured from SEM images.

[0200] The above is a detailed introduction to the technical solutions disclosed in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core inventions of the embodiments of the present application. At the same time, for those skilled in the art, according to the ideas of the present application, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A metal semiconductor contact structure, characterized in that: The metal semiconductor contact structure comprises a metal electrode and a semiconductor layer in contact with each other, the metal electrode comprises a metal element, and the semiconductor layer comprises a semiconductor element and a doping element for doping the semiconductor layer; There are holes and conductive structures at the contact interface between the metal electrode and the semiconductor layer. The conductive structure includes a conductive eutectic close to the semiconductor layer and a conductive crystal extending from the conductive eutectic toward the hole. The conductive eutectic includes a eutectic formed by the metal element and the semiconductor element, and the conductive crystal includes a crystal formed by crystallization of the metal element.

2. The metal semiconductor contact structure according to claim 1, characterized in that: The metal electrode comprises a silver electrode; and / or, The semiconductor element includes silicon; and / or, The semiconductor layer includes a doped silicon layer or an intrinsic silicon layer.

3. The metal semiconductor contact structure according to claim 2, characterized in that: When the semiconductor layer includes the doped silicon layer, the doped silicon layer includes one of a doped amorphous silicon layer, a doped polycrystalline silicon layer, a doped microcrystalline silicon layer or a doped crystalline silicon layer; wherein the doped crystalline silicon layer is prepared by thermally diffusing the doping element on crystalline silicon; When the semiconductor layer includes the intrinsic silicon layer, the intrinsic silicon layer includes an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer or an intrinsic polycrystalline silicon layer.

4. The metal semiconductor contact structure according to any one of claims 1 to 3, characterized in that: The metal semiconductor contact structure comprises a first conductive region and a second conductive region outside the first conductive region, the first conductive region comprises the hole and the conductive structure, the second conductive region comprises glass frit and metal particles, the glass frit contacts the semiconductor layer and ablates a portion of the passivation layer on the semiconductor layer; wherein the metal particles form direct conductive contact with the semiconductor layer through the ablated portion of the passivation layer; The metal particles and the conductive crystals have the same metal element.

5. The metal semiconductor contact structure according to claim 4, characterized in that: The conductive crystal is contained in the hole.

6. The metal semiconductor contact structure according to any one of claims 1 to 3, characterized in that: The conductive crystal includes a main crystal chain and side crystal chains extending from the main crystal chain in a direction different from the growth direction of the main crystal chain.

7. The metal semiconductor contact structure according to any one of claims 1 to 3, characterized in that: The density of the holes is greater than or equal to 10 / mm 2 And less than 100 / mm 2 ; and / or, The pores have a diameter of 100 nm to 2000 nm; and / or, The size of the conductive crystal is 10nm to 100nm.

8. The metal semiconductor contact structure according to any one of claims 1 to 3, characterized in that: The metal electrode is a silver electrode, and the aluminum impurity content in the silver electrode is less than 0.1 wt %.

9. A method for preparing a metal semiconductor contact structure, characterized in that: The metal semiconductor contact structure is a metal semiconductor contact structure as claimed in any one of claims 1 to 8, and the preparation method comprises the following steps: Printing electrode paste on the semiconductor layer; the electrode paste includes glass frit, metal particles and organic carrier; Sintering the electrode paste at a low temperature to form an electrode precursor on the semiconductor layer, wherein the electrode precursor includes glass frit and metal particles wrapped in the glass frit; the sintering temperature of the low temperature sintering is lower than the peak sintering temperature of the electrode paste; A reverse bias voltage is applied to the electrode precursor and a laser induced contact process is performed simultaneously to form the metal electrode, and the hole and the conductive structure are formed in the contact interface region between the metal electrode and the semiconductor layer.

10. The preparation method according to claim 9, characterized in that: The sintering temperature in the step of sintering the electrode slurry at a low temperature is 500°C to 650°C.

11. The preparation method according to claim 9, characterized in that: In the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, the reverse bias voltage has a voltage of 9V to 15V.

12. The preparation method according to claim 11, characterized in that: In the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, the reverse bias voltage has a voltage of 11V to 15V.

13. The preparation method according to claim 9, characterized in that: In the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, the conditions of the laser induced contact treatment include: a single wavelength spectrum with a wavelength of 500nm to 1100nm, a current density of 1000A / cm 2 ~1400A / cm 2 , the scanning rate is 35m / s~55m / s.

14. The preparation method according to claim 9, characterized in that: The preparation method further comprises: after the step of sintering the electrode slurry at a low temperature and before the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment, performing light injection; Alternatively, the preparation method further comprises: performing light injection after the step of applying a reverse bias voltage to the electrode precursor and simultaneously performing a laser induced contact treatment.

15. The preparation method according to claim 14, characterized in that: The light injection step comprises: Heating the electrode precursor once, wherein the peak temperature of the heating once is 200° C. to 600° C.; The electrode precursor is heated for a second time and irradiated with light, wherein the peak temperature of the second heating is 100°C to 300°C, and the energy density of the light irradiation is 10 kW / m 2 ~100kW / m 2 The wavelength of the light is a continuous spectral band of 500nm to 1100nm.

16. A solar cell, characterized in that: The solar cell comprises the metal semiconductor contact structure as claimed in any one of claims 1 to 8, or comprises the metal semiconductor contact structure prepared by the preparation method as claimed in any one of claims 9 to 15.

17. The solar cell according to claim 16, characterized in that: The solar cell also includes: A silicon substrate, wherein the light-receiving surface of the silicon substrate has a suede structure; The metal semiconductor contact structure is arranged on the light-receiving surface and / or the backlight surface of the silicon substrate, wherein the semiconductor layer is arranged close to the silicon substrate, and the semiconductor layer also has the velvet structure.

18. The solar cell according to claim 17, characterized in that: The velvet structure is a pyramid structure, and the holes in the metal semiconductor contact structure are located at the top of the pyramid structure and its vicinity.

19. The solar cell according to claim 17, characterized in that: The solar cell further comprises a passivation layer, which is arranged on a surface of the semiconductor layer away from the silicon substrate, and the metal electrode penetrates through the passivation layer and contacts the semiconductor layer.

20. The solar cell according to claim 16, characterized in that: The solar cell includes a PERC cell, a HJT cell, a TOPCon cell, an IBC cell or a perovskite-crystalline silicon tandem solar cell.

21. The solar cell according to claim 20, characterized in that: The solar cell is a TOPCon cell, and the solar cell comprises: Silicon substrate; On the light-receiving surface of the silicon substrate, a PN junction region, a first passivation layer, and a first metal electrode are sequentially provided in a direction away from the light-receiving surface, wherein the PN junction region is a first semiconductor layer; On the backlight surface of the silicon substrate, a passivation contact structure, a second passivation layer and a second metal electrode are sequentially arranged in a direction away from the backlight surface, wherein the passivation contact structure comprises a tunneling passivation layer arranged close to the silicon substrate and a doped silicon layer arranged away from the silicon substrate, the doped silicon layer has the same conductivity type as the silicon substrate, and the doped silicon layer is a second semiconductor layer; The first metal electrode penetrates part of the first passivation layer and contacts the first semiconductor layer, so that the PN junction region and the first metal electrode form the metal-semiconductor contact structure, and / or the second metal electrode penetrates the second passivation layer and contacts the doped silicon layer, so that the doped silicon layer and the second metal electrode form the metal-semiconductor contact structure.

22. The solar cell according to claim 21, characterized in that: The first semiconductor layer is formed by thermally diffusing the doping element into the silicon substrate, or the first semiconductor layer is a doped polysilicon layer or a doped amorphous silicon layer deposited on the light-receiving surface of the silicon substrate; and / or, The first passivation layer is one or more of an aluminum oxide layer, a silicon oxide layer, a silicon oxynitride layer or a silicon nitride layer deposited on the PN junction region; and / or, The tunnel passivation layer is at least one of a silicon oxide layer, an amorphous silicon layer, a polysilicon layer, and a silicon carbide layer; and / or, The second passivation layer is one or more of a silicon oxide layer, a silicon oxynitride layer or a silicon nitride layer deposited on the second semiconductor layer.

23. The solar cell according to claim 20, characterized in that: The solar cell is a HJT cell, and the solar cell comprises: Silicon substrate; A first intrinsic layer, a first doped semiconductor layer, a first transparent conductive layer, and a first metal electrode disposed on the light-receiving surface of the silicon substrate are sequentially disposed on the light-receiving surface of the silicon substrate; A second intrinsic layer, a second doped semiconductor layer, a second transparent conductive layer, and a second metal electrode disposed on the backlight surface of the silicon substrate are sequentially disposed on the backlight surface of the silicon substrate; The metal-semiconductor contact structure is formed between the first metal electrode and the first doped semiconductor layer and the first transparent conductive layer, and / or the metal-semiconductor contact structure is formed between the second metal electrode and the second doped semiconductor layer and the second transparent conductive layer.

24. The solar cell according to claim 23, characterized in that: The first intrinsic layer includes one or more layers of an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer, and a silicon oxide layer; and / or, The first doped semiconductor layer is one or more doped silicon layers; and / or, The first transparent conductive layer is one or more of an indium tin oxide layer, an aluminum-doped zinc oxide layer, a zinc oxide layer, an indium oxide layer or a tin oxide layer; and / or, The second intrinsic layer includes one or more layers of an intrinsic amorphous silicon layer and a hydrogenated amorphous silicon layer; and / or, The second doped semiconductor layer is one or more doped silicon layers; and / or, The second transparent conductive layer is one or more of an indium tin oxide layer, an aluminum-doped zinc oxide layer, a zinc oxide layer, an indium oxide layer or a tin oxide layer.

25. The solar cell according to claim 20, characterized in that: The solar cell is a PERC solar cell, and the solar cell comprises: Silicon substrate; A first semiconductor layer and a first passivation layer are sequentially formed on the light-receiving surface of the silicon substrate; The first metal electrode penetrates the first passivation layer and forms the metal-semiconductor contact structure with the first semiconductor layer.

26. The solar cell according to claim 25, characterized in that: The first semiconductor layer is one or more doped silicon layers; and / or, The solar cell further comprises: a second semiconductor layer and a back surface field passivation layer sequentially arranged on the backlight side of the silicon substrate, and a second metal electrode is also arranged on the backlight side of the silicon substrate, and the second metal electrode is in ohmic contact with the second semiconductor layer.

27. The solar cell according to claim 20, characterized in that: The solar cell is an IBC solar cell, and the solar cell comprises: Silicon substrate; A tunnel passivation layer, a first semiconductor layer, a first passivation layer and a first metal electrode are sequentially arranged in the N-type conductive region of the backlight surface of the silicon substrate; The tunnel passivation layer, the second semiconductor layer, the second passivation layer and the second metal electrode are sequentially arranged in the P-type conductive area of ​​the backlight surface of the silicon substrate; one of the first semiconductor layer and the second semiconductor layer has an N-type doping element and the other has a P-type doping element; Among them, the first metal electrode penetrates the first passivation layer and contacts the first semiconductor layer, so that the first metal electrode and the first semiconductor layer form the metal-semiconductor contact structure, and / or the second metal electrode penetrates the second passivation layer and contacts the second semiconductor layer, so that the second metal electrode and the second semiconductor layer form the metal-semiconductor contact structure.

28. A photovoltaic module, characterized in that: The photovoltaic module comprises the solar cell according to any one of claims 16 to 27.

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