A high-precision current source and electronic device

Abstract

The present application discloses a high-precision current source and electronic device, which are applied to the field of high-precision circuit design. Among them, the inverting input terminal of the first operational amplifier is connected to the bias voltage terminal, the non-inverting input terminal of the first operational amplifier is connected to the first end of the zero temperature coefficient resistor circuit, and the output terminal of the first operational amplifier is connected to the first end of the first transistor; the second end of the first transistor is connected to the chip power supply, and the third end of the first transistor is connected to the second end of the zero temperature coefficient resistor circuit; the third end of the zero temperature coefficient resistor circuit is connected to the signal control terminal, the fourth end of the zero temperature coefficient resistor circuit is connected to the first end of the current generating circuit, and the second end of the current generating circuit is connected to the corresponding external circuit. The present application reduces the influence of the chip manufacturing process and the operating voltage on the accuracy of the current source by fine-tuning the bias voltage, and reduces the problem of output current drift caused by temperature changes, avoiding external high-precision resistors.

Description

Technical Field

[0001] The present application relates to the field of high-precision circuit design, and in particular to a high-precision current source and electronic equipment. Background Art

[0002] In the airbag ignition circuit, if the ignition current accuracy is poor, it will cause the airbag to misfire, miss ignite or ignite late. Therefore, the accuracy of the ignition current will directly affect the airbag function, thereby affecting its protection effect on the driver and passengers.

[0003] In the ignition circuit, all currents come from the internal current source. The existing current source circuit is as follows Figure 1 As shown, it includes an operational amplifier OP1, transistors MN1, MN2, MN3, MN4, MNN, and a resistor R1. Among them, the non-inverting input terminal of the operational amplifier OP1 is connected to the bias voltage source inside the chip; the inverting input terminal of the operational amplifier OP1 is connected to the first end of the resistor R1 and the first end of the transistor MN1; the output terminal of the operational amplifier OP1 is connected to the second end of the transistor MN1; the second end of the resistor R1 is grounded; the third end of the transistor MN1 is connected to the first end of the transistor MN2, the second end of the transistor MN2, the first end of the transistor MN3, the first end of the transistor MN4, and the first end of the transistor MNN; the third end of the transistor MN2 is connected to the power supply terminal; the second end of the transistor MN3, the second end of the transistor MN4, and the second end of the transistor MNN are respectively connected to the power supply terminal; the third end of the transistor MN3, the third end of the transistor MN4, and the third end of the transistor MNN are respectively connected to other circuits as output terminals, and output corresponding currents, and the current output by the transistor MN3 is I <0> , the current output by transistor MN4 is , the current output by transistor MNN is I <n>The principle of the circuit is: using the "virtual short" characteristic of the operational amplifier OP1, the voltage at the source of the transistor MN1 is clamped at the reference voltage VREF. The transistor MN1, the transistor MN2 and the resistor R1 form a reference current generating circuit. Ideally, the current IREF of the current source circuit is VREF / R1. However, in order to obtain a high-precision reference current, the resistor R1 needs to use an off-chip high-precision resistor, which will increase the area of ​​the chip pins and the PCB board, thereby increasing the cost.

[0004] In view of the above technologies, seeking a high-precision current source is an urgent problem to be solved by those skilled in the art. Summary of the invention

[0005] The purpose of the present application is to provide a high-precision current source and electronic device, which can solve the problem of increasing the number of pins of the overall chip and the chip PCB board area caused by external high-precision resistors in the prior art.

[0006] In order to solve the above technical problems, the present application provides a high-precision current source, including: a reference voltage generating circuit and a current generating circuit, wherein the reference voltage generating circuit includes: a first operational amplifier, a first transistor, and a zero temperature coefficient resistor circuit;

[0007] Wherein, the inverting input terminal of the first operational amplifier is connected to the bias voltage terminal, the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the zero temperature coefficient resistor circuit, and the output terminal of the first operational amplifier is connected to the first terminal of the first transistor, for obtaining the bias voltage of the bias voltage terminal and transmitting the bias voltage to the zero temperature coefficient resistor circuit;

[0008] The second end of the first transistor is connected to the chip power supply, and the third end of the first transistor is connected to the second end of the zero temperature coefficient resistance circuit;

[0009] The third end of the zero temperature coefficient resistor circuit is connected to the signal control end, the fourth end of the zero temperature coefficient resistor circuit is connected to the first end of the current generating circuit, and the second end of the current generating circuit is connected to the corresponding external circuit, and is used to receive the control signal sent by the signal control end, and adjust the bias voltage according to the control signal, and transmit the adjusted bias voltage to the current generating circuit, so that the current generating circuit outputs the corresponding current according to the adjusted bias voltage.

[0010] Preferably, the zero temperature coefficient resistor circuit comprises a first resistor module, a second resistor module, a third resistor module and a resistor string module;

[0011] The first end of the first resistor module is connected to the first end of the resistor string module, and together they are connected to the third end of the first transistor as the second end of the zero temperature coefficient resistor circuit; the second end of the first resistor module is connected to the first end of the second resistor module, and together they are connected to the non-inverting input end of the first operational amplifier as the first end of the zero temperature coefficient resistor circuit;

[0012] The second end of the second resistor module is connected to the first end of the third resistor module and the second end of the resistor string module;

[0013] The second end of the third resistance module is grounded;

[0014] The third end of the resistor string module is connected to the signal control end as the third end of the zero temperature coefficient resistor circuit, and the fourth end of the resistor string module is connected to the first end of the current generating circuit as the fourth end of the zero temperature coefficient resistor circuit.

[0015] Preferably, the resistor string module includes N resistor modules with the same structure;

[0016] Wherein, the first end of the first resistor module is connected to the first end of the first resistor module as the first end of the resistor string module;

[0017] The first end of the Xth resistor module is connected to the second end of the X-1th resistor module;

[0018] The second end of the Nth resistor module is connected to the second end of the resistor module and the first end of the third resistor module as the second end of the resistor string module;

[0019] The third end of each resistor module is connected to the signal control end as the third end of the resistor string module, so that each resistor module determines the corresponding target resistor module according to the control signal sent by the signal control end, and the fourth end of the target resistor module is connected to the first end of the current generating circuit as the fourth end of the resistor string module;

[0020] Wherein, N is an integer greater than 0, and X is an integer greater than 1 and less than N.

[0021] Preferably, the current generating circuit includes a target current circuit and a copy current circuit;

[0022] The first end of the target current circuit is connected to the fourth end of the zero temperature coefficient resistance circuit as the first end of the current generating circuit; the second end of the target current circuit is connected to the first end of the copy current circuit;

[0023] The second end of the current copying circuit is connected to the corresponding external circuit as the second end of the current generating circuit.

[0024] Preferably, the target current circuit comprises: a second operational amplifier, a second transistor, a third transistor and a fourth resistance module;

[0025] The first end of the second transistor is connected to the chip power supply, and the second end of the second transistor is connected to the third end of the second transistor and the first end of the third transistor;

[0026] The non-inverting input terminal of the second operational amplifier is connected to the fourth terminal of the zero temperature coefficient resistor circuit as the first terminal of the target current circuit; the inverting input terminal of the second operational amplifier is connected to the second terminal of the third transistor and the first terminal of the fourth resistor module; the output terminal of the second operational amplifier is connected to the third terminal of the third transistor, and together they are connected to the first terminal of the copy current circuit as the second terminal of the target current circuit;

[0027] The second end of the fourth resistance module is grounded.

[0028] Preferably, the copy current circuit includes M copy circuits with the same structure; M is an integer greater than 1;

[0029] Wherein, the first ends of the copy circuits are connected to each other and are connected to the second end of the target current circuit as the first end of the copy current circuit;

[0030] The second end of each copy circuit is connected to the corresponding external circuit as the second end of the copy current circuit.

[0031] Preferably, the copy current includes: a fourth transistor and a fifth resistance module;

[0032] The first end of the fourth transistor is connected to the second end of the target current circuit as the first end of the copy circuit, the second end of the fourth transistor is connected to the corresponding external circuit as the second end of the copy circuit, and the third end of the fourth transistor is connected to the first end of the fifth resistor module;

[0033] The second terminal of the fifth resistance module is grounded.

[0034] Preferably, the first transistor is a first P-type MOS transistor; the second transistor is a second P-type MOS transistor; the third transistor is a first N-type MOS transistor;

[0035] The gate of the first P-type MOS transistor is connected to the output end of the first operational amplifier as the first end of the first transistor, the source of the first P-type MOS transistor is connected to the chip power supply as the second end of the first transistor, and the drain of the first P-type MOS transistor is connected to the second end of the zero temperature coefficient resistor circuit as the third end of the first transistor;

[0036] The source of the second P-type MOS transistor is connected to the chip power supply as the first end of the second transistor, and the gate of the second P-type MOS transistor as the second end of the second transistor is connected to the drain of the second P-type MOS transistor as the third end of the second transistor;

[0037] The drain of the first N-type MOS transistor is connected to the gate of the second P-type MOS transistor as the first end of the third transistor, the gate of the first N-type MOS transistor is connected to the output end of the second operational amplifier as the third end of the third transistor, and the source of the first N-type MOS transistor is connected to the first end of the fourth resistor module as the second end of the third transistor.

[0038] Preferably, the fourth transistor is a second N-type MOS transistor;

[0039] Among them, the gate of the second N-type MOS tube is connected to the second end of the target current circuit as the first end of the fourth transistor, the source of the second N-type MOS tube is connected to the corresponding external circuit as the second end of the fourth transistor, and the drain of the second N-type MOS tube is connected to the first end of the fifth resistance module as the third end of the fourth transistor.

[0040] In order to solve the above technical problems, the present application also provides an electronic device, including the above high-precision current source.

[0041] A high-precision current source provided by the present application includes: a reference voltage generating circuit and a current generating circuit, wherein the reference voltage generating circuit includes: a first operational amplifier, a first transistor, and a zero temperature coefficient resistor circuit; wherein the inverting input terminal of the first operational amplifier is connected to the bias voltage terminal, the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the zero temperature coefficient resistor circuit, and the output terminal of the first operational amplifier is connected to the first terminal of the first transistor, for obtaining a bias voltage at the bias voltage terminal and transmitting the bias voltage to the zero temperature coefficient resistor circuit; the second terminal of the first transistor is connected to a chip power supply, and the third terminal of the first transistor is connected to the second terminal of the zero temperature coefficient resistor circuit; the third terminal of the zero temperature coefficient resistor circuit is connected to a signal control terminal, the fourth terminal of the zero temperature coefficient resistor circuit is connected to the first terminal of the current generating circuit, and the second terminal of the current generating circuit is connected to a corresponding external circuit, for receiving a control signal sent by the signal control terminal, and adjusting the bias voltage according to the control signal, and transmitting the adjusted bias voltage to the current generating circuit, so that the current generating circuit outputs a corresponding current according to the adjusted bias voltage. It can be seen that the present application reduces the influence of chip manufacturing process and operating voltage on the accuracy of the current source by fine-tuning the bias voltage, uses resistors with different temperature coefficients to form zero temperature coefficient resistors, reduces the problem of output current drift caused by temperature changes, avoids external high-precision resistors and improves the accuracy of the current source. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0043] Figure 1 A circuit diagram of a current source provided by the prior art;

[0044] Figure 2 A circuit diagram of a high-precision current source provided in an embodiment of the present application;

[0045] Figure 3 A simulation curve showing the change in resistance of a positive temperature coefficient resistor with temperature provided in an embodiment of the present application;

[0046] Figure 4 A simulation curve showing the change in resistance of a negative temperature coefficient resistor with temperature provided in an embodiment of the present application;

[0047] Figure 5 A simulation curve showing how the resistance value of a zero temperature coefficient resistor circuit provided in an embodiment of the present application changes with temperature;

[0048] Figure 6 A circuit diagram of a complete high-precision current source provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0050] The core of this application is to provide a high-precision current source and electronic equipment.

[0051] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0052] In order to solve the above technical problems, the present application provides a high-precision current source, such as Figure 2 The circuit shown includes: a reference voltage generating circuit 1 and a current generating circuit 2, wherein the reference voltage generating circuit 1 includes: a first operational amplifier U1, a first transistor Q1, a zero temperature coefficient resistor circuit 3, and an external circuit 4. The connection relationship of the circuit is as follows: the inverting input terminal of the first operational amplifier U1 is connected to the bias voltage terminal, the non-inverting input terminal of the first operational amplifier U1 is connected to the first terminal of the zero temperature coefficient resistor circuit 3, the output terminal of the first operational amplifier U1 is connected to the first terminal of the first transistor Q1, and is used to obtain the bias voltage (VREF) of the bias voltage terminal and transmit the bias voltage to the zero temperature coefficient resistor circuit 3; the second terminal of the first transistor Q1 is connected to the chip power supply (VCC), and the third terminal of the first transistor Q1 is connected to the second terminal of the zero temperature coefficient resistor circuit 3; the third terminal of the zero temperature coefficient resistor circuit 3 is connected to the signal control terminal, the fourth terminal of the zero temperature coefficient resistor circuit 3 is connected to the first terminal of the current generating circuit 2, and the second terminal of the current generating circuit 2 is connected to the corresponding external circuit 4, and is used to receive the control signal (TRIM) sent by the signal control terminal. <n:0>), and according to the control signal (TRIM <n:0>) adjusts the bias voltage (VREF) and transmits the adjusted bias voltage (VREFOUT) to the current generating circuit 2, so that the current generating circuit 2 outputs a corresponding current according to the adjusted bias voltage (VREFOUT).

[0053] In a specific embodiment, the principle of the high-precision current source provided by the present application is as follows: the first operational amplifier U1 obtains a bias voltage (VREF), and transmits the bias voltage (VREF) to the zero temperature coefficient resistor circuit 3 through the first transistor Q1, and the zero temperature coefficient resistor circuit 3 receives the bias voltage (VREF) and also receives the control signal (TRIM) sent by the signal control terminal. <n:0>The zero temperature coefficient resistor circuit 3 is controlled by the control signal (TRIM <n:0>) adjusts the bias voltage (VREF) to obtain an adjusted bias voltage (VREFOUT), which is then transmitted to the current generating circuit 2 so that the current generating circuit 2 outputs a corresponding current to the corresponding external circuit 4 according to the adjusted bias voltage (VREFOUT).

[0054] It should be noted that the reason why the zero temperature coefficient resistor circuit 3 used in the present application adjusts its bias voltage (VREF) is that the zero temperature coefficient resistor circuit 3 uses resistors with positive and negative temperature coefficients connected in series in proportion to achieve the minimum resistance change within the operating temperature range of the circuit, thereby reducing the influence of temperature on the accuracy of the current source. Figure 3 , Figure 4 and Figure 5 The following are simulation curves of the resistance value of the positive temperature coefficient resistor, the negative temperature coefficient resistor and the zero temperature coefficient resistor circuit 3 proposed in this application changing with temperature. It can be seen that the zero temperature coefficient resistor can control the resistance value change within a very small range. Figure 3 , Figure 4 and Figure 5 The abscissa temp represents the temperature; Figure 3 , Figure 4 and Figure 5 The ordinate kOhm represents the resistance value.

[0055] Preferably, the first transistor Q1 is a first P-type MOS transistor, wherein the gate of the first P-type MOS transistor is connected to the output end of the first operational amplifier U1 as the first end of the first transistor Q1, the source of the first P-type MOS transistor is connected to the chip power supply VCC as the second end of the first transistor Q1, and the drain of the first P-type MOS transistor is connected to the second end of the zero temperature coefficient resistor circuit 3 as the third end of the first transistor Q1.

[0056] A high-precision current source provided by the present application includes: a reference voltage generating circuit and a current generating circuit, wherein the reference voltage generating circuit includes: a first operational amplifier, a first transistor, and a zero temperature coefficient resistor circuit; wherein the inverting input terminal of the first operational amplifier is connected to the bias voltage terminal, the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the zero temperature coefficient resistor circuit, and the output terminal of the first operational amplifier is connected to the first terminal of the first transistor, for obtaining a bias voltage at the bias voltage terminal and transmitting the bias voltage to the zero temperature coefficient resistor circuit; the second terminal of the first transistor is connected to a chip power supply, and the third terminal of the first transistor is connected to the second terminal of the zero temperature coefficient resistor circuit; the third terminal of the zero temperature coefficient resistor circuit is connected to a signal control terminal, the fourth terminal of the zero temperature coefficient resistor circuit is connected to the first terminal of the current generating circuit, and the second terminal of the current generating circuit is connected to a corresponding external circuit, for receiving a control signal sent by the signal control terminal, and adjusting the bias voltage according to the control signal, and transmitting the adjusted bias voltage to the current generating circuit, so that the current generating circuit outputs a corresponding current according to the adjusted bias voltage. It can be seen that the present application reduces the influence of chip manufacturing process and operating voltage on the accuracy of the current source by fine-tuning the bias voltage, uses resistors with different temperature coefficients to form zero temperature coefficient resistors, reduces the problem of output current drift caused by temperature changes, avoids external high-precision resistors and improves the accuracy of the current source.

[0057] Based on the above embodiments, as a preferred embodiment, Figure 6 As shown, the zero temperature coefficient resistor circuit 3 includes a first resistor module ZTCR1, a second resistor module ZTCR2, a third resistor module ZTCR3 and a resistor string module ZTCRX. The connection relationship is as follows: the first end of the first resistor module ZTCR1 is connected to the first end of the resistor string module ZTCRX, and together as the second end of the zero temperature coefficient resistor circuit 3 is connected to the third end of the first transistor Q1; the second end of the first resistor module ZTCR1 is connected to the first end of the second resistor module ZTCR2, and together as the first end of the zero temperature coefficient resistor circuit 3 is connected to the non-inverting input end of the first operational amplifier U1; the second end of the second resistor module ZTCR2 is connected to the first end of the third resistor module ZTCR3 and the second end of the resistor string module ZTCRX; the second end of the third resistor module ZTCR3 is grounded; the third end of the resistor string module ZTCRX is connected to the signal control end as the third end of the zero temperature coefficient resistor circuit 3, and the fourth end of the resistor string module ZTCRX is connected to the first end of the current generating circuit 2 as the fourth end of the zero temperature coefficient resistor circuit 3.

[0058] Among them, as a preferred embodiment, the resistor string module includes N resistor modules with the same structure. The connection relationship of the circuit is: the first end of the first resistor module is connected to the first end of the first resistor module as the first end of the resistor string module; the first end of the Xth resistor module is connected to the second end of the X-1th resistor module; the second end of the Nth resistor module is connected to the second end of the resistor module and the first end of the third resistor module as the second end of the resistor string module; the third end of each resistor module is connected to the signal control end as the third end of the resistor string module, so that each resistor module determines the corresponding target resistor module according to the control signal sent by the signal control end, and connects the fourth end of the target resistor module as the fourth end of the resistor string module to the first end of the current generating circuit; wherein N is an integer greater than 0, and X is an integer greater than 1 and less than N.

[0059] In a specific embodiment, according to Figure 6 The circuit shown in FIG. 1 is as follows: one end of the resistor string module ZTCRX is connected between the first resistor module ZTCR1 and the first transistor Q1, and the other end is connected between the second resistor module ZTCR2 and the third resistor module ZTCR3. The control signal (TRIM <n:0>) selects one of the output ports in the resistor string module to output a regulated bias voltage (VREFOUT), which is between the highest voltage value VH and the lowest voltage value VL, wherein the highest voltage value VH is the voltage value between the first resistor module ZTCR1 and the first transistor Q1; the lowest voltage value VL is the voltage value between the second resistor module ZTCR2 and the third resistor module ZTCR3. That is, the resistor string module ZTCRX includes N resistor modules with the same structure, and the third terminal of each resistor module is used to receive a control signal (TRIM <n:0>), in the entire resistor string module ZTCRX, one of the resistor modules is selected as the target resistor module by the control signal, and the fourth end of the selected resistor module (target resistor module) is connected to the first end of the current generating circuit as the fourth end of the resistor string module, so as to achieve the control signal (TRIM <n:0>) is used to adjust the bias voltage (VREF). One point that needs to be made clear is that each resistor module has a fourth terminal. Only when it is selected as the target resistor module, its fourth terminal is connected to the first terminal of the current generating circuit as the fourth terminal of the resistor string module.

[0060] Preferably, the resistance modules in the first resistance module ZTCR1, the second resistance module ZTCR2, the third resistance module ZTCR3 and the resistance string module ZTCRX have the same structure, and are all formed by proportionally connecting resistors with positive and negative temperature coefficients in series.

[0061] On the basis of the above embodiment, the current generating circuit 2 includes a target current circuit and a copy current circuit. The connection relationship is as follows: the first end of the target current circuit is connected to the fourth end of the zero temperature coefficient resistor circuit as the first end of the current generating circuit; the second end of the target current circuit is connected to the first end of the copy current circuit; the second end of the copy current circuit is connected to the corresponding external circuit as the second end of the current generating circuit.

[0062] As a preferred embodiment, Figure 6 As shown, the target current circuit includes: a second operational amplifier U2, a second transistor Q2, a third transistor Q3 and a fourth resistor module ZTCR4. The connection relationship is as follows: the first end of the second transistor Q2 is connected to the chip power supply VCC, and the second end of the second transistor Q2 is connected to the third end of the second transistor Q2 and the first end of the third transistor Q3; the in-phase input end of the second operational amplifier U2 is connected to the fourth end of the zero temperature coefficient resistor circuit 3 as the first end of the target current circuit; the inverting input end of the second operational amplifier U2 is connected to the second end of the third transistor Q3 and the first end of the fourth resistor module ZTCR4; the output end of the second operational amplifier U2 is connected to the third end of the third transistor Q3, and together as the second end of the target circuit current is connected to the first end of the copy current circuit; the second end of the fourth resistor module ZTCR4 is grounded.

[0063] As a preferred embodiment, the copy current circuit includes M copy circuits with the same structure; M is an integer greater than 1. The connection relationship of the circuits is: the first ends of the copy circuits are connected and connected to the second end of the target current circuit as the first end of the copy current circuit; the second ends of the copy circuits are connected to the corresponding external circuits as the second ends of the copy current circuit. Figure 4 As shown, Figure 6 For example, the number of copy circuits in the example is two. For the first example, the copy current includes: Q4 and ZTCR5; wherein the first end of Q4 is connected to the second end of the target current circuit as the first end of the copy circuit, and the second end of Q4 is connected to the corresponding external circuit as the second end of the copy circuit. The output current is IREF <0> , the third end of Q4 is connected to the first end of ZTCR5; the second end of ZTCR5 is grounded. For the Mth, the copy current includes: QM and ZTCRM; wherein the first end of QM is connected to the second end of the target current circuit as the first end of the copy circuit, and the second end of QM is connected to the corresponding external circuit as the second end of the copy circuit, and the output current is IREF <m>, the third end of QM is connected to the first end of ZTCRM; the second end of ZTCRM is grounded.

[0064] Among them, the second transistor Q2 is a second P-type MOS tube; the third transistor Q3 is a first N-type MOS tube; and the fourth transistor Q4 is a second N-type MOS tube. The connection relationship of the circuit is as follows: the source of the second P-type MOS tube is connected to the chip power supply VCC as the first end of the second transistor Q2, and the gate of the second P-type MOS tube as the second end of the second transistor Q2 is connected to the drain of the second P-type MOS tube as the third end of the second transistor Q2; the drain of the first N-type MOS tube is connected to the gate of the second P-type MOS tube as the first end of the third transistor Q3, the gate of the first N-type MOS tube is connected to the output end of the second operational amplifier U2 as the third end of the third transistor Q3, and the source of the first N-type MOS tube is connected to the first end of the fourth resistor module ZTCR4 as the second end of the third transistor Q3. The gate of the second N-type MOS tube is connected to the second end of the target current circuit as the first end of the fourth transistor Q4 (QM), the source of the second N-type MOS tube is connected to the corresponding external circuit 4 as the second end of the fourth transistor Q4 (QM), and the drain of the second N-type MOS tube is connected to the first end of the fifth resistor module ZTCR5 (ZTCRM) as the third end of the fourth transistor Q4 (QM).

[0065] Among them, Figure 6 In the circuit shown, the current generating circuit 2 is composed of U2, Q2, Q3, Q4, QM, ZTCR4, ZTCR5 and ZTCRM, and can be expanded according to the dotted line part in the figure according to the number of external circuits. Among them, the adjustment bias voltage (VREFOUT) generated by the reference voltage generating circuit 1 is used as the clamping voltage of the current generating circuit 2. Among them, a high-precision reference current (that is, output current) is generated through U2, Q2, Q3 and ZTCR4, and Q4 and ZTCR5 (including expandable QM and ZTCRM) are used to copy the reference current, among which the size of Q4 and Q3, ZTCR5 and ZTCR4 needs to be kept 1:1, so as to ensure the copy accuracy.

[0066] It should be noted that the embodiment provided in this application is only an achievable embodiment and can be configured according to the needs of the user.

[0067] It can be seen that the present application reduces the influence of chip manufacturing process and operating voltage on the accuracy of the current source by fine-tuning the bias voltage, uses resistors with different temperature coefficients to form zero temperature coefficient resistors, reduces the problem of output current drift caused by temperature changes, avoids external high-precision resistors and improves the accuracy of the current source.

[0068] To solve the above technical problems, the present application also provides an electronic device, including the above high-precision current source, and having the same beneficial effects. Its specific embodiments are the same as those of the above high-precision current source, and are not described in detail in the present application.

[0069] The above is a detailed introduction to a high-precision current source and electronic device provided by the present application. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can refer to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

[0070] It should also be noted that, in this specification, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.< / m> < / n>

Claims

1. A high-precision current source, characterized in that: include: A reference voltage generating circuit and a current generating circuit, wherein the reference voltage generating circuit comprises: a first operational amplifier, a first P-type MOS tube, and a zero temperature coefficient resistor circuit; The inverting input terminal of the first operational amplifier is connected to the bias voltage terminal, the non-inverting input terminal of the first operational amplifier is connected to the first terminal of the zero temperature coefficient resistor circuit, and the output terminal of the first operational amplifier is connected to the gate of the first P-type MOS tube, so as to obtain the bias voltage of the bias voltage terminal and transmit the bias voltage to the zero temperature coefficient resistor circuit; The source of the first P-type MOS transistor is connected to a chip power supply, and the drain of the first P-type MOS transistor is connected to the second end of the zero temperature coefficient resistance circuit; The third end of the zero temperature coefficient resistor circuit is connected to the signal control end, the fourth end of the zero temperature coefficient resistor circuit is connected to the first end of the current generating circuit, and the second end of the current generating circuit is connected to the corresponding external circuit, and is used to receive the control signal sent by the signal control end, and adjust the bias voltage according to the control signal, and transmit the adjusted bias voltage to the current generating circuit, so that the current generating circuit outputs the corresponding current according to the adjusted bias voltage; Wherein, the zero temperature coefficient resistance circuit includes a first resistance module, a second resistance module, a third resistance module and a resistance string module; The first end of the first resistor module is connected to the first end of the resistor string module, and together they serve as the second end of the zero temperature coefficient resistor circuit connected to the drain of the first P-type MOS tube; the second end of the first resistor module is connected to the first end of the second resistor module, and together they serve as the first end of the zero temperature coefficient resistor circuit connected to the non-inverting input end of the first operational amplifier; The second end of the second resistor module is connected to the first end of the third resistor module and the second end of the resistor string module; The second end of the third resistance module is grounded; The third end of the resistor string module is connected to the signal control end as the third end of the zero temperature coefficient resistor circuit, and the fourth end of the resistor string module is connected to the first end of the current generating circuit as the fourth end of the zero temperature coefficient resistor circuit; The resistor string module includes N resistor modules with the same structure; Wherein, the first end of the first resistor module is connected to the first end of the first resistor module as the first end of the resistor string module; The first end of the Xth resistor module is connected to the second end of the X-1th resistor module; The second end of the Nth resistor module is connected to the second end of the second resistor module and the first end of the third resistor module as the second end of the resistor string module; The third end of each of the resistor modules is connected to the signal control end as the third end of the resistor string module, so that each of the resistor modules determines the corresponding target resistor module according to the control signal sent by the signal control end, and the fourth end of the target resistor module is connected to the first end of the current generating circuit as the fourth end of the resistor string module; Wherein, N is an integer greater than 0, and X is an integer greater than 1 and less than N.

2. The high-precision current source according to claim 1, characterized in that: The current generating circuit includes a target current circuit and a copy current circuit; Wherein, the first end of the target current circuit is connected to the fourth end of the zero temperature coefficient resistance circuit as the first end of the current generating circuit; the second end of the target current circuit is connected to the first end of the copy current circuit; The second end of the current copying circuit is connected to the corresponding external circuit as the second end of the current generating circuit.

3. The high-precision current source according to claim 2, characterized in that: The target current circuit includes: a second operational amplifier, a second P-type MOS transistor, a first N-type MOS transistor and a fourth resistor module; The source of the second P-type MOS tube is connected to the chip power supply, and the gate of the second P-type MOS tube is connected to the drain of the second P-type MOS tube and the drain of the first N-type MOS tube; The non-inverting input terminal of the second operational amplifier is connected to the fourth terminal of the zero temperature coefficient resistance circuit as the first terminal of the target current circuit; the inverting input terminal of the second operational amplifier is connected to the source of the first N-type MOS transistor and the first terminal of the fourth resistance module; the output terminal of the second operational amplifier is connected to the gate of the first N-type MOS transistor, and together they are connected to the first terminal of the copy current circuit as the second terminal of the target current circuit; The second end of the fourth resistance module is grounded.

4. The high-precision current source according to claim 2, characterized in that: The copy current circuit includes M copy circuits with the same structure; M is an integer greater than 1; Wherein, the first ends of the copy circuits are connected to each other and are connected to the second end of the target current circuit as the first end of the copy current circuit; The second end of each copy circuit is connected to the corresponding external circuit as the second end of the copy current circuit.

5. The high-precision current source according to claim 4, characterized in that: The copy current includes: a second N-type MOS tube and a fifth resistance module; The gate of the second N-type MOS transistor is connected to the second end of the target current circuit as the first end of the copy circuit, the source of the second N-type MOS transistor is connected to the corresponding external circuit as the second end of the copy circuit, and the drain of the second N-type MOS transistor is connected to the first end of the fifth resistor module; A second terminal of the fifth resistance module is grounded.

6. An electronic device, characterized in that: The invention comprises the high-precision current source as described in any one of claims 1 to 5.

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