A SiC MOSFET device

Abstract

This invention relates to a SiC MOSFET device. By introducing an integrated Schottky diode region and a bipolar current enhancement region into the SiC MOSFET, the turn-on voltage during reverse conduction can be effectively reduced, while simultaneously enhancing the surge capability of the device during high-density bipolar current reverse conduction. The device structure and fabrication of this invention are simple, compatible with traditional SiC MOSFET fabrication processes, and enable the production of high-performance, mass-produced SiC MOSFET devices.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor component preparation, and particularly relates to a SiC MOSFET device. BACKGROUND

[0002] Silicon carbide (SiC) is a third-generation semiconductor material, which has excellent characteristics such as large band gap, high critical breakdown field strength, and high thermal conductivity. The power device prepared based on SiC material has excellent performances such as high breakdown voltage, high power density, and high working frequency. Among them, the SiC MOSFET is a voltage-controlled switching device, which has competitiveness in high-temperature, high-frequency, high-voltage, and high-power application occasions. To exert the advantages of the SiC MOSFET, further reduce the switching loss of the device, and improve the ability of the device to conduct large current are important problems to be solved in the design of the device.

[0003] The SiC MOSFET device structure contains a parasitic p-n diode, also known as a body diode. When the device is reversely turned on and the channel is closed, the current only flows through the body diode. Since the working mode of the body diode is bipolar conduction, the turn-on voltage is large and the turn-off is slow. Therefore, integrating a Schottky diode in the SiC MOSFET device structure has become a common design scheme for reducing the switching loss of the device. However, although the integrated Schottky diode can significantly improve the switching capability of the device, it reduces the total area of the body diode in the device, weakens the ability of the device to reversely conduct high-density current, and greatly affects the reliability of the device. SUMMARY

[0004] The purpose of the present application is to provide a SiC MOSFET device which not only takes advantage of the low turn-on voltage of the integrated Schottky diode, but also further enhances the ability of the device to reversely conduct high-density current.

[0005] To achieve the above purpose, the technical scheme adopted by the present application is as follows: a SiC MOSFET device, comprising:

[0006] a heavily doped substrate of a first doping type;

[0007] a lightly doped first epitaxial layer of the first doping type, located on the upper surface of the substrate;

[0008] a well region of a second doping type, located in the first epitaxial layer;

[0009] a source region of the first doping type, located in the well region;

[0010] a contact region of the second doping type, located in the well region;

[0011] a gate dielectric layer, located on the upper surface of the epitaxial layer;

[0012] a first doped type polysilicon layer on the upper surface of the gate dielectric layer;

[0013] a source ohmic contact layer on the upper surface of the first doped type source region and the second doped type contact region;

[0014] a Schottky contact layer on the upper surface of the epitaxial layer;

[0015] a drain ohmic contact layer on the lower surface of the substrate;

[0016] a bipolar current enhancement region in the epitaxial layer between two adjacent contact regions;

[0017] a bipolar current enhancement region contact layer on the upper surface of the bipolar current enhancement region.

[0018] Further, the first doped type is N type and the second doped type is P type.

[0019] Further, the first doped type is P type and the second doped type is N type.

[0020] Further, the bipolar current enhancement region contact layer is short-circuited with the source ohmic contact layer.

[0021] Further, the bipolar current enhancement region is integrated with the adjacent contact region.

[0022] Further, the bipolar current enhancement region contact layer is integrated with the source ohmic contact layer on the upper surface of the source region and the contact region.

[0023] Compared with the prior art, the present application has the following beneficial effects: the present application provides a SiC MOSFET device, which introduces an integrated Schottky diode region and a bipolar current enhancement region, effectively reduces the opening voltage when the device is reversely turned on, and simultaneously enhances the surge capacity of high-density bipolar current when the device is reversely turned on. The device structure and preparation of the present application are simple, compatible with the preparation process of traditional SiC MOSFET, can realize high-performance, batched SiC MOSFET device production, has great market potential and wide application prospect. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a cross-sectional structure schematic diagram of a SiC MOSFET device of the embodiment one of the present application;

[0025] Figure 2 is a cross-sectional structure schematic diagram of a SiC MOSFET device of the embodiment two of the present application;

[0026] Figure 3This is a comparison diagram of the reverse conduction capability of the SiC MOSFET device according to an embodiment of the present invention and the device with the conventional structure. Detailed Implementation

[0027] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0028] It should be noted that the following detailed descriptions are exemplary and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0029] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0030] like Figure 1 As shown, Embodiment 1 of the present invention provides a SiC MOSFET device, comprising:

[0031] The heavily doped substrate 101 of the first doping type;

[0032] A lightly doped first epitaxial layer 102 of the first doping type is located on the upper surface of the substrate 101;

[0033] The second doped type well region 103 is located in the first epitaxial layer 102;

[0034] The first doped type of source region 104 is located in the well region 103;

[0035] The second doped contact region 105 is located in the well region 103;

[0036] Gate dielectric layer 106 is located on the upper surface of the epitaxial layer 102;

[0037] A first-doped polysilicon layer 107 is located on the upper surface of the gate dielectric layer 106;

[0038] The source ohmic contact layer 108 is located on the upper surface of the first doped source region 104 and the second doped contact region 105.

[0039] Schottky contact layer 109 is located on the upper surface of the epitaxial layer 102;

[0040] A drain ohmic contact layer 110 is located on the lower surface of the substrate 101;

[0041] The bipolar current enhancement region 111 is located in the epitaxial layer 102, between two adjacent contact regions 105.

[0042] The bipolar current enhancement region contact layer 112 is located on the upper surface of the bipolar current enhancement region 111.

[0043] The first doping type can be N-type, and the corresponding second doping type is P-type. Alternatively, the first doping type can be P-type, and the corresponding second doping type is N-type.

[0044] The depth of the bipolar current enhancement region 111 can be shallower than, deeper than, or equal to the contact region 105, and the doping concentration can be lower than, higher than, or equal to the contact region 105.

[0045] The bipolar current enhancement region contact layer 112 can be shorted to the source ohmic contact layer 108.

[0046] like Figure 2 As shown, Embodiment 2 of the present invention provides another SiC MOSFET device. It is similar to... Figure 1 The difference in the illustrated embodiment is that, in embodiment two, the bipolar current enhancement region 113 is integrated with the adjacent contact region, and the bipolar current enhancement region contact layer 114 is integrated with the source region and the source ohmic contact layer on the upper surface of the contact region.

[0047] exist Figure 2 In the embodiment shown, the bipolar current enhancement region 113 may not be integrated with the adjacent contact region, or the bipolar current enhancement region contact layer 114 may not be integrated with the source region or the source ohmic contact layer on the upper surface of the contact region.

[0048] Figure 3 This diagram compares the reverse conduction capability of the SiC MOSFET device provided in this embodiment of the invention with that of a conventional device. Compared to conventional SiC MOSFET devices and SiC MOSFET devices with integrated Schottky diodes, the device provided in this embodiment of the invention exhibits both low turn-on voltage and high current density during reverse conduction. This significantly reduces switching losses and enhances device reliability, making it more suitable for high-frequency, high-power applications.

[0049] The application provides a trench type SiC MOSFET device, by introducing an integrated Schottky diode region and a bipolar current enhancement region, the opening voltage of the device when reverse conducting is effectively reduced, and the surge capacity of high-density bipolar current of the device when reverse conducting is enhanced.

[0050] The above description is only the preferred embodiment of the present application, and is not intended to limit the present application in other forms, and any skilled person in the art can modify or change the above disclosed technical content into equivalent embodiments with equivalent changes. However, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application without departing from the technical solution content of the present application still belongs to the protection scope of the technical solution of the present application.

Claims

1. A SiC MOSFET device, characterized by, Comprising: a heavily doped substrate of a first doping type; a lightly doped first epitaxial layer of the first doping type on an upper surface of the substrate; a well region of a second doping type in the first epitaxial layer; a source region of the first doping type in the well region; a contact region of the second doping type in the well region; a gate dielectric layer on an upper surface of the epitaxial layer; a polysilicon layer of the first doping type on an upper surface of the gate dielectric layer; a source ohmic contact layer on an upper surface of the source region and the contact region of the first and second doping types; a Schottky contact layer on an upper surface of the epitaxial layer; a drain ohmic contact layer on a lower surface of the substrate; a bipolar current enhancement region of the second doping type in the epitaxial layer and between two adjacent contact regions in the device; a bipolar current enhancement region contact layer on an upper surface of the bipolar current enhancement region.

2. The SiC MOSFET device of claim 1, wherein, The first doping type is N-type and the second doping type is P-type.

3. The SiC MOSFET device of claim 1, wherein, The first doping type is P-type and the second doping type is N-type.

4. The SiC MOSFET device of claim 1, wherein, The bipolar current enhancement region contact layer is shorted to the source ohmic contact layer.

5. The SiC MOSFET device of claim 1, wherein, The bipolar current enhancement region is structurally integrated with the adjacent contact regions.

6. The SiC MOSFET device of claim 1, wherein, The bipolar current enhancement region contact layer is integrated with the source ohmic contact layer on the upper surface of the source region and the contact region.

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