Surge current suppression circuit suitable for high-voltage input

Abstract

The utility model discloses a surge current suppression circuit suitable for high-voltage input, which belongs to the technical field of power electronics and comprises an MOS (metal oxide semiconductor) tube, a triode, a first capacitor and a second capacitor. A collector electrode of the triode is connected to a power supply positive electrode line through a resistor, an emitter electrode of the triode is connected to a power supply negative electrode line, a base electrode of the triode is divided into two paths, one path of the base electrode of the triode is connected with a source electrode of the MOS tube through a sixth resistor, and the other path of the base electrode of the triode is connected with a drain electrode of the MOS tube through a fourth resistor; one end of the first capacitor is connected between the second resistor and the first resistor, and the other end of the first capacitor is connected to the power supply cathode line; and the MOS tube is connected to a power supply cathode line. Compared with the prior art, the circuit does not need an auxiliary power supply and an operational amplifier circuit, so that the cost and the arrangement space are saved, the related requirements of GJB181A-2003 on the input current are met, and the power supply and front-end equipment can be protected.

Description

Technical Field

[0001] This utility model belongs to the field of power electronics technology, and in particular relates to a surge current suppression circuit suitable for high voltage input. Background Technology

[0002] DC high-voltage power supplies are widely used in industrial, aerospace, and military equipment fields. Their input terminals typically require large-capacity filter capacitors to reduce ripple. However, this design results in extremely high inrush currents upon power-up. These peak currents far exceed the equipment's rated values, easily causing overload damage to upstream power supply equipment and potentially triggering malfunctions in protection circuits, thus affecting system reliability. Military standards, such as GJB181A-2003, explicitly require equipment to have the ability to suppress input inrush currents to ensure grid compatibility and equipment safety.

[0003] Existing surge current suppression circuits use power resistors or thermistors. Upon power-up, the input capacitor is charged through the power resistor or thermistor. Once the capacitor reaches a certain voltage value or the power-up delay time has elapsed, an operational amplifier (op-amp) controls a switching transistor to turn it on, short-circuiting the power resistor or thermistor. This suppresses surge current upon power-up. An independent auxiliary power supply is required to power the op-amp, and the op-amp also controls the switching transistor to turn it on.

[0004] To further improve circuit reliability and reduce costs while meeting military standards, there is an urgent need for a new surge current suppression circuit that does not require an independent auxiliary power supply and operational amplifier circuit. Utility Model Content

[0005] To address the aforementioned technical problems, this utility model provides a surge current suppression circuit suitable for high-voltage inputs, specifically solving the problems through the following technical means:

[0006] A surge current suppression circuit suitable for high-voltage input is characterized by comprising a MOSFET, a transistor, a first capacitor, and a second capacitor, wherein: the two ends of the second capacitor are respectively connected to the positive and negative terminals of the output power supply; the collector of the transistor is connected to the positive power supply line through a second resistor and a first resistor, the emitter of the transistor is connected to the negative power supply line, and the base of the transistor is divided into two paths: one path of the base is connected to the source of the MOSFET through a sixth resistor, and the other path of the base is connected to the drain of the MOSFET through a fourth resistor; one end of the first capacitor is connected between the second and first resistors, and the other end of the first capacitor is connected to the negative power supply line; the source and drain of the MOSFET are connected to the negative power supply line, and the gate of the MOSFET is connected between the second and first resistors through a third resistor.

[0007] Preferably, it also includes a fifth resistor, which is connected in parallel across the first capacitor.

[0008] Preferably, it also includes a seventh resistor, which is connected in parallel across the two ends of the MOSFET.

[0009] The surge current suppression circuit of this invention, suitable for high-voltage input, has the following beneficial effects:

[0010] This circuit eliminates the need for an auxiliary power supply and operational amplifier circuitry, saving cost and layout space. It meets the input current requirements of GJB181A-2003 and protects the power supply and front-end equipment. When a large capacitor is present at the DC power input, a sudden increase in DC input can generate a large inrush current. This circuit effectively suppresses the inrush current from high-voltage DC inputs. Specifically, the charging circuit controls the conduction of the transistor, thereby controlling the conduction of the MOSFET to achieve current suppression. Attached Figure Description

[0011] To more clearly illustrate the technical solution of this utility model, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of the overall circuit of this utility model. Detailed Implementation

[0013] In the description of this utility model, it should be understood that the terms "center," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, unless otherwise stated, "a plurality of" means two or more.

[0014] The present invention will now be described in detail with reference to the accompanying drawings.

[0015] like Figure 1As shown, the surge current suppression circuit suitable for high-voltage input includes a MOSFET VT2, a transistor VT1, a first capacitor C1, and a second capacitor C2. The two ends of the second capacitor C2 are connected to the positive terminal +Vout and the negative terminal -Vout of the output power supply, respectively. The collector of transistor VT1 is connected to the positive power supply line through a second resistor R2 and a first resistor R1, and the emitter of transistor VT1 is connected to the negative power supply line. The base of transistor VT1 is divided into two paths: one path is connected to the source of MOSFET VT2 through a sixth resistor R6, and the other path is connected to the drain of MOSFET VT2 through a fourth resistor R4. One end of the first capacitor C1 is connected between the second resistor R2 and the first resistor R1, and the other end is connected to the negative power supply line. The source and drain of MOSFET VT2 are connected to the negative power supply line, and the gate of MOSFET VT2 is connected between the second resistor R2 and the first resistor R1 through a third resistor R3.

[0016] The diagram also includes a fifth resistor R5, which is connected in parallel across the first capacitor C1. In addition, it includes a seventh resistor R7, which is connected in parallel across the MOSFET VT2.

[0017] The specific working principle is as follows: When the power supply is powered on, capacitor C2 is charged through resistor R7. At this time, the charging current flows through R7, generating a large voltage drop across R7. R4 and R6 form a voltage divider network, and VT1 conducts. The input voltage is divided through R1, R2, and R5. Since R2 is much smaller than R1, the voltage across R2 is very small, so VT2 does not conduct. As the voltage of C2 gradually increases, the charging current also gradually decreases, and the voltage across R6 also gradually decreases. When the voltage across R6 is less than the turn-on voltage of transistor VT1, VT1 does not conduct. At this time, the charging network composed of R1, R3, R5, and C1 supplies power to the gate of VT2, and VT2 gradually conducts, achieving the purpose of current suppression. In this embodiment, because capacitor C2 has a large capacitance, when there is no surge current suppression circuit, the voltage across C1 is 0V before power-on. When power is suddenly applied, the inrush current on the input side is very large. This surge current suppression circuit effectively solves this technical problem.

[0018] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A surge current suppression circuit suitable for high-voltage input, characterized in that, This includes a MOSFET (VT2), a transistor (VT1), a first capacitor (C1), and a second capacitor (C2), wherein: The two ends of the second capacitor (C2) are connected to the positive terminal (+Vout) and the negative terminal (-Vout) of the output power supply, respectively. The collector of the transistor (VT1) is connected to the positive power supply line through the second resistor (R2) and the first resistor (R1), and the emitter of the transistor (VT1) is connected to the negative power supply line. The base of the transistor (VT1) is divided into two paths. One path of the base of the transistor (VT1) is connected to the source of the MOSFET (VT2) through the sixth resistor (R6), and the other path of the base of the transistor (VT1) is connected to the drain of the MOSFET (VT2) through the fourth resistor (R4). One end of the first capacitor (C1) is connected between the second resistor (R2) and the first resistor (R1), and the other end of the first capacitor (C1) is connected to the negative power supply line. The source and drain of the MOSFET (VT2) are connected to the negative power supply line, and the gate of the MOSFET (VT2) is connected between the second resistor (R2) and the first resistor (R1) through the third resistor (R3). It also includes a fifth resistor (R5), which is connected in parallel across the first capacitor (C1); It also includes a seventh resistor (R7), which is connected in parallel across the MOSFET (VT2).

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