Thermal design method, device, equipment and medium for semiconductor devices

Abstract

The present invention relates to the field of semiconductor manufacturing technology, and provides a method, device, equipment and medium for thermal design of a semiconductor device. The method comprises: obtaining a model of the device based on undetermined structural information of the device; dividing a near-junction region and a macro region in the model of the device to be designed; configuring thermal simulation parameters and restriction conditions of the near-junction region and the macro region respectively; performing a thermal simulation process in the model of the device to be designed based on the undetermined structural information, thermal simulation parameters and restriction conditions of the device, and obtaining a thermal resistance value of the device to be designed when the temperature at the boundary between the near-junction region and the macro region meets a condition, so as to accurately predict the temperature field of the device and effectively perform structural design of the device itself, thereby achieving the purpose of reducing the internal thermal resistance of the device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a thermal design method, device, equipment and medium for a semiconductor device. Background Art

[0002] At present, electronic design automation (EDA) technology is mainly used in the design of semiconductor devices to complete device design. EDA refers to the design method that uses computer-aided design (CAD) software to complete the functional design, synthesis, verification, physical design (including layout, wiring, layout, design rule checking, etc.) of very large-scale integrated circuit (VLSI) chips. EDA can greatly reduce the workload of R&D personnel, greatly improve the efficiency of integrated circuit design, shorten the cycle and save costs.

[0003] However, semiconductor devices generate heat during use. As chip size decreases and power density increases, heat dissipation has become a bottleneck that restricts their further development. For example, gallium nitride (GaN) high electron mobility transistors (HEMTs) are a representative wide bandgap semiconductor device. The output power of a GaN power amplifier is an order of magnitude lower than its theoretical maximum power, and excessive junction temperature will also lead to a significant decrease in its electrical performance and reliability. The design of EDA is mainly considered from an electrical perspective, and fails to consider the heat dissipation of semiconductor devices, making it difficult to complete an excellent design of the device. Summary of the invention

[0004] In view of the problems existing in the prior art, the present invention provides a thermal design method, device, equipment and medium for a semiconductor device.

[0005] The present invention provides a thermal design method for a semiconductor device, comprising:

[0006] Acquiring undetermined structural information of a device to be designed, and constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating portion is provided in the device to be designed;

[0007] Dividing the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed;

[0008] Determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region;

[0009] Based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition, performing a thermal simulation on the device to be designed;

[0010] During the thermal simulation, when the temperature information at the boundary between the near-junction region and the macro region meets a preset condition, a thermal resistance value of the device to be designed is obtained;

[0011] When the thermal resistance value does not meet the numerical requirement, the undetermined structural information of the device to be designed is adjusted.

[0012] The present invention also provides a thermal simulation method for a semiconductor device, comprising:

[0013] Acquiring structural information of an existing semiconductor device, and constructing a corresponding thermal simulation model based on the structural information, wherein the existing semiconductor device is provided with a heat generating portion;

[0014] Dividing the near-junction region and the macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device;

[0015] Determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region;

[0016] Based on the undetermined structural information, the first thermal simulation parameter, the second restriction condition, the second thermal simulation and the second restriction condition, performing a thermal simulation on the existing device;

[0017] During the thermal simulation, when the temperature information at the boundary between the near-junction region and the macro region meets a preset condition, the thermal resistance value of the existing semiconductor device under the adjusted structural information is obtained.

[0018] The present invention also provides a thermal design device for a semiconductor device, comprising:

[0019] An acquisition module, used for acquiring undetermined structural information of a device to be designed, and constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating part is provided in the device to be designed;

[0020] A division module, used to divide the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed;

[0021] A determination module, configured to determine a first thermal simulation parameter and a first restriction condition of the near-junction region, and a second thermal simulation parameter and a second restriction condition of the macro region;

[0022] A simulation module, used for performing a thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition;

[0023] The processing module is used to obtain the thermal resistance value of the device to be designed when the temperature information at the junction between the near-junction area and the macro area meets the preset conditions during the thermal simulation, and adjust the undetermined structural information of the device to be designed when the thermal resistance value does not meet the numerical requirements.

[0024] The present invention also provides a thermal simulation device for a semiconductor device, comprising:

[0025] An acquisition module, used for acquiring structural information of an existing semiconductor device, and constructing a corresponding thermal simulation model based on the structural information, wherein the existing semiconductor device is provided with a heat generating part;

[0026] A division module, used to divide the near-junction region and the macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device;

[0027] A determination module, configured to determine a first thermal simulation parameter and a first restriction condition of the near-junction region, and a second thermal simulation parameter and a second restriction condition of the macro region;

[0028] A simulation module, configured to perform a thermal simulation on the existing semiconductor device based on the structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition;

[0029] The processing module is used to obtain the thermal resistance value of the existing semiconductor device when the temperature information at the junction between the near-junction area and the macro area meets a preset condition during the thermal simulation.

[0030] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, a thermal simulation method for a semiconductor device or a thermal design method for a semiconductor device as described above is implemented.

[0031] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the thermal simulation method of the semiconductor device or the thermal design method of the semiconductor device is implemented.

[0032] The present invention provides a method, device, equipment and medium for thermal design of a semiconductor device. By dividing the near-junction region and the macro region in the device model, and based on the structural information of the device and the thermal simulation parameters and restriction conditions of each region, a thermal simulation process is performed in the model. When the temperature at the junction between the near-junction region and the macro region meets the conditions, the thermal resistance value of the device is obtained, the temperature field of the device can be accurately predicted, and the structure design of the device itself can be effectively performed, thereby achieving the purpose of reducing the internal thermal resistance of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 It is a schematic flow chart of a thermal design method for a semiconductor device provided by the present invention;

[0035] Figure 2 It is a schematic diagram of cross-scale thermal simulation and thermal design of typical gallium nitride radio frequency devices listed in the present invention;

[0036] Figure 3 It is a two-dimensional cross-sectional view of a single transistor of the device listed in the present invention;

[0037] Figure 4 It is a schematic structural diagram of a thermal design device for a semiconductor device provided by the present invention;

[0038] Figure 5 It is a schematic flow chart of a thermal simulation method for a semiconductor device provided by the present invention;

[0039] Figure 6 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] Combine the following Figure 1-Figure 6 The invention describes a method, device, equipment and medium for thermal simulation / thermal design of a semiconductor device.

[0042] Figure 1 A schematic diagram showing a process flow of a thermal design method for a semiconductor device provided by the present invention is shown in FIG. Figure 1 , the method comprising:

[0043] 11. Obtaining undetermined structural information of the device to be designed, and constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating portion is provided in the device to be designed;

[0044] 12. Divide the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat-generating part, and the macro region is a structural region divided based on the device to be designed;

[0045] 13. Determine a first thermal simulation parameter and a first restriction condition for a near-junction region, and determine a second thermal simulation parameter and a second restriction condition for a macro region;

[0046] 14. Perform thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first constraint condition, the second thermal simulation parameter, and the second constraint condition;

[0047] 15. During the thermal simulation process, when the temperature information at the junction between the near-junction area and the macro area meets the preset conditions, the thermal resistance value of the device to be designed is obtained. When the thermal resistance value does not meet the numerical requirements, the undetermined structural information of the device to be designed is adjusted.

[0048] In this regard, it should be noted that semiconductor devices generate heat during use. With the gradual reduction of chip size and the gradual increase of power density, heat dissipation has become a bottleneck problem restricting its further development. For example, gallium nitride (GaN) high electron mobility transistors (HEMTs) are a representative wide bandgap semiconductor device. The output power of a GaN power amplifier is an order of magnitude lower than its theoretical maximum power, and excessive junction temperature will also lead to a significant decrease in its electrical performance and reliability.

[0049] For semiconductor devices, the internal thermal resistance of the chip accounts for the main part of the total thermal resistance. Therefore, reducing the internal thermal resistance of the device by improving the device structure design is the key means to solve its thermal bottleneck problem.

[0050] To this end, the present invention provides a thermal design method for a semiconductor device, which can perform thermal simulation on the semiconductor device and determine the structural information of the semiconductor device based on the thermal simulation results. The structural information is part of the manufacturing plan for manufacturing the semiconductor device, such as the number of layers, device size, transistor distribution and other structural information.

[0051] This design method mainly relies on TDA (Thermal Design Automation) technology. TDA is thermal design automation, which refers to the use of computer-aided thermal simulation and design software to complete chip device-level heat generation and heat transfer simulation, thereby realizing the design of semiconductor materials, manufacturing processes, size structures, thermal properties, etc.

[0052] In the present invention, it can be considered that the heat transfer process inside the semiconductor device involves a cross-scale process from nanometers to millimeters. Therefore, a cross-scale thermal simulation process must be performed to reflect the actual heat transfer process of the semiconductor device.

[0053] For this purpose, the undetermined structural information of the device to be designed is obtained to analyze whether the undetermined structural information is structural information that meets the conditions in the manufacturing plan.

[0054] In the present invention, there are parts that mainly generate heat in the semiconductor device, and these parts are referred to as the heat generating parts. Since the heat generating part is a small part of the entire device, the heat generating part is also regarded as the micro-nano scale part involved in the heat transfer process inside the semiconductor device. The millimeter-level macro scale can be based on the entire device.

[0055] In the thermal simulation process, when the heat transfer scale is much larger than the phonon mean free path, it can be considered as a macroscopic scale. The mean free path refers to the average distance between two adjacent phonon scatterings. When the difference between the heat transfer scale and the phonon mean free path is within a preset range, it can be considered as a micro-nanoscale.

[0056] The mean free path of phonons in different materials is different, generally ranging from tens of nanometers to several microns.

[0057] For example, a gallium nitride semiconductor device is composed of a multi-layer and multi-region structure. In the transistor region, it is usually composed of a gallium nitride layer, an aluminum nitride or aluminum gallium nitride transition layer, and a substrate layer. The substrate layer is connected to the flange through an adhesive layer, and the flange is connected to the heat sink and the base. For this purpose, the gallium nitride layer, the transition layer, and the substrate layer can be predetermined as the heat generating part.

[0058] In the present invention, in order to highlight the cross-scale thermal motion process from micro-nano scale to macro scale, it is necessary to divide the device to be designed into regions. The structure divided based on the heating part is used as the near-junction area. For the division of the near-junction area, the heating part can be used as a reference to expand the preset spatial range outward to construct the required near-junction area. It is also possible to use the heating part as a reference and expand outward to adjacent connecting devices to jointly construct the required near-junction area. For each manufacturing scheme, the structural information represents the layout of the device, and the layout can be displayed intuitively. For example, a model of the device to be designed can be constructed based on the undetermined structural information. The model can be a three-dimensional model or a two-dimensional model. The three-dimensional model is also a three-dimensional image of the device, which can be displayed on the software interface. At this time, the near-junction area and the macroscopic area can be divided on the simulation model, and each area can be displayed intuitively.

[0059] The structural area divided based on the device to be designed is used as the macro area. For the division of the macro area, the macro area can be constructed based on the device to be designed and the spatial area affected by the estimated heat flow path.

[0060] For example, the gallium nitride layer, transition layer, and part of the substrate layer in the gallium nitride semiconductor device are divided into the near-junction region. The macro region actually includes the package body, heat-generating part, non-heat-generating part and other parts of the semiconductor device.

[0061] In the present invention, it is necessary to simulate the heat transfer process of the semiconductor device. To this end, it is necessary to configure the thermal simulation parameters and constraints of the near-junction region and the macro region. The thermal simulation parameters here can help simulate the thermal simulation in the near-junction region and the macro region. Since there is a cross-scale heat transfer process in the near-junction region and the macro region, the constraint here is the boundary condition for coupling the heat transfer process at the boundary between the near-junction region and the macro region.

[0062] In the present invention, the above-mentioned structural information, thermal simulation parameters and constraints are the preparation work for thermal simulation of semiconductor devices. At this time, based on the undetermined structural information, thermal simulation parameters and constraints of the device to be designed, the device to be designed is subjected to thermal simulation simulation. This thermal simulation process requires a well-configured calculation model or algorithm to perform calculations based on the structural information, thermal simulation parameters and constraints to obtain simulation data of thermal simulation, and convert the simulation data into an image on the semiconductor device.

[0063] When the temperature information at the junction between the near-junction region and the macro region meets the preset conditions, the heat flow of the near-junction region and the macro region reaches the consistency requirement. At this time, the thermal resistance value of the device to be designed can be calculated based on the simulation data. For example, the preset condition can be that the temperature difference is within a certain value range, or the temperature is equal.

[0064] If it is determined that the thermal resistance value meets the numerical condition (such as the thermal resistance value is less than the predetermined thermal resistance value), the undetermined structural information of the device to be designed is output, that is, the undetermined structural information is determined as part of the manufacturing plan for manufacturing the semiconductor device.

[0065] If it is determined that the thermal resistance value does not meet the numerical condition (such as the thermal resistance value is greater than or equal to the predetermined thermal resistance value), the current undetermined structural information is optimized and adjusted, and then the thermal simulation is continued until the thermal resistance value meets the numerical condition. When it is determined that the thermal resistance value meets the preset condition, the current undetermined structural information of the device to be designed is output.

[0066] The thermal simulation method of a semiconductor device provided by the present invention divides the near-junction region and the macro region in the model of the device, and based on the structural information of the device and the thermal simulation parameters and restriction conditions of each region, performs a thermal simulation process in the model, and obtains the thermal resistance value of the device when the temperature at the junction between the near-junction region and the macro region meets the conditions. The temperature field of the device can be accurately predicted, and the structure design of the device itself can be effectively performed, thereby achieving the purpose of reducing the internal thermal resistance of the device.

[0067] In a further method of the above method, based on the undetermined structural information, the first thermal simulation parameter, the first constraint condition, the second thermal simulation parameter and the second constraint condition, a thermal simulation is performed on the device to be designed, including:

[0068] Based on the undetermined structural information and the first thermal simulation parameters of the near-junction region, heat transfer simulation and phonon thermal motion simulation are performed on the near-junction region at the micro-nano scale;

[0069] Based on the undetermined structural information and the second thermal simulation parameters of the macro region, a heat transfer simulation on a macro scale is performed on the macro region;

[0070] Based on the heat transfer simulation and phonon thermal motion simulation at the micro-nano scale in the near-junction area, the heat transfer simulation at the macro-scale in the macro-region, the first restriction condition in the near-junction area, and the second restriction condition in the macro-region, a heat transfer simulation spanning the micro-nano scale and the macro-scale is performed.

[0071] In this regard, it should be noted that in the near-junction region, the heat is mainly Joule heat generated by the interaction between electrons and phonons. The hot spot range can be as small as hundreds of nanometers, and it passes through multiple micro-nano layers and is finally conducted from the heating area to the substrate. The size of the heat source and the characteristic size of each layer are comparable to the mean free path of the main hot carriers-phonons in the semiconductor, which will produce significant acoustic trajectory effects. It can be seen that it is necessary to perform thermal simulation at the micro-nano scale in the near-junction region. Accordingly, thermal simulation at the macro scale is performed on the macro region.

[0072] In the present invention, based on the undetermined structural information of the device to be designed and the thermal simulation parameters of the near-junction region, heat transfer simulation and phonon thermal motion simulation at the micro-nano scale are performed in the near-junction region. It is further explained that the first thermal simulation parameter of the near-junction region includes material property parameters of phonon dispersion, relaxation time, and interface penetration spectrum in the near-junction region, as well as the grid division parameters of the near-junction region. The grid division of the structure of the near-junction region can transmit thermal motion in the smallest unit, making the thermal simulation data more realistic.

[0073] In the present invention, based on the undetermined structural information of the device to be designed and the second thermal simulation parameters of the macro region, a heat transfer simulation on a macro scale is performed on the macro region. The heat generated by the semiconductor device needs to be dissipated outward, and the structure determined based on the entire semiconductor is a macro region, and the heat transfer process on a macro scale needs to be simulated on the macro region. It is further explained that the second thermal simulation parameters of the macro region include the structural equivalent thermal conductivity and the interface thermal conductivity in the macro region.

[0074] In the present invention, semiconductor devices are mostly made of typical semiconductor materials including GaN, AlGaN, AlN, Ga2O3, GaAs, Si, Ge, SiC, Al2O3 and diamond. To this end, a corresponding cross-scale thermal property database can be configured for semiconductor materials. The database includes thermal simulation parameters required for thermal simulation.

[0075] For example, using first-principles calculations, we constructed parameters such as interatomic force constants, potential functions, phonon frequencies, group velocities, relaxation times, thermoelectric coupling coefficients, phonon dispersions, and interface penetration spectra of various semiconductor materials. Using machine learning-driven molecular dynamics simulations and lattice dynamics methods, we obtained parameters such as interface phonon transmittance, interface thermal resistance, interface thermal conductivity, and interface thermal conductivity between various materials. At the same time, combining analytical solutions and numerical simulations, we constructed the relationship between the equivalent thermal conductivity of various semiconductors and their characteristic sizes.

[0076] In the present invention, since the heat transfer process inside the semiconductor device involves a cross-scale process from nanometers to millimeters. To this end, based on the heat transfer simulation and phonon thermal motion simulation at the micro-nano scale in the near-junction region, the heat transfer simulation at the macro-scale in the macro-region, the first restriction condition of the near-junction region, and the second restriction condition of the macro-region, a heat transfer simulation that crosses the micro-nano scale and the macro-scale is performed. It is further explained that the restriction conditions include boundary parameters for processing the transmission and reflection of phonon thermal motion between the near-junction region and the macro-region; and the boundary parameters of adiabatic, isothermal, and convection between the near-junction region and the macro-region.

[0077] A further method of the present invention can fully interpret the thermal simulation of the entire semiconductor device by simulating the heat transfer at respective scales of the near-junction region and the macro region, while simultaneously simulating the cross-regional heat transfer of the two regions, thereby making the simulation data more suitable for real-life scenarios.

[0078] In a further method of the above method, the processing process of obtaining the thermal resistance value of the device to be designed when the temperature information at the junction between the near-junction region and the macro region meets the preset conditions is mainly explained as follows:

[0079] When the temperature difference at the boundary between the near-junction region and the macro region satisfies a preset range, the temperature fields in the near-junction region and the macro region are obtained.

[0080] The maximum temperature of the device to be designed is obtained based on the temperature field, the temperature rise is obtained according to the maximum temperature and the ambient temperature, and the thermal resistance value of the device to be designed is obtained according to the temperature rise and the power information of the device to be designed.

[0081] In this regard, it should be noted that in the present invention, the macroscopic heat transfer solution and the near-junction heat transfer solution process are executed, and the two parts are gradually iterated through the restriction conditions until the heat flux distribution at the junction of the two regions is consistent, and then the temperature field of each region is obtained by processing. When the temperature difference at the junction between the near-junction region and the macroscopic region meets the preset range, it is characterized that the heat flux of the near-junction region and the macroscopic region meets the consistency requirement.

[0082] The thermal resistance of semiconductor devices is calculated using temperature distribution. The junction temperature (i.e., maximum temperature) of the device to be designed is obtained based on the temperature field, the temperature rise is obtained based on the junction temperature and the ambient temperature, and the thermal resistance of the device to be designed is obtained based on the temperature rise and the power information of the device to be designed. If the thermal resistance meets the requirements, the device structure information and the corresponding thermal resistance value at this time are output. If the thermal resistance value is still greater than the set thermal resistance, continue to optimize and re-simulate the thermal until the thermal resistance value drops to a value that meets the requirements.

[0083] In the further method of the above method, the processing of heat transfer simulation on micro-nano scale and phonon thermal motion simulation on the near-junction region and the processing of heat transfer simulation on macro-scale on the macro region are mainly explained as follows:

[0084] A non-Fourier heat conduction model is used to simulate heat transfer at the micro-nano scale in the near-junction region.

[0085] The phonon Monte Carlo model is used to simulate the phonon thermal motion at the micro-nano scale in the near-junction region.

[0086] A numerical simulation algorithm is used to perform a heat transfer simulation on a macroscopic scale in the macroscopic region.

[0087] In this regard, it should be noted that in the present invention, a variety of non-Fourier heat conduction models are constructed, which can accurately describe the non-Fourier heat transport process in the near-junction region.

[0088] The non-Fourier heat conduction model includes a modified Fourier equation, such as adding mathematical terms reflecting non-Fourier effects such as relaxation, non-locality and non-equilibrium in Fourier's law to achieve the description of non-Fourier heat conduction phenomena such as ballistic effect and electron-phonon non-equilibrium. It also includes hydrodynamic equations derived from the phonon Boltzmann equation, etc. By simplifying the scattering terms of the phonon Boltzmann transport equation and introducing high-order parameters, the hydrodynamic model can consider the influence of micro-nano mechanisms such as phonon state density, dispersion relations, non-equilibrium effects between different phonon branches and electron-phonon coupling on non-Fourier heat conduction phenomena, so as to characterize the temperature field and heat flow field change law under the joint influence of various factors. The present invention also includes a universal heat conduction law based on the concept of heat and mass motion, etc., which can accurately describe the non-Fourier heat conduction process under extremely high heat flux density and ultra-fast heating conditions. According to the characteristics of large scale changes in semiconductor devices, a suitable multi-scale grid is constructed based on adaptive grid technology. At the same time, it includes a high-precision solution algorithm for non-Fourier heat conduction models. According to the characteristics of nonlinear, nonlocal, multi-heat carrier and other mathematical terms in different heat conduction models, a stable numerical format is developed accordingly, and respective applicable solution algorithms are developed for them.

[0089] The present invention uses the phonon Monte Carlo model to simulate the phonon thermal motion at the micro-nano scale in the near-junction region. The phonon frequency, group velocity, relaxation time, interface transmittance and other results obtained by first-principles calculations, molecular dynamics simulations, lattice dynamics and other methods are used as material properties and interface parameters. Phonon Monte Carlo simulations can be carried out in the near-junction region to accurately predict the phonon thermal transport process.

[0090] Based on the constructed cross-scale thermophysical property database, the present invention can effectively use models of various scales to simulate and solve the heat transfer process.

[0091] The above method is explained below with a specific example, as follows:

[0092] See also Figure 2 A specific embodiment of the present invention is shown, and a typical GaN RF device is subjected to cross-scale thermal simulation and thermal design. The analyzed GaN device contains a total of 10 transistors, such as Figure 2 shown. Figure 3A two-dimensional cross-sectional view of a single transistor of the device is shown. Each transistor consists of a source, a gate, and a drain. From top to bottom, the main semiconductor layers include an aluminum gallium nitride barrier layer, a gallium nitride epitaxial layer, an aluminum nitride nucleation layer, and a silicon carbide substrate layer. When the device is in a powered-on working state, the transistor will generate heat, and the heat generation area is located on the side below the gate close to the drain, and its width is about hundreds of nanometers to micrometers. The mean free path of the heat-conducting phonons in the semiconductor is equivalent to the thickness of the epitaxial layer and the nucleation layer, and the size of the heat source. At this time, Fourier's law of heat conduction no longer holds. When the method of the present invention is used to perform cross-scale thermal simulation and design on the device shown, the range from somewhere in the middle of the substrate layer to the top of the device is divided into a near-junction region. When performing thermal simulation for a given device design parameter, the interface at the bottom of the near-junction region is first set to an isothermal boundary condition, and a phonon Monte Carlo simulation is performed or the micro-nanoscale heat conduction equation is solved for the near-junction region. Based on the solution results, the equivalent thermal conductivity of the gallium nitride epitaxial layer and the aluminum nitride nucleation layer and the interface thermal conductivity between the layers are extracted. The equivalent thermal conductivity and interface thermal conductivity are input into the macro solver to solve the temperature field of the entire device. Based on the temperature field solved by the macro, the temperature boundary conditions at the interface at the bottom of the near junction region are updated, and the phonon Monte Carlo simulation or micro-nanoscale heat conduction equation is re-solved for the near junction region. Repeat the above process until the difference between the temperature at the bottom of the near junction region and the temperature predicted by the macro method meets the preset conditions to obtain the real temperature field of the device. Based on the temperature field, the maximum temperature of the device to be designed is obtained, and the temperature rise is obtained according to the maximum temperature and the ambient temperature. According to the temperature rise and the power information of the device to be designed, the thermal resistance value of the device to be designed under given design parameters is obtained. Next, the device is thermally designed using a thermal simulation method. Change the device design parameters, including the thickness of the epitaxial layer, the thickness of the nucleation layer, the thickness of the substrate layer, the interface roughness, the transistor spacing, the electrode size, etc., and re-use the thermal simulation method for different design parameters to perform thermal simulation on the device to obtain the device thermal resistance under different design parameters. For the case of the minimum thermal resistance of the device, it is the optimal thermal design parameter of the device.

[0093] The thermal design device for a semiconductor device provided by the present invention is described below. The thermal design device for a semiconductor device described below and the thermal design method for a semiconductor device described above can be referred to each other.

[0094] Figure 4 A schematic diagram of the structure of a thermal design device for a semiconductor device provided by the present invention is shown. Figure 4 The device includes an acquisition module 41, a division module 42, a determination module 43, a simulation module 44 and a processing module 45, wherein:

[0095] An acquisition module 41 is used to acquire the undetermined structural information of the device to be designed, and to construct a model of the device to be designed based on the undetermined structural information, wherein a heat generating part is provided in the device to be designed;

[0096] A division module 42 is used to divide the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating part, and the macro region is a structural region divided based on the device to be designed;

[0097] A determination module 43, used to determine a first thermal simulation parameter and a first restriction condition for a near-junction region, and to determine a second thermal simulation parameter and a second restriction condition for a macro region;

[0098] A simulation module 44, configured to perform a thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter, and the second restriction condition;

[0099] The processing module 45 is used to obtain the thermal resistance value of the device to be designed when the temperature information at the junction between the near-junction area and the macro area meets the preset conditions during the thermal simulation process, and adjust the undetermined structural information of the device to be designed when the thermal resistance value does not meet the numerical requirements.

[0100] Since the principle of the device of the embodiment of the present invention is the same as that of the method of the above embodiment, a more detailed explanation is omitted here.

[0101] It should be noted that, in the embodiments of the present invention, relevant functional modules may be implemented by a hardware processor.

[0102] The thermal design device of the semiconductor device provided by the present invention divides the near-junction region and the macro region in the model of the device, and based on the structural information of the device and the thermal simulation parameters and restriction conditions of each region, performs a thermal simulation process in the model, and obtains the thermal resistance value of the device when the temperature at the junction between the near-junction region and the macro region meets the conditions. The temperature field of the device can be accurately predicted, and the structure design of the device itself can be effectively performed, thereby achieving the purpose of reducing the internal thermal resistance of the device.

[0103] Figure 5 A schematic diagram of a thermal simulation method for a semiconductor device provided by the present invention is shown. Figure 5 , the method comprising:

[0104] 51. Obtaining structural information of an existing semiconductor device, and constructing a corresponding thermal simulation model based on the structural information, wherein the existing semiconductor device is provided with a heat generating portion;

[0105] 52. Divide the near-junction region and the macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating part, and the macro region is a structural region divided based on the existing semiconductor device;

[0106] 53. Determine a first thermal simulation parameter and a first restriction condition for a near-junction region, and determine a second thermal simulation parameter and a second restriction condition for a macro region;

[0107] 54. Perform thermal simulation on the existing semiconductor device based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition;

[0108] 55. In the process of thermal simulation, when the temperature information at the junction between the near-junction area and the macro area meets the preset conditions, the thermal resistance value of the existing semiconductor device is obtained.

[0109] The thermal simulation device for a semiconductor device provided by the present invention is described below. The thermal simulation device for a semiconductor device described below and the thermal simulation method for a semiconductor device described above can be referred to each other.

[0110] A schematic structural diagram of a thermal simulation device for a semiconductor device provided by the present invention, the device comprises an acquisition module, a division module, a determination module, a simulation module and a processing module, wherein:

[0111] An acquisition module, used for acquiring structural information of an existing semiconductor device, and constructing a corresponding thermal simulation model based on the structural information, wherein the existing semiconductor device is provided with a heat generating part;

[0112] A division module is used to divide the near-junction region and the macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating part, and the macro region is a structural region divided based on the existing semiconductor device;

[0113] A determination module, used to determine a first thermal simulation parameter and a first restriction condition for a near-junction region, and to determine a second thermal simulation parameter and a second restriction condition for a macro region;

[0114] A simulation module, used for performing thermal simulation on an existing semiconductor device based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition;

[0115] The processing module is used to obtain the thermal resistance value of the existing semiconductor device when the temperature information at the junction between the near-junction area and the macro area meets the preset conditions during the thermal simulation process.

[0116] Figure 6 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 6As shown, the electronic device may include: a processor (processor) 61, a communication interface (Communications Interface) 62, a memory (memory) 63 and a communication bus 64, wherein the processor 61, the communication interface 62, and the memory 63 communicate with each other through the communication bus 64. The processor 61 can call the logic instructions in the memory 63 to execute a thermal simulation method for a semiconductor device, the method comprising: obtaining the undetermined structural information of the device to be designed, constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating portion is provided in the device to be designed; dividing the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed; determining a first thermal simulation parameter and a first restriction condition of the near-junction region, and determining a second thermal simulation parameter and a second restriction condition of the macro region; performing a thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; in the process of thermal simulation, when the temperature information at the junction between the near-junction region and the macro region meets the preset conditions, obtaining the thermal resistance value of the device to be designed, and when the thermal resistance value does not meet the numerical requirements, adjusting the undetermined structural information of the device to be designed.

[0117] Or a thermal design method for executing a semiconductor device, the method comprising: obtaining structural information of an existing semiconductor device, constructing a corresponding thermal simulation model based on the structural information, wherein a heat generating portion is provided in the existing semiconductor device; dividing a near-junction region and a macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device; determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region; performing a thermal simulation on the existing semiconductor device based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; during the thermal simulation, when the temperature information at the junction between the near-junction region and the macro region meets a preset condition, obtaining a thermal resistance value of the existing semiconductor device.

[0118] In addition, the logic instructions in the above-mentioned memory 63 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0119] On the other hand, the present invention further provides a computer program product, the computer program product comprising a computer program, the computer program can be stored in a non-transitory computer-readable storage medium, when the computer program is executed by a processor, the computer can execute the thermal simulation method of the semiconductor device provided by the above methods, the method comprising:

[0120] The method comprises the following steps: obtaining the undetermined structural information of the device to be designed, constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating portion is provided in the device to be designed; dividing the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed; determining a first thermal simulation parameter and a first restriction condition of the near-junction region, and determining a second thermal simulation parameter and a second restriction condition of the macro region; performing a thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; in the process of the thermal simulation, when the temperature information at the junction between the near-junction region and the macro region meets a preset condition, obtaining a thermal resistance value of the device to be designed, and when the thermal resistance value does not meet the numerical requirement, adjusting the undetermined structural information of the device to be designed.

[0121] Or a thermal design method for executing a semiconductor device, the method comprising: obtaining structural information of an existing semiconductor device, constructing a corresponding thermal simulation model based on the structural information, wherein a heat generating portion is provided in the existing semiconductor device; dividing a near-junction region and a macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device; determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region; performing a thermal simulation on the existing semiconductor device based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; during the thermal simulation, when the temperature information at the junction between the near-junction region and the macro region meets a preset condition, obtaining a thermal resistance value of the existing semiconductor device.

[0122] In another aspect, the present invention further provides a non-transitory computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the method for thermal simulation of a semiconductor device provided by the above methods is implemented, and the method comprises:

[0123] The method comprises the following steps: obtaining the undetermined structural information of the device to be designed, constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating portion is provided in the device to be designed; dividing the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed; determining a first thermal simulation parameter and a first restriction condition of the near-junction region, and determining a second thermal simulation parameter and a second restriction condition of the macro region; performing a thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; in the process of the thermal simulation, when the temperature information at the junction between the near-junction region and the macro region meets a preset condition, obtaining a thermal resistance value of the device to be designed, and when the thermal resistance value does not meet the numerical requirement, adjusting the undetermined structural information of the device to be designed.

[0124] Or a thermal design method for executing a semiconductor device, the method comprising: obtaining structural information of an existing semiconductor device, constructing a corresponding thermal simulation model based on the structural information, wherein a heat generating portion is provided in the existing semiconductor device; dividing a near-junction region and a macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device; determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region; performing a thermal simulation on the existing semiconductor device based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; during the thermal simulation, when the temperature information at the junction between the near-junction region and the macro region meets a preset condition, obtaining a thermal resistance value of the existing semiconductor device.

[0125] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0126] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0127] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A thermal design method for a semiconductor device, characterized in that: include: Acquiring undetermined structural information of a device to be designed, and constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating portion is provided in the device to be designed; Dividing the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed; Determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region; Based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition, performing a thermal simulation on the device to be designed; During the thermal simulation, when the temperature information at the boundary between the near-junction region and the macro region meets a preset condition, a thermal resistance value of the device to be designed is obtained; When the thermal resistance value does not meet the numerical requirement, the undetermined structural information of the device to be designed is adjusted; The second restriction condition of the macro region includes: adiabatic boundary parameters between the near-junction region and the macro region; isothermal boundary parameters between the near-junction region and the macro region; Boundary parameters of convection between the near-junction region and the macroscopic region.

2. The thermal design method of a semiconductor device according to claim 1, characterized in that: Based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition, a thermal simulation is performed on the device to be designed, including: Based on the undetermined structural information and the first thermal simulation parameters of the near-junction region, heat transfer simulation and phonon thermal motion simulation are performed on the near-junction region at a micro-nano scale; Based on the undetermined structural information and the second thermal simulation parameter of the macro region, performing a heat transfer simulation on a macro scale on the macro region; Based on the heat transfer simulation and phonon thermal motion simulation at the micro-nano scale in the near-junction region, the heat transfer simulation at the macro-scale in the macro-region, the first restriction condition of the near-junction region, and the second restriction condition of the macro-region, a heat transfer simulation spanning the micro-nano scale and the macro-scale is performed.

3. The thermal design method of a semiconductor device according to claim 2, characterized in that: The first thermal simulation parameters of the near-junction region include: Phonon dispersion in the near-junction region; relaxation time in the near-junction region; Material property parameters of the interface penetration spectrum in the near-junction region; The grid parameters for the near-junction region.

4. The thermal design method of a semiconductor device according to claim 3, characterized in that: The first restriction condition of the near-junction region includes: Boundary parameters between the near-junction region and the macro region that handle transmission of phonon thermal motion; Boundary parameters between the near-junction region and the macroscopic region deal with reflection of thermal motion of phonons.

5. The thermal design method of a semiconductor device according to claim 4, characterized in that: The second thermal simulation parameters of the macro region include: The structural equivalent thermal conductivity and the interface thermal conductivity in the macro region.

6. The thermal design method of a semiconductor device according to claim 1, characterized in that: When the temperature information at the junction between the near-junction region and the macro region meets a preset condition, the thermal resistance value of the device to be designed is obtained, including: When the temperature difference at the interface between the near-junction region and the macro region satisfies a preset range, a temperature field within the near-junction region and the macro region is obtained; The maximum temperature of the device to be designed is obtained based on the temperature field, the temperature rise is obtained according to the maximum temperature and the ambient temperature, and the thermal resistance value of the device to be designed is obtained according to the temperature rise and power information of the device to be designed.

7. The thermal design method of a semiconductor device according to claim 2, characterized in that: Heat transfer simulation and phonon thermal motion simulation at the micro-nano scale are performed on the near-junction region, including: Using a non-Fourier heat conduction model to simulate heat transfer at the micro-nano scale in the near-junction region; and, The phonon Monte Carlo model is used to simulate the phonon thermal motion at the micro-nano scale in the near-junction region.

8. The thermal design method of a semiconductor device according to claim 2, characterized in that: A heat transfer simulation on a macro scale is performed on the macro region, including: A numerical simulation algorithm is used to perform a heat transfer simulation on a macroscopic scale in the macroscopic region.

9. The thermal design method of a semiconductor device according to claim 1, characterized in that: The method further includes: determining that the thermal resistance value meets a preset condition, and outputting the undetermined structural information of the device to be designed.

10. A thermal simulation method for a semiconductor device, characterized in that: include: Acquiring structural information of an existing semiconductor device, and constructing a corresponding thermal simulation model based on the structural information, wherein the existing semiconductor device is provided with a heat generating portion; Dividing the near-junction region and the macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device; Determining a first thermal simulation parameter and a first restriction condition for the near-junction region, and determining a second thermal simulation parameter and a second restriction condition for the macro region; Based on the structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition, performing a thermal simulation on the existing semiconductor device; During the thermal simulation, when the temperature information at the boundary between the near-junction region and the macro region meets a preset condition, a thermal resistance value of the existing semiconductor device is obtained; The second restriction condition of the macro region includes: adiabatic boundary parameters between the near-junction region and the macro region; isothermal boundary parameters between the near-junction region and the macro region; Boundary parameters of convection between the near-junction region and the macroscopic region.

11. A thermal design device for a semiconductor device, characterized in that: include: An acquisition module, used for acquiring undetermined structural information of a device to be designed, and constructing a model of the device to be designed based on the undetermined structural information, wherein a heat generating part is provided in the device to be designed; A division module, used to divide the near-junction region and the macro region in the model of the device to be designed, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the device to be designed; A determination module, configured to determine a first thermal simulation parameter and a first restriction condition of the near-junction region, and a second thermal simulation parameter and a second restriction condition of the macro region; A simulation module, used for performing a thermal simulation on the device to be designed based on the undetermined structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; A processing module, configured to obtain the thermal resistance value of the device to be designed when the temperature information at the boundary between the near-junction region and the macro region meets a preset condition during the thermal simulation, and to adjust the undetermined structural information of the device to be designed when the thermal resistance value does not meet the numerical requirement; The second restriction condition of the macro region includes: adiabatic boundary parameters between the near-junction region and the macro region; isothermal boundary parameters between the near-junction region and the macro region; Boundary parameters of convection between the near-junction region and the macroscopic region.

12. A thermal simulation device for a semiconductor device, characterized in that: include: An acquisition module, used for acquiring structural information of an existing semiconductor device, and constructing a corresponding thermal simulation model based on the structural information, wherein the existing semiconductor device is provided with a heat generating part; A division module, used to divide the near-junction region and the macro region in the thermal simulation model, wherein the near-junction region is a structural region divided based on the heat generating portion, and the macro region is a structural region divided based on the existing semiconductor device; A determination module, configured to determine a first thermal simulation parameter and a first restriction condition of the near-junction region, and a second thermal simulation parameter and a second restriction condition of the macro region; A simulation module, configured to perform a thermal simulation on the existing semiconductor device based on the structural information, the first thermal simulation parameter, the first restriction condition, the second thermal simulation parameter and the second restriction condition; A processing module, used for obtaining a thermal resistance value of an existing semiconductor device when temperature information at a junction between the near-junction region and the macro region meets a preset condition during the thermal simulation; The second restriction condition of the macro region includes: adiabatic boundary parameters between the near-junction region and the macro region; isothermal boundary parameters between the near-junction region and the macro region; Boundary parameters of convection between the near-junction region and the macroscopic region.

13. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the thermal design method for a semiconductor device according to any one of claims 1 to 9 is implemented, or the thermal simulation method for a semiconductor device according to claim 10 is implemented.

14. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the thermal design method for a semiconductor device according to any one of claims 1 to 9 is implemented, or the thermal simulation method for a semiconductor device according to claim 10 is implemented.

Images