A POC circuit design method and device

Abstract

The application provides a POC circuit design method and device, the method comprises the following steps: obtaining initial circuit parameters corresponding to a POC circuit; creating a simulation circuit corresponding to the POC circuit based on the initial circuit parameters; scanning the simulation circuit through a signal frequency point to obtain a simulation return loss and a simulation insertion loss; determining a return loss arbitration value based on a target return loss and the simulation return loss, and determining an insertion loss arbitration value based on a target insertion loss and the simulation insertion loss; if it is determined that the initial circuit parameters do not meet a signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, adjusting the initial circuit parameters to obtain adjusted circuit parameters, and determining target circuit parameters based on the adjusted circuit parameters. Through the technical scheme, the reliability of the circuit parameters is high, the efficiency of the circuit design is high, and the product failure rate is low.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit design, and in particular to a POC circuit design method and device. BACKGROUND

[0002] POC (Power Over Cable, power over cable) is a technology based on coaxial cable transmission of video signals, control signals and power superposition. In the superposition process, the problem of superimposed transmission of DC power and video signals needs to be solved to ensure that the video signals are not distorted and the control signals do not appear random codes. The POC circuit is a functional circuit using the POC technology, which can isolate the DC power from the video signals with an independent filter device.

[0003] With the continuous development of automatic driving, wireless communication technology and advanced driving assistance technology, the demand for vehicle-mounted cameras has also increased significantly. Since the POC circuit can reduce the weight of the transmission cable and effectively isolate low-frequency signals and high-frequency signals, the vehicle-mounted camera can use the POC circuit. Of course, in addition to vehicle-mounted cameras, POC circuits can also be applied in other scenarios, i.e., the application prospect of POC circuits is more extensive.

[0004] However, when using the POC circuit, the circuit parameters of the POC circuit are often manually set. In related technologies, there is no circuit parameter design software that can automatically design the circuit parameters. Manual setting of circuit parameters has problems such as low reliability of the circuit, low efficiency of circuit design, and high product failure rate. SUMMARY

[0005] The present application provides a POC circuit design method, which comprises:

[0006] Obtaining a target model corresponding to a SERDES in the POC circuit, determining a target return loss and a target insertion loss under a signal frequency point corresponding to the target model;

[0007] Obtaining initial circuit parameters corresponding to the POC circuit, creating a simulation circuit corresponding to the POC circuit based on the initial circuit parameters, and scanning the simulation circuit through the signal frequency point to obtain a simulation return loss and a simulation insertion loss; wherein the POC circuit comprises a first port and a second port, the simulation return loss represents the signal reflection ratio when the signal is transmitted from the first port to the second port, and the simulation insertion loss represents the signal attenuation ratio when the signal is transmitted from the first port to the second port;

[0008] Determining a return loss arbitration value based on the target return loss and the simulation return loss, and determining an insertion loss arbitration value based on the target insertion loss and the simulation insertion loss;

[0009] If it is determined that the initial circuit parameter meets the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, a target circuit parameter is determined based on the initial circuit parameter.

[0010] If it is determined that the initial circuit parameter does not meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, the initial circuit parameter is adjusted to obtain an adjusted circuit parameter, and a target circuit parameter is determined based on the adjusted circuit parameter.

[0011] The present application provides an electronic device, comprising: a processor and a machine readable storage medium, the machine readable storage medium stores machine executable instructions capable of being executed by the processor; the processor is used to execute machine executable instructions to realize the POC circuit design method of the above examples of the present application.

[0012] From the above technical solutions, in the embodiments of the present application, the return loss arbitration value can be determined based on the target return loss and the simulation return loss, the insertion loss arbitration value can be determined based on the target insertion loss and the simulation insertion loss, and then the target circuit parameter meeting the signal transmission quality condition is determined based on the return loss arbitration value and the insertion loss arbitration value, so that the circuit parameter (i.e. the target circuit parameter) of the POC circuit is reasonably designed, the reliability of the circuit parameter is high, the efficiency of the circuit design is high, and the product failure rate is low. In the design and optimization process of the target circuit parameter, the POC device parameter, the PCB layout parameter and the PCB layering process parameter can be comprehensively simulated and optimized, the simulation results (i.e. the return loss arbitration value and the insertion loss arbitration value) are determined by arbitration, and then the target circuit parameter meeting the signal transmission quality condition is obtained. BRIEF DESCRIPTION OF DRAWINGS

[0013] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed in the description of the embodiments of the present application or the prior art will be briefly introduced. Obviously, the drawings in the following description are only some embodiments described in the present application, and other drawings can also be obtained by those skilled in the art according to these drawings of the embodiments of the present application.

[0014] Figure 1 is a flowchart of the POC circuit design method in an embodiment of the present application;

[0015] Figure 2 is a structural schematic diagram of the POC circuit in an embodiment of the present application;

[0016] Figure 3 is a structural schematic diagram of the POC circuit in an embodiment of the present application;

[0017] Figure 4 is a schematic diagram of a circuit parameter design optimization process in an embodiment of the present application;

[0018] Figure 5 is a schematic diagram of POC device parameter design in an embodiment of the present application;

[0019] Figure 6 is a schematic diagram of a parameter tolerance optimization process in an embodiment of the present application;

[0020] Figure 7 is a schematic diagram of a POC circuit design method in an embodiment of the present application;

[0021] Figure 8 is a schematic diagram of a POC circuit design device in an embodiment of the present application;

[0022] Figure 9 is a hardware structure diagram of an electronic device in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The terminology used in the embodiments of the present application is merely for the purpose of describing particular embodiments and is not intended to be limiting of the present application. As used in the present application and the claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0024] It should be understood that although the terms first, second, third, etc. can be used herein to describe various information, these terms are not intended to denote a particular order of the information. These terms are used merely to distinguish one type of information from another. For example, a first information can be termed a second information, and similarly, a second information can be termed a first information, without departing from the scope of the present application. Furthermore, the word "if" can be interpreted as meaning "when" or "upon" or "in response to determining," depending on the context.

[0025] A POC circuit design method is provided in the embodiments of the present application. The POC circuit can include a first port and a second port. Return loss represents the proportion of signal reflection when the signal is transmitted from the first port to the second port. The smaller the return loss, the better the signal quality. Insertion loss represents the proportion of signal attenuation when the signal is transmitted from the first port to the second port. The greater the insertion loss, the better the signal quality. Referring to FIG. 1, a schematic diagram of a POC circuit design method is shown. The method can include: Figure 1

[0026] ​Step 101, obtaining a target model corresponding to a SERDES (Serializer / Deserializer) in the POC circuit, and determining a target return loss and a target insertion loss at a signal frequency point corresponding to the target model.

[0027] Step 102, obtaining initial circuit parameters corresponding to the POC circuit, and creating a simulation circuit corresponding to the POC circuit based on the initial circuit parameters, and scanning the simulation circuit through the signal frequency point to obtain a simulation return loss and a simulation insertion loss. Wherein, the POC circuit can include a first port and a second port, the simulation return loss represents the signal reflection ratio when the signal is transmitted from the first port to the second port, and the smaller the simulation return loss is, the better the signal quality is, and the simulation insertion loss represents the signal attenuation ratio when the signal is transmitted from the first port to the second port, and the greater the simulation insertion loss is, the better the signal quality is.

[0028] Step 103, determining a return loss arbitration value based on the target return loss and the simulation return loss, and determining an insertion loss arbitration value based on the target insertion loss and the simulation insertion loss.

[0029] In a possible implementation, the return loss arbitration value corresponding to the signal frequency point can be determined based on the target return loss, the simulation return loss and a return loss redundancy value corresponding to the signal frequency point; wherein, the return loss redundancy value can be used to represent the deviation between the return loss simulation value and the return loss actual value. And the insertion loss arbitration value corresponding to the signal frequency point can be determined based on the target insertion loss, the simulation insertion loss and an insertion loss redundancy value corresponding to the signal frequency point; wherein, the insertion loss redundancy value can be used to represent the deviation between the insertion loss simulation value and the insertion loss actual value.

[0030] Step 104, if the initial circuit parameters meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, determining the target circuit parameters based on the initial circuit parameters; if the initial circuit parameters do not meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, adjusting the initial circuit parameters to obtain adjusted circuit parameters, and determining the target circuit parameters based on the adjusted circuit parameters.

[0031] For example, determining whether the initial circuit parameter satisfies the signal transmission quality condition or does not satisfy the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value can include, but is not limited to: if the signal frequency point is a plurality of signal frequency points in the frequency band interval, based on the return loss arbitration value and the insertion loss arbitration value corresponding to each signal frequency point, if any return loss arbitration value is greater than a first value (such as 0, etc.), or any insertion loss arbitration value is less than a second value (such as 0, etc.), it is determined that the initial circuit parameter does not satisfy the signal transmission quality condition; if all return loss arbitration values are less than the first value, and all insertion loss arbitration values are greater than the second value, it is determined that the initial circuit parameter satisfies the signal transmission quality condition.

[0032] For example, adjusting the initial circuit parameter to obtain the adjusted circuit parameter can include, but is not limited to: adjusting the initial circuit parameter based on the target return loss, the simulation return loss, the target insertion loss, and the simulation insertion loss to obtain the adjusted circuit parameter; wherein the initial circuit parameter can include, but is not limited to, at least one of the following: POC device parameters of the POC circuit, PCB layout parameters of the PCB (printed circuit board) on which the POC circuit is located, and PCB layering process parameters of the PCB.

[0033] For example, adjusting the initial circuit parameter based on the target return loss, the simulation return loss, the target insertion loss, and the simulation insertion loss to obtain the adjusted circuit parameter includes, but is not limited to: if the signal frequency point is a plurality of signal frequency points in the frequency band interval, the plurality of signal frequency points are divided into low-frequency signal frequency points and high-frequency signal frequency points; based on the target return loss, the simulation return loss, the target insertion loss, and the simulation insertion loss corresponding to the low-frequency signal frequency points, a low-frequency deviation degree value is determined; based on the target return loss, the simulation return loss, the target insertion loss, and the simulation insertion loss corresponding to the high-frequency signal frequency points, a high-frequency deviation degree value is determined; based on the low-frequency deviation degree value and the high-frequency deviation degree value, an adjustment order is determined, and the initial circuit parameter is adjusted based on the adjustment order to obtain the adjusted circuit parameter.

[0034] For example, determining the adjustment order based on the low-frequency deviation degree value and the high-frequency deviation degree value, and adjusting the initial circuit parameters based on the adjustment order to obtain the adjusted circuit parameters can include but is not limited to: if the low-frequency deviation degree value is greater than the high-frequency deviation degree value, optimizing the POC device parameters to obtain optimized POC device parameters; if the optimized POC device parameters, the PCB layout parameters and the PCB lamination process parameters meet the signal transmission quality condition, determining the optimized POC device parameters, the PCB layout parameters and the PCB lamination process parameters as the adjusted circuit parameters; otherwise, if the optimized POC device parameters, the PCB layout parameters and the PCB lamination process parameters do not meet the signal transmission quality condition, optimizing the PCB layout parameters to obtain optimized PCB layout parameters; if the optimized POC device parameters, the optimized PCB layout parameters and the PCB lamination process parameters meet the signal transmission quality condition, determining the optimized POC device parameters, the optimized PCB layout parameters and the PCB lamination process parameters as the adjusted circuit parameters; otherwise, if the optimized POC device parameters, the optimized PCB layout parameters and the PCB lamination process parameters do not meet the signal transmission quality condition, optimizing the PCB lamination process parameters to obtain optimized PCB lamination process parameters; if the optimized POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters meet the signal transmission quality condition, determining the optimized POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters as the adjusted circuit parameters; otherwise, if the optimized POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters do not meet the signal transmission quality condition, obtaining a new target model corresponding to the SERDES in the POC circuit, and / or obtaining new initial circuit parameters corresponding to the POC circuit.

[0035] For example, the adjustment sequence is determined based on the low-frequency deviation degree value and the high-frequency deviation degree value, and the initial circuit parameters are adjusted based on the adjustment sequence to obtain the adjusted circuit parameters, which can include but is not limited to: if the low-frequency deviation degree value is not greater than the high-frequency deviation degree value, the PCB layout parameters are optimized to obtain optimized PCB layout parameters; if the POC device parameters, the optimized PCB layout parameters and the PCB lamination process parameters meet the signal transmission quality condition, the POC device parameters, the optimized PCB layout parameters and the PCB lamination process parameters are determined as the adjusted circuit parameters; otherwise, if the POC device parameters, the optimized PCB layout parameters and the PCB lamination process parameters do not meet the signal transmission quality condition, the PCB lamination process parameters are optimized to obtain optimized PCB lamination process parameters; if the POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters meet the signal transmission quality condition, the POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters are determined as the adjusted circuit parameters; otherwise, if the POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters do not meet the signal transmission quality condition, the POC device parameters are optimized to obtain optimized POC device parameters; if the optimized POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters meet the signal transmission quality condition, the optimized POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters are determined as the adjusted circuit parameters; otherwise, if the optimized POC device parameters, the optimized PCB layout parameters and the optimized PCB lamination process parameters do not meet the signal transmission quality condition, a new target model corresponding to the SERDES in the POC circuit is obtained, and / or a new initial circuit parameter corresponding to the POC circuit is obtained.

[0036] For example, the target circuit parameters are determined based on the adjusted circuit parameters, which can include but is not limited to: the initial parameter range is determined based on the adjusted circuit parameters and the configured initial tolerance; if the plurality of circuit parameters in the initial parameter range meet the signal transmission quality condition, the adjusted circuit parameters are determined as the target circuit parameters; if any circuit parameter in the initial parameter range does not meet the signal transmission quality condition, it is determined whether there is a parameter field, wherein the parameter field needs to be located in the initial parameter range, the parameter field needs to include the adjusted circuit parameters, and the plurality of circuit parameters in the parameter field meet the signal transmission quality condition; if there is a parameter field meeting the above conditions, the candidate tolerance is determined based on the parameter field; if the candidate tolerance meets the design capability, the intermediate parameter of the parameter field is determined as the target circuit parameters.

[0037] Exemplarily, after determining whether there is a parameter field, if there is no parameter field satisfying the above conditions, a new target model corresponding to the SERDES in the POC circuit is obtained, and / or a new initial circuit parameter corresponding to the POC circuit is obtained.

[0038] Exemplarily, after determining the candidate tolerance based on the parameter field, if the candidate tolerance does not satisfy the design capability, the failure rate corresponding to the candidate tolerance is determined; if the failure rate satisfies the product quality requirement, the intermediate parameter of the parameter field can be determined as the target circuit parameter; if the failure rate does not satisfy the product quality requirement, a new target model corresponding to the SERDES in the POC circuit is obtained, and / or a new initial circuit parameter corresponding to the POC circuit is obtained.

[0039] Exemplarily, the POC circuit can include an AC branch, a main link and a DC branch, the AC branch can include the SERDES, and the main link can include a BNC (Bayonet Nut Connector).

[0040] Exemplarily, the AC branch can further include a TVS (Transient Voltage Suppressor), a first capacitor and a second capacitor, the main link can further include a first resistor, and the DC branch can include a first inductor, a third capacitor and K low-pass filter circuits, K can be a positive integer such as 1, 2, 3, etc., and each low-pass filter circuit can be composed of a resistor and an inductor in parallel. Wherein, the first end of the TVS is connected with the first end of the SERDES, the second end of the TVS is connected with the ground end, the first end of the SERDES is connected with the first end of the first capacitor, the second end of the SERDES is connected with the first end of the second capacitor, the second end of the first capacitor is connected with the first end of the first inductor, the second end of the first capacitor is connected with the first end of the BNC, the second end of the second capacitor is connected with the first end of the first resistor, the second end of the first resistor is connected with the ground end, the second end of the BNC is connected with the ground end, the second end of the first inductor is connected with the low-pass filter circuit, the first end of the third capacitor is connected with the low-pass filter circuit, and the second end of the third capacitor is connected with the ground end.

[0041] Exemplarily, the POC circuit can be applied at a serializer circuit end of the camera, or the POC circuit can be applied at a deserializer circuit end of the camera. If the POC circuit is applied at the serializer circuit end of the camera, the POC circuit is configured to serialize a DVP (Digital Video Port) signal or a MIPI (Mobile Industry Processor Interface) signal transmitted by the camera through a sensor into an LVDS (Low-Voltage Differential Signaling) signal. If the POC circuit is applied at the deserializer circuit end of the camera, the POC circuit is configured to deserialize an LVDS signal transmitted by the camera through a coaxial line into a DVP signal or a MIPI signal.

[0042] From the above technical solutions, it can be seen that in the embodiments of the present application, the return loss arbitration value can be determined based on the target return loss and the simulation return loss, the insertion loss arbitration value can be determined based on the target insertion loss and the simulation insertion loss, and then the target circuit parameter meeting the signal transmission quality condition can be determined based on the return loss arbitration value and the insertion loss arbitration value, so that the circuit parameter (i.e., the target circuit parameter) of the POC circuit can be reasonably designed, the reliability of the circuit parameter is high, the efficiency of the circuit design is high, and the product failure rate is low. In the design and optimization process of the target circuit parameter, the POC device parameter, the PCB layout parameter, and the PCB lamination process parameter can be comprehensively simulated and optimized, the simulation results (i.e., the return loss arbitration value and the insertion loss arbitration value) are determined by arbitration, and then the target circuit parameter meeting the signal transmission quality condition is obtained.

[0043] The technical solutions of the embodiments of the present application will be described below in combination with specific application scenarios.

[0044] The POC circuit is a functional circuit using POC technology, and a separate filter device can be used to isolate the direct current power supply from the video signal. However, when the POC circuit is used, how to design the circuit parameter of the POC circuit is often manually set, and there is no circuit parameter design software in the related art to automatically realize the design of the circuit parameter. Manual setting of the circuit parameter has the problems of low reliability of the circuit, low efficiency of the circuit design, and high product failure rate.

[0045] In response to the above findings, this application proposes a Proof-of-Concept (POC) circuit design method. This method can reasonably design the target circuit parameters of the POC circuit, resulting in high reliability, high circuit design efficiency, and low product failure rate. During the circuit parameter design and optimization process, comprehensive simulation optimization can be performed on POC device parameters, PCB layout parameters, and PCB layer stack-up process parameters. The simulation results are then determined through arbitration to obtain the target circuit parameters that meet the signal transmission quality requirements.

[0046] In this application embodiment, the optimization of the POC circuit principle design, the optimization of the PCB layout design, and the optimization of the circuit parameter design may be involved. The following describes the process of optimizing the POC circuit principle design, the optimization of the PCB layout design, and the optimization of the circuit parameter design.

[0047] First, the design principle of the POC circuit was optimized.

[0048] A Proof-of-Concept (POC) circuit can be used in the serializer circuit of a camera (such as a 3M or 8M high-definition camera), or in the deserializer circuit of a camera, to solve the problem of stable transmission of high-speed LVDS signals from the camera. Specifically, if the POC circuit is used in the serializer circuit, it serializes the DVP or MIPI signal transmitted from the camera via the sensor into an LVDS signal; if the POC circuit is used in the deserializer circuit, it deserializes the LVDS signal transmitted from the camera via coaxial cable into a DVP or MIPI signal.

[0049] DVP signal is a parallel video stream data. Cameras commonly use 8-bit and 12-bit DVP signals. MIPI signal is a differential video stream data. Cameras commonly use 2-pair and 4-pair MIPI signals. LVDS signal is an analog high-definition video signal, which is usually transmitted using coaxial cable.

[0050] For example, see Figure 2 The diagram shows the structure of a Proof-of-Concept (POC) circuit. The POC circuit can include an AC branch, a main link, and a DC branch. The AC branch can include SERDES, TVS1, a first capacitor C1, and a second capacitor C2. The main link can include BNC1 and a first resistor R1. The DC branch can include a first inductor L1, a third capacitor C3, and K low-pass filter circuits, where K can be a positive integer. Each low-pass filter circuit can consist of a resistor and an inductor connected in parallel. Figure 2For example, the first low-pass filter circuit is composed of the resistor R2 and the inductor L2, the second low-pass filter circuit is composed of the resistor R3 and the inductor L3, and the third low-pass filter circuit is composed of the resistor R4 and the inductor L4.

[0051] Referring to Figure 2 As shown in the figure, the first end of the TVS1 is connected with the first end of the SERDES (such as the SIG+ pin), the second end of the TVS1 is connected with the ground, the first end of the SERDES (the SIG+ pin) is connected with the first end of the first capacitor C1, the second end of the SERDES (such as the SIG- pin) is connected with the first end of the second capacitor C2, the second end of the first capacitor C1 is connected with the first end of the first inductor L1, the second end of the first capacitor C1 is connected with the first end of the BNC1, the second end of the second capacitor C2 is connected with the first end of the first resistor R1, the second end of the first resistor R1 is connected with the ground, and the second end of the BNC1 is connected with the ground.

[0052] Referring to Figure 2 As shown in the figure, the second end of the first inductor L1 is connected with the low-pass filter circuit, and the first end of the third capacitor C3 is connected with the low-pass filter circuit, and the second end of the third capacitor C3 is connected with the ground.

[0053] For example, the second end of the first inductor L1 is connected with the first low-pass filter circuit, such as the second end of the first inductor L1 is connected with the first end of the resistor R2, and the second end of the first inductor L1 is connected with the first end of the inductor L2. The first low-pass filter circuit is connected with the second low-pass filter circuit, such as the second end of the resistor R2 is connected with the first end of the resistor R3, the second end of the resistor R2 is connected with the first end of the inductor L3, the second end of the inductor L2 is connected with the first end of the resistor R3, and the second end of the inductor L2 is connected with the first end of the inductor L3. The second low-pass filter circuit is connected with the third low-pass filter circuit, such as the second end of the resistor R3 is connected with the first end of the resistor R4, the second end of the resistor R3 is connected with the first end of the inductor L4, the second end of the inductor L3 is connected with the first end of the resistor R4, and the second end of the inductor L3 is connected with the first end of the inductor L4. The first end of the third capacitor C3 is connected with the third low-pass filter circuit, such as the first end of the third capacitor C3 is connected with the second end of the resistor R4, and the first end of the third capacitor C3 is connected with the second end of the inductor L4.

[0054] For example, the AC branch is used for transmitting the LVDS signal, which is composed of a first capacitor C1, a second capacitor C2, a TVS1 and a SERDES. The first capacitor C1 and the second capacitor C2 are DC isolation capacitors, which are used to isolate the DC power supply and prevent the DC power supply from entering the AC branch from the main link. The capacitance values of the first capacitor C1 and the second capacitor C2 need to be considered in the selection of the SERDES and the bandwidth of the LVDS signal. The TVS1 is used for static electricity protection and is a diode form of high-efficiency protection device, which is used to protect the SERDES. The selection of the TVS1 needs to consider the ESD (Electro Static Discharge) performance requirements. The SERDES is the abbreviation of SERializer / DESerializer. If the POC circuit is applied to the SERDES circuit end of the camera, the SERDES is used to serialize the DVP signal or MIPI signal transmitted by the camera through the sensor into the LVDS signal. If the POC circuit is applied to the DESerializer circuit end of the camera, the SERDES is used to deserialize the LVDS signal transmitted by the camera through the coaxial line into the DVP signal or MIPI signal.

[0055] For example, the DC branch is used for transmitting only the DC power supply, which can be composed of a first inductor L1, an inductor L2, an inductor L3, an inductor L4, a resistor R2, a resistor R3, a resistor R4 and a third capacitor C3. The third capacitor C3 is a filter capacitor, which is used to reduce the ripple and noise in the DC branch. The first inductor L1, the inductor L2, the inductor L3, the inductor L4, the resistor R2, the resistor R3 and the resistor R4 form a 4-stage low-pass filter circuit, which is used to prevent the LVDS signal from entering the DC branch from the main link. The low-pass filter circuit in the embodiment adopts the way of step-by-step frequency reduction filtering. The reason is that the LVDS signal of the camera is composed of forward channel signals (signal frequency point 1-3 GHz) and reverse channel signals (signal frequency point 100-200 MHz). Therefore, the first-stage low-pass filter circuit composed of the first inductor L1 can filter out the forward channel signals. The second-stage low-pass filter circuit composed of the inductor L2 and the resistor R2 can filter out the reverse channel signals. The third-stage low-pass filter circuit composed of the inductor L3 and the resistor R3 has the lowest filter frequency band and is close to DC, which is used to filter out the low-frequency noise in the circuit. The fourth-stage low-pass filter circuit composed of the inductor L4 and the resistor R4 is a reserved design. When the first-stage and second-stage low-pass filter circuits cannot effectively filter out the LVDS signal, the third-stage low-pass filter circuit is further used to filter out the LVDS signal, and the fourth-stage low-pass filter circuit is used to filter out the low-frequency noise. When the fourth-stage low-pass filter circuit is not used, the inductor L4 is not used, and the resistor R4 is a 0-ohm resistor, i.e., the inductor L4 and the resistor R4 are invalid.

[0056] Regarding the parameters of the low-pass filter circuit (such as the parameters of the first inductor L1, inductor L2, inductor L3, inductor L4, resistors R2, R3, and R4), the impact on the main link impedance, the LVDS signal bandwidth, and the camera's operating current need to be considered. When the camera has an infrared LED, the saturation current of the first inductor L1, inductor L2, inductor L3, and inductor L4 should all be greater than the peak current at the moment the camera is powered on. Furthermore, the performance of a 4-stage low-pass filter circuit is not necessarily superior to that of a 3-stage low-pass filter circuit. Appropriate circuit component parameters can be obtained through simulation software optimization based on the actual application; see subsequent embodiments.

[0057] The low-pass filter circuit takes into full account product compatibility and circuit debuggability. Resistors R2, R3, and R4 in the low-pass filter circuit, like inductor L4, can be reserved in the design and do not necessarily need to be installed. When the board space for the camera is limited, resistor R4 and inductor L4 can be removed.

[0058] For example, the main link can consist of a BNC1 connector on the coaxial cable and a first resistor R1. The main link transmits LVDS signals and DC power. The function of BNC1 is to transfer the LVDS signals and DC power to the coaxial cable, or to transfer the LVDS signals and DC power from the coaxial cable to the PCB board. The selection of BNC1 needs to be consistent with the selection of the BNC connector on the coaxial cable, so that the impedance transition is better and the signal reflection caused by impedance problems can be reduced. The function of the first resistor R1 is to match the negative terminal impedance of SERDES.

[0059] In one possible implementation, see Figure 3 As shown, a first port PORT1 is set near the pin of SERDES (such as the SIG+ pin), that is, the first port can be located near the pin of SERDES. A second port PORT2 is set near the pin of BNC, that is, the second port can be located near the pin of BNC.

[0060] When a signal is transmitted from the first port to the second port, return loss represents the proportion of signal reflection during transmission from the first port to the second port; a smaller return loss indicates better signal quality. Insertion loss represents the proportion of signal attenuation during transmission from the first port to the second port; a larger insertion loss indicates better signal quality. For example, S11 is the return loss, characterizing the proportion of signal reflected back to the signal source during transmission from the first port to the second port. S11 is a function of frequency; a smaller S11 indicates better signal quality. S21 is the insertion loss from the first port to the second port, characterizing the proportion of signal attenuation during transmission from the first port to the second port. S21 is also a function of frequency; a larger S21 indicates better signal quality.

[0061] Second, the layout design of the PCB board is optimized.

[0062] For example, the layout of the PCB board for the POC circuit can be designed as follows:

[0063] The wire of the BNC1 to SERDES pin can be divided into two parts, the thick line segment close to the BNC1 passes through the power supply and the LVDS signal, and the thin line segment close to the SERDES only passes through the LVDS signal. The thick line segment and the thin line segment are wrapped with a GND network, which can control the impedance of 50 ohms (this value can be arbitrarily selected) to ensure the stable transmission of the LVDS signal and improve the anti-interference ability of the LVDS signal channel.

[0064] The pad of the first inductor L1 of the first low-pass filter circuit can be directly placed on the wire between the BNC1 and the blocking capacitor C1 (i.e. the first capacitor C1), and the broken wire is avoided as much as possible.

[0065] The ripple in the DC branch can cause the high-frequency parameters of the inductor to deteriorate, thereby affecting the filtering effect of the LVDS signal, therefore, the third capacitor C3 is as close as possible to the inductor of the last low-pass filter circuit.

[0066] The GND reference layer adjacent to the main link, the DC branch and the AC branch of the POC circuit can be hollowed out, and the hollowed-out area needs to completely cover the first capacitor C1, the second capacitor C2 and the inductors of the low-pass filter circuits at each stage, thereby effectively improving the parameters (such as return loss and insertion loss) of the POC link and improving the stability of the transmission of the LVDS signal. In addition to considering the working current of the camera, the position and size parameters of the hollowed-out area also need to be further optimized and confirmed by simulation software, see the subsequent embodiments.

[0067] The TVS1 is placed as close as possible to the first capacitor C1, and its pad is placed on the wire from the first capacitor C1 to the SERDES, and the broken wire is avoided as much as possible, and in addition, the thick line segment needs to be appropriately lengthened to cover the TVS1 pad, so that the impedance of the POC link can be better transitioned, thereby further improving the parameters (such as return loss and insertion loss) of the POC link, and the POC link refers to the link between the first port and the second port.

[0068] If the PCB layout space allows, the hollowed-out area between the two pads of the GND reference layer of the first inductor L1 of the first low-pass filter circuit is divided into a main link hollowed-out area and a DC branch hollowed-out area by using a GND wire smaller than the pad pitch, which can improve the isolation effect of the DC branch and the main link to a certain extent, and can be used under the premise of ensuring the parameters of the POC link.

[0069] Third, the circuit parameter design is optimized.

[0070] On the basis of the principle design optimization of the POC circuit and the layout design optimization of the PCB board, the circuit parameter design optimization can also be realized, that is, the POC circuit needs to be designed by using the principle design optimization, as shown in Figure 2 and the layout of the PCB board is designed by using the layout design optimization, on the basis of which, the circuit parameter design optimization is performed. Of course, the circuit parameter design optimization can also be directly performed independently of the principle design optimization of the POC circuit and the layout design optimization of the PCB board, and no limitation is made in this regard. In the circuit parameter design optimization process, the POC device parameters of the POC circuit, the PCB layout parameters of the PCB board on which the POC circuit is located, and the PCB layer stacking process parameters of the PCB board can be comprehensively simulated and optimized, and the simulation results are determined through an arbitration formula and the optimization logic is selected through a weight formula. In addition, the circuit parameter design optimization also includes tolerance optimization and failure analysis, and comprehensively considers the influence of the production process on the circuit design.

[0071] In this embodiment, as shown in Figure 4 the circuit parameter design optimization process can include:

[0072] Step 401: Obtain the target model corresponding to the SERDES in the POC circuit, and determine the return loss array and the insertion loss array corresponding to the target model, the return loss array including target return losses at multiple signal frequency points, and the insertion loss array including target insertion losses at multiple signal frequency points.

[0073] Exemplarily, the return loss and the insertion loss can be taken as performance indicators for evaluating design requirements, the return loss is denoted as S11, which is used to represent the signal reflection ratio at the first port, S11 is a function of frequency, the smaller S11 is, the better the signal quality is, the insertion loss is denoted as S21, which is used to represent the signal attenuation ratio at the second port, S21 is also a function of frequency, the larger S21 is, the better the signal quality is.

[0074] In order to determine the performance indicators such as the return loss and the insertion loss, the model of the SENSOR (sensor) of the camera can be determined, and then the resolution, the frame rate and the output data format of the SENSOR are determined. Based on the resolution, the frame rate and the output data format of the SENSOR, the working mode of the SERDES in the POC circuit, the signal rate of the forward channel and the signal rate of the reverse channel can be determined. Then, based on the working mode of the SERDES, the signal rate of the forward channel and the signal rate of the reverse channel, the selection of the SERDES is performed, and the selected model is denoted as the target model, that is, the SERDES of the target model is selected, and the SERDES of the target model can meet the requirements of the working mode, the signal rate of the forward channel and the signal rate of the reverse channel.

[0075] After obtaining the target model of the SERDES, the configuration of the SERDES, the bandwidth of the main link (such as the link between PORT1 and PORT2), the performance requirement of the S11 parameter at PORT1 of the main link, and the performance requirement of the S21 parameter at PORT2 of the main link can be determined, and the performance requirement of the S11 parameter and the performance requirement of the S21 parameter are the performance indicators of the POC circuit design. The performance requirement of the S11 parameter can be a performance indicator function of S11, and the performance requirement of the S21 parameter can be a performance indicator function of S21.

[0076] The performance indicator function of S11 can be denoted as F S11TG (f), f ∈ (10, 3G) Hz, and the performance indicator function of S21 can be denoted as F S21TG (f), f ∈ (10, 3G) Hz. In the above formula, f is the signal frequency point, F S11TG (f) is a function that changes with the signal frequency point, that is, the value range of the signal frequency point is (10, 3G) Hz, F S11TG (f) corresponds to the return loss corresponding to these signal frequency points, that is, each signal frequency point corresponds to a return loss. F S21TG (f) is a function that changes with the signal frequency point, that is, the value range of the signal frequency point is (10, 3G) Hz, F S21TG (f) corresponds to the insertion loss corresponding to these signal frequency points, that is, each signal frequency point corresponds to an insertion loss.

[0077] The performance indicator function F S11TG (f) can be converted into a return loss array. Let the sample number of the signal frequency point be m, the variable f ∈ (10, 3G) Hz can be mapped to the sequence f n ∈ (10, 3G) Hz, n = 1, 2,..., m, so that m signal frequency points are obtained. Based on the performance indicator function F S11TG (f), the return loss corresponding to each signal frequency point is obtained, and these return losses are denoted as target return losses. In this way, the return loss array A S11TG (f n ) can be obtained. The return loss array can include target return losses under m signal frequency points.

[0078] The performance indicator function F S21TG (f) can be converted into an insertion loss array. Based on the performance indicator function F S21TG (f), m signal frequency points (which can be the same as the m signal frequency points of the return loss) corresponding to the insertion loss are obtained, and these insertion losses are denoted as target insertion losses. In this way, the insertion loss array A S21TG (f n ) can be obtained. The insertion loss array can include target insertion losses under m signal frequency points.

[0079] Step 402, obtaining initial circuit parameters corresponding to the POC circuit.

[0080] For example, the initial circuit parameters include, but are not limited to, at least one of the following: POC device parameters (such as initial POC device parameters, which are parameters of devices in the POC circuit), PCB layout parameters (such as initial PCB layout parameters, which are parameters representing the layout of the PCB), and PCB lamination process parameters (such as initial PCB lamination process parameters, which are parameters representing the lamination process of the PCB).

[0081] For example, the POC device parameters can include impedance parameters of the first inductor L1, impedance parameters of the inductor L2, impedance parameters of the inductor L3, impedance parameters of the inductor L4, resistance values of the first resistor R1, resistance values of the resistor R2, resistance values of the resistor R3, resistance values of the resistor R4, capacitance values of the first capacitor C1, capacitance values of the second capacitor C2, and capacitance values of the third capacitor C3. Of course, the above are only a few examples, and are not limited thereto.

[0082] The PCB layout parameters can include the position (such as coordinate parameters) of the hollowed-out area of the reference layer, the size parameters of the hollowed-out area of the reference layer, the position parameters (such as coordinate and angle parameters) of the TVS1, the position parameters (such as coordinate and angle parameters) of the first capacitor C1, the position parameters (such as coordinate and angle parameters) of the second capacitor C2, the position parameters (such as coordinate and angle parameters) of the first inductor L1, the width of the main link (i.e., the line width parameter), and the like. Of course, the above are only a few examples, and are not limited thereto.

[0083] The PCB lamination process parameters can include thickness parameters of each metal layer of the PCB, thickness parameters of each dielectric layer, and dielectric constants of each dielectric layer. Of course, the above are only a few examples, and are not limited thereto.

[0084] For example, the POC device parameters in the initial circuit parameters can be parameters configured based on experience or parameters obtained using an algorithm, and are not limited thereto. For example, based on the signal rate corresponding to the POC circuit (such as the signal rate of the forward channel and the signal rate of the reverse channel), a Bode diagram of the low-pass filter circuit can be designed. Figure 2 For example, based on the bandwidth division of each stage of the low-pass filter circuit, the Bode diagram of each stage of the low-pass filter circuit can be planned, and the cutoff frequency of each stage of the low-pass filter circuit can be determined. For example, a design method can be referred to in Figure 5As shown, the planning uses the first and second low-pass filter circuits to filter out the forward channel signal, the third low-pass filter circuit to filter out the reverse channel signal, and the fourth low-pass filter circuit to further filter out the high-frequency signal remaining in the previous stage and filter out the noise in the channel. According to the planned Bode diagram and the cutoff frequency, the parameters of each low-pass filter circuit can be determined, which are used as the POC device parameters in the initial circuit parameters. The selection of the device and the like can be determined according to the results of subsequent simulation optimization and factors such as the actual working current of the camera and the power-on impact current.

[0085] For example, based on the POC device parameters in the initial circuit parameters, the PCB layout parameters can be obtained in combination with the PCB board frame data. The PCB layout parameters in the initial circuit parameters can be parameters configured according to experience or parameters obtained by using an algorithm, and no limitation is made thereto. For example, the PCB layout design of the POC circuit can refer to the layout design optimization of the PCB board, which will not be repeated here. The initial coordinates and angle parameters of the TVS1, the first capacitor C1, the second capacitor C2, and the first inductor L1 can be reasonably set according to the initial layout. The initial geometric size and coordinate parameters of the reference layer hollow region can be reasonably set according to the initial coordinates and angle parameters of the TVS1, the first capacitor C1, the second capacitor C2, and the first inductor L1. The reasonable setting refers to that each device and each network region satisfies an arbitrary value under the basic PCB layout requirement, which can be generated by a random function under the constraint condition, and no limitation is made thereto.

[0086] The width of the main link (i.e., the initial line width parameter w) can be calculated according to the PCB lamination process parameters by using a stripline impedance formula, and no limitation is made to the stripline impedance formula.

[0087] For example, the PCB lamination process parameters in the initial circuit parameters can be parameters configured according to experience or parameters obtained by using an algorithm, and no limitation is made thereto. For example, the PCB lamination process parameters can be provided by a PCB manufacturer and can be directly imported as the default value of the PCB manufacturer.

[0088] In step 403, a simulation circuit corresponding to the POC circuit is created based on the initial circuit parameters, and the simulation circuit is scanned through multiple signal frequency points to obtain an echo simulation array and an insertion simulation array. The echo simulation array can include simulation echo losses at multiple signal frequency points, and the insertion simulation array can include simulation insertion losses at multiple signal frequency points. The POC circuit includes a first port and a second port, the simulation echo loss represents the signal reflection ratio when the signal is transmitted from the first port to the second port, and the smaller the simulation echo loss, the better the signal quality. The simulation insertion loss represents the signal attenuation ratio when the signal is transmitted from the first port to the second port, and the greater the simulation insertion loss, the better the signal quality.

[0089] For example, after obtaining the POC device parameters (such as initial POC device parameters), the PCB layout parameters (such as initial PCB layout parameters), and the PCB lamination process parameters (such as initial PCB lamination process parameters), a simulation circuit (the simulation circuit can also be referred to as a simulation model) corresponding to the POC circuit can be created in a simulation software (such as an electromagnetic simulation software) based on the POC device parameters, the PCB layout parameters, and the PCB lamination process parameters. The first port PORT1 can be set near the SIG+ pin of the SERDES of the simulation circuit, and the second port PORT2 can be set near the pin of the BNC1 of the simulation circuit.

[0090] Suppose the value range of the signal frequency point is (10, 3G) Hz, and the sample number of the signal frequency point is m, the variable f ∈ (10, 3G) Hz can be mapped to the number sequence f n , n = 1, 2,..., m, so as to obtain m signal frequency points. For each signal frequency point in the m signal frequency points, the simulation circuit is scanned through the signal frequency point to obtain the simulation echo loss corresponding to the first port (i.e., the simulation echo loss corresponding to the signal frequency point) and the simulation insertion loss corresponding to the second port (i.e., the simulation insertion loss corresponding to the signal frequency point).

[0091] After the above processing is performed for the m signal frequency points, the simulation echo loss corresponding to the m signal frequency points is obtained, and the simulation insertion loss corresponding to the m signal frequency points is obtained, so as to obtain the echo simulation array A S11IN (f n ), which can include simulation echo losses at m signal frequency points, and obtain the insertion simulation array A S21IN (f n ), which includes simulation insertion losses at m signal frequency points. Obviously, the initial circuit parameters can correspond to the echo loss curve and the insertion loss curve varying with frequency. The echo loss curve is converted into the echo simulation array A S11IN (f n), the insertion loss curve is converted into an insertion simulation array A S21IN (f n ).

[0092] Step 404, determining a return loss arbitration value based on the return loss array and the return simulation array, and determining an insertion loss arbitration value based on the insertion loss array and the insertion simulation array.

[0093] For example, based on the return loss array and the return simulation array, the return loss arbitration value can be determined by the following formula: ARB S11 (n) = A s11IN (f n ) - [A S11TG (f n ) + s 11red (f n )]. In the above formula, n = 1, 2, 3, …, m, represents the nth signal frequency point, ARB s11 (n) represents the return loss arbitration value corresponding to the nth signal frequency point, A S11TG (f n ) represents the target return loss corresponding to the nth signal frequency point, that is, the target return loss corresponding to the nth signal frequency point in the return loss array, A S11IN (f n ) represents the simulation return loss corresponding to the nth signal frequency point, that is, the simulation return loss corresponding to the nth signal frequency point in the return simulation array, s 11red (f n ) represents the return loss redundancy value corresponding to the nth signal frequency point.

[0094] In summary, based on the target return loss corresponding to the nth signal frequency point, the simulation return loss corresponding to the nth signal frequency point, and the return loss redundancy value corresponding to the nth signal frequency point, the return loss arbitration value corresponding to the nth signal frequency point is determined, and then the return loss arbitration value corresponding to each signal frequency point is obtained.

[0095] Wherein, the return loss redundancy value is used to represent the deviation between the return loss simulation value and the actual value. For example, a redundancy function of the return loss parameter can be constructed through continuous simulation and testing, and the construction process is not limited. The redundancy function is used to simulate the deviation between the return loss simulation value and the actual value. The redundancy function is a functional relationship between the signal frequency point and the deviation (the deviation between the return loss simulation value and the actual value). Therefore, the redundancy function can be queried through the signal frequency point (such as the nth signal frequency point) to obtain the return loss redundancy value corresponding to the nth signal frequency point.

[0096] For example, based on the insertion loss array and the insertion simulation array, the insertion loss arbitration value can be determined by the following formula: ARBS21 (n) = A S21IN (f n ) - [A S21TG (f n ) + s 21red (f n )]. In the above formula, n = 1, 2, 3,..., m, represents the nth signal frequency point, ARB s21 (n) represents the insertion loss arbitration value corresponding to the nth signal frequency point, A S21TG (f n ) represents the target insertion loss corresponding to the nth signal frequency point, i.e., the target insertion loss corresponding to the nth signal frequency point in the insertion loss array, A S21IN (f n ) represents the simulation insertion loss corresponding to the nth signal frequency point, i.e., the simulation insertion loss corresponding to the nth signal frequency point in the insertion simulation array, s 21red (f n ) represents the insertion loss redundancy value corresponding to the nth signal frequency point.

[0097] Based on the target insertion loss corresponding to the nth signal frequency point, the simulation insertion loss corresponding to the nth signal frequency point, and the insertion loss redundancy value corresponding to the nth signal frequency point, the insertion loss arbitration value corresponding to the nth signal frequency point is determined, and then the insertion loss arbitration value corresponding to each signal frequency point is obtained.

[0098] The insertion loss redundancy value is used to represent the deviation between the insertion loss simulation value and the actual value. For example, a redundancy function of the insertion loss parameter can be constructed through continuous simulation and testing, and the construction process is not limited. The redundancy function is used to simulate the deviation between the insertion loss simulation value and the actual value. The redundancy function is a functional relationship between the signal frequency point and the deviation (the deviation between the insertion loss simulation value and the actual value). Therefore, the redundancy function can be queried by the signal frequency point (such as the nth signal frequency point) to obtain the insertion loss redundancy value corresponding to the nth signal frequency point.

[0099] Step 405, based on the return loss arbitration value and the insertion loss arbitration value, determine whether the initial circuit parameter meets the signal transmission quality condition. If yes, execute step 406, if not, execute step 407.

[0100] For example, based on the return loss arbitration value and the insertion loss arbitration value corresponding to each signal frequency point, if any return loss arbitration value is greater than a first value (such as 0), or any insertion loss arbitration value is less than a second value (such as 0), it is determined that the initial circuit parameter does not meet the signal transmission quality condition. For example, if ARB S11 (n) > 0, n = 1, 2, 3,..., m or ARB S21(n) < 0, n = 1, 2, 3, …, m, and ARB (n) > 0, n = 1, 2, 3, …, m, it is indicated that the simulation result of the initial circuit parameter is not deviated from the design index, the simulation result of the initial circuit parameter meets the design index, and a certain margin is left, therefore, step 406 is executed, and the initial circuit parameter is not optimized.

[0101] Based on the echo loss arbitration value and the insertion loss arbitration value corresponding to each signal frequency point, if all the echo loss arbitration values are less than or equal to a first value (for example, 0), and all the insertion loss arbitration values are greater than or equal to a second value (for example, 0), it is determined that the initial circuit parameter meets the signal transmission quality condition. For example, if ARB S11 (n) < 0, n = 1, 2, 3, …, m, and ARB S21 (n) > 0, n = 1, 2, 3, …, m, it is indicated that the simulation result of the initial circuit parameter is not deviated from the design index, the simulation result of the initial circuit parameter meets the design index, and a certain margin is left, therefore, step 406 is executed, and the initial circuit parameter is not optimized.

[0102] For example, ARB S11 (n) and ARB S21 (n) are calculated by an arbitration formula, that is, whether the initial circuit parameter meets the signal transmission quality condition is determined based on the arbitration formula ARB S11 (n) and ARB S21 (n).

[0103] Step 406, the target circuit parameter is determined based on the initial circuit parameter. For example, the initial circuit parameter can be taken as the target circuit parameter, or the target circuit parameter can also be determined based on the initial circuit parameter based on the parameter tolerance optimization process of the POC circuit, and the determination manner can be referred to in subsequent embodiments.

[0104] Step 407, the initial circuit parameter is adjusted to obtain an adjusted circuit parameter, and the target circuit parameter is determined based on the adjusted circuit parameter. For example, the adjusted circuit parameter can be taken as the target circuit parameter, or the target circuit parameter can also be determined based on the adjusted circuit parameter based on the parameter tolerance optimization process of the POC circuit, and the determination manner of the target circuit parameter can be referred to in subsequent embodiments.

[0105] For example, the initial circuit parameter can be adjusted based on the target echo loss, the simulation echo loss, the target insertion loss and the simulation insertion loss to obtain the adjusted circuit parameter. For example, the initial circuit parameter can be adjusted by the following steps to obtain the adjusted circuit parameter.

[0106] Step 4071, divide the plurality of signal frequencies into signal frequencies in a low frequency band and signal frequencies in a high frequency band.

[0107] For example, assuming that the value range of the signal frequencies is (10, 3G) Hz, and the sample number of the signal frequencies is m, the variable f∈(10, 3G) Hz can be mapped to the sequence f n ∈(10, 3G) Hz, n = 1, 2, …, m, so as to obtain m signal frequencies. Based on this, the m signal frequencies can be divided into signal frequencies in a low frequency band and signal frequencies in a high frequency band. For example, a signal frequency is obtained as a signal segmentation frequency s, and the signal segmentation frequency s is used to divide the m signal frequencies into signal frequencies in a low frequency band and signal frequencies in a high frequency band.

[0108] For example, the signal frequencies in the low frequency band interval (10 Hz, s] can be regarded as signal frequencies in a low frequency band, and the signal frequencies in the high frequency band interval (s, 3GHz) can be regarded as signal frequencies in a high frequency band. Obviously, if the signal segmentation frequency s corresponds to the bth signal frequency in the m signal frequencies, the signal frequencies in the low frequency band can be f n , n = 1, 2, 3, …, b, and the signal frequencies in the high frequency band can be f n , n = b + 1, b + 2, …, m.

[0109] The signal segmentation frequency s can be an empirical signal frequency or a signal frequency obtained by using an algorithm, and no limitation is made thereto. For example, after the signal rates of the forward channel and the reverse channel of the main link are obtained, the center frequency f L of the reverse channel signal and the center frequency f H of the forward channel signal can be calculated based on the signal rates of the forward channel and the reverse channel. The reverse channel signal is a low frequency signal of the main link, and the forward channel signal is a high frequency signal of the main link. The low frequency and the high frequency are relatively low frequency and relatively high frequency, and are not absolute low frequency and high frequency.

[0110] After the center frequency f L and the center frequency f H are obtained, the signal segmentation frequency s can be determined based on the center frequency f L and the center frequency f H . For example, the determination manner of the signal segmentation frequency s can be s = 0.5(f L +f H ). Of course, the above is only an example of determining the signal segmentation frequency s, and no limitation is made thereto. If s = 0.5(f L +f H ), the low frequency band interval (10 Hz, 0.5(f L +fH ) as the signal frequency points of the low frequency band, and the signal frequency points in the high frequency band interval (0.5(f L +f H ), 3 GHz) as the signal frequency points of the high frequency band. At this point, the m signal frequency points can be divided into signal frequency points of the low frequency band and signal frequency points of the high frequency band.

[0111] Step 4072, determining a low frequency band deviation degree value based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the low frequency band.

[0112] For example, a normalized sum weight formula P L of the low frequency band can be introduced L The low frequency band deviation degree value, which can also be referred to as a weight, represents the severity of the deviation. The greater the low frequency band deviation degree value, the more serious the deviation. The determination method of the low frequency band deviation degree value is shown in the following formula:

[0113]

[0114] In the above formula, f n , n = 1, 2, 3,..., b represents the signal frequency points of the low frequency band, A S11IN (f n ) represents the simulation return loss corresponding to the nth signal frequency point, A S11TG (f n ) represents the target return loss corresponding to the nth signal frequency point, A S21IN (f n ) represents the simulation insertion loss corresponding to the nth signal frequency point, and A S21TG (f n ) represents the target insertion loss corresponding to the nth signal frequency point. As can be seen from the above, the low frequency band deviation degree value can be determined based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the low frequency band (i.e. the first signal frequency point to the bth signal frequency point).

[0115] Step 4073, determining a high frequency band deviation degree value based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the high frequency band.

[0116] For example, a normalized sum weight formula P H of the high frequency band can be introduced H The high frequency band deviation degree value, which can also be referred to as a weight, represents the severity of the deviation. The greater the high frequency band deviation degree value, the more serious the deviation. The determination method of the high frequency band deviation degree value is shown in the following formula:

[0117]

[0118] In the above formula, f n n = b+1, b+2, ..., m represent the signal frequency points in the high-frequency band, A S11IN (f n A represents the simulated return loss corresponding to the nth signal frequency point. S11TG (f n A represents the target return loss corresponding to the nth signal frequency point. S21IN (f n A represents the simulated insertion loss corresponding to the nth signal frequency point. S21TG (f n Let represent the target insertion loss corresponding to the nth signal frequency. In summary, it can be seen that the high-frequency deviation value can be determined based on the target return loss, simulated return loss, target insertion loss, and simulated insertion loss corresponding to the high-frequency signal frequencies (i.e., from the (b+1)th to the mth signal frequency).

[0119] Step 4074: Determine the adjustment sequence based on the low-frequency band deviation value and the high-frequency band deviation value, and adjust the initial circuit parameters based on the adjustment sequence to obtain the adjusted circuit parameters.

[0120] For example, since POC device parameters affect the low-frequency performance of the main circuit, and PCB layout parameters and PCB stack-up process parameters affect the high-frequency performance of the main circuit, if the deviation value in the low-frequency band is greater than the deviation value in the high-frequency band, the adjustment order can be POC device parameters, PCB layout parameters, and PCB stack-up process parameters in that order. The initial circuit parameters are then adjusted based on this adjustment order. In other words, if P… L >P H If the deviation in the low-frequency band is greater than that in the high-frequency band, then the POC device parameters should be optimized first, followed by the PCB layout parameters, and then the PCB stack-up process parameters. If the deviation in the low-frequency band is not greater than that in the high-frequency band, the adjustment order can be PCB layout parameters, PCB stack-up process parameters, and then POC device parameters. Based on this adjustment order, the initial circuit parameters should be adjusted. In other words, if P... L <P H This indicates that the deviation in the low-frequency band is smaller than that in the high-frequency band. First, optimize the PCB layout parameters, then optimize the PCB stack-up process parameters, and finally optimize the POC device parameters.

[0121] In summary, it can be seen that in this embodiment, the low-frequency band deviation value P can be calculated using the low-frequency band weighting formula. L The high-frequency band deviation value P is calculated using the high-frequency band weighting formula.H If the low-frequency band deviation degree value P L is greater than the high-frequency band deviation degree value P H , the POC device parameter optimization is performed first, and then the PCB layout parameter and PCB lamination process parameter optimization is performed. If the low-frequency band deviation degree value P L is less than the high-frequency band deviation degree value P H , the PCB layout parameter and PCB lamination process parameter optimization is performed first, and then the POC device parameter optimization is performed. Since the optimization results of each type of parameter have convergence, the optimization process of each type of parameter is only executed once. After the parameter optimization is completed, it is necessary to reconfirm whether the optimization results meet the design index through arbitration. If the design index is met, the parameter optimization process of the POC circuit is skipped, and the next type of parameter optimization is not executed. If the design index is not met, the next type of parameter optimization is executed. If the three types of parameter optimization are all executed, and the optimization results still do not meet the design index through arbitration, it indicates that the simulation results of the initial circuit parameters deviate too much from the design index, and the reliability of the initial circuit parameters is low, and the initial circuit parameters need to be reacquired.

[0122] In a possible implementation, the initial circuit parameters can be adjusted in the following manner:

[0123] If the low-frequency band deviation degree value P L is greater than the high-frequency band deviation degree value P H , the POC device parameter optimization is performed first, and then the PCB layout parameter and PCB lamination process parameter optimization is performed. If the low-frequency band deviation degree value P L is less than the high-frequency band deviation degree value P H , the PCB layout parameter and PCB lamination process parameter optimization is performed first, and then the POC device parameter optimization is performed. Since the optimization results of each type of parameter have convergence, the optimization process of each type of parameter is only executed once. After the parameter optimization is completed, it is necessary to reconfirm whether the optimization results meet the design index through arbitration. If the design index is met, the parameter optimization process of the POC circuit is skipped, and the next type of parameter optimization is not executed. If the design index is not met, the next type of parameter optimization is executed. If the three types of parameter optimization are all executed, and the optimization results still do not meet the design index through arbitration, it indicates that the simulation results of the initial circuit parameters deviate too much from the design index, and the reliability of the initial circuit parameters is low, and the initial circuit parameters need to be reacquired.

[0124] If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter do not satisfy the signal transmission quality condition, the PCB layout parameter is continuously optimized to obtain the PCB layout parameter after optimization. Then, it is judged whether the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter satisfy the signal transmission quality condition, for example, the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter are taken as initial circuit parameters, and steps 403-405 are executed to determine whether the signal transmission quality condition is satisfied. If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter satisfy the signal transmission quality condition, the adjustment process of the initial circuit parameter is ended, the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter are determined as the adjusted circuit parameter, and the target circuit parameter is determined based on the adjusted circuit parameter.

[0125] If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter do not satisfy the signal transmission quality condition, the PCB lamination process parameter is continuously optimized to obtain the PCB lamination process parameter after optimization. Then, it is judged whether the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization satisfy the signal transmission quality condition, for example, the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization are taken as initial circuit parameters, and steps 403-405 are executed to determine whether the signal transmission quality condition is satisfied. If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization satisfy the signal transmission quality condition, the adjustment process of the initial circuit parameter is ended, the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization are determined as the adjusted circuit parameter.

[0126] If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter do not satisfy the signal transmission quality condition, a new target model corresponding to the SERDES in the POC circuit is obtained (i.e., step 401 is re-executed), and / or a new initial circuit parameter corresponding to the POC circuit is obtained (i.e., step 402 is re-executed), on the basis of which, steps 403-407 can be repeated.

[0127] If the low-frequency band deviation degree value P L is not greater than the high-frequency band deviation degree value P HIf the POC device parameter, the optimized PCB layout parameter and the PCB lamination process parameter satisfy the signal transmission quality condition, the POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter can be determined as the adjusted circuit parameter. If the POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter do not satisfy the signal transmission quality condition, the POC device parameter is continuously optimized to obtain an optimized POC device parameter. If the optimized POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter satisfy the signal transmission quality condition, the optimized POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter can be determined as the adjusted circuit parameter. If the optimized POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter do not satisfy the signal transmission quality condition, a new target model corresponding to the SERDES in the POC circuit is obtained (i.e., step 401 is re-executed), and / or a new initial circuit parameter corresponding to the POC circuit is obtained (i.e., step 402 is re-executed), and on this basis, steps 403-407 can be repeated.

[0128] In the above embodiment, the POC device parameter can be optimized to obtain an optimized POC device parameter, and in the optimization process, the optimized variables can include but are not limited to: the inductance of the first inductor L1, the inductance of the second inductor L2, the inductance of the third inductor L3, the inductance of the fourth inductor L4, the resistance of the second resistor R2, the resistance of the third resistor R3, the resistance of the fourth resistor R4, and the sample space of the variable scanning (i.e., the inductance, resistance, etc. selected from the sample space) is the inductance of the actual commonly used magnetic beads, the inductance of the inductor, the capacitance of the parasitic capacitor, the resistance of the equivalent series resistance, and the resistance of the resistor. On this basis: the optimization target of the multi-dimensional device parameter (i.e., the target of optimizing the POC device parameter) is to find a relatively optimal parameter combination in the sample space, so that the simulation result satisfies the arbitration formula, that is, the optimized POC device parameter satisfies the signal transmission quality condition.

[0129] The optimization method of multi-dimensional device parameters is that single-dimensional parameter scanning or few-dimensional parameter group scanning of a channel is performed to find sensitive parameters or parameter groups, and then the optimal parameter combination in the DOE analysis is found through DOE (Design of Experiment) analysis of all sensitive parameters or parameter groups. All parameter values obtained by optimization are updated to the POC device parameters in the initial circuit parameters, and the optimized POC device parameters are obtained, which can also be called POC device parameter typical values.

[0130] In the above embodiment, the PCB layout parameters can be optimized to obtain optimized PCB layout parameters. In the optimization process, the optimization variables can include but are not limited to: coordinate and angle parameters of TVS1, coordinate and angle parameters of the first capacitor C1, coordinate and angle parameters of the second capacitor C2, coordinate and angle parameters of the first inductor L1, geometric size and coordinate parameters of the reference layer hollow region, and line width parameters of the main link. The sample space of variable scanning is a multi-dimensional array space composed of combinations of each parameter from 0.5 times the initial value to 2 times the initial value. On this basis: the optimization target of multi-dimensional layout parameters (i.e. the target of optimizing the PCB layout parameters) is to find a relatively optimal parameter combination in the sample space, so that the simulation result meets the arbitration formula, that is, the optimized PCB layout parameters meet the signal transmission quality condition.

[0131] The optimization method of multi-dimensional layout parameters is that single-dimensional parameter scanning of a channel is performed to find sensitive parameters, and then the optimal parameter combination in the DOE analysis is found through DOE analysis of all sensitive parameters. All parameter values obtained by optimization are updated to the PCB layout parameters in the initial circuit parameters, and the optimized PCB layout parameters are obtained, which can also be called PCB layout parameter typical values.

[0132] In the above embodiment, the PCB lamination process parameters can be optimized to obtain optimized PCB lamination process parameters. In the optimization process, the optimization variables can include but are not limited to the thickness parameters of each metal layer and dielectric layer of the PCB and the dielectric constant of each dielectric layer. The sample space for variable scanning can be a multidimensional array space composed of combinations of each parameter from 0.5 times the initial value to 2 times the initial value. On this basis, the optimization target of the multi-dimensional lamination parameters (i.e. the target of optimizing the PCB lamination process parameters) can be to find a relatively optimal parameter combination in the sample space, so that the simulation result meets the arbitration formula, i.e. the optimized PCB lamination process parameters meet the signal transmission quality conditions. The optimization method of multi-dimensional lamination parameters can be to find sensitive parameters through single-dimensional parameter scanning, and then find the optimal parameter combination in the DOE analysis through DOE analysis of all sensitive parameters. All parameter values obtained by optimization are updated to the PCB lamination process parameters in the initial circuit parameters, and the optimized PCB lamination process parameters are obtained. The optimized PCB lamination process parameters can also be referred to as the typical value of the PCB lamination process parameters.

[0133] In summary, based on steps 401-407, the initial circuit parameters or the adjusted circuit parameters can be output, and the target circuit parameters can be determined based on the initial circuit parameters or the adjusted circuit parameters. For example, based on the POC circuit parameter tolerance optimization process, the target circuit parameters are determined based on the initial circuit parameters or the adjusted circuit parameters. That is, the target circuit parameters are determined based on the initial circuit parameters, or the target circuit parameters are determined based on the adjusted circuit parameters. Based on the POC circuit parameter tolerance optimization process, the way of determining the target circuit parameters is the same, and the subsequent example of determining the target circuit parameters based on the adjusted circuit parameters is described.

[0134] Referring to Figure 6 FIG. 7 shows a schematic diagram of the POC circuit parameter tolerance optimization process, which includes the following steps:

[0135] Step 601, determine the initial parameter range based on the adjusted circuit parameters and the configured initial tolerance.

[0136] For example, assuming that the adjusted circuit parameters are X and the configured initial tolerance is 10%, the initial parameter range can be [X-X*10%, X+X*10%]. The adjusted circuit parameters can include POC device parameters, PCB layout parameters, and PCB lamination process parameters. If there is an initial tolerance corresponding to the POC device parameters, the initial parameter range of the POC device parameters can be determined. If there is an initial tolerance corresponding to the PCB layout parameters, the initial parameter range of the PCB layout parameters can be determined. If there is an initial tolerance corresponding to the PCB lamination process parameters, the initial parameter range of the PCB lamination process parameters can be determined.

[0137] For example, the POC circuit can have a device parameter tolerance (i.e., an initial tolerance corresponding to a POC device parameter) and a PCB manufacturing process tolerance (i.e., an initial tolerance corresponding to a PCB lamination process parameter), the device parameter tolerance is related to the design and process of the device, the device parameter tolerance is much smaller than the PCB manufacturing process tolerance, the device parameter tolerance is controlled by the device supplier, and in the embodiment, the initial tolerance in the subsequent embodiments can be the PCB manufacturing process tolerance, i.e., the optimization is performed for the PCB manufacturing process tolerance.

[0138] The initial tolerance can be understood as an error range of the circuit parameter, which is related to the PCB manufacturing process, and can be a pre-configured initial tolerance or a pre-imported initial tolerance, which is not limited. Among them, the PCB manufacturing process tolerance can be provided by the PCB manufacturing factory, including but not limited to the line width tolerance of the main link, the tolerance of each metal layer of the PCB, the thickness tolerance of the dielectric layer, and the dielectric constant tolerance of each dielectric layer.

[0139] Step 602, if the plurality of circuit parameters in the initial parameter range meet the signal transmission quality condition, the adjusted circuit parameter is determined as the target circuit parameter, and the initial tolerance is determined as the target tolerance.

[0140] For example, the initial parameter range can be sampled to obtain a plurality of circuit parameters, and the sampling method is not limited as long as a plurality of circuit parameters can be obtained, and the plurality of circuit parameters are located in the initial parameter range, for example, all circuit parameters P in the initial parameter range can be equally divided to obtain a plurality of circuit parameters. For each circuit parameter, the circuit parameter can be used as an initial circuit parameter, and steps 403-405 are returned to determine whether the circuit parameter meets the signal transmission quality condition.

[0141] If all the sampled circuit parameters meet the signal transmission quality condition, it means that all the circuit parameters in the initial tolerance range centered on the adjusted circuit parameter can pass the arbitration formula (i.e., all meet the signal transmission quality condition), therefore, the adjusted circuit parameter can be used as the target circuit parameter, the initial tolerance can be used as the target tolerance, and the target circuit parameter and the target tolerance can be output. On this basis, the POC circuit can be produced based on the target circuit parameter and the target tolerance, and the process is not limited.

[0142] Step 603, if any circuit parameter in the initial parameter range does not meet the signal transmission quality condition, it is determined whether there is a parameter field, the parameter field is located in the initial parameter range, the parameter field includes the adjusted circuit parameter, and a plurality of circuit parameters in the parameter field meet the signal transmission quality condition.

[0143] For example, after sampling the initial parameter range to obtain a plurality of circuit parameters, if any of the sampled circuit parameters does not satisfy the signal transmission quality condition, a parameter field satisfying the arbitration formula (i.e., satisfying the performance requirement) and the tolerance requirement is searched for in the multi-dimensional sample space near the adjusted circuit parameter. When searching for the parameter field, the searched parameter field needs to be located within the initial parameter range, and the parameter field includes the adjusted circuit parameter, and the plurality of circuit parameters in the parameter field all satisfy the signal transmission quality condition.

[0144] For example, a plurality of sample ranges can be constructed based on the adjusted circuit parameter and the initial parameter range. For example, when the initial parameter range is [X-X*10%, X+X*10%], the sample ranges can be [X-X*9%, X+X*9%], [X-X*8%, X+X*6%], [X-X*8%, X+X*4%], etc. The sample ranges are not limited in this regard, as long as the sample range includes the adjusted circuit parameter, and the sample range is located within the initial parameter range.

[0145] For each sample range, the sample range can be sampled to obtain a plurality of circuit parameters. The sampling method is not limited in this regard. For each circuit parameter, the circuit parameter can be taken as an initial circuit parameter, and steps 403-405 are returned to determine whether the circuit parameter satisfies the signal transmission quality condition. If all the sampled circuit parameters satisfy the signal transmission quality condition, the sample range is taken as a parameter field, i.e., the parameter field is searched for. If any of the sampled circuit parameters does not satisfy the signal transmission quality condition, the sample range is not taken as a parameter field, and the next sample range is analyzed to determine whether it is a parameter field.

[0146] As described above, the parameter field satisfying the arbitration formula and the tolerance requirement can be searched for in the multi-dimensional sample space near the adjusted circuit parameter, i.e., the parameter field is searched for or not. If there is no parameter field, step 604 is performed, and if there is a parameter field, step 605 is performed.

[0147] In step 604, if there is no parameter field, a new target model corresponding to the SERDES in the POC circuit is obtained, and / or a new initial circuit parameter corresponding to the POC circuit is obtained.

[0148] For example, if there is no parameter field satisfying the arbitration formula and the tolerance requirement, it means that the target circuit parameter meeting the performance requirement cannot be obtained. Therefore, a new target model corresponding to the SERDES in the POC circuit is obtained (i.e., step 401 is re-executed), and / or a new initial circuit parameter corresponding to the POC circuit is obtained (i.e., step 402 is re-executed). On this basis, steps 403-407 can be repeated.

[0149] Step 605, if the parameter field exists, determining the candidate tolerance based on the parameter field.

[0150] For example, the minimum value, the central value and the maximum value of the parameter field can be determined first, and then the candidate tolerance can be determined based on the minimum value, the central value and the maximum value of the parameter field. For example, the candidate tolerance of the parameter field [X-X*9%, X+X*9%] can be 9%, the candidate tolerance of [X-X*8%, X+X*6%] can be 7%, the candidate tolerance of [X-X*8%, X+X*4%] can be 6%, and so on.

[0151] Step 606, determining whether the candidate tolerance meets the design capability, i.e., whether the candidate tolerance can be matched with the design of the panel process, if yes, executing step 607, if no, executing step 608.

[0152] For example, when the initial tolerance of the PCB panel factory is 10%, it means that the panel process of the PCB panel factory has an error of 10%. Assuming that the candidate tolerance is 7%, it can be determined whether the panel process of the PCB panel factory can meet the error of 7%. If yes, it means that the candidate tolerance meets the design capability, i.e., the process tolerance of the PCB panel factory can be adjusted according to the candidate tolerance. If no, it means that the candidate tolerance does not meet the design capability, i.e., the process tolerance of the PCB panel factory cannot be adjusted according to the candidate tolerance.

[0153] Step 607, if the candidate tolerance meets the design capability, determining the middle parameter of the parameter field (i.e., the middle value of the parameter field) as the target circuit parameter, and determining the candidate tolerance as the target tolerance.

[0154] For example, since the multiple circuit parameters in the parameter field meet the signal transmission quality condition, and the process tolerance of the PCB panel factory can reach the candidate tolerance, the middle parameter of the parameter field can be determined as the target circuit parameter, the candidate tolerance can be determined as the target tolerance, and the target circuit parameter and the target tolerance can be output. On this basis, the POC circuit can be produced based on the target circuit parameter and the target tolerance.

[0155] Step 608, if the candidate tolerance does not meet the design capability, determining the failure rate corresponding to the candidate tolerance. If the failure rate meets the product quality requirement, the middle parameter of the parameter field is determined as the target circuit parameter, and the candidate tolerance is determined as the target tolerance. If the failure rate does not meet the product quality requirement, a new target model corresponding to the SERDES in the POC circuit is obtained, and / or a new initial circuit parameter corresponding to the POC circuit is obtained.

[0156] Exemplarily, if there is a reasonable parameter field, but the PCB manufacturer cannot update the PCB manufacturing process tolerance according to the new parameter field, that is, the candidate tolerance does not meet the design capability, failure analysis (that is, analyzing the failure rate) can be performed to evaluate the impact of the PCB manufacturing process tolerance on the main link performance. If the failure rate meets the product quality requirement, although the candidate tolerance does not meet the design capability, the intermediate parameter of the parameter field can be determined as the target circuit parameter, the candidate tolerance can be determined as the target tolerance, and the target circuit parameter and the target tolerance can be output. On this basis, the POC circuit can be produced based on the target circuit parameter and the target tolerance.

[0157] If the failure rate does not meet the product quality requirement, when the candidate tolerance does not meet the design capability, it means that the target circuit parameter meeting the performance requirement cannot be obtained, therefore, a new target model corresponding to the SERDES in the POC circuit is obtained (that is, step 401 is re-executed), and / or a new initial circuit parameter corresponding to the POC circuit is obtained (that is, step 402 is re-executed), on this basis, steps 403-407 are repeated.

[0158] Exemplarily, in the failure analysis process, the probability p that the actual PCB manufacturing parameter value of the POC circuit falls in the parameter field (that is, the parameter field meeting the performance requirement, that is, the parameter field in step 605) can be determined, and the probability p can be the failure rate corresponding to the candidate tolerance. The calculation formula of the probability p can be: x1x2...x t is each PCB manufacturing process parameter constituting the parameter field, (a L1 , a H1 ), (a L1 , a H2 ),..., (a Lt , a Ht is the variation range of each PCB manufacturing process parameter, is a multi-dimensional joint probability density function of each PCB manufacturing process parameter, which can be provided by the PCB manufacturer or obtained through probability statistical method according to historical data of the PCB manufacturer. Then, the confidence interval a of failure is determined, the confidence interval a can be comprehensively evaluated from simulation software, algorithm, quality and other aspects, and the acquisition method of the confidence interval a is not limited. Then, if p>1-a, it means that the failure rate meets the product quality requirement, the intermediate parameter of the parameter field is determined as the target circuit parameter, and the candidate tolerance is determined as the target tolerance. Otherwise, it means that the failure rate does not meet the product quality requirement.

[0159] Exemplarily, after the confirmation of each circuit parameter design value is completed, that is, the target circuit parameter is obtained, the design of the POC circuit is completed, and after the PCB is put into production, appropriate PCB production process inspection can be performed to ensure that the designed PCB can meet the subsequent PCB manufacturing and PCBA production requirements.

[0160] For example, there is always a deviation between the simulation result of the POC circuit and the actual test value, the design of the circuit parameters needs to combine the circuit simulation and the actual test, and the cycle needs to approach a better result. For the above process, the redundant array s 11red (f n ) and s 21red (f n ) can be adjusted.

[0161] As can be seen from the above technical solutions, in the embodiments of the present application, the circuit parameters of the POC circuit can be reasonably designed, the reliability of the circuit parameters is high, the efficiency of the circuit design is high, and the product failure rate is low. In the design and optimization process of the circuit parameters, the POC device parameters, the PCB layout parameters, and the PCB lamination process parameters can be comprehensively simulated and optimized, the simulation results (i.e., the return loss arbitration value and the insertion loss arbitration value) are determined by arbitration, and then the circuit parameters that meet the signal transmission quality conditions are obtained. The tolerance optimization of the circuit parameters is proposed, the actual production process and the circuit design are combined, and the reliability of the product is improved. The tolerance optimization refers to finding a parameter field that meets the tolerance range and satisfies the arbitration formula in the multi-dimensional sample space near the design value of the circuit parameters, so as to evaluate the influence of the circuit parameter tolerance on the circuit performance. The failure analysis method for the case that does not meet the tolerance is proposed, and through the failure analysis method, the product failure rate caused by the signal transmission failure due to the circuit tolerance problem can be evaluated, and the reliability of the product is improved.

[0162] For example, as shown in Figure 7 The POC circuit design method can include the following steps:

[0163] Step A11, after the design starts, the initial data is confirmed: the design performance requirement is confirmed, the POC device parameters are confirmed, the PCB layout parameters are confirmed, and the PCB lamination process parameters are confirmed.

[0164] Step A12, import the simulation data and create a simulation model.

[0165] Step A13, electromagnetically simulate the POC link (such as the main link) S11, S21.

[0166] Step A14, determine whether the arbitration formula is met.

[0167] If yes, step B11 is performed, and if no, step C11 is performed.

[0168] Step C11, calculate the weight formula PL and PH.

[0169] Step C12, determine whether PL is greater than PH, i.e., whether PL>PH.

[0170] If yes, then perform step D11, if no, then perform step E11.

[0171] Step D11, Electromagnetic optimization of POC device parameters.

[0172] Step D12, Check if arbitration formula is satisfied.

[0173] If yes, then perform step B11, if no, then perform step D13.

[0174] Step D13, Electromagnetic optimization of PCB layout parameters.

[0175] Step D14, Check if arbitration formula is satisfied.

[0176] If yes, then perform step B11, if no, then perform step D15.

[0177] Step D15, Electromagnetic optimization of PCB lamination process parameters.

[0178] Step D16, Check if arbitration formula is satisfied.

[0179] If yes, then perform step B11, if no, then return to step A11.

[0180] Step E11, Electromagnetic optimization of PCB layout parameters.

[0181] Step E12, Check if arbitration formula is satisfied.

[0182] If yes, then perform step B11, if no, then perform step E13.

[0183] Step E13, Electromagnetic optimization of PCB lamination process parameters.

[0184] Step E14, Check if arbitration formula is satisfied.

[0185] If yes, then perform step B11, if no, then perform step E15.

[0186] Step E15, Electromagnetic optimization of POC device parameters.

[0187] Step E16, Check if arbitration formula is satisfied.

[0188] If yes, then perform step B11, if no, then return to step A11.

[0189] Step B11, Import production process tolerances.

[0190] Step B12, Electromagnetic simulation of POC link S11, S21 over PCB process parameter tolerance range.

[0191] Step B13, judge whether the simulation results of all parameter values in the tolerance range satisfy the arbitration formula.

[0192] If yes, execute step F11. If no, execute step B14.

[0193] Step B14, find the parameter field that satisfies the performance requirement.

[0194] Step B15, judge whether the reasonable parameter field that satisfies the performance requirement can be found.

[0195] If yes, execute step B16, if no, execute step A11.

[0196] Step B16, judge whether the related tolerance range can be adjusted according to the optimized field.

[0197] If yes, execute step B17, if no, execute step B18.

[0198] Step B17, update the production process tolerance, return to step B12.

[0199] Step B18, failure analysis.

[0200] Step B19, judge whether the failure rate can satisfy the product quality requirement.

[0201] If yes, execute step F11, if no, execute step A11.

[0202] Step F11, PCB LAYOUT design confirmation, PCB production process detection.

[0203] Step F12, PCB board production, PCBA, thus, the design is completed.

[0204] Based on the same application concept as the above method, the embodiment of the present application proposes a POC circuit design device, the POC circuit includes a first port and a second port, the return loss represents the signal reflection ratio when the signal is transmitted from the first port to the second port, the smaller the return loss, the better the signal quality, the insertion loss represents the signal attenuation ratio when the signal is transmitted from the first port to the second port, the greater the insertion loss, the better the signal quality, see Figure 8 The device can include:

[0205] The acquisition module 81 is configured to acquire a target model corresponding to a SERDES in the POC circuit, and determine a target return loss and a target insertion loss at a signal frequency point corresponding to the target model; acquire initial circuit parameters corresponding to the POC circuit, create a simulation circuit corresponding to the POC circuit based on the initial circuit parameters, and scan the simulation circuit through the signal frequency point to obtain a simulation return loss and a simulation insertion loss; wherein the POC circuit includes a first port and a second port, the simulation return loss represents a signal reflection ratio when a signal is transmitted from the first port to the second port, and the simulation insertion loss represents a signal attenuation ratio when the signal is transmitted from the first port to the second port.

[0206] The determination module 82 is configured to determine a return loss arbitration value based on the target return loss and the simulation return loss, and determine an insertion loss arbitration value based on the target insertion loss and the simulation insertion loss; if it is determined that the initial circuit parameters meet a signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, then determine target circuit parameters based on the initial circuit parameters.

[0207] If it is determined that the initial circuit parameters do not meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, then adjust the initial circuit parameters to obtain adjusted circuit parameters, and determine the target circuit parameters based on the adjusted circuit parameters.

[0208] For example, the determination module 82 is configured to determine a return loss arbitration value based on the target return loss and the simulation return loss, and determine an insertion loss arbitration value based on the target insertion loss and the simulation insertion loss, specifically: determine a return loss arbitration value corresponding to the signal frequency point based on the target return loss, the simulation return loss, and a return loss redundancy value corresponding to the signal frequency point; wherein the return loss redundancy value is used to represent a deviation between a return loss simulation value and a return loss actual value; determine an insertion loss arbitration value corresponding to the signal frequency point based on the target insertion loss, the simulation insertion loss, and an insertion loss redundancy value corresponding to the signal frequency point; wherein the insertion loss redundancy value is used to represent a deviation between an insertion loss simulation value and an insertion loss actual value.

[0209] Exemplarily, the determining module 82 is specifically configured to: if the signal frequency points are a plurality of signal frequency points in the frequency band interval, and if any of the return loss arbitration values is greater than a first value, or any of the insertion loss arbitration values is less than a second value, then the determining module 82 is configured to determine that the initial circuit parameters do not meet the signal transmission quality condition; and if all of the return loss arbitration values are less than the first value, and all of the insertion loss arbitration values are greater than the second value, then the determining module 82 is configured to determine that the initial circuit parameters meet the signal transmission quality condition.

[0210] Exemplarily, the determining module 82 is specifically configured to: based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss, adjust the initial circuit parameters to obtain adjusted circuit parameters; and the initial circuit parameters include at least one of the following: a POC device parameter of the POC circuit, a PCB layout parameter of the PCB on which the POC circuit is located, and a PCB layering process parameter of the PCB.

[0211] Exemplarily, the determining module 82 is specifically configured to: if the signal frequency points are a plurality of signal frequency points in the frequency band interval, then the determining module 82 is configured to divide the plurality of signal frequency points into signal frequency points of a low frequency band and signal frequency points of a high frequency band; based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the low frequency band, determine a low frequency band deviation degree value; based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the high frequency band, determine a high frequency band deviation degree value; based on the low frequency band deviation degree value and the high frequency band deviation degree value, determine an adjustment order, and based on the adjustment order, adjust the initial circuit parameters to obtain adjusted circuit parameters.

[0212] For example, the determining module 82 is specifically configured to determine the target circuit parameter based on the adjusted circuit parameter as follows: determining an initial parameter range based on the adjusted circuit parameter and the configured initial tolerance; if multiple circuit parameters in the initial parameter range meet the signal transmission quality condition, determining the adjusted circuit parameter as the target circuit parameter; if any circuit parameter in the initial parameter range does not meet the signal transmission quality condition, determining whether a parameter field exists; the parameter field needs to be located in the initial parameter range, and the parameter field needs to include the adjusted circuit parameter and multiple circuit parameters in the parameter field meet the signal transmission quality condition; if the parameter field exists, determining a candidate tolerance based on the parameter field; if the candidate tolerance meets the design capability, determining a middle parameter of the parameter field as the target circuit parameter; if the candidate tolerance does not meet the design capability, determining a failure rate corresponding to the candidate tolerance; if the failure rate meets the product quality requirement, determining the middle parameter of the parameter field as the target circuit parameter; if the failure rate does not meet the product quality requirement, obtaining a new target model corresponding to the SERDES in the POC circuit, and / or obtaining new initial circuit parameters corresponding to the POC circuit; if the parameter field does not exist, obtaining a new target model corresponding to the SERDES in the POC circuit, and / or obtaining new initial circuit parameters corresponding to the POC circuit.

[0213] Based on the same application concept as the above method, an electronic device is provided in the embodiments of the present application, as shown in Figure 9 The electronic device includes a processor 91 and a machine readable storage medium 92, the machine readable storage medium 92 stores machine executable instructions that can be executed by the processor 91; the processor 91 is configured to execute the machine executable instructions to implement the POC circuit design method disclosed in the above examples of the present application.

[0214] Based on the same application concept as the above method, the embodiments of the present application further provide a machine readable storage medium, the machine readable storage medium stores a plurality of computer instructions, and the computer instructions can implement the POC circuit design method disclosed in the above examples of the present application when executed by a processor.

[0215] The machine readable storage medium can be any electronic, magnetic, optical, or other physical storage apparatus, and can contain or store information such as executable instructions, data, and the like. For example, the machine readable storage medium can be a RAM (Random Access Memory), a volatile memory, a non-volatile memory, a flash memory, a storage drive (such as a hard disk drive), a solid state disk, any type of storage disk (such as an optical disk, a DVD, etc.), or similar storage medium, or a combination thereof.

[0216] The systems, apparatuses, modules or units disclosed in the above embodiments can be implemented by computer entities or products with certain functions. A typical implementation device is a computer, and the specific form of the computer can be a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0217] For the convenience of description, the above apparatuses are described in various units by functions respectively. Of course, the functions of the units can be implemented in one or more software and / or hardware in the implementation of the present application.

[0218] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0219] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus produce a device implemented in accordance with the flowcharts and / or block diagrams. Figure 1 The function specified in one flow or multiple flows and / or blocks Figure 1 The device that implements the function specified in one block or multiple blocks.

[0220] Moreover, these computer program instructions can also be stored in a computer readable storage medium capable of directing the computer or other programmable data processing apparatus to work in a specific manner, so that the instructions stored in the computer readable storage medium produce a product including instruction devices, which implement the flowcharts and / or block diagrams. Figure 1 The function specified in one flow or multiple flows and / or blocks Figure 1 The device that implements the function specified in one block or multiple blocks.

[0221] These computer program instructions can also be loaded into computer or other programmable data processing devices, so that a series of operation steps are performed on the computer or other programmable data processing devices to generate computer-implemented processes, thus the instructions executed on the computer or other programmable data processing devices provide processes for implementing the functions specified in the flowcharts Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0222] The above only describes the embodiments of the present application and is not intended to limit the present application. The present application can have various modifications and changes for those skilled in the art. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the scope of claims of the present application.

Claims

1. A method of cable-powered POC circuit design, characterized by, The method comprises: acquiring a target model corresponding to a serializer / deserializer SERDES in the POC circuit, determining a target return loss and a target insertion loss at a signal frequency point corresponding to the target model; acquiring initial circuit parameters corresponding to the POC circuit, creating a simulation circuit corresponding to the POC circuit based on the initial circuit parameters, and scanning the simulation circuit through the signal frequency point to obtain a simulation return loss and a simulation insertion loss; wherein the POC circuit comprises a first port and a second port, the simulation return loss represents the signal reflection ratio when the signal is transmitted from the first port to the second port, and the simulation insertion loss represents the signal attenuation ratio when the signal is transmitted from the first port to the second port; determining a return loss arbitration value based on the target return loss and the simulation return loss, and determining an insertion loss arbitration value based on the target insertion loss and the simulation insertion loss; if it is determined that the initial circuit parameters meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, then determining target circuit parameters based on the initial circuit parameters; if it is determined that the initial circuit parameters do not meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, then adjusting the initial circuit parameters to obtain adjusted circuit parameters, and determining target circuit parameters based on the adjusted circuit parameters.

2. The method of claim 1, wherein: determining a return loss arbitration value based on the target return loss and the simulation return loss, and determining an insertion loss arbitration value based on the target insertion loss and the simulation insertion loss, comprises: determining a return loss arbitration value corresponding to the signal frequency point based on the target return loss, the simulation return loss, and a return loss redundancy value corresponding to the signal frequency point; wherein the return loss redundancy value is used to represent the deviation between the return loss simulation value and the return loss actual value; determining an insertion loss arbitration value corresponding to the signal frequency point based on the target insertion loss, the simulation insertion loss, and an insertion loss redundancy value corresponding to the signal frequency point; wherein the insertion loss redundancy value is used to represent the deviation between the insertion loss simulation value and the insertion loss actual value.

3. The method of claim 2, wherein: determining whether the initial circuit parameters meet the signal transmission quality condition or do not meet the signal transmission quality condition based on the return loss arbitration value and the insertion loss arbitration value, comprises: if the signal frequency point is a plurality of signal frequency points in a frequency band interval, based on the return loss arbitration value and the insertion loss arbitration value corresponding to each signal frequency point, if any return loss arbitration value is greater than a first value, or any insertion loss arbitration value is less than a second value, then it is determined that the initial circuit parameters do not meet the signal transmission quality condition; if all return loss arbitration values are less than the first value and all insertion loss arbitration values are greater than the second value, then it is determined that the initial circuit parameters meet the signal transmission quality condition.

4. The method of claim 1, wherein: The adjusting the initial circuit parameters to obtain adjusted circuit parameters comprises: adjusting the initial circuit parameters based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss to obtain adjusted circuit parameters; wherein the initial circuit parameters comprise at least one of the following: a POC device parameter of the POC circuit, a PCB layout parameter of a PCB board on which the POC circuit is located, and a PCB lamination process parameter of the PCB board.

5. The method of claim 4, wherein, The adjusting the initial circuit parameters based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss to obtain adjusted circuit parameters comprises: if the signal frequency points are multiple signal frequency points in the frequency band interval, the multiple signal frequency points are divided into signal frequency points of a low frequency band and signal frequency points of a high frequency band; determining a low frequency band deviation degree value based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the low frequency band; determining a high frequency band deviation degree value based on the target return loss, the simulation return loss, the target insertion loss and the simulation insertion loss corresponding to the signal frequency points of the high frequency band; determining an adjustment order based on the low frequency band deviation degree value and the high frequency band deviation degree value, and adjusting the initial circuit parameters based on the adjustment order to obtain adjusted circuit parameters.

6. The method of claim 5, wherein, The determining an adjustment order based on the low frequency band deviation degree value and the high frequency band deviation degree value, and adjusting the initial circuit parameters based on the adjustment order to obtain adjusted circuit parameters comprises: if the low frequency band deviation degree value is greater than the high frequency band deviation degree value, optimizing a POC device parameter to obtain an optimized POC device parameter; if the optimized POC device parameter, a PCB layout parameter and a PCB lamination process parameter satisfy a signal transmission quality condition, the optimized POC device parameter, the PCB layout parameter and the PCB lamination process parameter are determined as the adjusted circuit parameters; if the optimized POC device parameter, the PCB layout parameter and the PCB lamination process parameter do not satisfy the signal transmission quality condition, optimizing the PCB layout parameter to obtain an optimized PCB layout parameter; if the optimized POC device parameter, the optimized PCB layout parameter and the PCB lamination process parameter satisfy the signal transmission quality condition, the optimized POC device parameter, the optimized PCB layout parameter and the PCB lamination process parameter are determined as the adjusted circuit parameters; if the optimized POC device parameter, the optimized PCB layout parameter and the PCB lamination process parameter do not satisfy the signal transmission quality condition, optimizing the PCB lamination process parameter to obtain an optimized PCB lamination process parameter; if the optimized POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter satisfy the signal transmission quality condition, the optimized POC device parameter, the optimized PCB layout parameter and the optimized PCB lamination process parameter are determined as the adjusted circuit parameters; If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization do not satisfy the signal transmission quality condition, a new target model corresponding to the SERDES in the POC circuit is acquired, and / or a new initial circuit parameter corresponding to the POC circuit is acquired.

7. The method of claim 5, wherein, The adjustment sequence is determined based on the low-frequency band deviation degree value and the high-frequency band deviation degree value, and the initial circuit parameter is adjusted based on the adjustment sequence to obtain an adjusted circuit parameter. If the low-frequency band deviation degree value is not greater than the high-frequency band deviation degree value, the PCB layout parameter is optimized to obtain a PCB layout parameter after optimization; if the POC device parameter, the PCB layout parameter after optimization and the PCB lamination process parameter satisfy the signal transmission quality condition, the POC device parameter, the PCB layout parameter after optimization and the PCB lamination process parameter are determined as the adjusted circuit parameter. If the POC device parameter, the PCB layout parameter after optimization and the PCB lamination process parameter do not satisfy the signal transmission quality condition, the PCB lamination process parameter is optimized to obtain a PCB lamination process parameter after optimization; if the POC device parameter, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization satisfy the signal transmission quality condition, the POC device parameter, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization are determined as the adjusted circuit parameter. If the POC device parameter, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization do not satisfy the signal transmission quality condition, the POC device parameter is optimized to obtain a POC device parameter after optimization; if the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization satisfy the signal transmission quality condition, the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization are determined as the adjusted circuit parameter. If the POC device parameter after optimization, the PCB layout parameter after optimization and the PCB lamination process parameter after optimization do not satisfy the signal transmission quality condition, a new target model corresponding to the SERDES in the POC circuit is acquired, and / or a new initial circuit parameter corresponding to the POC circuit is acquired.

8. The method of claim 1, wherein the target circuit parameter is determined based on the adjusted circuit parameter, comprising: an initial parameter range is determined based on the adjusted circuit parameter and a configured initial tolerance; if a plurality of circuit parameters in the initial parameter range satisfy the signal transmission quality condition, the adjusted circuit parameter is determined as the target circuit parameter; if any circuit parameter in the initial parameter range does not satisfy the signal transmission quality condition, whether a parameter field exists is determined; the parameter field is located in the initial parameter range, and the parameter field includes the adjusted circuit parameter and a plurality of circuit parameters in the parameter field satisfy the signal transmission quality condition; and if the parameter field exists, the parameter field is determined as the target circuit parameter. if the parameter field exists, determining a candidate tolerance based on the parameter field; if the candidate tolerance satisfies the design capability, determining the intermediate parameter of the parameter field as the target circuit parameter; if the candidate tolerance does not satisfy the design capability, determining a failure rate corresponding to the candidate tolerance; if the failure rate satisfies the product quality requirement, determining the intermediate parameter of the parameter field as the target circuit parameter; if the failure rate does not satisfy the product quality requirement, obtaining a new target model corresponding to the SERDES in the POC circuit, and / or obtaining new initial circuit parameters corresponding to the POC circuit; if the parameter field does not exist, obtaining a new target model corresponding to the SERDES in the POC circuit, and / or obtaining new initial circuit parameters corresponding to the POC circuit.

9. The method of any one of claims 1-8, wherein the POC circuit comprises an AC branch, a main link, and a DC branch, the AC branch comprises a SERDES, and the main link comprises a board end connector (BNC); the first port is located proximate to a pin of the SERDES, and the second port is located proximate to a pin of the BNC.

10. The method of claim 9, wherein the AC branch further comprises a transient voltage suppression (TVS) diode, a first capacitor, and a second capacitor, the main link further comprises a first resistor, and the DC branch comprises a first inductor, a third capacitor, and K low-pass filter circuits, K being a positive integer, each low-pass filter circuit comprising a resistor and an inductor arranged in parallel; wherein a first end of the TVS is connected to a first end of the SERDES, a second end of the TVS is connected to a ground end, the first end of the SERDES is connected to a first end of the first capacitor, a second end of the SERDES is connected to a first end of the second capacitor, a second end of the first capacitor is connected to a first end of the first inductor, the second end of the first capacitor is connected to a first end of the BNC, a second end of the second capacitor is connected to a first end of the first resistor, a second end of the first resistor is connected to the ground end, a second end of the BNC is connected to the ground end, a second end of the first inductor is connected to the low-pass filter circuit, a first end of the third capacitor is connected to the low-pass filter circuit, and a second end of the third capacitor is connected to the ground end. The POC circuit is applied to a serializer circuit end of a camera, or the POC circuit is applied to a deserializer circuit end of the camera; if the POC circuit is applied to the serializer circuit end of the camera, the POC circuit is configured to serialize a digital video port (DVP) signal or a mobile industry processor interface (MIPI) signal transmitted by a sensor of the camera into a low voltage differential signaling (LVDS) signal; if the POC circuit is applied to the deserializer circuit end of the camera, the POC circuit is configured to deserialize an LVDS signal transmitted by a coaxial line of the camera into a DVP signal or a MIPI signal. comprising:

11. The method according to any one of claims 1 to 8, characterized in that, a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor.

12. An electronic device, comprising: ​ ​ The processor is configured to execute machine executable instructions to implement the method of any of claims 1-11. The processor is configured to execute machine executable instructions to implement the method of any of claims 1-11.

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