An 808nm semiconductor laser device with an oxidation-limited structure and a method for preparing the same

Abstract

The present invention relates to an 808nm semiconductor laser device with an oxidation confinement structure and a preparation method thereof, and belongs to the field of optoelectronic technology. The device comprises, from bottom to top, an N-type ohmic contact electrode, a substrate, a buffer layer, a lower confinement layer, a lower waveguide layer, a quantum well, an upper waveguide layer, an upper confinement layer, an Al x6 Ga 1‑x6 As high Al composition layer and ohmic contact layer, Al x6 Ga 1‑x6 An oxide insulating confinement layer is arranged between the As high Al component layer and the ohmic contact layer, and a P-type ohmic contact electrode is arranged on the upper side of the oxide insulating confinement layer. The present invention adopts an extremely double asymmetric structure design of a thin P confinement layer, and adds a high Al component layer between the P confinement layer and the cap layer to compensate for the fundamental mode field leakage that may be caused by the extremely thin confinement layer, thereby compressing the light field, reducing losses, and improving output power and conversion efficiency.

Description

Technical Field

[0001] The invention relates to an 808nm semiconductor laser device with an oxidation restriction structure and a preparation method thereof, belonging to the technical field of optoelectronics. Background Art

[0002] GaAs-based 808nm high-power laser diodes (LDs) are widely used in the industrial light sources and material processing fields of fiber lasers and solid-state lasers due to their high power, high efficiency and long life. They are also widely used in radar communications, laser storage and laser medical beauty, and have attracted great attention from researchers at home and abroad. Power conversion efficiency (PCE) is one of the most important indicators of semiconductor lasers. Semiconductor lasers with high conversion efficiency generate less waste heat and have high energy utilization, which can greatly extend the working life of the device and improve reliability. In order to achieve high power and high efficiency in LDs, epitaxial structures with low optical loss, low series resistance and low thermal resistance are required. Previous studies have shown that at the same concentration, the optical loss caused by free holes in laser diodes is about three times that of free electrons. In addition, the hole mobility is about one order of magnitude lower than that of electrons. Therefore, in the traditional asymmetric large optical cavity epitaxial design, the p-type epitaxial layer causes 46% of the optical loss and 91% of the series resistance.

[0003] The document Semiconductor Science and Technology, Vol 29, 2014, Pg: 045010M1-M6 points out that the use of extreme dual asymmetric (EDAS) epitaxial design can reduce the p-side waveguide thickness and light field distribution, thereby reducing light loss, series resistance, voltage-driven leakage current, and improving the power saturation effect. However, the thinner the p-waveguide, the lower the fundamental mode confinement factor Γ0, which increases the LD threshold current. In an extremely thin p-waveguide structure, the high-order mode confinement factor will be greater than the fundamental mode confinement factor, so that the high-order mode is preferentially lased. In order to achieve a thin p-side epitaxial structure, the document The International Society for Optical Engineering, Vol 3628, 1999, Pg: 38-45 believes that the thinning of the p-confinement layer has little effect on the confinement factor of the main mode, and proposes to reduce the thickness of the p-confinement layer in the EDAS design, which not only reduces the series resistance and light loss of the LD, but also reduces the thermal resistance, thereby enhancing the heat dissipation of the LD. However, excessive thinning of the p-confinement layer can cause the fundamental mode field to leak into the highly doped contact layer, resulting in additional losses. The literature Optics and Laser Technology, Vol 172, 2024, Pg: 110546M1-M9 points out that in AlxGa1-xAs materials, the refractive index decreases with the increase of Al content, and adding a high Al (x>0.8) layer can compensate for the poor confinement of the confinement layer on the light field.

[0004] Nowadays, the demand for 808nm LD lasers in the fields of science and technology, production, etc. is increasing, which not only has indicators for power and efficiency, but also puts forward new requirements for simplifying manufacturing and reducing material and time costs. For this reason, the present invention is proposed. Summary of the invention

[0005] In view of the shortcomings of the prior art, the present invention provides an 808nm semiconductor laser device with an oxidation confinement structure, which adopts an extreme double asymmetric structure design of a thin P confinement layer, and adds a high Al component layer between the P confinement layer and the cap layer to compensate for the fundamental mode field leakage that may be caused by the extremely thin confinement layer, thereby compressing the light field, reducing losses, and improving output power and conversion efficiency.

[0006] The high Al component layer has the characteristic of being easily oxidized and can be oxidized into insulating oxide to achieve lateral current limitation. There is no need for secondary growth of current blocking layer materials such as SiO2. In addition, only one step of photolithography is required, and the oxidation process mainly uses water vapor and nitrogen, which reduces the production cost of LD to a certain extent.

[0007] The present invention also provides a method for preparing the 808nm semiconductor laser device with the oxidation restriction structure.

[0008] The technical solution of the present invention is as follows:

[0009] An 808nm semiconductor laser device with an oxidation confinement structure, which comprises, from bottom to top, an N-type ohmic contact electrode, a substrate, a buffer layer, a lower confinement layer, a lower waveguide layer, a quantum well, an upper waveguide layer, an upper confinement layer, an Al x6 Ga 1-x6 As high Al composition layer and ohmic contact layer, Al x6 Ga 1-x6 An oxide insulating restriction layer is arranged between the As high Al composition layer and the ohmic contact layer, and a P-type ohmic contact electrode is arranged on the upper side of the oxide insulating restriction layer.

[0010] According to the preferred embodiment of the present invention, the substrate is a GaAs substrate, the substrate has a substrate bias angle of 15°, the buffer layer is a GaAs buffer layer, and the lower limiting layer is (Al x1 Ga 1-x1 ) y1 In 1-y1 P lower confinement layer, lower waveguide layer is Ga x2 In 1-x2 The waveguide layer under P, the quantum well is Al x3 Ga 1-x3 As quantum well, the upper waveguide layer is Ga x4 In 1-x4 P waveguide layer, the upper confinement layer is (Al x5 Ga 1-x5 ) y2 In 1-y2 The upper confinement layer is P, and the ohmic contact layer is GaAs ohmic contact layer.

[0011] According to the preferred embodiment of the present invention, Al x6 Ga 1-x6 The thickness of the As high Al component layer is 0.3-0.6um, the doping source is CBr4, and the doping concentration is 2E17-1E18 atoms / cm 3 , 0.6≤x6≤0.9, compensating for the poor confinement of the light field by the upper confinement layer.

[0012] According to the present invention, further preferably, Al x6 Ga 1-x6 The thickness of the As high Al component layer is 0.3um, x6=0.8, and the doping concentration is 7E17 atoms / cm 3 .

[0013] According to the preferred embodiment of the present invention, (Al x1 Ga 1-x1 ) y1 In 1-y1The thickness of the P lower limiting layer is 0.5-1.5um, 0.1≤x1≤0.3, 0.4≤y1≤0.6, the doping source is Si2H6, and the doping concentration is 2E17-1E18 atoms / cm 3 ;

[0014] (Al x5 Ga 1-x5 ) y2 In 1-y2 The thickness of the P upper limiting layer is 0.1-0.5um, the doping source is Cp2Mg, and the doping concentration is 2E17-1E18 atoms / cm 3 , 0.3≤x5≤0.7, 0.4≤y2≤0.6,

[0015] The Al component of the upper confinement layer is greater than that of the lower confinement layer, and the compressed light field is offset to the N side, reducing absorption loss and improving photoelectric conversion efficiency. At the same time, the thickness of the upper confinement layer is extremely thin, which reduces the series resistance and light loss of the LD, and reduces the thermal resistance, improving the photoelectric conversion efficiency.

[0016] According to the present invention, further preferably, (Al x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P lower confinement layer is 1.1 um, x1=0.2, y1=0.5, and the doping concentration is 4E17 atoms / cm 3 ;

[0017] (Al x5 Ga 1-x5 ) y2 In 1-y2 The thickness of the P upper confinement layer is 0.2um, x5=0.4, y2=0.5, and the doping concentration is 5E17 atoms / cm 3 .

[0018] According to the preferred embodiment of the present invention, the thickness of the GaAs buffer layer is 100-300 nm, the doping source is Si2H6, and the doping concentration is 1E18-5E18 atoms / cm 3 ;

[0019] Ga x2 In 1-x2 The thickness of the waveguide layer under P is 0.4-0.7um, the doping source is Si2H6, and the doping concentration is 4E16-1E17 atoms / cm 3 , 0.3≤x2≤0.5;

[0020] Al x3 Ga 1-x3 As quantum well thickness is 5-10nm, unintentional doping, 0.1≤x3≤0.4;

[0021] Ga x4 In 1-x4 The thickness of the waveguide layer on P is 0.1-0.4um, 0.3≤x4≤0.5;

[0022] The thickness of the GaAs ohmic contact layer is 100-300nm, the doping source is CBr4, and the doping concentration is 9E18-5E19 atoms / cm 3 .

[0023] According to the present invention, the GaAs buffer layer has a thickness of 200 nm and a doping concentration of 2E18 atoms / cm 3 ;

[0024] Ga x2 In 1-x2 The thickness of the waveguide layer under P is 0.6um, x2=0.5, and the doping concentration is 6E16 atoms / cm 3 ;

[0025] Al x3 Ga 1-x3 The thickness of the As quantum well is 6 nm, x3 = 0.2;

[0026] Ga x4 In 1-x4 The thickness of the waveguide layer on P is 0.35um, x4=0.5;

[0027] The GaAs ohmic contact layer thickness is 300nm and the doping concentration is 4E19 atoms / cm 3 ;

[0028] The thickness of the oxide insulating confinement layer is 230 nm.

[0029] The method for preparing the 808nm semiconductor laser device with the above oxidation confinement structure comprises the following steps:

[0030] (1) Place the GaAs substrate in the growth chamber of the MOCVD equipment, in a H2 environment, raise the temperature to 710-730°C, bake for 20-40 minutes, introduce AsH3, perform high temperature heat treatment on the GaAs substrate, and remove water and oxygen on the substrate surface;

[0031] (2) controlling the temperature to slowly drop to 660±10°C at a cooling rate of less than 30°C / min, introducing TMGa and AsH3, and growing a GaAs buffer layer on a GaAs substrate;

[0032] (3) The temperature is maintained at 660±10°C, and TMAl, TMIn, TMGa and PH3 are introduced to grow (Al) on the GaAs buffer layer described in step 2. x1 Ga 1-x1 ) y1 In1-y1 P lower limiting layer;

[0033] (4) The temperature is maintained at 660±10°C. After step (3), TMGa, TMIn and PH3 are introduced to grow Ga x2 In 1-x2 P lower waveguide layer;

[0034] (5) The temperature is maintained at 660±10°C. After the growth of step (4) is completed, TMGa, TMAl and AsH3 are introduced to continue growing Al x3 Ga 1-x3 As quantum well;

[0035] (6) The temperature is maintained at 660±10°C. After step (5), TMGa, TMIn and PH3 are introduced to grow Ga x4 In 1-x4 P upper waveguide layer;

[0036] (7) The temperature of the reaction chamber is maintained at 660±10°C, and TMAl, TMGa, TMIn and PH3 are introduced to grow (Al) on the product of step (6). x5 Ga 1-x5 ) y2 In 1-y2 P upper restriction layer;

[0037] (8) Control the temperature of the reaction chamber to rise to 700±10°C, and the heating rate shall not exceed 20°C / min. Then, TMAl, TMGa, and AsH3 are introduced to grow Al on the surface of step 7. x6 Ga 1-x6 As high Al composition layer;

[0038] (9) Control the temperature of the reaction chamber to drop to 540-560°C, introduce TMGa and AsH3, and x6 Ga 1-x6 A GaAs ohmic contact layer is grown on the As high Al composition layer;

[0039] (10) A step is made on the GaAs ohmic contact layer on the surface of the wafer produced in step (9) by photolithography and etching, and the outer ohmic contact layer and 20% to 50% of the Al x6 Ga 1-x6 As high Al composition layer;

[0040] (11) Place the etched wafer in a sintering furnace, control the temperature to 400-450°C, pass N2 through a bubbling bottle filled with water, and control the temperature of the bubbling bottle to 80-95°C. x6 Ga 1-x6The As high Al component layer is oxidized, and the oxidation time is controlled to 15-30 minutes to form an oxide insulating limiting layer and a current limiting structure;

[0041] (12) evaporating metal on the p-side of the wafer to form a p-type ohmic contact electrode;

[0042] (13) The substrate is thinned to 130 μm–180 μm, and the n-side of the wafer is metallized to form an N-type ohmic contact electrode.

[0043] According to the preferred embodiment of the present invention, in step (1), the high temperature heat treatment temperature is 720° C. and the baking time is 30 minutes;

[0044] In steps (2)-(7), the reaction temperature is 660°C;

[0045] In step (8), the reaction temperature is 700°C;

[0046] In step (9), the reaction temperature is 550°C;

[0047] In step (10), Al x6 Ga 1-x6 The etching ratio of As high Al component layer is 40%;

[0048] In step (11), the temperature is 420° C., the temperature of the bubbling bottle is 90° C., the oxidation time is 25 minutes, the maximum lateral oxidation depth is 700 nm, and the downward oxidation depth is 130 nm.

[0049] The beneficial effects of the present invention are:

[0050] 1. The present invention adopts an EDAS structure design with an extremely thin P limiting layer. On the one hand, it compresses the light field to shift to the N side, reduces absorption loss, and increases power. On the other hand, the extremely thin P limiting layer reduces the series resistance, optical loss, and thermal resistance of the LD, thereby enhancing the heat dissipation of the LD and further improving the photoelectric conversion efficiency.

[0051] 2. The present invention inserts a high Al component layer between the limiting layer and the cap boundary to limit light field leakage and improve light power density; oxidation of the high Al component material achieves current limitation, making LD product manufacturing simpler, more cost-effective, and more suitable for commercial mass production. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 It is a structural schematic diagram of the present invention.

[0053] Figure 2 It is a preparation process flow chart of the present invention.

[0054] Figure 3 It is a schematic diagram of the structure of a conventional structural device.

[0055] Figure 4 1 is the IV curve of the present invention and the conventional structure under the same test conditions. In the figure, the ordinate represents the operating voltage, the abscissa represents the operating current, and the slope represents the series resistance.

[0056] Among them, 1 is an N-type ohmic contact electrode, 2 is a GaAs substrate, 3 is a GaAs buffer layer, 4 is (Al x1 Ga 1-x1 ) y1 In 1-y1 P lower confinement layer, 5 is Ga x2 In 1-x2 P is the lower waveguide layer, 6 is Al x3 Ga 1-x3 As quantum well, 7 is Ga x4 In 1-x4 The waveguide layer on P is (Al x5 Ga 1-x5 ) y2 In 1-y2 P is the upper limiting layer, 9 is Al x6 Ga 1-x6 As is a high Al composition layer, 10 is an oxide insulating limiting layer, 11 is a P-type ohmic contact electrode, and 12 is a GaAs ohmic contact layer. DETAILED DESCRIPTION

[0057] The present invention will be further described below by way of embodiments in conjunction with the accompanying drawings, but is not limited thereto.

[0058] Embodiment 1:

[0059] like Figure 1-2 As shown, this embodiment provides an 808nm semiconductor laser device with an oxidation confinement structure, which includes, from bottom to top, an N-type ohmic contact electrode 1, a GaAs substrate 2, a GaAs buffer layer 3, (Al x1 Ga 1-x1 ) y1 In 1-y1 P lower confinement layer 4, Ga x2 In 1-x2 P lower waveguide layer 5, Al x3 Ga 1-x3 As quantum well 6, Ga x4 In 1-x4 P waveguide layer 7, (Al x5 Ga 1-x5 ) y2 In 1-y2 P upper confinement layer 8, Al x6 Ga 1-x6 As high Al composition layer 9 and GaAs ohmic contact layer 12, Al x6 Ga1-x6 An oxide insulating restriction layer 10 is disposed between the As high Al composition layer 9 and the ohmic contact layer 12 , and a P-type ohmic contact electrode 11 is disposed on the upper side of the oxide insulating restriction layer 10 .

[0060] Al x6 Ga 1-x6 The thickness of the As high Al component layer is 0.3um, x6=0.8, the doping source is CBr4, and the doping concentration is 7E17 atoms / cm 3 ;

[0061] (Al x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P lower limiting layer is 1.1um, x1=0.2, y1=0.5, the doping source is Si2H6, and the doping concentration is 4E17 atoms / cm 3 ;

[0062] (Al x5 Ga 1-x5 ) y2 In 1-y2 The thickness of the P upper limiting layer is 0.2um, x5=0.4, y2=0.5, the doping source is Cp2Mg, and the doping concentration is 5E17 atoms / cm 3 .

[0063] The GaAs buffer layer is 200 nm thick, and the doping source is Si2H6 with a doping concentration of 2E18 atoms / cm 3 ;

[0064] Ga x2 In 1-x2 The thickness of the waveguide layer under P is 0.6um, x2=0.5, the doping source is Si2H6, and the doping concentration is 6E16 atoms / cm 3 ;

[0065] Al x3 Ga 1-x3 The As quantum well thickness is 6 nm, x3 = 0.2, and it is not intentionally doped;

[0066] Ga x4 In 1-x4 The thickness of the waveguide layer on P is 0.35um, x4=0.5;

[0067] The thickness of the GaAs ohmic contact layer is 300nm, the doping source is CBr4, and the doping concentration is 4E19 atoms / cm 3 ;

[0068] The thickness of the oxide insulating confinement layer is 230 nm.

[0069] The method for preparing the 808nm semiconductor laser device with the above oxidation confinement structure comprises the following steps:

[0070] (1) Place the GaAs substrate in the growth chamber of the MOCVD equipment, in a H2 environment, heat it to 720°C, bake it for 30 minutes, and introduce AsH3 to perform high-temperature heat treatment on the GaAs substrate to remove water and oxygen on the substrate surface;

[0071] (2) controlling the temperature to slowly drop to 660°C at a cooling rate of less than 30°C / min, introducing TMGa and AsH3, and growing a GaAs buffer layer on a GaAs substrate;

[0072] (3) The temperature is maintained at 660°C, and TMAl, TMIn, TMGa and PH3 are introduced to grow (Al) on the GaAs buffer layer described in step 2. x1 Ga 1-x1 ) y1 In 1-y1 P lower limiting layer;

[0073] (4) The temperature is maintained at 660°C. After step (3), TMGa, TMIn and PH3 are introduced to grow Ga x2 In 1-x2 P lower waveguide layer;

[0074] (5) The temperature is maintained at 660°C. After the growth of step (4) is completed, TMGa, TMAl and AsH3 are introduced to continue growing Al x3 Ga 1-x3 As quantum well;

[0075] (6) The temperature is maintained at 660°C. After step (5), TMGa, TMIn and PH3 are introduced to grow Ga x4 In 1-x4 P upper waveguide layer;

[0076] (7) The temperature of the reaction chamber is maintained at 660°C, and TMAl, TMGa, TMIn and PH3 are introduced to grow (Al) on the product of step (6). x5 Ga 1-x5 ) y2 In 1-y2 P upper restriction layer;

[0077] (8) Control the temperature of the reaction chamber to rise to 700°C, and the heating rate shall not exceed 20°C / min. Then, TMAl, TMGa, and AsH3 are introduced to grow Al on the surface of step 7. x6 Ga 1-x6 As high Al composition layer;

[0078] (9) Control the temperature of the reaction chamber to drop to 550°C, introduce TMGa and AsH3, and x6 Ga 1-x6 A GaAs ohmic contact layer is grown on the As high Al composition layer;

[0079] (10) A step is made on the GaAs ohmic contact layer on the surface of the wafer produced in step (9) by photolithography and etching, and the outer ohmic contact layer and 40% Al x6 Ga 1-x6 As high Al composition layer;

[0080] (11) Place the etched wafer in a sintering furnace, control the temperature to 400-450°C, pass N2 through a bubbling bottle filled with water, and control the temperature of the bubbling bottle to 90°C. x6 Ga 1-x6 The As high Al component layer is oxidized, and the oxidation time is controlled to 25 minutes, the maximum lateral oxidation depth is 700nm, and the downward oxidation depth is 130nm, forming an oxide insulating limiting layer and a current limiting structure at the same time;

[0081] (12) evaporating metal on the p-side of the wafer to form a p-type ohmic contact electrode;

[0082] (13) The substrate is thinned to 130 μm–180 μm, and the n-side of the wafer is metallized to form an N-type ohmic contact electrode.

[0083] Comparative Example:

[0084] The comparative example is an existing conventional structure device, including an N-type ohmic contact electrode, a substrate, a buffer layer, a lower confinement layer, a lower waveguide layer, a quantum well, an upper waveguide layer, an upper confinement layer and an ohmic contact layer arranged in sequence from bottom to top. The electrical parameters of the comparative example and Example 1 are compared under the same process. The electrical parameter comparison table is shown in Table 1. Example 1 has a low threshold current and a high slope efficiency. At the same current, the output power is greater than that of the conventional structure device, indicating that the design of Example 1 can improve the photoelectric conversion efficiency.

[0085] Table 1: Comparison of electrical parameters between comparative example and embodiment 1 under the same process

[0086]

[0087] Depend on Figure 4 It can be seen that Example 1 can reduce losses and improve photoelectric conversion efficiency. The difference in series resistance lies in the thickness of the P-side epitaxial layer. Figure 4 The design structure in is the structure of Example 1.

[0088] The above descriptions are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing an 808nm semiconductor laser device with an oxidation confinement structure, characterized in that: The device includes N-type ohmic contact electrode, GaAs substrate, GaAs buffer layer, (Al x1 Ga 1-x1 ) y1 In 1-y1 P lower confinement layer, Ga x2 In 1-x2 P waveguide layer, Al x3 Ga 1-x3 As quantum well, Ga x4 In 1-x4 P waveguide layer, (Al x5 Ga 1-x5 ) y2 In 1-y2 P upper confinement layer, Al x6 Ga 1-x6 As high Al composition layer and GaAs ohmic contact layer, Al x6 Ga 1-x6 An oxide insulating restriction layer is provided between the As high Al composition layer and the GaAs ohmic contact layer, and a P-type ohmic contact electrode is provided on the upper side of the oxide insulating restriction layer; The method for preparing the 808nm semiconductor laser device with the above oxidation confinement structure comprises the following steps: (1) Place the GaAs substrate in the growth chamber of the MOCVD equipment, in a H2 environment, raise the temperature to 710-730°C, bake for 20-40 minutes, introduce AsH3, perform high-temperature heat treatment on the GaAs substrate, and remove water and oxygen on the substrate surface; (2) Control the temperature to slowly drop to 660±10℃, with a cooling rate lower than 30℃ / min, introduce TMGa and AsH3, and grow a GaAs buffer layer on the GaAs substrate; (3) The temperature is maintained at 660±10°C, and TMAl, TMIn, TMGa and PH3 are introduced to grow on the GaAs buffer layer described in step 2 (Al x1 Ga 1-x1 ) y1 In 1-y1 P lower limiting layer; (4) The temperature is maintained at 660±10℃. After step (3), TMGa, TMIn and PH3 are introduced to grow Ga x2 In 1-x2 P lower waveguide layer; (5) The temperature is maintained at 660±10℃. After the growth of step (4) is completed, TMGa, TMAl and AsH3 are introduced to continue growing Al x3 Ga 1-x3 As quantum well; (6) The temperature is maintained at 660 ± 10 °C. After step (5) is completed, TMGa, TMIn and PH3 are introduced to grow Ga x4 In 1-x4 P upper waveguide layer; (7) The temperature of the reaction chamber is maintained at 660±10℃, and TMAl, TMGa, TMIn and PH3 are introduced to grow (Al) on the product of step (6). x5 Ga 1-x5 ) y2 In 1-y2 P upper restriction layer; (8) Control the temperature of the reaction chamber to rise to 700±10℃, and the heating rate shall not exceed 20℃ / min. Then, introduce TMAl, TMGa, and AsH3 to grow Al on the surface of step 7. x6 Ga 1-x6 As high Al composition layer; (9) Control the temperature of the reaction chamber to 540-560℃, introduce TMGa and AsH3, and x6 Ga 1-x6 A GaAs ohmic contact layer is grown on the As high Al composition layer; (10) A step is made on the GaAs ohmic contact layer on the surface of the wafer produced in step (9) by photolithography and etching, and the outer ohmic contact layer and 20% to 50% of the Al x6 Ga 1-x6 As high Al composition layer; (11) Place the etched wafer in a sintering furnace, control the temperature to 400-450°C, pass N2 through a bubbler filled with water, and control the temperature of the bubbler to 80-95°C. x6 Ga 1-x6 The As high Al component layer is oxidized, and the oxidation time is controlled to 15-30 minutes to form an oxide insulating limiting layer and a current limiting structure; (12) Evaporating metal on the p-side of the wafer to form a p-type ohmic contact electrode; (13) The substrate is thinned to 130 μm–180 μm, and the n-side of the wafer is metallized to form an N-type ohmic contact electrode.

2. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 1, characterized in that: Al x6 Ga 1-x6 The thickness of the As high Al component layer is 0.3-0.6um, the doping source is CBr4, and the doping concentration is 2E17-1E18 atoms / cm 3 , 0.6≤x6≤0.

9.

3. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 2, characterized in that: Al x6 Ga 1-x6 The thickness of the As high Al component layer is 0.3um, x6=0.8, and the doping concentration is 7E17 atoms / cm 3 .

4. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 1, characterized in that: (Al x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P lower limiting layer is 0.5-1.5um, 0.1≤x1≤0.3, 0.4≤y1≤0.6, the doping source is Si2H6, and the doping concentration is 2E17-1E18 atoms / cm 3 ; (Al x5 Ga 1-x5 ) y2 In 1-y2 The thickness of the P upper limiting layer is 0.1-0.5um, the doping source is Cp2Mg, and the doping concentration is 2E17-1E18 atoms / cm 3 , 0.3≤x5≤0.7, 0.4≤y2≤0.

6.

5. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 4, characterized in that: (Al x1 Ga 1-x1 ) y1 In 1-y1 The thickness of the P lower confinement layer is 1.1um, x1=0.2, y1=0.5, and the doping concentration is 4E17 atoms / cm 3 ; (Al x5 Ga 1-x5 ) y2 In 1-y2 The thickness of the P upper confinement layer is 0.2um, x5=0.4, y2=0.5, and the doping concentration is 5E17 atoms / cm 3 .

6. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 1, characterized in that: The GaAs buffer layer thickness is 100-300nm, the doping source is Si2H6, and the doping concentration is 1E18-5E18 atoms / cm 3 ; Ga x2 In 1-x2 The thickness of the waveguide layer under P is 0.4-0.7um, the doping source is Si2H6, and the doping concentration is 4E16-1E17 atoms / cm 3 , 0.3≤x2≤0.5; Al x3 Ga 1-x3 As quantum well thickness is 5-10nm, unintentional doping, 0.1≤x3≤0.4; Ga x4 In 1-x4 The thickness of the waveguide layer on P is 0.1-0.4um, 0.3≤x4≤0.5; The thickness of the GaAs ohmic contact layer is 100-300nm, the doping source is CBr4, and the doping concentration is 9E18-5E19 atoms / cm 3 .

7. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 6, characterized in that: The GaAs buffer layer is 200 nm thick and has a doping concentration of 2E18 atoms / cm 3 ; Ga x2 In 1-x2 The thickness of the waveguide layer under P is 0.6um, x2=0.5, and the doping concentration is 6E16 atoms / cm 3 ; Al x3 Ga 1-x3 The thickness of the As quantum well is 6nm, x3=0.2; Ga x4 In 1-x4 The thickness of the waveguide layer on P is 0.35um, x4=0.5; The GaAs ohmic contact layer thickness is 300nm and the doping concentration is 4E19 atoms / cm 3 ; The thickness of the oxide insulating confinement layer is 230 nm.

8. The method for preparing the 808nm semiconductor laser device with an oxidation confinement structure according to claim 1, characterized in that: In step (1), the high temperature heat treatment temperature is 720°C and the baking time is 30 minutes; In steps (2) to (7), the reaction temperature is 660°C; In step (8), the reaction temperature is 700°C; In step (9), the reaction temperature is 550°C; In step (10), Al x6 Ga 1-x6 The etching ratio of As high Al component layer is 40%; In step (11), the temperature is 420° C., the temperature of the bubbling bottle is 90° C., the oxidation time is 25 minutes, the maximum lateral oxidation depth is 700 nm, and the downward oxidation depth is 130 nm.

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