Common mode voltage suppression method, device, equipment and storage medium

Abstract

The present invention provides a common-mode voltage suppression method, device, equipment and storage medium, the method comprising: obtaining the two-phase current and two-phase voltage of a motor in a rotating coordinate system at the current moment; making a prediction based on the two-phase current and the two-phase voltage to determine a first predicted current; calculating the first predicted voltage corresponding to each of three preset voltage vectors, making a secondary prediction of each first predicted voltage and the first predicted current, and determining the second predicted current corresponding to each preset voltage vector, wherein the preset voltage vector is a non-zero voltage vector, and the phase difference between each preset voltage vector is a preset degree; calculating the current error corresponding to each preset voltage vector based on each second predicted current and a preset reference current, comparing each current error, and determining three target voltage vectors based on the comparison result; and controlling the inverter in the motor more accurately based on each target voltage vector to suppress the common-mode voltage, thereby reducing the amount of calculation and improving the current output quality.

Description

Technical Field

[0001] The present invention relates to the field of motor technology, and in particular to a common mode voltage suppression method, device, equipment and storage medium. Background Art

[0002] In the motor control system, the inverter is a key power electronic device responsible for converting DC power into AC power to drive the motor. The output signal of the inverter controls the three-phase current of the motor to achieve the motor's speed, direction and other functions. In the output process of the inverter, various factors may cause the generation of common-mode voltage. In practical applications, with the increase of the switching speed and switching frequency of power electronic devices, although the performance of the inverter is improved, the harmonic components of the inverter output will be reduced accordingly, resulting in the frequency and amplitude of the generated common-mode voltage, causing some negative effects that cannot be ignored. For example, when the PWM (Pulse Width Modulation) modulation strategy is used in the inverter, a higher common-mode voltage may be generated. This is because during the switching process of the PWM signal, when the control signal switches from high level to low level or from low level to high level, the time interval (i.e., dead time) between the two control signals may be improperly set, resulting in an increase in the harmonic content on the inverter output waveform, thereby increasing the amplitude of the common-mode voltage. Since the high-frequency change rate of the common-mode voltage will generate shaft currents, these shaft currents will induce high-amplitude shaft voltages on the motor shaft and form bearing currents. This bearing current will increase the mechanical wear between the bearings, causing the motor bearings to be damaged in a short period of time, significantly shortening the service life of the motor. Therefore, in order to avoid the influence of high-frequency and high-amplitude common-mode voltages on motor bearings, corresponding measures need to be taken to suppress the generation of common-mode voltages.

[0003] Chinese patent CN105356805A discloses a method for predicting common-mode voltage suppression using a permanent magnet synchronous motor model. In each control cycle, four voltage vectors are optimized and a voltage vector is determined to control the inverter. Although this solution achieves the suppression of common-mode voltage, it has a large amount of calculation and only uses a single voltage vector for control, resulting in poor current output quality. Therefore, how to reduce the amount of calculation and improve the quality of current output while suppressing the common-mode voltage is a problem that needs to be solved urgently. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, the present invention provides a common-mode voltage suppression method, device, equipment and storage medium to solve the technical problem of how to reduce the amount of calculation and improve the current output quality while suppressing the common-mode voltage.

[0005] In a first aspect, the present invention provides a common-mode voltage suppression method, comprising: obtaining a two-phase current and a two-phase voltage of a motor in a rotating coordinate system at a current moment, and performing a prediction based on the two-phase current and the two-phase voltage to determine a first predicted current; calculating a first predicted voltage corresponding to each of three preset voltage vectors, and performing a second prediction on each of the first predicted voltages and the first predicted current to determine a second predicted current corresponding to each of the preset voltage vectors, wherein the preset voltage vectors are non-zero voltage vectors, and the phase difference between each of the preset voltage vectors is a preset degree; calculating a current error corresponding to each of the preset voltage vectors based on each of the second predicted currents and a preset reference current, and comparing each of the current errors, and determining three target voltage vectors based on the comparison results; controlling an inverter in the motor based on each of the target voltage vectors to suppress the common-mode voltage, wherein the target voltage vectors include a first voltage vector, a second voltage vector, and a third voltage vector, wherein the first voltage vector is the preset voltage vector with the smallest current error, the second voltage vector is determined by the phase phase or the phase difference of the two preset voltage vectors with the smallest current error, and the third voltage vector is opposite in phase to the first voltage vector.

[0006] In one embodiment of the present invention, the control of the inverter in the motor based on each target voltage vector includes: obtaining a current voltage vector of the inverter; determining a switching state when each target voltage vector acts on the inverter according to the current voltage vector and the order of action of each target voltage vector in the inverter; inputting the switching state corresponding to each target voltage vector into a preset switching sequence table to determine a switching sequence of the inverter within a preset dead time when the switching state is a target switching state, the preset switching sequence table including a mapping relationship between each target switching state and the switching sequence, the target switching state being a switching state in which the voltage vector phase difference is the preset degree; controlling the inverter according to the order of action of each target voltage vector and the switching sequence under each switching state.

[0007] In one embodiment of the present invention, the determination of the switching sequence of the inverter within a preset dead time when the switching state is the target switching state includes: determining whether the switching state of each phase in the inverter changes under the target switching state; if the switching state of any phase remains unchanged, then within the preset dead time, adjusting the switch tube set to be turned on in the two switch tubes corresponding to the switching state in the inverter to be turned off; based on the settings of the two switch tubes corresponding to the switching state of each phase, generating the switching sequence within the preset dead time.

[0008] In one embodiment of the present invention, before controlling the inverter in the motor based on each of the target voltage vectors, it also includes: obtaining the current change rate under the action of each of the target voltage vectors and the control period of the inverter; calculating according to each of the current change rates, the control period and the first predicted current to determine the action time of each of the target voltage vectors; if the action time of any of the target voltage vectors is less than a preset dead time, adjusting the action time to the preset dead time.

[0009] In one embodiment of the present invention, the calculation of the first predicted voltage corresponding to each of the three preset voltage vectors includes: obtaining the DC side voltage of the inverter, and determining the three-phase switching state of the inverter corresponding to each of the preset voltage vectors, the preset voltage vectors and the three-phase switching states corresponding one to one; calculating each of the three-phase switching states and the DC side voltage respectively to obtain the first predicted voltage corresponding to each of the preset voltage vectors.

[0010] In one embodiment of the present invention, the current error corresponding to each preset voltage vector is calculated based on each second predicted current and the preset reference current, including: performing absolute value calculation on the difference between each second predicted current and the preset reference current to determine the current error corresponding to each preset voltage vector; wherein, the absolute value calculation is performed on the difference between the second cross-axis current and the preset cross-axis reference current, and the difference between the second direct-axis current and the preset direct-axis reference current to obtain the cross-axis current error and the direct-axis current error, the second predicted current includes the second cross-axis current and the second direct-axis current, and the preset reference current includes the preset cross-axis reference current and the preset direct-axis reference current; the sum of the cross-axis current error and the direct-axis current error is calculated and used as the current error corresponding to the preset voltage vector.

[0011] In one embodiment of the present invention, obtaining the two-phase current of the motor in the rotating coordinate system at the current moment includes: obtaining the three-phase current and the rotor position angle of the motor at the current moment; performing coordinate transformation based on the three-phase current and the rotor position angle to obtain the two-phase current in the rotating coordinate system.

[0012] In a second aspect, the present invention further provides a common-mode voltage suppression device, comprising: a primary prediction module, used to obtain the two-phase current and two-phase voltage of the motor in the rotating coordinate system at the current moment, and perform a primary prediction based on the two-phase current and the two-phase voltage to determine a first predicted current; a secondary prediction module, used to calculate the first predicted voltage corresponding to each of three preset voltage vectors, perform a secondary prediction on each of the first predicted voltages and the first predicted current, and determine the second predicted current corresponding to each of the preset voltage vectors, wherein the preset voltage vector is a non-zero voltage vector, and the phase difference between each of the preset voltage vectors is a preset degree; a vector determination module, used to determine the second predicted current corresponding to each of the preset voltage vectors according to each The second predicted current is respectively compared with the preset reference current, and the current error corresponding to each preset voltage vector is calculated, and each current error is compared, and three target voltage vectors are determined based on the comparison result; a control module is used for each target voltage vector to control the inverter in the motor to suppress the common mode voltage, and the target voltage vector includes a first voltage vector, a second voltage vector and a third voltage vector, the first voltage vector is the preset voltage vector with the smallest current error, the second voltage vector is determined by the phase phase or the phase of the two preset voltage vectors with the smallest current error, and the third voltage vector is opposite to the first voltage vector in phase.

[0013] In a third aspect, the present invention also provides an electronic device, comprising: a processor, a memory and a communication bus; the communication bus is used to connect the processor and the memory; the processor is used to execute a computer program stored in the memory to implement the common-mode voltage suppression method as described in the above embodiments.

[0014] In a fourth aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor of a computer, enables the computer to execute the common-mode voltage suppression method as described in the above embodiments.

[0015] Beneficial effects of the present invention: The present invention proposes a common-mode voltage suppression method, device, equipment and storage medium. By optimizing and calculating according to three preset voltage vectors in each cycle, the preset voltage vector is a non-zero voltage vector, so as to determine three target voltage vectors to control the inverter of the motor. In this way, on the one hand, instead of using a zero voltage vector, only three preset voltage vectors with a phase difference of a preset degree are used for calculation, which reduces the amount of calculation while achieving common-mode voltage suppression; on the other hand, the three target voltage vectors are combined to accurately control the inverter, so that the actual output current of the motor is closer to the expected current value, reducing the harmonic content and the fluctuation of the current waveform, improving the torque pulsation, and thus improving the output quality of the current.

[0016] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present invention, and together with the specification, are used to explain the principles of the present invention. Obviously, the drawings described below are only some embodiments of the present invention, and for those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0018] Figure 1 is a flow chart of a common mode voltage suppression method shown in an exemplary embodiment of the present invention;

[0019] Figure 2 is a schematic diagram of an overall solution for suppressing common mode voltage according to an exemplary embodiment of the present invention;

[0020] Figure 3 is a schematic structural diagram of an inverter shown in an exemplary embodiment of the present invention;

[0021] Figure 4 is a schematic diagram showing a preset voltage vector distribution according to an exemplary embodiment of the present invention;

[0022] Figure 5 is a schematic diagram of target voltage vector synthesis shown in an exemplary embodiment of the present invention;

[0023] Figure 6 is a schematic diagram of a freewheeling path in a dead zone during switching, shown in an exemplary embodiment of the present invention;

[0024] Figure 7 is a schematic diagram of a switching sequence and a common mode voltage in a dead zone during switching, shown in an exemplary embodiment of the present invention;

[0025] Figure 8 is a block diagram of a common mode voltage suppression device shown in an exemplary embodiment of the present invention;

[0026] Fig. 9 It is a schematic diagram of the structure of a computer system suitable for implementing the electronic device of the present invention, shown in an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0027] The following will describe the embodiments of the present invention with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention, not for limiting the scope of protection of the present invention.

[0028] It should be noted that the illustrations provided in the following embodiments are only used to illustrate the basic concept of the present invention in a schematic manner, and thus the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0029] In the following description, numerous details are discussed to provide a more thorough explanation of the embodiments of the present invention. However, it is obvious to those skilled in the art that the embodiments of the present invention can be implemented without these specific details. In other embodiments, well-known structures and devices are shown in the form of block diagrams rather than in detail to avoid making the embodiments of the present invention difficult to understand.

[0030] It should be noted that in the actual application of the motor, excessive common-mode voltage will cause electrical corrosion of the motor bearings, thereby damaging the motor. When the common-mode voltage is high, the parasitic capacitance between the motor stator and rotor is coupled to the motor bearings, resulting in shaft voltage between the bearings and the housing. This coupling is caused by the physical structural characteristics of the motor design. In some cases, such as in a doubly fed system, the shaft voltage may be higher because the parasitic capacitance between the rotor winding and the shaft is much larger than the parasitic capacitance between the stator and the rotor. When the shaft voltage exceeds the critical value of the bearing oil film breakdown, the oil film will be broken down and a shaft current will be generated. The shaft current is the current flowing along the motor shaft. It may form a closed loop through components such as bearings and shafts, which will destroy the stability of the oil film and cause the lubrication and cooling oil to gradually deteriorate. At the same time, it will also generate high temperatures at the metal contact points, causing the bearings to burn locally. After the motor has been running for a long time, due to reasons such as winding aging and bearing wear, the current may become larger, further increasing the risk of shaft voltage and shaft current. The shaft current will accelerate the electrochemical corrosion process, resulting in increased bearing loss. Electrochemical corrosion will damage the metal surface of the bearing and reduce its mechanical strength and electrical performance. In severe cases, electrochemical corrosion may cause bearing structure rupture and even lead to safety accidents such as fire, ultimately causing damage to the motor.

[0031] Based on this, the present invention proposes a common-mode voltage suppression method, device, equipment and storage medium to reduce the common-mode voltage and suppress the electrical corrosion of the motor bearing.

[0032] See also Figure 1 , is a flow chart of a common mode voltage suppression method shown in an exemplary embodiment of the present invention. Figure 1 As shown, in an exemplary embodiment, the common mode voltage suppression method includes at least steps S110 to S140, which are described in detail as follows:

[0033] Step S110, obtaining the two-phase current and two-phase voltage of the motor in the rotating coordinate system at the current moment, and performing a prediction based on the two-phase current and the two-phase voltage to determine a first predicted current.

[0034] Specifically, obtaining the two-phase current includes: obtaining the three-phase current and the rotor position angle of the motor at the current moment; performing coordinate transformation based on the three-phase current and the rotor position angle to obtain the two-phase current in the rotating coordinate system.

[0035] See also Figure 2 , is a schematic diagram of an overall solution for suppressing common mode voltage according to an exemplary embodiment of the present invention, such as Figure 2 As shown, the three-phase current i generated by the motor (PMSM) in the stationary coordinate system abc at the current moment abd , and the motor’s rotor position angle Sampling is performed, and the three-phase current and rotor position angle are substituted into the coordinate conversion expression to obtain the two-phase current i under the rotating coordinate dq d (k) and i q (k). The coordinate transformation expression is as follows:

[0036] Formula (1)

[0037] Among them, i in formula (1) a 、i b 、i c Indicates the a-phase current, b-phase current, and c-phase current in the three-phase current, i d (k) and i q (k) represents the d-axis (direct axis) current and q-axis (quadrature axis) current of the two-phase current k at the current moment, Indicates the rotor position angle of the motor.

[0038] In one embodiment of the present invention, the two-phase voltage is calculated by the following expression:

[0039] Formula (2)

[0040] Among them, u in formula (2) d (k) and u q (k) represents the direct-axis voltage and quadrature-axis voltage of the two-phase voltage at the current moment k, respectively, Sx Indicates the switching status of each phase of the inverter. , Indicates the rotor position angle of the motor, U dc Indicates the DC side voltage of the inverter. x When S is equal to 1, it means that the upper switch tube of the x-phase bridge arm is turned on and the lower switch tube is turned off; x When it is equal to 0, it means that the upper switch tube of the x-phase bridge arm is turned off and the lower switch tube is turned on.

[0041] It should be noted that Figure 2 The PI in the equation represents a proportional-integral controller. Indicates the reference speed of the motor, that is, the speed that the motor is expected to reach. Indicates the actual speed of the motor. is the motor electrical angular velocity, Indicates the preset direct axis reference current, Indicates the preset quadrature-axis reference current.

[0042] See also Figure 3 , is a schematic diagram of the structure of an inverter shown in an exemplary embodiment of the present invention. This method is applied to Figure 3 The inverter shown in the figure, wherein the switching state of the inverter includes phase a, phase b and phase c, and the switching state of each phase is determined by two switching tubes. Figure 3 S a , S a , S a They represent the switching states of phase a, phase b and phase c respectively, S a1 , S a2 They represent the upper switch tube and the lower switch tube of phase a respectively. The same is true for phases b and c. C represents the capacitor, o represents the node where the two capacitors intersect, and U dc Indicates the DC side voltage of the inverter. For example, v(S a S b S c ) represents the voltage vector. When the voltage vector is v(001), it means that the switching states of phase a and phase b are both 0, and the switching state of phase c is 1. Therefore, there are eight switching states in total. The selectable voltage vectors include 2 zero voltage vectors, namely v(000) and v(111), and 6 non-zero voltage vectors, namely v1(001), v2(010), v3(011), v4(100), v5(101) and v6(110).

[0043] In one embodiment of the present invention, the two-phase voltage includes a direct-axis voltage and a quadrature-axis voltage. Figure 2As shown, the two-phase voltage and two-phase current at the current moment are input into the preset prediction model for a prediction, and the first predicted current at the next moment is determined. The next moment and the current moment are separated by a control cycle, and the control cycle is adjusted according to the actual setting of the motor inverter, for example, set to 100 milliseconds. The expression of the prediction model is:

[0044] Formula (3)

[0045] Formula (4)

[0046] Formula (5)

[0047] Formula (6)

[0048] Among them, i in formula (3) to formula (6) d (k) and i q (k) represents the d-axis current and q-axis current of the two-phase current k at the current moment, u d (k) and u q (k) represents the direct-axis voltage and quadrature-axis voltage of the two-phase voltage at the current moment k, i d (k+1) and i q (k+1) respectively represent the first direct-axis current and the first quadrature-axis current in the first predicted current, that is, the direct-axis current and the quadrature-axis current predicted at the next moment (K+1), is the stator resistance, is the d-axis inductance, is the q-axis inductance, is the motor electrical angular velocity, i.e. synchronous speed, is the permanent magnet flux, To control the cycle.

[0049] Step S120, calculate the first predicted voltage corresponding to each of the three preset voltage vectors, perform secondary prediction on each of the first predicted voltages and the first predicted current, determine the second predicted current corresponding to each preset voltage vector, the preset voltage vector is a non-zero voltage vector, and the phase difference between each preset voltage vector is a preset degree.

[0050] Specifically, the first predicted voltage is determined by: obtaining the DC side voltage of the inverter, and determining the three-phase switch state of the inverter corresponding to each preset voltage vector, wherein the preset voltage vector and the three-phase switch state correspond one to one; each three-phase switch state and the DC side voltage are respectively substituted into the above formula (2) for calculation, and the first predicted voltage corresponding to each preset voltage vector at the next moment can be obtained. The three-phase switch state includes the switch states corresponding to the a phase, the b phase and the c phase.

[0051] See also Figure 4 , a schematic diagram of a preset voltage vector distribution is shown in an exemplary embodiment of the present invention. The distribution of the preset voltage vectors only needs to satisfy that the phase difference between the preset voltage vectors is 120 degrees, which can be adjusted according to actual needs without limitation, for example, set as follows Figure 4 The three voltage vectors shown are V1 (001), V2 (110) and V4 (100), which can also be set to V3 (011), V5 (101) and V6 (110).

[0052] In one embodiment of the present invention, since there is an inherent delay of one control cycle when control is performed based on prediction, it is necessary to use a two-time prediction method for compensation. The first predicted voltage corresponding to each preset voltage vector is input into the prediction model of the above equations (3) to (6) respectively with the predicted first current to determine the second predicted current at the next moment, and the second next moment is separated from the current moment by two control cycles. In this way, the accuracy and real-time performance of the subsequent control of the inverter are ensured.

[0053] Through the above method, compared with the predictive calculation of 8 voltage vectors or 4 voltage vectors that need to be traversed, only three preset voltage vectors with a phase interval of 120 degrees are needed for calculation. While reducing the amount of calculation, the harmonic components of the winding current waveform are reduced, thereby reducing the torque pulsation of the motor, which helps to improve the operating efficiency and stability of the motor.

[0054] Step S130 , calculating the current error corresponding to each preset voltage vector according to each second predicted current and the preset reference current, and comparing each current error, and determining three target voltage vectors based on the comparison result.

[0055] Specifically, the current error is calculated, including: calculating the absolute value of the difference between each second predicted current and the preset reference current to determine the current error corresponding to each preset voltage vector; wherein the difference between the second cross-axis current and the preset cross-axis reference current, and the difference between the second direct-axis current and the preset direct-axis reference current are respectively calculated in absolute value to obtain a cross-axis current error and a direct-axis current error, the second predicted current includes the second cross-axis current and the second direct-axis current, and the preset reference current includes the preset cross-axis reference current and the preset direct-axis reference current; the sum of the cross-axis current error and the direct-axis current error is calculated and used as the current error corresponding to the preset voltage vector.

[0056] In one embodiment of the present invention, Figure 2 As shown, after calculating the second predicted current corresponding to each of the three preset voltage vectors, the Figure 2 The second direct axis current i d (k+2) and the second quadrature axis current i qAfter (k+2), substitute it into the value function, the expression of the value function is as follows:

[0057] Formula (7)

[0058] Among them, i in formula (7) d (k+2) represents the second direct axis current, i q (k+2) represents the second quadrature axis current, Indicates the preset direct axis reference current, represents the preset quadrature-axis reference current, and J represents the current error.

[0059] like Figure 2 As shown, the preset voltage vector corresponding to the smallest current error is selected from the three current errors as the optimal voltage vector v 最优 , and the preset voltage vector corresponding to the second smallest current error is used as the suboptimal voltage vector v 次优 , then determine the first voltage vector v x , the second voltage vector v y and the third voltage vector v z . The optimal voltage vector is used as the first voltage vector, and the second voltage vector is determined according to the positional relationship between the suboptimal voltage vector and the suboptimal voltage vector, that is, the phase of the suboptimal voltage vector and the phase of the optimal voltage vector are phase-ORed to obtain a voltage vector between the two preset voltage vector phases with the smallest current error, and the voltage vector is used as the second voltage vector, and the voltage vector with the opposite phase to the optimal voltage vector is used as the third voltage vector. In this way, the first voltage vector and the second voltage vector are adjacent, and the first voltage vector and the second voltage vector are not adjacent to the third voltage vector.

[0060] In one embodiment of the present invention, when the three preset voltage vectors are v1 (001), v2 (010) and v4 (100), the second voltage vector is determined as shown in Table 1:

[0061] Table 1: Method for determining the second voltage vector

[0062]

[0063] Among them, v in Table 1 最优 represents the optimal voltage vector, v 次优 represents the suboptimal voltage vector, v y represents the second voltage vector.

[0064] Step S140, controlling the inverter in the motor based on each target voltage vector to suppress the common mode voltage, the target voltage vector includes a first voltage vector, a second voltage vector and a third voltage vector, the first voltage vector is a preset voltage vector with the smallest current error, the second voltage vector is determined by the phase OR of the two preset voltage vectors with the smallest current error, and the third voltage vector is opposite to the first voltage vector in phase.

[0065] See also Figure 5 , is a schematic diagram of target voltage vector synthesis shown in an exemplary embodiment of the present invention. The inverter is controlled based on the synthesized voltage vector synthesized by three target voltage vectors, that is, each target voltage vector is combined so that its average value is equal to the synthesized voltage vector. Figure 5 For example, based on the three target voltage vectors v4 (100), v6 (110) and v3 (100), v ref This synthetic voltage vector acts on the inverter to reduce the fluctuation amplitude of the output current and the current pulsation.

[0066] like Figure 2 As shown, after determining the three target voltage vectors (v x 、v y、 v z ), it is also necessary to calculate the action time (t1, t2, t3) of each target voltage vector, and change the switching sequence of the inverter within the dead time when each target voltage vector is switched, and then combine the input to the pulse generator to generate a switching signal input to the inverter to control the multiple bridge arms of the inverter to perform switching actions according to the switching signal.

[0067] Specifically, calculating the action time includes: obtaining the current change rate under the action of each target voltage vector and the control cycle of the inverter; calculating according to each current change rate, the control cycle and the first predicted current to determine the action time of each target voltage vector; if the action time of any target voltage vector is less than the preset dead time, the action time is adjusted to the preset dead time.

[0068] In one embodiment of the present invention, the expression for predicting the predicted current based on the current change rate is as follows:

[0069] Formula (8)

[0070] Among them, in formula (8) , , , , and Respectively represent the current change rate of the d-axis and q-axis under the action of the first voltage vector, the second voltage vector, and the third voltage vector, i d(k+2) represents the second direct axis current, i q (k+2) represents the second quadrature axis current, i d (k+1) and i q (k+1) represents the first straight-axis current and the first quadrature-axis current in the first predicted current, respectively, and t1, t2, and t3 represent the corresponding action times of the first voltage vector, the second voltage vector, and the third voltage vector, respectively. The expression for calculating the action time is as follows:

[0071] Formula (9)

[0072] Wherein, t1, t2 and t3 in formula (9) represent the corresponding action time of the first voltage vector, the second voltage vector and the third voltage vector respectively. , , , , and Respectively represent the current change rate of the d-axis and q-axis under the action of the first voltage vector, the second voltage vector, and the third voltage vector, i d (k+1) and i q (k+1) respectively represent the first straight-axis current and the first quadrature-axis current in the first predicted current, Indicates the preset direct-axis reference current, Represents the preset quadrature-axis reference current, T s Indicates the control period.

[0073] In one embodiment of the present invention, t1, t2 and t3 need to satisfy t1, t2, t3 ≥ t min ≥t dead >0,t dead Indicates the preset dead time, t min Indicates the minimum value of the action time, t min =max(min(t1,t2,t3),t dead ). In this way, by setting a preset dead time, short circuits caused by DC conduction of the switches in the upper and lower bridge arms of the inverter are prevented, thereby ensuring the reliability of the inverter control based on each target voltage vector. In addition, by limiting the minimum action time of the target voltage vector based on the dead time, the common mode voltage spike phenomenon caused by the dead time is avoided to a certain extent.

[0074] Specifically, the current voltage vector of the inverter is obtained; according to the current voltage vector and the order of action of each target voltage vector in the inverter, the switching state of each target voltage vector when acting on the inverter is determined; the switching state corresponding to each target voltage vector is input into a preset switch sequence table to determine the switch sequence of the inverter within a preset dead time when the switching state is the target switching state, the preset switch sequence table includes a mapping relationship between each target switching state and the switch sequence, the target switching state is a switching state in which the voltage vector phase difference is a preset degree; according to the order of action of each target voltage vector and the switch sequence in each switching state, the inverter is controlled.

[0075] In one embodiment of the present invention, each target voltage vector is sorted and combined to determine multiple groups of execution orders, and a group of execution orders with the least number of target switching states is selected from the multiple groups of execution orders to determine the action order, and the action order represents the order in which each target voltage vector acts on the inverter. The switching state is the state of the voltage vector in the inverter when each target voltage vector acts on the inverter, and two voltage vectors with different phase differences have different corresponding switching states when switching.

[0076] Specifically, the switching sequence is determined as follows: determine whether the switching state of each phase in the inverter changes under the target switching state; if the switching state of any phase remains unchanged, then within the preset dead time, adjust the setting of the switch tube set to on in the two switch tubes corresponding to the switching state in the inverter to off; based on the settings of the two switch tubes corresponding to the switching state of each phase, generate a switching sequence within the preset dead time, wherein the setting is off or on.

[0077] In one embodiment of the present invention, in order to avoid the situation that the upper and lower switches of the same bridge arm of the inverter are turned on at the same time due to the switching of the voltage vectors when the target voltage vectors are controlled in the order of action of the inverter, it is necessary to turn off the other switch tube in the same bridge arm in advance before turning on a switch tube in the same bridge arm. Therefore, a preset dead time is set, and the two switch tubes in any phase bridge arm whose switch state changes within the preset dead time are turned off. When two voltage vectors with a phase difference of 120 degrees are switched, there are only two-phase switch states in the inverter that need to be switched, that is, within the preset dead time, the switching sequence of the inverter includes the two switch tubes in each of the two bridge arms corresponding to the two phase switch states that have changed are turned off, and one switch tube of the bridge arm corresponding to the remaining unchanged phase switch state is turned off, and the other switch tube is turned on, which will lead to the generation of further common mode voltage. Based on this, in order to reduce the generation of common-mode voltage during the preset dead time, when the two voltage vectors with a phase difference of 120 degrees are switched, it is also necessary to turn off the switch tube set to be turned on in the bridge arm corresponding to the unchanged switching state of the phase, and change the switching sequence during the preset dead time. In this way, the appearance of zero vector is avoided, and the common-mode voltage can be suppressed to , further avoiding the common-mode voltage spike problem that occurs during dead time.

[0078] In one embodiment of the present invention, the mapping relationship between the target switching state and the switch sequence within the preset dead time is shown in Table 2:

[0079] Table 2: Mapping relationship

[0080]

[0081] Among them, S in Table 2 x1 Indicates the switching state of the switch tube on the inverter x-phase bridge arm, S x2 represents the switching state of the switch tube under the inverter x-phase bridge arm, x∈(a,b,c), when S x1 =0, indicating that the switch state is that the upper switch tube of the x-phase bridge arm is turned off. x1 =1, it indicates that the switch state is that the upper switch tube of the x-phase bridge arm is turned on. As shown in Table 2, when two voltage vectors with a phase difference of 120 degrees are switched, within the preset dead time, in the one-phase bridge arm where the switch state remains unchanged, the turned-on switch tube will be adjusted to be turned off, and will be turned on again after the preset dead time ends.

[0082] See also Figure 6 and Figure 7 , are schematic diagrams of a freewheeling path in a dead zone during switching according to an exemplary embodiment of the present invention, and schematic diagrams of a switching sequence and a common mode voltage for a preset dead zone time during switching. Figure 6 and Figure 7As shown, take v4 (100) switching to v2 (010) as an example. Figure 6 and Figure 3 The inverter structure shown is the same. If the three-phase current (i a 、i b 、i c ) is (110), where 1 is the direction of outflow from the inverter and 0 is the direction of inflow from the inverter. When the switching sequence is changed, only the S of the c phase is switched during the preset dead time. c2 Keep open, S of phase a a1 , b-phase S b2 Close within the preset dead time, S a2 , S b1 It will be turned on after the preset dead time ends. Figure 6 As shown in the figure, after changing the switching sequence, S c2 It will also be turned off and turned on after the preset dead time. In this way, the common mode voltage of the three-phase current, that is, U ao , U bo , U co In order , , , the total common mode voltage U com is suppressed to .

[0083] Through the above method, in one control cycle, based on the action time and action order of each target voltage vector, and when the switching state of any target voltage vector acting on the inverter is the target switching state, the switching sequence of the inverter within the preset dead time, the three target voltage vectors are synthesized and acted on the inverter, thereby achieving precise control of the inverter, and the waveform of the actual output current of the motor can be closer to the waveform of the second predicted current, reducing the harmonic content and waveform distortion, and improving the output quality of the current.

[0084] Based on the above embodiments, the present invention proposes a common-mode voltage suppression method, which has the following advantages: first, instead of using a zero voltage vector, only three preset voltage vectors with a preset phase difference are used for calculation, thereby reducing the amount of calculation while achieving common-mode voltage suppression; second, the three target voltage vectors are combined to accurately control the inverter, so that the actual output current of the motor is closer to the expected current value, the harmonic content and the fluctuation of the current waveform are reduced, the torque pulsation is improved, and thus the output quality of the current is improved; third, by determining the switching sequence of the preset dead time when the voltage vector is switched, the common-mode voltage spike problem is optimized.

[0085] See also Figure 8 , is a block diagram of a common mode voltage suppression device shown in an exemplary embodiment of the present invention. Figure 8As shown, the exemplary common mode voltage suppression device includes: a primary prediction module 810 , a secondary prediction module 820 , a vector determination module 830 , and a control module 840 .

[0086] A primary prediction module 810 is used to obtain the two-phase current and two-phase voltage of the motor in the rotating coordinate system at the current moment, and perform a primary prediction based on the two-phase current and the two-phase voltage to determine a first predicted current;

[0087] A secondary prediction module 820 is used to calculate the first predicted voltage corresponding to each of the three preset voltage vectors, perform secondary prediction on each of the first predicted voltages and the first predicted current, and determine the second predicted current corresponding to each of the preset voltage vectors, wherein the preset voltage vectors are non-zero voltage vectors, and the phase difference between the preset voltage vectors is a preset degree;

[0088] A vector determination module 830, for calculating a current error corresponding to each preset voltage vector according to each second predicted current and a preset reference current, and comparing each current error, and determining three target voltage vectors based on the comparison result;

[0089] The control module 840 is used to control the inverter in the motor with each target voltage vector to suppress the common mode voltage. The target voltage vector includes a first voltage vector, a second voltage vector and a third voltage vector. The first voltage vector is a preset voltage vector with the smallest current error. The second voltage vector is determined by the phase OR of the two preset voltage vectors with the smallest current error. The third voltage vector is opposite to the first voltage vector in phase.

[0090] It should be noted that the common-mode voltage suppression device provided in the above embodiment and the common-mode voltage suppression method provided in the above embodiment belong to the same concept, and the specific manner of performing the operation in each step has been described in detail in the system embodiment and will not be repeated here.

[0091] An embodiment of the present invention also provides an electronic device, comprising: one or more processors; a storage device for storing one or more programs, when the one or more programs are executed by the one or more processors, the electronic device implements the common mode voltage suppression method provided in the above-mentioned embodiments.

[0092] See also Fig. 9 , shows a schematic diagram of the structure of a computer system suitable for implementing an electronic device of an embodiment of the present invention. It should be noted that, Fig. 9 The computer system 900 of the electronic device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present invention.

[0093] like Fig. 9As shown, the computer system 900 includes a CPU 901, which can perform various appropriate actions and processes according to the program stored in the ROM 902 or the program loaded from the storage part 908 into the RAM 903, such as executing the method in the above embodiment. In the RAM 903, various programs and data required for system operation are also stored. The CPU 901, the ROM 902 and the RAM 903 are connected to each other through a bus 904. An I / O interface 905 is also connected to the bus 904.

[0094] The following components are connected to the I / O interface 905: an input section 906 including a keyboard, a mouse, etc.; an output section 907 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker; a storage section 908 including a hard disk, etc.; and a communication section 909 including a network interface card such as a LAN (Local Area Network) card, a modem, etc. The communication section 909 performs communication processing via a network such as the Internet. A drive 910 is also connected to the I / O interface 905 as needed. A removable medium 911, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 910 as needed so that a computer program read therefrom is installed into the storage section 908 as needed.

[0095] In particular, according to an embodiment of the present invention, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present invention includes a computer program product, which includes a computer program carried on a computer readable medium, and the computer program includes a computer program for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication part 909, and / or installed from the removable medium 911. When the computer program is executed by the CPU 901, various functions defined in the system of the present invention are executed.

[0096] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor of a computer, causes the computer to execute the common-mode voltage suppression method as described above. The computer-readable storage medium may be included in the electronic device described in the above embodiment, or may exist independently without being assembled into the electronic device.

[0097] It should be noted that the computer-readable medium shown in the embodiment of the present invention may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, an electrical, magnetic, optical, electromagnetic, infrared or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable computer program. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate or transmit a program for use by or in conjunction with an instruction execution system, apparatus or device. A computer program contained on a computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0098] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present invention. Among them, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the above-mentioned module, program segment, or a part of the code contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions marked in the boxes can also occur in an order different from that marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flowchart, and the combination of boxes in the block diagram or flowchart, can be implemented with a dedicated hardware-based system that performs the specified functions or operations, or can be implemented with a combination of dedicated hardware and computer instructions.

[0099] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A common mode voltage suppression method, characterized in that: include: Obtaining the two-phase current and the two-phase voltage of the motor in the rotating coordinate system at the current moment, and performing a prediction based on the two-phase current and the two-phase voltage to determine a first predicted current; Calculate the first predicted voltage corresponding to each of the three preset voltage vectors, perform secondary prediction on each of the first predicted voltages and the first predicted current, and determine the second predicted current corresponding to each of the preset voltage vectors, wherein the preset voltage vectors are non-zero voltage vectors, and the phase difference between the preset voltage vectors is a preset degree; Calculating a current error corresponding to each of the preset voltage vectors according to each of the second predicted currents and the preset reference current, comparing the current errors, and determining three target voltage vectors based on the comparison results; The inverter in the motor is controlled based on each target voltage vector to suppress the common mode voltage, the target voltage vector includes a first voltage vector, a second voltage vector and a third voltage vector, the first voltage vector is the preset voltage vector with the smallest current error, the second voltage vector is determined by the three-phase switch states corresponding to the two preset voltage vectors with the smallest current error, and the third voltage vector is opposite in phase to the first voltage vector.

2. The common mode voltage suppression method according to claim 1, characterized in that: The controlling the inverter in the motor based on each of the target voltage vectors includes: Obtaining a current voltage vector of the inverter; Determining a switching state when each target voltage vector acts on the inverter according to the action sequence of the current voltage vector and each target voltage vector in the inverter; Input the switching state corresponding to each of the target voltage vectors into a preset switching sequence table, and determine the switching sequence of the inverter within a preset dead time when the switching state is a target switching state, wherein the preset switching sequence table includes a mapping relationship between each of the target switching states and the switching sequence, and the target switching state is a switching state in which the voltage vector phase difference is the preset degree; The inverter is controlled according to the action order of each of the target voltage vectors and the switch sequence under each of the switching states.

3. The common mode voltage suppression method according to claim 2, characterized in that: The determining, when the switching state is the target switching state, a switching sequence of the inverter within a preset dead time, comprises: Determining whether a switch state of each phase in the inverter changes under the target switching state; If the switch state of any phase remains unchanged, then within the preset dead time, the switch tube that is set to be turned on among the two switch tubes corresponding to the switch state in the inverter is adjusted to be turned off; Based on the settings of the two switching tubes corresponding to the switching state of each phase, the switching sequence within the preset dead time is generated.

4. The common mode voltage suppression method according to claim 2, characterized in that: Before controlling the inverter in the motor based on each of the target voltage vectors, the method further includes: Obtaining the current change rate under the action of each target voltage vector and the control period of the inverter; Determine the action time of each target voltage vector by performing calculation according to each current change rate, the control period and the first predicted current; If the action time of any of the target voltage vectors is less than a preset dead time, the action time is adjusted to the preset dead time.

5. The common mode voltage suppression method according to any one of claims 1 to 4, characterized in that: The calculating of the first predicted voltages corresponding to the three preset voltage vectors respectively includes: Acquire a DC side voltage of the inverter, and determine a three-phase switch state of the inverter corresponding to each of the preset voltage vectors, wherein the preset voltage vectors correspond to the three-phase switch states one by one; Each of the three-phase switch states is calculated with the DC side voltage to obtain a first predicted voltage corresponding to each of the preset voltage vectors.

6. The common mode voltage suppression method according to any one of claims 1 to 4, characterized in that: The calculating the current error corresponding to each preset voltage vector according to each of the second predicted currents and the preset reference current includes: Calculating the absolute value of the difference between each of the second predicted currents and the preset reference current to determine the current error corresponding to each of the preset voltage vectors; The absolute values ​​of the difference between the second quadrature-axis current and the preset quadrature-axis reference current, and the difference between the second direct-axis current and the preset direct-axis reference current are respectively calculated to obtain a quadrature-axis current error and a direct-axis current error, the second predicted current includes the second quadrature-axis current and the second direct-axis current, and the preset reference current includes the preset quadrature-axis reference current and the preset direct-axis reference current; The sum of the quadrature-axis current error and the direct-axis current error is calculated and used as the current error corresponding to the preset voltage vector.

7. The common mode voltage suppression method according to claim 1, characterized in that: The obtaining of the two-phase current of the motor in the rotating coordinate system at the current moment includes: Obtaining the three-phase current and rotor position angle of the motor at the current moment; Coordinate transformation is performed based on the three-phase current and the rotor position angle to obtain the two-phase current in a rotating coordinate system.

8. A common mode voltage suppression device, characterized in that: include: A primary prediction module, used for obtaining the two-phase current and the two-phase voltage of the motor in the rotating coordinate system at the current moment, and performing a primary prediction based on the two-phase current and the two-phase voltage to determine a first predicted current; a secondary prediction module, used to calculate a first predicted voltage corresponding to each of three preset voltage vectors, perform secondary prediction on each of the first predicted voltages and the first predicted current, and determine a second predicted current corresponding to each of the preset voltage vectors, wherein the preset voltage vectors are non-zero voltage vectors, and the phase difference between the preset voltage vectors is a preset degree; a vector determination module, configured to calculate a current error corresponding to each of the preset voltage vectors according to each of the second predicted currents and a preset reference current, compare the current errors, and determine three target voltage vectors based on the comparison results; A control module is used for each target voltage vector to control the inverter in the motor to suppress the common mode voltage, the target voltage vector includes a first voltage vector, a second voltage vector and a third voltage vector, the first voltage vector is the preset voltage vector with the smallest current error, the second voltage vector is determined by the phase OR of the three-phase switch states corresponding to the two preset voltage vectors with the smallest current error, and the third voltage vector is opposite in phase to the first voltage vector.

9. An electronic device, characterized in that: include: processor, memory, and communications bus; The communication bus is used to connect the processor and the memory; The processor is configured to execute the computer program stored in the memory to implement the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and the computer program is used to make a computer execute the method according to any one of claims 1 to 7.

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