A video signal filtering method, circuit and computer readable storage medium

Abstract

The invention relates to a video signal filtering method, circuit and computer-readable storage medium in the technical field of video signal processing, comprising the following steps: receiving a video signal, performing high and low frequency detection on the video signal, and outputting the detection result; performing a first synchronization delay processing on the video signal based on the high and low frequency detection to obtain a synchronization delay signal 1; performing selective filtering processing on the synchronization delay signal 1 according to the detection result to obtain a filtered signal, and performing a second synchronization delay processing on the synchronization delay signal 1 according to the filter registration delay to obtain a synchronization delay signal 2; and selectively outputting the filtered signal and the synchronization delay signal 2 according to the detection result to obtain a filtered output signal, thereby solving the problem that in the existing filtering circuit, when filtering the video signal, the circuit power consumption increases due to filtering operations on both high-frequency signals and low-frequency signals.

Description

Technical Field

[0001] The present invention relates to the technical field of video signal processing, and in particular to a video signal filtering method, circuit and computer-readable storage medium. Background Art

[0002] The analog video signal includes a brightness signal, a chrominance signal, a color synchronization signal and a composite synchronization signal, wherein the brightness signal and the composite synchronization signal are low-frequency signal components, and the chrominance signal and the color synchronization signal are high-frequency signal components. In the digital circuit that decodes the analog video signal, it is necessary to process the high-frequency components through various filtering operations to separate the brightness signal, the chrominance signal, the color synchronization signal and the composite synchronization signal.

[0003] Among them, in digital circuits, the filtering circuit is usually composed of a large number of multiplication and addition operation structures, and starts working full-time after the circuit is powered on. When operating, the existing digital filtering usually performs filtering operations on both high-frequency signals and low-frequency signals. However, in fact, there is no need to filter the low-frequency signal interval. If filtering operations are performed, the circuit will generate power consumption due to the signal flipping in this interval, thereby increasing the power consumption of the circuit. Summary of the invention

[0004] In view of the shortcomings of the prior art, the present invention provides a filtering method, circuit and computer-readable storage medium for a video signal, which solves the problem that when the existing filtering circuit performs filtering operations on high-frequency signals and low-frequency signals during the filtering operation on the video signal, the circuit power consumption increases.

[0005] In order to solve the above technical problems, the present invention is solved by the following technical solutions:

[0006] A method for filtering a video signal comprises the following steps:

[0007] Receive a video signal, perform high and low frequency detection on the video signal, and output the detection result, wherein outputting the detection result includes marking each sample point interval of the video signal as a high frequency signal or a low frequency signal;

[0008] Performing a first synchronization delay processing on the video signal based on the high and low frequency detection to obtain a synchronization delay signal 1;

[0009] According to the detection result, the first synchronization delay signal is selectively filtered to obtain a filtered signal, and according to the filter storage delay, the first synchronization delay signal is subjected to a second synchronization delay processing to obtain a second synchronization delay signal;

[0010] According to the detection result, the filtered signal and the second synchronous delay signal are selectively output to obtain a filtered output signal.

[0011] Optionally, the high and low frequency detection includes the following steps:

[0012] Setting a high-frequency signal threshold and calculating the signal change amplitude between each current sample point signal and the previous sample point signal in the video signal;

[0013] Based on the signal change amplitude and the high-frequency signal threshold, determine the signal type of each current sample point signal, and count the high-frequency signals based on the signal type of each current sample point signal;

[0014] Based on the counting result of the high-frequency signal counting, the signal type of the sampling interval is obtained, wherein the sampling interval is a signal interval formed by a plurality of continuous sampling signals, and the length of the sampling interval is the minimum interval length of the high-frequency signal in the video signal.

[0015] Optionally, determining the signal type of each current sample signal and performing high-frequency signal counting based on the signal type of each current sample signal includes the following steps:

[0016] Determine whether the amplitude of each signal change is greater than or equal to the high-frequency signal threshold;

[0017] If yes, it is determined that the signal type of the current sample signal corresponding to the signal change amplitude is a high-frequency signal; if no, it is determined that the signal type of the current sample signal corresponding to the signal change amplitude is a low-frequency signal;

[0018] When the signal type is a high-frequency signal, determine whether the high-frequency signal count value is equal to the maximum count threshold, if so, the high-frequency signal is not counted; if not, the high-frequency signal count is increased by "1";

[0019] When the signal type is a low-frequency signal, determine whether the high-frequency signal count value is equal to the minimum count threshold. If so, the high-frequency signal is not counted; if not, the high-frequency signal count is reduced by "1", wherein the initial count value is the minimum count threshold, and the initial count value is the same as the number of samples in the sample interval.

[0020] Optionally, obtaining the signal type of the sampling interval based on the counting result of the high-frequency signal counting includes the following steps:

[0021] The counting results corresponding to each sample point interval of the video signal are compared for zero crossings. If the high-frequency signal count value in the counting result is greater than zero, the signal type of the sample point interval is determined to be a high-frequency signal, otherwise it is a low-frequency signal.

[0022] Optionally, during the first synchronous delay processing, the video signal is delayed according to the delay generated by the registers of the high and low frequency detection and the delay generated by the logic detection cycle of the high and low frequency detection.

[0023] Optionally, the selective filtering process comprises the following steps:

[0024] Performing filtering processing on the signal area corresponding to the sampling point interval marked as high-frequency signal in the synchronous delay signal 1;

[0025] In the synchronous delay signal, the signal region corresponding to the sampling interval marked as the low-frequency signal is not subjected to filtering processing.

[0026] Optionally, during the second synchronization delay processing, the synchronization delay signal 1 is delayed according to the delay generated by the register in the filter.

[0027] Optionally, selectively outputting the filtered output signal comprises the following steps:

[0028] When the sampling interval is a high-frequency signal, the area of ​​the filtered signal corresponding to the sampling interval is selected as the output;

[0029] When the sampling point interval is a low-frequency signal, the area of ​​the synchronous delay signal 2 corresponding to the sampling point interval is selected as the output.

[0030] A filtering circuit for a video signal, the filtering circuit for a video signal executes any one of the filtering methods for a video signal described above, comprising a high- and low-frequency detection circuit, a first delay synchronization circuit, a filtering circuit, a second delay synchronization circuit, a first selector, and a second selector, wherein the output ends of the high- and low-frequency detection circuits are respectively connected to the input ends of the first selector and the second selector, the output end of the first delay synchronization circuit is respectively connected to the input end of the filtering circuit and the input end of the second delay synchronization circuit, the output end of the filtering circuit and the output end of the second delay synchronization circuit are both connected to the input end of the second selector, and the output end of the first selector is connected to the input end of the filtering circuit;

[0031] The high and low frequency detection circuit is used to receive an input clock and a video signal, perform high and low frequency detection on the video signal, and output a detection result;

[0032] The first selector is used to output a digital signal according to the output detection result;

[0033] The delay synchronization circuit 1 is used to perform a first synchronization delay processing on the video signal based on high and low frequency detection to obtain a synchronization delay signal 1;

[0034] The filtering circuit is used to selectively filter the synchronous delay signal 1 according to the detection result to obtain a filtered signal;

[0035] The second delay synchronization circuit is used to perform a second synchronization delay process on the first synchronization delay signal according to the filter registration delay to obtain a second synchronization delay signal;

[0036] The second selector is used to selectively output the filtered signal and the second synchronous delay signal according to the detection result to obtain a filtered output signal.

[0037] A computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, any one of the above-mentioned methods for filtering a video signal is executed.

[0038] Compared with the prior art, the technical solution provided by the present invention has the following beneficial effects:

[0039] By performing high and low frequency detection on the video signal, the video signal is marked as a high frequency signal or a low frequency signal in the form of multiple sample intervals, so as to facilitate subsequent selective filtering of the video signal, thereby reducing the redundant circuit power consumption generated by filtering the low frequency signal;

[0040] Through the first synchronization delay processing, the synchronization delay signal is aligned with the high-frequency signal and the low-frequency signal in the video signal after the high-frequency and low-frequency detection, thereby ensuring that during the selective filtering processing, the high-frequency signal and the low-frequency signal determined in the video signal can be accurately selectively filtered to ensure the accuracy of the filtering result;

[0041] Through the second synchronization delay processing, the synchronization delay signal 2 is aligned with the filtered signal, thereby facilitating the accurate filtering output signal at the final output. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0043] Figure 1 This is a flow chart of a video signal filtering method proposed in the first embodiment;

[0044] Figure 2 This is a flow chart of high and low frequency detection proposed in the first embodiment;

[0045] Figure 3 The simulated waveform diagrams of various signals obtained by processing the filtering method of the video signal according to the first embodiment of the present invention;

[0046] Figure 4 This is a video signal filtering circuit proposed in the second embodiment. DETAILED DESCRIPTION

[0047] The present invention is further described in detail below in conjunction with embodiments. The following embodiments are for explanation of the present invention but the present invention is not limited to the following embodiments. Example

[0048] like Figure 1 As shown, a filtering method for a video signal includes the following steps: S100, receiving a video signal, performing high and low frequency detection on the video signal, and outputting the detection result, wherein the outputting the detection result includes marking each sample point interval of the video signal as a high frequency signal or a low frequency signal, and marking the video signal as a high frequency signal or a low frequency signal in the form of multiple sample point intervals by performing high and low frequency signal judgment on the video signal, so as to facilitate subsequent filtering processing of the high frequency signal, while the low frequency signal is not filtered, thereby reducing the excess circuit power consumption generated by the circuit filtering the low frequency signal.

[0049] Among them, Figure 2 As shown, high and low frequency detection includes the following steps:

[0050] S110, setting a high-frequency signal threshold, and calculating a signal change amplitude between each current sample point signal and a previous sample point signal in the video signal.

[0051] Specifically, in this embodiment, the signal change amplitude is a positive value, and its calculation formula is: , thus, it is convenient to judge the high-frequency signal of each sample point in the video signal by comparing the signal change amplitude with the set high-frequency signal threshold. It should be noted that the high-frequency signal threshold set in this embodiment can be flexibly set according to the characteristics of the actual video signal. The setting principle is: in the video signal, the change amplitude of the high-frequency signal interval sample point is one tenth of the overall amplitude; the calculation formula is: th=(S max -S min ) / 10, where th represents the high-frequency signal threshold; S max Indicates the maximum value of the video signal; S min Indicates the minimum signal value of the video signal.

[0052] S120 , judging the signal type of each current sample signal based on the signal change amplitude and the high-frequency signal threshold, and performing high-frequency signal counting based on the signal type of each current sample signal.

[0053] Specifically, the signal type of each current sample signal is determined, and high-frequency signals are counted based on the signal type of each current sample signal, including the following steps: determining whether each signal change amplitude is greater than or equal to a high-frequency signal threshold; if so, determining that the signal type of the current sample signal corresponding to the signal change amplitude is a high-frequency signal; if not, determining that the signal type of the current sample signal corresponding to the signal change amplitude is a low-frequency signal.

[0054] When the signal type is a high-frequency signal, determine whether the high-frequency signal count value is equal to the maximum count threshold. If so, the high-frequency signal is not counted; if not, the high-frequency signal count is increased by "1"; when the signal type is a low-frequency signal, determine whether the high-frequency signal count value is equal to the minimum count threshold. If so, the high-frequency signal is not counted; if not, the high-frequency signal count is reduced by "1", wherein the initial count value is the minimum count threshold, and the initial count value is the same as the number of samples in the sample interval.

[0055] Since the signal type judgment of a single sample point of the video signal cannot show the continuity of the signal change in the video signal, there is instability. If the signal type judgment result of a sample point signal is used as the basis for the final filtering processing, the load of the filtering processing will increase. Therefore, after judging the signal type of each sample point signal in the video signal, it is necessary to further use the counting function of the counter to count the high-frequency signal or low-frequency signal of the judgment result, so as to facilitate the judgment of the signal continuity, where the counting range of the counter is [minimum counting threshold, maximum counting threshold].

[0056] It should be noted that the initial value of the counter is set to the minimum interval length of the high-frequency signal in the video signal, and is expressed as a negative value. Before performing high and low frequency signal detection, the staff can obtain the minimum interval length of the high-frequency signal of the video signal to be detected in advance, and then perform signal counting. On the other hand, the negative value of the minimum interval length is also set as the minimum counting threshold in this embodiment, thereby ensuring that the high-frequency signal with the minimum interval length can be judged, avoiding misjudgment or omission of high-frequency signal detection.

[0057] Specifically, this embodiment is described by taking the minimum interval length of the high-frequency signal in the video signal as 16 as an example. At this time, the initial value of the counter is set to -16, and the minimum counting threshold is also set to -16.

[0058] At this time, if the current sample signal is determined to be a low-frequency signal, the counter is further judged whether the high-frequency signal count value is -16. If so, the counter does not count and maintains the current high-frequency signal count value to ensure that the high-frequency signal with the minimum interval length can be judged. If the high-frequency signal count value is not -16, the counter will reduce the high-frequency signal count value by "1" to count the continuous low-frequency signal.

[0059] If the current sample signal is determined to be a high-frequency signal, the counter is further judged whether the high-frequency signal count value is the maximum count threshold. If so, the counter does not count and maintains the current high-frequency signal count value. If the high-frequency signal count value is not the maximum count threshold, the counter adds "1" to the high-frequency signal count value.

[0060] S130. Obtain a signal type of a sampling interval based on a counting result of the high-frequency signal counting, wherein the sampling interval is a signal interval formed by a plurality of continuous sampling signals, and the length of the sampling interval is a minimum interval length of a high-frequency signal in a video signal.

[0061] Among them, based on the counting result of the high-frequency signal counting, the signal type of the sampling interval is obtained, which specifically includes the following steps: performing a zero-crossing comparison on the counting results corresponding to each sampling interval of the video signal, if the high-frequency signal count value in the counting result is greater than zero, then the signal type of the sampling interval is determined to be a high-frequency signal, otherwise it is a low-frequency signal.

[0062] The signal judgment of the sampling interval is used to solve the problem of instability in the detection results of a single sampling signal, thereby realizing the judgment of continuous high-frequency signals or low-frequency signals through the sampling interval, so as to increase the signal feature significance of high-frequency signals in the video signal and the signal feature significance of low-frequency signals, and at the same time reduce the load for subsequent filtering processing.

[0063] Specifically, when the high-frequency signal count value of the counter is greater than zero, it is considered that the previous length of the current signal is The sampling interval is a high-frequency signal.

[0064] After completing the high and low frequency signal detection, filtering can be performed, and the principle of filtering is that when HF - When en=1, signal filtering is performed and the filtered signal is output. - When en=0, no signal filtering is performed and a direct signal is output. The specific steps are as follows:

[0065] S200, performing a first synchronization delay processing on the video signal based on high and low frequency detection to obtain a synchronization delay signal 1, wherein, during the first synchronization delay processing, the video signal is delayed according to the delay generated by the register of the high and low frequency detection and the delay generated by the logic detection cycle of the high and low frequency detection.

[0066] Because when performing high and low frequency detection on the video signal, the registers in the circuit used for high and low frequency detection will produce a delay in units of clock cycles, and at the same time, the high and low frequency detection will also produce algorithmic delays, it is necessary to further perform delay processing on the video signal, and use the synchronous delay signal 1 after the delay processing as a filtering object for selective filtering, so that the synchronous delay signal 1 is aligned with the high-frequency signal and the low-frequency signal of the video signal after high and low frequency detection, thereby ensuring that during the filtering process, selective filtering can be performed accurately according to the high-frequency signal and the low-frequency signal judged in the video signal, thereby ensuring the accuracy of the filtering result.

[0067] S300, according to the detection result, selectively filter the synchronization delay signal 1 to obtain a filtered signal, and at the same time, according to the filter storage delay, perform a second synchronization delay processing on the synchronization delay signal 1 to obtain a synchronization delay signal 2.

[0068] Among them, the selective filtering processing includes the following steps: filtering the signal area in the synchronization delay signal corresponding to the sample point interval marked as the high-frequency signal; and not filtering the signal area in the synchronization delay signal corresponding to the sample point interval marked as the low-frequency signal.

[0069] Specifically, the sample point interval marked as a high-frequency signal in the video signal and the signal area corresponding to the synchronization delay signal are filtered, and the filtered signal of the interval segment is output; the sample point interval marked as a low-frequency signal in the video signal and the signal area corresponding to the synchronization delay signal are not filtered, and a pass-through signal is output; the filtered signals of each interval segment and the pass-through signal are combined according to the timestamp of the video signal to obtain a complete filtered signal.

[0070] On the other hand, since the registers in the circuit used for selective filtering will produce delays during selective filtering processing, it is necessary to further delay the synchronous delay signal one to obtain the synchronous delay signal two, so that the synchronous delay signal two is aligned with the complete filtering signal, thereby facilitating the accurate filtering output signal at the final output.

[0071] S400. According to the detection result, the filtered signal and the second synchronous delay signal are selectively output to obtain a filtered output signal, wherein during the second synchronous delay processing, the first synchronous delay signal is delayed according to the delay generated by the register in the filter.

[0072] Among them, selectively outputting the filtered output signal includes the following steps: when the sampling point interval is a high-frequency signal, selecting the area of ​​the filtered signal corresponding to the sampling point interval as the output; when the sampling point interval is a low-frequency signal, selecting the area of ​​the synchronous delay signal 2 corresponding to the sampling point interval as the output.

[0073] Since the sample interval output of the low-frequency signal is a direct-pass signal during the selective filtering process, and in order to ensure that the low-frequency signal in the final filtered output signal maintains high restoration of the original video signal, the low-frequency signal in the filtered output signal is kept consistent with the low-frequency signal in the video signal by selectively outputting the filtered signal and the synchronous delay signal 2.

[0074] like Figure 3 As shown in the figure, a certain video signal is selected to perform the above filtering method to obtain the signal simulation waveforms of each stage. It can be seen from the figure that HF_en (signal waveform after high and low frequency detection) has a certain delay compared with the video signal. Therefore, the video signal is subjected to the first synchronization delay processing to obtain the output signal after the first level of delay synchronization: synchronization delay signal one. Through the first synchronization delay processing, HF_en is aligned with synchronization delay signal one, and the HF_en=1 part is able to completely cover the high frequency part of synchronization delay signal one.

[0075] HF_en is used as an enable signal to selectively filter the synchronization delay signal 1 to obtain a filtered signal. When HF_en=1, the filtering circuit outputs the filtered data of the synchronization delay signal 1. When HF_en=0, the filtering work is stopped and the output remains the last output before HF_en is pulled low.

[0076] The second synchronous delay signal is the second-stage delayed output. Through the second synchronous delay processing, the second synchronous delay signal can be aligned with the filtered signal. Finally, HF_en is used to select the second synchronous delay signal and the filtered signal to obtain a filtered output signal containing only low-frequency signals. Example

[0077] like Figure 4 As shown, a filtering circuit for a video signal includes a high and low frequency detection circuit, a delay synchronization circuit 1, a filtering circuit, a delay synchronization circuit 2, a first selector and a second selector. The output ends of the high and low frequency detection circuits are respectively connected to the input ends of the first selector and the second selector. The output end of the delay synchronization circuit 1 is respectively connected to the input end of the filtering circuit and the input end of the delay synchronization circuit 2. The output end of the filtering circuit and the output end of the delay synchronization circuit 2 are both connected to the input end of the second selector. The output end of the first selector is connected to the input end of the filtering circuit.

[0078] The high and low frequency detection circuit is used to receive the input clock and video signal, and perform high and low frequency detection on the video signal, and output the detection result; the first selector is used to output the digital signal according to the output detection result; the delay synchronization circuit 1 is used to perform the first synchronization delay processing on the video signal based on the high and low frequency detection to obtain the synchronization delay signal 1; the filtering circuit is used to perform selective filtering processing on the synchronization delay signal 1 according to the detection result to obtain the filtered signal; the delay synchronization circuit 2 is used to perform the second synchronization delay processing on the synchronization delay signal 1 according to the filter storage delay to obtain the synchronization delay signal 2; the second selector is used to selectively output the filtered signal and the synchronization delay signal 2 according to the detection result to obtain the filtered output signal.

[0079] Specifically, Figure 4 Taking the filter circuit structure of the video signal shown in the figure as an example, the input clock signal clk and the video signal video - signal, filtered signal flt - signal.

[0080] First, the video signal passes through the high and low frequency detection circuit to obtain HF_en. When the signal is detected to be a high frequency signal, HF_en=1, otherwise HF_en=0.

[0081] Then the input video signal is subjected to the first synchronization delay processing through the delay synchronization circuit 1, so that the high frequency interval of the processed signal corresponds to HF_en, and a synchronization delay signal syn1_signal is obtained.

[0082] HF_en is used as the control enable to control the filter circuit clock switch. When HF_en=0, the filter circuit clock is pulled low and the filter circuit is in an off-state; when HF_en=1, the filter circuit clock is equal to the input clock clk and the filter circuit is in an on-state.

[0083] The synchronization delay signal syn1_signal after the first synchronization delay processing is further synchronized and delayed by the delay synchronization circuit 2 to ensure that the phase of the signal after the two synchronizations is aligned with the output signal of the filter circuit, thereby obtaining the synchronization delay signal syn2_signal.

[0084] Finally, HF_en is used as the enable signal to filter the signal flt through the second selector. - signal and the synchronization delay signal syn2_signal are selected. When HF_en=1, it indicates that the current video signal is in the high-frequency range and needs to be filtered, and the filtered signal is output; when HF_en=0, it indicates that the current video signal is in the low-frequency range and does not need to be filtered, and the filtered output signal is output.

[0085] Since the video signal filtering circuit of this embodiment implements the video signal filtering method shown in the first embodiment, it will not be described in detail in this embodiment. Example

[0086] A computer-readable storage medium stores a computer program. When the computer program is executed by a processor, a video signal filtering method of the first embodiment is implemented.

[0087] More specific examples of computer-readable storage media may include, but are not limited to, an electrical connection having one or more conductor segments, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), optical fiber, a portable compact disk-read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0088] In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, apparatus, or device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in combination with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to: wireless segments, wire segments, optical cables, RF, etc., or any suitable combination of the above.

[0089] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the modules, modules or units is only a logical function division, and there may be other division methods in actual implementation, for example, multiple units, modules or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0090] The units may or may not be physically separated, and the components displayed as units may be one physical unit or multiple physical units, that is, they may be located in one place or distributed in multiple different places. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0091] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0092] In particular, according to the embodiments disclosed in the present invention, the process described above with reference to the flowchart can be implemented as a computer software program. For example, the embodiments of the present disclosure include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from the network through the communication part, and / or installed from a removable medium. When the computer program is executed by the central processing unit (CPU), the above-mentioned functions defined in the method of the present application are executed. It should be noted that the above-mentioned computer-readable medium of the present application can be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium can be, for example, but not limited to, a system, device or device of an electrical, magnetic, optical, electromagnetic, infrared segment, or semiconductor, or any combination of the above.

[0093] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention. In this regard, each square box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two square boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0094] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for filtering a video signal, characterized in that: The following steps are involved: Receive a video signal, perform high and low frequency detection on the video signal, and output the detection result, wherein outputting the detection result includes marking each sample point interval of the video signal as a high frequency signal or a low frequency signal; Performing a first synchronization delay processing on the video signal based on the high and low frequency detection to obtain a synchronization delay signal 1; According to the detection result, the synchronization delay signal 1 is selectively filtered to obtain a filtered signal, and at the same time, according to the filter storage delay, the synchronization delay signal 1 is subjected to a second synchronization delay processing to obtain a synchronization delay signal 2, wherein the selective filtering processing includes the following steps: filtering the signal area corresponding to the sample point interval marked as a high-frequency signal in the synchronization delay signal 1; not filtering the signal area corresponding to the sample point interval marked as a low-frequency signal in the synchronization delay signal 1; According to the detection result, the filtered signal and the second synchronous delay signal are selectively output to obtain a filtered output signal.

2. A video signal filtering method according to claim 1, characterized in that: The high and low frequency detection comprises the following steps: Setting a high-frequency signal threshold and calculating the signal change amplitude between each current sample point signal and the previous sample point signal in the video signal; Based on the signal change amplitude and the high-frequency signal threshold, determine the signal type of each current sample point signal, and count the high-frequency signals based on the signal type of each current sample point signal; Based on the counting result of the high-frequency signal counting, the signal type of the sampling interval is obtained, wherein the sampling interval is a signal interval formed by a plurality of continuous sampling signals, and the length of the sampling interval is the minimum interval length of the high-frequency signal in the video signal.

3. A video signal filtering method according to claim 2, characterized in that: Determining the signal type of each current sample point signal and performing high frequency signal counting based on the signal type of each current sample point signal includes the following steps: Determine whether the amplitude of each signal change is greater than or equal to the high-frequency signal threshold; If yes, it is determined that the signal type of the current sample signal corresponding to the signal change amplitude is a high-frequency signal; if no, it is determined that the signal type of the current sample signal corresponding to the signal change amplitude is a low-frequency signal; When the signal type is a high-frequency signal, determine whether the high-frequency signal count value is equal to the maximum count threshold. If so, the high-frequency signal is not counted; if not, the high-frequency signal count is increased by "1"; When the signal type is a low-frequency signal, determine whether the high-frequency signal count value is equal to the minimum count threshold. If so, the high-frequency signal is not counted; if not, the high-frequency signal count is reduced by "1", wherein the initial count value is the minimum count threshold, and the initial count value is the same as the number of samples in the sample interval.

4. The method for filtering a video signal according to claim 2, characterized in that: Based on the counting result of the high-frequency signal counting, the signal type of the sampling point interval is obtained, including the following steps: The counting results corresponding to each sample point interval of the video signal are compared for zero crossings. If the high-frequency signal count value in the counting result is greater than zero, the signal type of the sample point interval is determined to be a high-frequency signal, otherwise it is a low-frequency signal.

5. The method for filtering a video signal according to claim 1, characterized in that: During the first synchronous delay processing, the video signal is delayed according to the delay generated by the registers of the high and low frequency detection and the delay generated by the logic detection cycle of the high and low frequency detection.

6. The method for filtering a video signal according to claim 1, characterized in that: During the second synchronization delay processing, the synchronization delay signal 1 is delayed according to the delay generated by the register in the filter.

7. The method for filtering a video signal according to claim 1, characterized in that: Selectively outputting a filtered output signal, comprising the following steps: When the sampling interval is a high-frequency signal, the area of ​​the filtered signal corresponding to the sampling interval is selected as the output; When the sampling point interval is a low-frequency signal, the area of ​​the synchronous delay signal 2 corresponding to the sampling point interval is selected as the output.

8. A video signal filtering circuit, characterized in that: The filtering circuit of the video signal executes the filtering method of the video signal according to any one of claims 1 to 7, comprising a high and low frequency detection circuit, a delay synchronization circuit 1, a filtering circuit, a delay synchronization circuit 2, a first selector and a second selector, the output ends of the high and low frequency detection circuits are respectively connected to the input ends of the first selector and the second selector, the output end of the delay synchronization circuit 1 is respectively connected to the input end of the filtering circuit and the input end of the delay synchronization circuit 2, the output end of the filtering circuit and the output end of the delay synchronization circuit 2 are both connected to the input end of the second selector, and the output end of the first selector is connected to the input end of the filtering circuit; The high and low frequency detection circuit is used to receive an input clock and a video signal, perform high and low frequency detection on the video signal, and output a detection result; The first selector is used to output a digital signal according to the output detection result; The delay synchronization circuit 1 is used to perform a first synchronization delay processing on the video signal based on high and low frequency detection to obtain a synchronization delay signal 1; The filtering circuit is used to selectively filter the synchronous delay signal 1 according to the detection result to obtain a filtered signal, wherein the selective filtering process includes the following steps: filtering the signal area corresponding to the sample point interval marked as the high-frequency signal in the synchronous delay signal 1; not filtering the signal area corresponding to the sample point interval marked as the low-frequency signal in the synchronous delay signal 1; The second delay synchronization circuit is used to perform a second synchronization delay process on the first synchronization delay signal according to the filter registration delay to obtain a second synchronization delay signal; The second selector is used to selectively output the filtered signal and the second synchronous delay signal according to the detection result to obtain a filtered output signal.

9. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the video signal filtering method according to any one of claims 1 to 7 is performed.

Images