A calibration model and resistance calibration method based on spin-orbit torque device

Abstract

The present invention proposes a calibration model based on a spin-orbit torque device and a resistance calibration method, including: the calibration model is a double-layer structure, the calibration model includes: a self-selected orbit torque device and a first current wire stacked from top to bottom; the first current wire is perpendicular to the plane writing current output port direction of the spin-orbit torque device; the two ends of the first current wire are used to input a calibration current signal, and a plane magnetic field is formed above the first current wire; the resistance of the spin-orbit torque device changes under the action of the plane magnetic field to complete the calibration. The present invention avoids the disadvantage of fixed resistance value caused by using the inherent resistance state of the device as the calibration resistance value, and the calibration resistance value is adjustable, thereby improving the expansibility and applicability of the calibration circuit.

Description

Technical Field

[0001] The present invention belongs to the technical field of in-memory signal processing, and in particular relates to a calibration model based on a spin-orbit torque device and a resistance calibration method. Background Art

[0002] The error calibration circuit of the digital-to-analog converter is a circuit that adjusts the parameters of the internal device of the DAC to ensure its output accuracy. Its speed, area, power consumption and offset performance have attracted much attention. With the reduction of device feature size, the improvement of design accuracy, and the risk challenges such as CMOS process mismatch, the resistance mismatch problem has become an indispensable consideration for the accuracy of DAC chips.

[0003] In order to overcome the problems faced by the error calibration circuit of the current CMOS digital-to-analog converter and realize a high-precision R-2R DAC, the mismatched resistor will be sampled and amplified by a current comparator based on an MTJ device. However, the existing CMOS comparator has the problem of transistor mismatch, and its output result usually requires the design of additional storage units. Therefore, in order to obtain a resistor with higher precision, improve the influence of non-ideal factors such as PVT under silicon semiconductor technology on the actual resistance value, and avoid signal interference caused by the use of analog circuits and analog signals, high-precision sampling of the reference resistor and the mismatched resistor, and then ensuring the accuracy of the R-2R DAC under all working conditions will become the main problem faced by high-bit SAR ADC in practical applications.

[0004] An accurate calibration method for mismatched resistor calibration, mismatched resistor detection circuit offset elimination, sampling and amplification suitable for R-2R DAC is an effective way to improve R-2R DAC; due to the influence of actual manufacturing conditions, the initial resistance value of each SOT-MTJ mismatched resistor cannot be accurately controlled, and thus the sampling and amplification time required for the mismatched resistor detection circuit cannot be accurately controlled; at the same time, when the calibration circuit is used to amplify the resistor mismatch, its calibration process also requires corresponding timing control; therefore, how to accurately control the sampling and amplification time while correctly introducing the timing control of the calibration of each mismatched resistor will be the key problem to be solved in order to correctly realize the high-precision R-2R DAC and obtain the high-precision and high-effective-bit SAR ADC. Summary of the invention

[0005] The purpose of the present invention is to provide a calibration model and a resistance calibration method based on a spin-orbit torque device, and to realize in-memory signal processing by using the spin-orbit torque device.

[0006] To achieve the above object, the present invention provides a calibration model based on a spin-orbit torque device, characterized in that the calibration model is a double-layer structure, comprising: a spin-orbit torque device and a first current conductor stacked from top to bottom;

[0007] The first current wire is perpendicular to the plane write current output port of the spin-orbit torque device;

[0008] The two ends of the first current wire are used to input a calibration current signal, and a planar magnetic field is formed above the first current wire;

[0009] The resistance of the spin-orbit torque device changes under the action of the planar magnetic field, thereby completing the calibration.

[0010] Optionally, the self-selected orbit torque device is a Hall bar heterojunction device or an MTJ device.

[0011] The present invention also provides a resistance calibration method based on a spin-orbit torque device, the resistance calibration method comprising:

[0012] Inputting a write current to a planar write current input port of a spin-orbit torque device in a calibration model;

[0013] Connecting a calibration current source and a ground wire to both ends of a first current wire of the calibration model respectively, forming a planar magnetic field above the first current wire, acting on the spin-orbit torque device, and changing the resistance of the spin-orbit torque device;

[0014] Under the action of the calibration loop, whether the calibration process is completed is determined based on the comparison result between the calibration model and the reference resistance. When the comparison result output flag signal is high, it means that the resistance of the calibration model is calibrated to be consistent with the reference resistance, and the calibration is completed.

[0015] The present invention also provides a calibration model based on a spin-orbit torque device, wherein the calibration model is a three-layer structure, comprising: a second current wire, a spin-orbit torque device and a third current wire stacked from top to bottom;

[0016] The spin-orbit torque device is placed at the center between two current wires, and the second current wire and the third current wire are parallel and perpendicular to the direction of the planar write current input port of the spin-orbit torque device.

[0017] Optionally, the spin-orbit torque device is a Hall bar heterojunction device or an MTJ device.

[0018] The present invention also provides a resistance calibration method based on a spin-orbit torque device, the resistance calibration method comprising:

[0019] A reference current and a calibration current are respectively input into the same side ports of the second current wire and the third current wire in the calibration model, so as to generate a planar magnetic field in opposite directions at the location of the spin-orbit torque device, which acts on the spin-orbit torque device and changes the resistance of the spin-orbit torque device; wherein the magnitude of the planar magnetic field acting on the spin-orbit torque device is ΔH=H 2 -H 1 , H 1 , H 2 Two currents generate planar magnetic fields in opposite directions at the location of the spin-orbit torque device;

[0020] Inputting a write current to a planar write current input port of the spin-orbit torque device in the calibration model;

[0021] Under the action of the calibration loop, whether the calibration process is completed is determined based on the comparison result between the calibration model and the reference resistance. When the comparison result output flag signal is high, it means that the resistance of the calibration model is calibrated to be consistent with the reference resistance, and the calibration is completed.

[0022] The present invention also provides a calibration model based on a spin-orbit torque device, the calibration model comprising: a sampling circuit, a comparator, an R-2R type DAC array, a DAC calibration circuit and a digital control circuit;

[0023] The R-2R type DAC array includes: a co-directional amplifier and a double-layer calibration module array,

[0024] The double-layer calibration module array comprises: a plurality of spin-orbit torque devices and a plurality of fourth current wires; a fourth current wire is provided at the bottom layer of each spin-orbit torque device, and the fourth current wire is parallel to and perpendicular to the direction of the plane write current input port of the spin-orbit torque device;

[0025] The ports of the fourth current conductors are used to input a plurality of calibration currents to generate planar magnetic fields of different magnitudes at locations where the spin-orbit torque devices are located; the resistance of each spin-orbit torque device changes under the action of the planar magnetic field.

[0026] Optionally, the spin-orbit torque device is a Hall bar heterojunction device or an MTJ device.

[0027] The present invention also provides a resistance calibration method based on a spin-orbit torque device, the resistance calibration method comprising:

[0028] The calibration circuit discharges the capacitor by controlling the switch signal, and then calibrates the calibration module by controlling the state of the NMOS tube. When performing resistance calibration, the capacitor is continuously charged, the gate voltage of the NMOS tube increases, and the calibration current is input into the current conductor of the model to be calibrated. The input current ΔI is used to change the magnetic field ΔH, thereby changing the device resistance ΔR. The reference resistance and the resistance value of the device to be calibrated are converted from the reference voltage into a current signal, which is input into the current comparator based on the MTJ device. According to the device resistance R MTJ and reference resistor R ref The current comparison result is used to judge the device calibration process, and finally when the calibration circuit output flag is at a high level, the resistance calibration function is completed; then, the digital control module replaces the calibration device with the next one, and the calibration module is reset again, and then the resistance value of each calibration module in the R-2R type DAC array is calibrated in turn.

[0029] The present invention has the following beneficial effects:

[0030] In the present invention, the device calibration process is judged according to the comparison result between the device resistance and the reference resistance, and finally when the calibration circuit outputs the flag "1", the resistance calibration function is completed, wherein the calibration resistance value is adjustable, and the calibration result is the resistance value of the final SOT device, and no additional storage circuit is needed to store the calibration result.

[0031] The present invention avoids the disadvantage of fixed resistance caused by using the inherent resistance state of the device as the calibration resistance, the calibration resistance is adjustable, and the expansibility and applicability of the calibration circuit are improved.

[0032] Compared with the traditional CMOS-based calibration circuit, the present invention utilizes a single spin-orbit torque device to realize the calibration function, which has an advantage in terms of area.

[0033] Since spin electronic devices themselves have the advantages of non-volatility, high durability, and high speed, using spin electronic devices to implement calibration models is expected to solve the leakage, speed and other problems in current traditional CMOS comparators. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0035] Figure 1 Schematic diagram of the structure of a double-layer calibration model according to an embodiment of the present invention; wherein (a) is a schematic cross-sectional diagram of the calibration module, and (b) is a specific film layer structure of the Hall bar heterojunction of the SOT device;

[0036] Figure 2A schematic diagram of a calibration model test circuit of a current wire / SOT Hall bar heterojunction device double-layer structure based on a spin-orbit torque device according to an embodiment of the present invention;

[0037] Figure 3 Schematic diagram of the structure of a three-layer calibration model according to an embodiment of the present invention, wherein (a) is a schematic diagram of a device cross-section, and (b) is a specific film layer structure of a Hall bar heterojunction of a SOT device;

[0038] Figure 4 A schematic diagram of a calibration model test circuit of a current wire / SOT-MTJ device / current wire three-layer structure based on a spin-orbit torque device according to an embodiment of the present invention;

[0039] Figure 5 A schematic structural diagram of an R-2R type DAC double-layer structure calibration model array according to an embodiment of the present invention;

[0040] Figure 6 Schematic diagram of simulation results of an R-2R type DAC array based on a double-layer structure calibration model according to an embodiment of the present invention; wherein (a) is a simulation summary diagram of resistance calibration of 26 MTJs in the R-2R type DAC array, and (b) is a comparison simulation waveform before and after calibration of the R-2R type DAC array;

[0041] Figure 7 It is a structural schematic diagram of an "8-bit successive approximation ADC" based on a double-layer structure calibration model according to an embodiment of the present invention;

[0042] Figure 8 This is a simulation result diagram of an “8-bit successive approximation ADC” based on a double-layer structure calibration model according to an embodiment of the present invention. DETAILED DESCRIPTION

[0043] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0044] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0045] As a new type of electronic device, the spin-orbit torque device (hereinafter referred to as MTJ) can adjust its conductance state by applying external excitation. Before the comparator of the SAR ADC compares the input voltage, it is usually necessary to calibrate each conductance value in the R-2R type DAC array to the expected conductance value. For example, the operation of the DAC array includes the initialization operation and calibration operation of adjusting the resistance value of each MTJ, and the sampling operation applied to each calibration module in the DAC array.

[0046] After calibrating the conductance of each MTJ in the DAC array, the resistance value (or conductance value) of the MTJ unit can be read by a reading circuit, and the reading circuit can detect the current flowing through the MTJ and convert the detected value of the current into a corresponding digital value.

[0047] The operation of the MTJ array is to complete the multiplication and accumulation calculation in parallel according to Kirchhoff's law and Ohm's law, and the storage and calculation of data can be completed by each device of the MTJ array, avoiding the overhead of data movement in the von Neumann architecture.

[0048] Embodiment 1

[0049] The present embodiment provides a calibration model based on a spin-orbit torque device, which is a double-layer structure, including: a first current wire and a spin-orbit torque device stacked from top to bottom; the first current wire is perpendicular to the planar write current direction of the spin-orbit torque device; the two ends of the first current wire are respectively used to input a calibration current or voltage, forming a planar magnetic field below the first current wire, which acts on the spin-orbit torque device; the resistance of the spin-orbit torque device changes under the action of the magnetic field.

[0050] Furthermore, the spin-orbit torque device is a Hall bar heterojunction device or an MTJ device.

[0051] In order to better illustrate the solution of this embodiment, the following example is given.

[0052] The embodiment of the present invention provides a calibration model of a double-layer structure of a current wire / SOT Hall bar heterojunction device based on a spin-orbit torque device. Figure 1 The schematic diagram of the structure of a double-layer calibration model is shown. (a) is a cross-sectional diagram of the calibration module, and (b) is a specific film structure of the SOT device Hall bar heterojunction. The film structure is substrate / SOT Hall bar heterojunction device / insulating layer / current conductor from bottom to top. The substrate is the carrier of the entire device, and the commonly used material is Si or SiO 2The current conductor is used to generate a planar magnetic field. Au, Ag, etc. are generally used as the growth material of the current conductor. The insulating layer is used to block the current conductor and the SOT device to prevent leakage from affecting the SOT device. Al is generally used. 2 O 3 , MgO and other materials, (c) Calibration circuit based on the double-layer calibration model.

[0053] As an embodiment of the present invention, a method for implementing resistance calibration using the above calibration model is provided. Specifically, a resistance calibration method is provided, wherein the calibration model described in the first embodiment is used to perform the following steps:

[0054] like Figure 2 , which is a schematic diagram of a calibration model test circuit for a current wire / SOT Hall bar heterojunction device double-layer structure based on a spin-orbit torque device provided in an embodiment of the present invention;

[0055] Inputting a write current into a planar write current input port of the spin-orbit torque device in the calibration model, wherein the direction of the write current affects the initial state of the spin-orbit torque device;

[0056] Connecting a calibration current source and a ground wire to both ends of a first wire of the calibration model, respectively, to form a planar magnetic field above the first wire to act on the spin-orbit torque device, wherein the magnitude of the calibration current is such that the resistance of the spin-orbit torque device is linearly related to the current on the first current wire;

[0057] Under the action of the calibration loop, the calibration process is determined to be completed based on the comparison result between the calibration model and the reference resistance. When the comparison result outputs a flag signal "1", the resistance of the calibration model is calibrated to be consistent with the reference resistance, and the calibration is completed.

[0058] In this embodiment, based on the relationship between the linear change of the anomalous Hall resistance of a spin-orbit torque device (SOT device) and the planar magnetic field within a certain range, a current conductor is laid on the upper or lower layer of the SOT device. The anomalous Hall resistance of the device will be proportional to the current on the current conductor, thereby realizing linear regulation of the device resistance by the calibration current.

[0059] Embodiment 2

[0060] A calibration model based on a spin-orbit torque device provided in an embodiment of the present invention is a three-layer structure, comprising: a second current wire, a spin-orbit torque device and a third current wire which are stacked in sequence; the spin-orbit torque device is placed at the center between the two current wires, the second current wire and the third current wire are parallel and perpendicular to the direction of the plane writing current input port of the spin-orbit torque device, the same side ports of the second current wire and the third current wire are respectively input with a reference current and a calibration current, and the two currents generate a plane magnetic field H in opposite directions at the location of the spin-orbit torque device. 1 , H 2 , the magnitude of the plane magnetic field acting on the spin-orbit torque device is ΔH=H 2 -H 1 , the resistance of the spin-orbit torque device changes under the action of ΔH, Figure 3 A structural schematic diagram of a three-layer calibration model is shown, wherein (a) is a cross-sectional schematic diagram of a spin-orbit torque device, and (b) is a specific film layer structure of a Hall bar heterojunction of a SOT device.

[0061] Furthermore, the spin-orbit torque device is a Hall bar heterojunction device or an MTJ device.

[0062] As an embodiment of the present invention, a method for implementing resistance calibration using the above calibration model is provided. Specifically, a resistance calibration method is provided, wherein the calibration model described in the first embodiment is used to perform the following steps:

[0063] like Figure 4 As shown, it is a schematic diagram of a calibration model test circuit of a current wire / SOT-MTJ device / current wire three-layer structure based on a spin-orbit torque device provided by an embodiment of the present invention;

[0064] Inputting a write current into a planar write current input port of the spin-orbit torque device in the calibration model, wherein the direction of the write current affects the initial state of the spin-orbit torque device;

[0065] Connecting a calibration current source and a ground wire to both ends of a first wire of the calibration model, respectively, to form a planar magnetic field above the first wire to act on the spin-orbit torque device, wherein the magnitude of the calibration current is such that the resistance of the spin-orbit torque device is linearly related to the current on the first current wire;

[0066] Under the action of the calibration loop, the calibration process is determined to be completed based on the comparison result between the calibration model and the reference resistance. When the comparison result outputs a flag signal "1", the resistance of the calibration model is calibrated to be consistent with the reference resistance, and the calibration is completed.

[0067] The positive input terminal of the current comparator based on the MTJ device is connected to the readout port of the calibration model, the negative input terminal of the comparator is connected to one end of the reference resistor, the output signal of the comparator and the reset signal are connected to the input terminal of the logic control circuit, the output terminal of the logic control circuit is connected to the gate of the PMOS, the source of the PMOS is connected to the power supply, and the drain of the PMOS is connected to one end of the capacitor; this end of the capacitor is connected to the power ground through a switch enabled by the reset signal, and is connected to the source of the NMOS through a switch not enabled by the reset signal; the other end of the capacitor is connected to the power ground; the source of the NMOS is connected to the power ground, and the drain of the NMOS is connected to the planar write current input port of the spin-orbit torque device in the calibration model, thereby forming a calibration loop.

[0068] According to the relationship between the linear change of the anomalous Hall resistance of the spin-orbit torque device (SOT device) and the planar magnetic field within a certain range, this embodiment lays current wires on the upper and lower layers of the SOT device. The anomalous Hall resistance of the device will be proportional to the current on the current wire, thereby realizing linear regulation of the device resistance by the calibration current.

[0069] Embodiment 3

[0070] The embodiment of the present invention provides a calibration model based on a spin-orbit torque device, the calibration model comprising: a sampling circuit, a comparator, an R-2R type DAC array, a DAC calibration circuit and a digital control circuit;

[0071] The input of the sampling circuit is connected to the input signal source, and the output is connected to the positive input of the current comparator based on the MTJ device. The feedback analog voltage V output by the R-2R DAC array is DAC Connected to the negative input of the comparator, the reference voltage V ref Connected to the reference voltage input terminal of the R-2R DAC array. The output signal of the comparator is input to the digital control circuit, which outputs an N-bit digital signal. The N-bit digital signal is input to the control signal input terminal of the R-2R DAC array to control the output voltage V of the R-2R DAC array. DAC The control input of the DAC calibration circuit is connected to the digital control circuit, and the calibration port is connected to the R-2R type DAC array.

[0072] The R-2R type DAC array includes: a co-directional amplifier and a double-layer calibration module array, the read ports of the calibration modules are connected in sequence to form an R-2R type resistor array, the output end of the resistor array is connected to the input end of the co-directional amplifier, and the output end of the co-directional amplifier is the output end of the R-2R type DAC array.

[0073] The double-layer calibration module array comprises: a plurality of spin-orbit torque devices and a plurality of fourth current wires; a fourth current wire is provided at the bottom layer of each spin-orbit torque device, and the fourth current wire is parallel to and perpendicular to the direction of the plane write current input port of the spin-orbit torque device;

[0074] The ports of the fourth current conductors are used to input a plurality of calibration currents to generate planar magnetic fields of different magnitudes at locations where the spin-orbit torque devices are located; the resistance of each spin-orbit torque device changes under the action of the planar magnetic field.

[0075] In this embodiment, it specifically includes: (3n+2) spin-orbit torque devices, (3n+2) fourth current wires (where n is the number of DAC input bits), a calibration circuit and a digital control circuit; the fourth current wire is correspondingly arranged at the bottom layer of the spin-orbit torque device; the fourth current wire is parallel to and perpendicular to the direction of the plane write current input port of the spin-orbit torque device;

[0076] The ports of the (3n+2) fourth current conductors are used to input (3n+2) calibration currents to generate planar magnetic fields ΔH of different magnitudes at the locations of the spin-orbit torque devices. j , j=l, ..., n; the resistance of each spin-orbit torque device changes under the action of ΔH;

[0077] Write currents of the same direction and magnitude are input to the planar write current input ports of (3n+2) spin-orbit torque devices. The magnitude of the write current makes the resistance of each spin-orbit torque device linearly related to the current on its current wire.

[0078] The embodiment of the present invention further provides a resistance calibration method based on a spin-orbit torque device, the resistance calibration method comprising:

[0079] Resistance calibration methods include:

[0080] The positive input terminal of the comparator based on the spin-orbit torque device is connected to the readout port of the calibration model, the negative input terminal of the comparator is connected to one end of the reference resistor, the output signal of the comparator and the reset signal are connected to the input terminal of the logic control circuit, the output terminal of the logic control circuit is connected to the gate of the PMOS, the source of the PMOS is connected to the power supply, and the drain of the PMOS is connected to one end of the capacitor; this end of the capacitor is connected to the power ground through a switch enabled by the reset signal, and is connected to the source of the NMOS through a switch not enabled by the reset signal logic; the other end of the capacitor is connected to the power ground; the source of the NMOS is connected to the power ground, and the drain of the NMOS is connected to the planar write current input port of the spin-orbit torque device in the calibration model, thereby forming a calibration loop;

[0081] Using a multiplexer, one calibration model in the R-2R DAC array is selected at a time, disconnected from the R-2R DAC array, and connected to the calibration loop for calibration; after completing the calibration of one device, the calibration model is disconnected and connected back to the R-2R DAC array, and then the next calibration model in the R-2R DAC array is selected until the calibration of all desired calibration models is achieved.

[0082] In this embodiment, the calibration process of a single calibration model consists of two alternating stages. In the first stage, the calibration circuit discharges the capacitor by controlling the switch signal, and then calibrates the calibration module by controlling the state of the NMOS tube; when performing resistance calibration, the capacitor is continuously charged, the gate voltage of the NMOS tube increases, and the calibration current is input into the current conductor of the model to be calibrated. The input current ΔI is used to change the magnetic field ΔH, thereby changing the device resistance ΔR. The reference resistance and the resistance value of the device to be calibrated are converted from the reference voltage into a current signal, which is input into the current comparator based on the MTJ device. According to the device resistance R MTJ and reference resistor R ref The current comparison result is used to judge the device calibration process, and finally when the calibration circuit output flag is at a high level, the resistance calibration function is completed; then, the digital control module replaces the calibration device with the next one, and the calibration module is reset again, and then the resistance value of each calibration module in the R-2R type DAC array is calibrated in turn.

[0083] The R-2R type digital-to-analog converter is composed of a co-directional amplifier and a double-layer calibration module array. The read ports of the calibration modules are connected in sequence to form an R-2R type resistor array. The output end of the resistor array is connected to the input end of the co-directional amplifier. Digital signals are input into the input port of the R-2R type resistor array in sequence, and are output as analog signals after being converted by the co-directional amplifier.

[0084] The embodiment of the present invention provides a digital-to-analog converter calibration method based on an R-2R type DAC double-layer structure calibration model array of an MTJ array. Figure 5 A schematic structural diagram of an R-2R type DAC double-layer structure calibration model array is shown;

[0085] like Figure 5 As shown, the equivalent resistance value seen from any node of the array is R, and the reference current V ref The current on each branch from left to right can be increased proportionally. The state of N select switches controlled by binary code determines whether the free end of the resistor is connected to the reverse end of the comparator or the ground. If the binary code is "1", the select switch is connected to the reverse end of the comparator; if the binary code is 0, the select switch is grounded. Analysis of the current on each branch shows: reference current V ref The current flowing through the resistors 2R and R through the rightmost node is IR =V REF / 2R, and then the current flowing through the resistors 2R and R is divided through the second right end node to become I R / 2, and so on from right to left, the current flowing through a group of resistors is half of the current flowing through the previous group, and the current flowing through the leftmost resistor 2R is I R / 2 N-1 .

[0086] The initial resistance of the MTJ device, or the slope of resistance versus write current, is affected by D2D and C2C deviations, preventing the establishment of an accurate relationship between write current and expected MTJ resistance. To address this issue, a thin-film resistor is introduced as a reference for each calibration module, ensuring that the calibration is done solely by the module's resistance, not other indirect parameters.

[0087] The calibration process of a single calibration model consists of two alternating phases. In the first phase, the calibration circuit discharges the capacitor through the Reset signal, and then calibrates the calibration module through the Control / Reset signal; when calibrating the resistor, C gate Continuous charging, M wr The gate voltage increases, and the calibration current I Au Input the current wire of the model to be calibrated. The input current ΔI is used to change the magnetic field ΔH, thereby changing the device resistance ΔR and the reference resistance R ref The resistance of the device to be calibrated R_MTJ is determined by the reference voltage V ref Converted into a current signal, input into the current comparator based on the MTJ device, according to the device resistance R MTJ and reference resistor R ref The current comparison result is used to determine the device calibration process. Finally, when the calibration circuit outputs the flag bit "1", the resistance calibration function is completed.

[0088] Then, the digital control module replaces the calibration device with the next one, and the calibration module is reset again, and then the resistance value of each calibration module in the R-2R type DAC double-layer structure calibration model array based on the MTJ array is calibrated in turn.

[0089] Figure 6 The simulation results of the R-2R type DAC double-layer structure calibration model array based on the MTJ array are shown, where: Figure 6 (a) is a summary diagram of the resistance calibration simulation of 26 MTJs in the R-2R DAC array, where the horizontal axis is the calibration time and the vertical axis is the resistance of the calibration model. According to the simulation results, after the resistance of each MTJ is calibrated, the overall resistance difference before and after calibration is significantly reduced; Figure 6(b) is the output transient waveform of the R-2R DAC based on the MTJ array before and after calibration and the deviation from the ideal value. In the figure, the horizontal axis is the calibration time and the vertical axis is the DAC output voltage value. The DAC output voltage before and after calibration is compared with the ideal DAC output voltage. The simulation results show that the calibration circuit can effectively improve the output voltage accuracy of the DAC.

[0090] Furthermore, the spin-orbit torque device is a Hall bar heterojunction device or an MTJ device.

[0091] As another embodiment of the present invention, a method for implementing successive approximation analog-to-digital conversion using the above-mentioned digital-to-analog converter is provided. Specifically, an analog-to-digital conversion method is provided, wherein the digital-to-analog converter as described above is used to perform the following steps:

[0092] like Figure 7 As shown in FIG. 1 , a schematic diagram of the structure of an “8-bit successive approximation ADC” based on a double-layer structure calibration model provided by an embodiment of the present invention includes five parts: a sampling circuit, a comparator, an R-2R type DAC array, a DAC calibration circuit, and a digital control circuit; the analog input signal outputs a voltage V after passing through the sampling circuit. in , voltage V ref is the reference voltage of the DAC circuit, voltage V in The feedback voltage VDAC of the DAC circuit is connected to the positive and negative input terminals of the comparator respectively. The output signal of the comparator is output as an N-bit digital signal through the digital control circuit. The N-bit digital signal is also used as a control signal of the R-2R type DAC circuit to control the value of the DAC output voltage VDAC. Among them, the DAC calibration circuit first calibrates the R-2R type DAC array under the action of the digital control circuit. After the calibration, the DAC array is connected to the SAR ADC circuit for analog-to-digital conversion.

[0093] The basic working principle of the SAR ADC circuit: First, the highest bit of the SAR ADC circuit is preset to "1", and the other bits are preset to "0" (low level). At this time, the output voltage V DAC1 =V REF / 2, and the voltage V in For comparison, if V in >V ref / 2, the comparator output is 1, that is, the highest bit of the SAR ADC circuit is determined to be "1"; on the contrary, if V in <V ref / 2, the comparator output is 0, that is, the highest bit of the SAR ADC circuit is determined to be "0", then the digital control circuit controls the comparison of the next bit, and the second highest bit of the SAR ADC circuit is preset to "1", which is consistent with the voltage V inThe comparison result is used to determine the value of the second highest bit, and so on, until the lowest bit is determined. The N-digital signal finally converted is the final output result.

[0094] Figure 8 A simulation result diagram of an "8-bit successive approximation ADC" based on a double-layer structure calibration model provided by an embodiment of the present invention; V in is the input signal waveform, D7~D0 are 8 digital output results, V out The 8-bit digital output is the corresponding analog signal obtained by decoding the DAC. According to the simulation results, there is no missing code or bit error in the ADC.

[0095] In summary, the embodiments of the present invention implement two calibration models based on SOT devices, the first of which is a double-layer structure of current wire / SOT device, and the second is a three-layer structure of current wire / SOT device / current wire. At the same time, a solution for implementing SAR ADC based on a calibration model of a double-layer structure of SOT device / current wire is provided. Based on the proposed calibration model, a SAR ADC that does not require initialization, has high precision, and has strong scalability is implemented, which provides ideas for the application of spin electronic devices in the field of in-memory signal processing.

[0096] In this embodiment, according to the relationship between the linear change of the resistance of the spin-orbit torque device and the plane magnetic field within a certain range, current wires are laid above / below the SOT device, and the resistance R H The current I DC Proportional to achieve I DC R H The calibration process consists of two alternating stages. In the first stage, the calibration circuit discharges the capacitor through the Reset signal, and then calibrates the calibration module through the control / Reset signal; when calibrating the resistance, the calibration current is input into the current conductor of the model to be calibrated, and the input current ΔI is used to change the magnetic field ΔH, thereby changing the device resistance ΔR. The device calibration process is judged based on the comparison result between the device resistance and the reference resistance. Finally, when the calibration circuit outputs the flag "1", the resistance calibration function is completed, in which the calibration resistance value is adjustable, and the calibration result is the final resistance value of the SOT device, and no additional storage circuit is required to store the calibration result.

[0097] There are a few points to note:

[0098] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design;

[0099] (2) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0100] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A calibration model based on a spin-orbit torque device, characterized in that: The calibration model includes: a sampling circuit, a comparator, an R-2R type DAC array, a DAC calibration circuit and a digital control circuit; The input end of the sampling circuit is connected to the input signal source, the output end of the sampling circuit is connected to the positive input end of the comparator based on the spin-orbit torque device, the output end of the R-2R type DAC array is connected to the negative input end of the comparator, the output signal of the comparator is input to the digital control circuit, and an N-bit digital signal is output. The N-bit digital signal is input to the control signal input end of the R-2R type DAC array, which is used to control the output voltage V of the R-2R type DAC array DAC The control input of the DAC calibration circuit is connected to the digital control circuit, and the calibration port is connected to the R-2R type DAC array; The R-2R type DAC array comprises: a co-directional amplifier and a double-layer calibration module array; The double-layer calibration module array comprises: a plurality of spin-orbit torque devices and a plurality of fourth current wires; a fourth current wire is provided at the bottom layer of each spin-orbit torque device, and the fourth current wire is parallel to and perpendicular to the direction of the plane write current input port of the spin-orbit torque device; The ports of the fourth current conductors are used to input a plurality of calibration currents to generate planar magnetic fields of different magnitudes at locations where the spin-orbit torque devices are located; the resistance of each spin-orbit torque device changes under the action of the planar magnetic field.

2. The calibration model based on spin-orbit torque device according to claim 1, characterized in that: The spin-orbit torque device is a Hallbar heterojunction device or an MTJ device.

3. A resistance calibration method based on a spin-orbit torque device, characterized in that: Using the calibration model based on the spin-orbit torque device as described in any one of claims 1-2, the resistance calibration method comprises: The positive input terminal of the comparator based on the spin-orbit torque device is connected to the readout port of the calibration model, the negative input terminal of the comparator is connected to one end of the reference resistor, the output signal of the comparator and the reset signal are connected to the input terminal of the logic control circuit, the output terminal of the logic control circuit is connected to the gate of the PMOS, the source of the PMOS is connected to the power supply, and the drain of the PMOS is connected to one end of the capacitor; this end of the capacitor is connected to the power ground through a switch enabled by the reset signal, and is connected to the source of the NMOS through a switch not enabled by the reset signal logic; the other end of the capacitor is connected to the power ground; the source of the NMOS is connected to the power ground, and the drain of the NMOS is connected to the planar write current input port of the spin-orbit torque device in the calibration model, thereby forming a calibration loop; Using a multiplexer, one calibration model in the R-2R DAC array is selected at a time, disconnected from the R-2R DAC array, and connected to the calibration loop for calibration; after completing the calibration of one device, the calibration model is disconnected and connected back to the R-2R DAC array, and then the next calibration model in the R-2R DAC array is selected until the calibration of all desired calibration models is achieved.

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