UVM Verification Platform and Verification Method

Abstract

The present application discloses a UVM verification platform and a verification method, which is applied to the UVM verification platform, and the UVM verification platform is connected to a device under test, and the verification method includes: randomly generating a credit test stimulus according to a first preset interval time range; generating a flow control unit test stimulus equal to the number of the credit test stimulus according to a second preset interval time range or a preset interval time; and verifying the function of the device under test sending a flow control unit externally according to the credit test stimulus and the flow control unit test stimulus. Among them, by changing the first preset interval time range and the second preset interval time range, the generation rate of the credit test stimulus and the flow control unit test stimulus can be changed, thereby simulating multiple states between the credit and the flow control unit in the actual process of sending the flow control unit, thereby improving the coverage rate of the functional verification of the device under test sending the flow control unit externally.

Description

Technical Field

[0001] The present application belongs to the field of UVM verification technology, and in particular, relates to a UVM verification platform and a verification method. Background Art

[0002] The CHI (Coherent Hub Interface) protocol is a high-performance, high-bandwidth interface protocol, mainly used for cache consistency and memory access in multi-processor systems. The CHI protocol is divided into a protocol layer, a network layer, and a link layer. The link layer is used to manage data transmission between RN (Requester Node) or SN (Subordinate Node) nodes and ICN (Interconnect) to prevent data loss and network layer congestion. ICN is a CHI transmission mechanism for communication between protocol layer nodes, which can include protocol layer nodes such as HN (Home Node). The link layer uses Flit (Flow Control Unit) as the basic transmission unit.

[0003] The two ends of the link layer are connected to the sender for sending Flit and the receiver for receiving Flit. The credit mechanism in the CHI protocol ensures that data is transmitted efficiently and securely between the sender and the receiver, avoiding channel congestion and data loss. For example, when the sender is ICN and the receiver is RN, when RN sends a read request to ICN and needs to obtain data from the next-level cache or memory, if the data exists in the next-level cache or memory, ICN will combine the data with other information (including source node ID, HN ID, destination node ID, transaction type (opcode), request transaction ID, etc.) and reply to RN in the form of Flit. Since the sender must obtain credit to pass Flit to the receiver, and the sender consumes one credit when sending a Flit, ICN as the sender needs to have a number of credits equal to or more than the number of Flits to successfully send Flits.

[0004] UVM (Universal Verification Methodology) is a standard methodology for hardware verification, which is widely used in all stages of integrated circuit design. The function verification of the transmitter of the link layer sending Flit externally can be verified by using the transmitter of the link layer as the device under test and verifying it based on the UVM verification platform. In the related art, the coverage of this verification is low, and how to improve the coverage of this verification is a problem that needs to be solved in this field. Summary of the invention

[0005] The embodiments of the present application provide a UVM verification platform and a verification method, thereby at least to a certain extent being able to improve the verification coverage when verifying the function of a link layer transmitter sending a Flit externally based on the UVM verification platform.

[0006] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0007] According to a first aspect of an embodiment of the present application, a verification method based on a UVM verification platform is provided, which is applied to the UVM verification platform, wherein the UVM verification platform is connected to a device under test, and the verification method comprises:

[0008] Randomly generate a credit test incentive according to a first preset interval time range;

[0009] Generate a flow control unit test stimulus equal to the number of the credit test stimulus according to a second preset interval time range or a preset interval time;

[0010] The function of the device under test sending the flow control unit externally is verified according to the credit test stimulus and the flow control unit test stimulus.

[0011] In some embodiments, generating a flow control unit test stimulus equal to the number of the credit test stimulus according to the second preset interval time range or the preset interval time includes:

[0012] A number of flow control unit test stimuli equal to the number of the credit test stimuli is randomly generated according to the second preset interval time range.

[0013] In some embodiments, the first preset interval time range is less than or equal to the second preset interval time range.

[0014] In some embodiments, the first preset interval time range is larger than the second preset interval time range, and a difference between an upper limit value of the first preset interval time range and an upper limit value of the second preset interval time range is smaller than a first preset threshold.

[0015] In some embodiments, generating a flow control unit test stimulus equal to the number of the credit test stimulus according to the second preset interval time range or the preset interval time includes:

[0016] A flow control unit test stimulus equal to the credit test stimulus is generated according to the preset interval time, and a difference between an upper limit value of a first preset interval time range and the preset interval time is greater than a first preset threshold value.

[0017] In some embodiments, the verifying the function of the device under test sending the flow control unit externally according to the credit test stimulus and the flow control unit test stimulus includes:

[0018] Generate a first result according to the credit test stimulus and the flow control unit test stimulus;

[0019] Obtaining a second result generated by the device under test according to the credit test stimulus and the flow control unit test stimulus;

[0020] When the first result and the second result are consistent, it is determined that the function verification of the device under test sending the flow control unit externally has passed.

[0021] According to a second aspect of an embodiment of the present application, a UVM verification platform is provided, comprising: a virtual sequencer, a credit agent module, a flow control unit agent module, a reference model and a comparison module; wherein,

[0022] The virtual sequencer is used to control the credit agent module to randomly generate credit test stimuli according to a first preset interval time range, and control the flow control unit agent module to generate flow control unit test stimuli equal to the number of the credit test stimuli according to a second preset interval time range or a preset interval time;

[0023] The credit proxy module is used to generate the credit test stimulus and send the credit test stimulus to the reference model and the device under test respectively;

[0024] The flow control unit agent module is used to generate the flow control unit test stimulus and send the flow control unit test stimulus to the reference model and the device under test respectively;

[0025] The reference model is used to generate a first result according to the credit test stimulus and the flow control unit test stimulus, and send the first result to the comparison module;

[0026] The traffic control unit proxy module is further used to obtain a second result generated by the device under test according to the credit test stimulus and the traffic control unit test stimulus, and send the second result to the comparison module;

[0027] The comparison module is used to determine that the function verification of the device under test sending the flow control unit externally has passed when the first result and the second result are consistent.

[0028] In some embodiments, the credit agent module includes a credit sequence generator, a first transmitter and a first driver; wherein,

[0029] The credit sequence generator is used to generate the credit test stimulus and send the credit test stimulus to the first driver through the first transmitter;

[0030] The first driver is used to send the credit test stimulus to the reference model and the device under test respectively.

[0031] In some embodiments, the flow control unit proxy module includes a flow control unit sequence generator, a second transmitter and a second driver; wherein,

[0032] The flow control unit sequence generator is used to generate the flow control unit test stimulus and send the flow control unit test stimulus to the second driver through the second transmitter;

[0033] The second driver is used to send the flow control unit test stimulus to the reference model and the device under test respectively.

[0034] In some embodiments, the traffic control unit agent module includes a monitor for obtaining the second result and sending the second result to the comparison module.

[0035] In the present application, a credit test stimulus is randomly generated according to a first preset interval time range; a flow control unit test stimulus equal to the credit test stimulus is generated according to a second preset interval time range or a preset interval time; and the function of the device under test sending the flow control unit externally is verified according to the credit test stimulus and the flow control unit test stimulus. Among them, by changing the first preset interval time range and the second preset interval time range, the generation rate of the credit test stimulus and the flow control unit test stimulus can be changed, thereby simulating the various states between the credit and the flow control unit in the actual process of sending the flow control unit, thereby improving the coverage of the functional verification of the device under test sending the flow control unit externally.

[0036] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0038] Figure 1An application environment diagram of a verification method in one embodiment is shown;

[0039] Figure 2 A schematic diagram of a flow chart of a verification method in an embodiment is shown;

[0040] Figure 3 A functional module diagram of a UVM verification platform in one embodiment is shown. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0042] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0043] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0044] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0045] It should also be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the objects used in this way can be interchanged where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those shown or described.

[0046] In order to make those skilled in the art better understand the present application, firstly, Figure 1 The application scenarios involved in this application are briefly described. For the sake of distinction, credit is referred to as credit and flow control unit is referred to as Flit.

[0047] Credit is used to manage the transmission of Flit in the link layer of the CHI protocol. The sender of the link layer needs to obtain credit to successfully send Flit to the receiver. In the related art, when testing the function of the sender of the link layer to send Flit to the outside, a fixed time delay method is generally used for testing. For example, credit and Flit are generated at fixed intervals, and then the test is performed based on the generated credit and Flit. However, in the actual transmission process, the receiver usually sends credit to the sender based on the idleness of its buffer to avoid the receiver from reducing the transmission efficiency and stability due to not having enough time to process Flit. This results in the number of credits and Flits being random. Therefore, the above-mentioned fixed time delay test scheme cannot cover various test scenarios in the actual transmission process.

[0048] The present application embodiment is verified based on the UVM verification platform. Figure 1 As shown, the UVM verification platform 10 is connected to the device under test 20, and the UVM verification platform 10 can randomly generate credit test stimuli according to the first preset interval time range; generate flow control unit test stimuli equal to the number of credit test stimuli according to the second preset interval time range or the preset interval time; and verify the function of the device under test 20 to send the flow control unit externally according to the credit test stimuli and the flow control unit test stimuli. Among them, by changing the first preset interval time range and the second preset interval time range, the generation rate of the credit test stimuli and the flow control unit test stimuli can be changed, thereby simulating multiple states between credit and Flit in the actual process of sending Flit, thereby improving the coverage of verification.

[0049] Figure 2 FIG. 2 shows a flow chart of a verification method in an embodiment. Figure 2 As shown, a verification method is provided, which is applied to Figure 1 Taking the UVM verification platform 10 in FIG. 1 as an example, the method may include the following steps:

[0050] Step 201, randomly generating a credit test incentive according to a first preset interval time range;

[0051] Step 202, generating a flow control unit test stimulus equal to the number of credit test stimuli according to a second preset interval time range or a preset interval time;

[0052] Step 203: Verify the function of the device under test sending the flow control unit externally according to the credit test stimulus and the flow control unit test stimulus.

[0053] Figure 3 FIG. 1 shows a functional module diagram of a UVM verification platform in an embodiment. Figure 3 The UVM verification platform 10 includes a credit agent module 11 (also called a credit agent), a flow control unit agent module 12 (also called a Flitagent), a virtual sequencer 13 (also called a Virtual Sequence), a reference model 14 (also called a reference model) and a comparison module 15 (scoreboard). The credit agent module 11 includes a credit sequence generator 110 for generating credit test stimuli; the flow control unit agent module 12 includes a flow control unit sequence generator 120 for generating flow control unit test stimuli. The virtual sequencer 13 can control the interval time of generating credit test stimuli and the interval time of generating flow control unit test stimuli by scheduling the execution order of the credit sequence generator 110 and the flow control unit sequence generator 120.

[0054] It should be noted that, in the actual process of sending Flits, there are multiple states between credit and Flit, such as uniform speed state, slow speed state, fast speed state and overflow state, in the link layer transmitter. In the uniform speed state, the number of credits in the Flit transmission channel is equal to the number of Flits; in the slow speed state, the number of credits in the Flit transmission channel is less than the number of Flits; in the fast state, the number of credits in the Flit transmission channel is more than the number of Flits; in the overflow state, the number of credits in the Flit transmission channel is much less than the number of Flits. In the embodiment of the present application, when the number of credit test stimuli and flow control unit test stimuli is equal, the generation rate of the credit test stimulus and the generation rate of the flow control unit test stimulus can be controlled to simulate multiple states between credit and Flit in the Flit transmission channel. When the number is equal, the generation rate varies with the interval time. The longer the interval time, the slower the generation rate, and the shorter the interval time, the faster the generation speed. Therefore, by controlling the interval time of the credit test stimulus generation and the interval time of the flow control unit test stimulus generation, multiple states between credit and Flit in the Flit transmission channel can also be simulated.

[0055] In the implementation process, the virtual sequencer 13 can control the credit agent module 11 to randomly generate a credit test stimulus according to a first preset interval time range, and the virtual sequencer 13 can also control the flow control unit agent module 12 to randomly generate a flow control unit test stimulus according to a second preset interval time range, or generate a flow control unit test stimulus at a fixed rate according to the preset interval time. The first preset interval time range and the second preset interval time range can be the same or different.

[0056] In some embodiments, the first preset interval time range is equal to the second preset interval time range.

[0057] The first preset interval time range and the second preset interval time range can be set according to the clock cycle of the UVM verification platform. Taking the clock cycle of 20ns as an example, the upper limit values ​​of the first preset interval time range and the second preset interval time range can be integer multiples of 20ns, such as 60ns, 100ns. Correspondingly, the first preset interval time range and the second preset interval time range can be 0-60ns, 0-100ns or other ranges, which is not limited in the embodiments of the present application.

[0058] Taking the first preset interval time range and the second preset interval time range both being 0 to 60ns as an example, the generation interval time of the credit test stimulus varies randomly between 0 and 60ns; the generation interval time of the flow control unit test stimulus also varies randomly between 0 and 60ns.

[0059] In this case, the generation rate of the credit test stimulus is basically consistent with the generation rate of the flow control unit test stimulus, the credit test stimulus and the flow control unit test stimulus are in a uniform speed state, and the number of credit test stimuli in the transmission channel is equal to the number of flow control unit test stimuli.

[0060] In some embodiments, the first preset interval time range is larger than the second preset interval time range, and the difference between an upper limit value of the first preset interval time range and an upper limit value of the second preset interval time range is smaller than a first preset threshold.

[0061] The first preset threshold can be set according to the clock cycle of the UVM verification platform, and can be 20ns, 40ns, 60ns or other values. The embodiment of the present application is not limited to this. By controlling the difference between the upper limit values ​​to be less than the first preset threshold, it can be ensured that the number of credit test stimuli is less than the number of flow control unit test stimuli within a certain range, so as to distinguish it from the scenario where the credit test stimulus and the flow control unit test stimulus are in an overflow state (the number of credit test stimuli is much less than the number of flow control unit test stimuli).

[0062] Taking the first preset threshold of 60ns, the first preset interval time range of 0-100ns, and the second preset interval time range of 0-60ns as an example, the generation interval time of the credit test stimulus varies randomly between 0 and 100ns; the generation interval time of the traffic control unit test stimulus varies randomly between 0 and 60ns.

[0063] In this case, the generation rate of credit test stimuli is generally slightly slower than the generation rate of flow control unit test stimuli. There is a slow state between the credit test stimuli and the flow control unit test stimuli, and the number of credit test stimuli in the transmission channel is less than the number of flow control unit test stimuli.

[0064] In some embodiments, the first preset interval time range is smaller than the second preset interval time range.

[0065] The first preset interval time range and the second preset interval time range can be set according to the clock cycle of the UVM verification platform, and can be 0-20ns, 0-100ns or other ranges, which is not limited in the embodiment of the present application.

[0066] Taking the first preset interval time range of 0 to 20ns and the second preset interval time range of 0 to 100ns as an example, the generation interval time of the credit test stimulus varies randomly between 0 and 20ns; the generation interval time of the traffic control unit test stimulus also varies randomly between 0 and 100ns.

[0067] In this case, the generation rate of credit test stimuli is generally faster than the generation rate of flow control unit test stimuli, the credit test stimuli and the flow control unit test stimuli are in a fast state, and the number of credit test stimuli in the transmission channel is greater than the number of flow control unit test stimuli.

[0068] In some embodiments, the virtual sequencer 13 can control the flow control unit agent module 12 to generate a flow control unit test stimulus equal to the number of credit test stimuli according to a preset interval time, and the difference between the upper limit value of the first preset interval time range and the preset interval time is greater than the first preset threshold value.

[0069] By controlling the difference in the upper limit values ​​to be greater than the first preset threshold, it can be ensured that the number of credit test stimuli is much less than the number of flow control unit test stimuli, so as to distinguish it from the scenario where there is a slow state between the credit test stimuli and the flow control unit test stimuli.

[0070] Taking the first preset threshold of 60ns, the first preset interval time range of 0-180ns, and the preset interval time of 20ns as an example, the generation interval time of the credit test stimulus varies randomly between 0 and 180ns; the generation interval time of the flow control unit test stimulus is 20ns, that is, the flow control unit test stimulus is generated at a constant rate.

[0071] In this case, the generation rate of credit test stimuli is much slower than the generation rate of flow control unit test stimuli. There is an overflow state between the credit test stimuli and the flow control unit test stimuli. The number of credit test stimuli in the transmission channel is much less than the number of flow control unit test stimuli.

[0072] During the verification process, the generation rates of the credit test stimulus and the flow control unit test stimulus can be changed by changing the first preset interval time range and the second preset interval time range, thereby achieving verification in the above four states.

[0073] In some embodiments, a first result can be generated based on a credit test stimulus and a flow control unit test stimulus; a second result generated by the device under test based on the credit test stimulus and the flow control unit test stimulus is obtained; and when the first result and the second result are consistent, it is determined that the function verification of the flow control unit sent externally by the device under test has passed.

[0074] It can be understood that the reference model 14 is a verification component with the same function as the device under test 20, and both need to implement the function of sending a flow control unit test stimulus to the outside. When the reference model 14 receives the credit test stimulus and the flow control unit test stimulus, it will output the flow control unit according to the number of the credit test stimulus and the flow control unit test stimulus, that is, the first result; when the device under test 20 receives the credit test stimulus and the flow control unit test stimulus, it will also output the flow control unit according to the number of the credit test stimulus and the flow control unit test stimulus, that is, the second result. The flow control unit agent module 12 can obtain the second result from the device under test 20 and send the second result to the comparison module 15. If the flow control units output by the reference model 14 and the device under test 20 are exactly the same, that is, the first result is consistent with the second result, then the comparison module 15 determines that the verification is successful.

[0075] The present application randomly generates credit test stimuli according to a first preset interval time range; generates flow control unit test stimuli equal to the number of credit test stimuli according to a second preset interval time range or a preset interval time; and verifies the function of the device under test sending the flow control unit externally according to the credit test stimuli and the flow control unit test stimuli. Among them, by changing the first preset interval time range and the second preset interval time range, the generation rate of the credit test stimuli and the flow control unit test stimuli can be changed, thereby simulating the various states between the credit and the flow control unit in the actual process of sending the flow control unit, thereby improving the coverage rate of the function verification of the device under test sending the flow control unit externally.

[0076] Based on the same inventive concept, the present application embodiment also provides a UVM verification platform. Figure 3 As shown, the UVM verification platform may include: a virtual sequencer 13, a credit agent module 11, a flow control unit agent module 12, a reference model 14 and a comparison module 15; wherein the virtual sequencer 13 is used to control the credit agent module 11 to randomly generate a credit test stimulus according to a first preset interval time range, and to control the flow control unit agent module 12 to generate a flow control unit test stimulus equal to the number of credit test stimuli according to a second preset interval time range or a preset interval time; the credit agent module 11 is used to generate a credit test stimulus and send the credit test stimulus to the reference model 14 and the device under test 20 respectively; the flow control unit agent The processing module 12 is used to generate a flow control unit test stimulus, and send the flow control unit test stimulus to the reference model 14 and the device under test 20 respectively; the reference model 14 is used to generate a first result according to the credit test stimulus and the flow control unit test stimulus, and send the first result to the comparison module 15; the flow control unit proxy module 12 is also used to obtain a second result generated by the device under test 20 according to the credit test stimulus and the flow control unit test stimulus, and send the second result to the comparison module 15; the comparison module 15 is used to determine that the function verification of the device under test sending the flow control unit to the outside has passed when the first result and the second result are consistent.

[0077] Among them, the reference model 14 refers to a verification component with the same function as the device under test 20. In the embodiment of the present application, both the reference model 14 and the device under test 20 need to implement the function of sending a flow control unit to the outside. If the flow control units generated by the reference model 14 and the device under test 20 are exactly the same, the verification is passed. The final results of the UVM verification platform can be collected through the Synopsys VCS simulation tool and viewed using the Synopsys Verdi tool. If the code coverage is 100% and the functional coverage is 100%, it means that the verification is passed in the above four states.

[0078] In the implementation process, the UVM verification platform can be divided into three layers: Top layer, Test layer and Env layer. The Top layer is the top layer of the UVM verification platform. The test case is run on this layer to start the verification platform. The Test layer is the test case layer, and the Env layer is the verification environment layer, which is used to provide the components required for the test. The virtual sequencer 13, the credit agent module 11, the flow control unit agent module 12, the reference model 14, the comparison module 15 and the configuration module 16 are all arranged in the Env layer.

[0079] In some embodiments, the credit agent module 11 includes a credit sequence generator 110, a first transmitter 111 and a first driver 112; wherein the credit sequence generator 110 is used to generate a credit test stimulus and send the credit test stimulus to the first driver 112 via the first transmitter 111; the first driver 112 is used to send the credit test stimulus to the reference model 14 and the device under test 20 respectively.

[0080] It is understandable that a sequencer (also called a Sequence) is a type of UVM object. An Object is an entity without a hierarchical structure in a UVM verification environment, and is typically used for data transmission, storage configuration, and transfer control information. The credit sequencer 110 randomly generates a credit test stimulus based on the scheduling of the virtual sequencer 13 according to a first preset interval time range.

[0081] In some embodiments, the flow control unit agent module 12 includes a flow control unit sequence generator 120, a second transmitter 121 and a second driver 122; wherein the flow control unit sequence generator 120 is used to generate a flow control unit test stimulus and send the flow control unit test stimulus to the second driver 122 via the second transmitter 121; the second driver 122 is used to send the flow control unit test stimulus to the reference model 14 and the device under test 20 respectively.

[0082] It can be understood that the flow control unit sequence generator 120 randomly generates flow control unit test stimuli equal to the number of credit test stimuli according to the second preset interval time range based on the scheduling of the virtual sequencer 13, or generates flow control unit test stimuli equal to the number of credit test stimuli according to the preset interval time.

[0083] During the implementation process, you can call the start() function in the sequencer and specify the transmitter (also called sequencer), send the generated test stimulus to the driver (also called driver) corresponding to the transmitter, and the driver sends the test stimulus to the interface. One side of the interface is connected to the verification platform, and the other side is connected to the design under test. The test stimulus is passed to the interface through the driver->proxy module->Env layer->Top layer, and then sent to the design under test.

[0084] In some embodiments, the traffic control unit agent module 12 includes a monitor 123 for obtaining the second result and sending the second result to the comparison module 15 .

[0085] It is understandable that, considering that the flow control unit proxy module 12 generally has the ability to receive the output signal of the device under test 20 , a monitor 123 may be provided in the flow control unit proxy module 12 to obtain the second result output by the device under test 20 .

[0086] As described above, the design under test is connected to the interface, so the monitor can obtain the second result from the device under test 20 through the interface, and then transmit it through layers and finally send it to the comparison module 15.

[0087] In some embodiments, the virtual sequencer 13 can also be used to randomly generate a number of flow control unit test stimuli equal to the credit test stimuli based on the second preset interval time range. In this case, the first preset interval time range may be less than or equal to the second preset interval time range, or the first preset interval time range may be greater than the second preset interval time range, and the difference between the upper limit value of the first preset interval time range and the upper limit value of the second preset interval time range is less than a first preset threshold value.

[0088] In some embodiments, the virtual sequencer 13 can also be used to generate a flow control unit test stimulus equal to the credit test stimulus according to the preset interval time, and the difference between the upper limit value of the first preset interval time range and the preset interval time is greater than the first preset threshold.

[0089] The embodiment of the present application can simulate various states between the credit and the flow control unit during the actual sending of the flow control unit through the UVM verification platform, generate different test scenarios, and improve the coverage of the verification of the function of the link layer transmitter to send Flit to the outside.

[0090] The functions described herein may be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions may be stored as one or more instructions or codes on a computer-readable medium or transmitted via a computer-readable medium. Other examples and implementations are within the scope and spirit of the present application and the appended claims. For example, due to the nature of software, the functions described above may be implemented using software executed by a processor, hardware, firmware, hard wiring, or a combination of any of these. In addition, each functional unit may be integrated into a processing unit, each unit may exist physically separately, or two or more units may be integrated into one unit.

[0091] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.

[0092] The units described as separate components may or may not be physically separated, and the components of the control device may or may not be physical units, that is, they may be located in one place or distributed in multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0093] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly or all or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk, etc., which can store computer program instructions.

[0094] The above description is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present application shall be included in the scope of the claims of the present application.

Claims

1. A verification method, characterized in that: Applied to a UVM verification platform, the UVM verification platform is connected to a device under test, and the verification method includes: Randomly generate a credit test incentive according to a first preset interval time range; Generate a flow control unit test stimulus equal to the number of the credit test stimulus according to a second preset interval time range or a preset interval time; Generate a first result according to the credit test stimulus and the flow control unit test stimulus; Obtaining a second result generated by the device under test according to the credit test stimulus and the flow control unit test stimulus; When the first result and the second result are consistent, it is determined that the function verification of the device under test sending the flow control unit externally has passed.

2. The verification method according to claim 1, characterized in that: The generating, according to the second preset interval time range or the preset interval time, a flow control unit test stimulus equal to the number of the credit test stimulus comprises: A number of flow control unit test stimuli equal to the number of the credit test stimuli is randomly generated according to the second preset interval time range.

3. The verification method according to claim 2, characterized in that: The first preset interval time range is smaller than or equal to the second preset interval time range.

4. The verification method according to claim 2, characterized in that: The first preset time interval range is larger than the second preset time interval range, and a difference between an upper limit value of the first preset time interval range and an upper limit value of the second preset time interval range is smaller than a first preset threshold.

5. The verification method according to claim 1, characterized in that: The generating, according to the second preset interval time range or the preset interval time, a flow control unit test stimulus equal to the number of the credit test stimulus comprises: A flow control unit test stimulus equal to the credit test stimulus is generated according to the preset interval time, and a difference between an upper limit value of a first preset interval time range and the preset interval time is greater than a first preset threshold value.

6. A UVM verification platform, characterized in that: include: A virtual sequencer, a credit agent module, a flow control unit agent module, a reference model and a comparison module; wherein, The virtual sequencer is used to control the credit agent module to randomly generate credit test stimuli according to a first preset interval time range, and control the flow control unit agent module to generate flow control unit test stimuli equal to the number of the credit test stimuli according to a second preset interval time range or a preset interval time; The credit proxy module is used to generate the credit test stimulus and send the credit test stimulus to the reference model and the device under test respectively; The flow control unit agent module is used to generate the flow control unit test stimulus and send the flow control unit test stimulus to the reference model and the device under test respectively; The reference model is used to generate a first result according to the credit test stimulus and the flow control unit test stimulus, and send the first result to the comparison module; The traffic control unit proxy module is further used to obtain a second result generated by the device under test according to the credit test stimulus and the traffic control unit test stimulus, and send the second result to the comparison module; The comparison module is used to determine that the function verification of the device under test sending the flow control unit externally has passed when the first result and the second result are consistent.

7. The UVM verification platform according to claim 6, characterized in that, The credit agent module includes a credit sequence generator, a first transmitter and a first driver; wherein, The credit sequence generator is used to generate the credit test stimulus and send the credit test stimulus to the first driver through the first transmitter; The first driver is used to send the credit test stimulus to the reference model and the device under test respectively.

8. The UVM verification platform according to claim 6, characterized in that, The flow control unit proxy module includes a flow control unit sequence generator, a second transmitter and a second driver; wherein, The flow control unit sequence generator is used to generate the flow control unit test stimulus and send the flow control unit test stimulus to the second driver through the second transmitter; The second driver is used to send the flow control unit test stimulus to the reference model and the device under test respectively.

9. The UVM verification platform according to any one of claims 6 to 8, characterized in that, The traffic control unit agent module includes a monitor, which is used to obtain the second result and send the second result to the comparison module.

Images