Methods and electronic devices for controlling flash memory

Abstract

This invention relates to a method and electronic device for controlling flash memory. The method includes: in response to a read request for the flash memory, obtaining the number of reads of a current word line corresponding to the read request in the flash memory; if the number of reads of the current word line is greater than a first threshold, obtaining the number of errors of the previous or next word line of the current word line; and if the number of errors of the previous or next word line is greater than a second threshold, performing garbage collection on the block containing the current word line. Unlike existing technologies that determine whether to initiate garbage collection based solely on the number of reads of a block, this invention determines garbage collection at the word line granularity, enabling a more accurate assessment of the reliability of the current word line. This allows for more effective garbage collection, effectively avoiding read interference, and thus significantly improving the lifespan and reliability of the flash memory.

Description

Technical Field

[0001] This invention relates to the field of memory technology, and more particularly to methods and electronic devices for controlling flash memory. Background Technology

[0002] Flash memory is a type of semiconductor non-volatile memory that stores data by the amount of charge in floating gates. As manufacturing processes have evolved from 2D to 3D, the entire NAND flash memory array structure and its physical properties have changed significantly. In a 3D NAND flash memory array structure, word lines (WLs) connect the gates of an entire layer of memory cells together, applying gate voltages simultaneously to all cells in the layer, and using the WLs for layer selection.

[0003] Figure 5 This is a schematic diagram of the read circuitry for 3D NAND flash memory. Figure 5 As shown, selection is first achieved by applying Vcc (the circuit's power supply voltage) to the SSL (string select line) and GSL (ground select line) of the selected column, while the SSL of the unselected column is deactivated by applying 0V. Next, all BL (bit lines) are connected to Vcc, and Vpass (path voltage) is applied to the WL (Unselected WL) of the unselected layer. Thus, the conduction of each branch depends entirely on whether the selected memory cell is active. Finally, Vread (read voltage) is applied multiple times to the WL (Selected WL) of the selected layer to read the information from the memory cell.

[0004] Figure 6 This is a diagram illustrating a read operation performed on a string of data in a 3D NAND flash memory. Figure 6 As shown, a Vread (less than 5V) is applied to the selected WL control gate, a larger Vpass (approximately 7V) is applied to the adjacent WL, and a Vpass (approximately 5V) is applied to the unselected WL control gate. Read interference is mainly caused by Vpass. The time of a single read operation (50μs to 70μs) is much shorter than that of a write operation, and the interference is also much smaller. However, the frequency of read operations is very high. Although the impact of a single read operation on the threshold voltage distribution is small, after tens of thousands or even hundreds of thousands or millions of read operations, the effects of these interferences will continue to accumulate, causing a large shift in the threshold voltage distribution.

[0005] Figure 7 This is a schematic diagram of the threshold voltage distribution affected by read interference. For example... Figure 7 As shown, WL, which is subject to significant read interference, will exhibit a severe threshold voltage distribution shift (i.e., Figure 7(The shaded area in the image) This increases the number of read errors and affects product reliability. Additionally, blocks that are not fully programmed are called open blocks. There are three types of write levels (WL) for open blocks: empty WL, edge WL (the last block to be programmed), and programmed WL.

[0006] Figure 8 This is a schematic diagram of charge migration in a character line in the prior art. Because the edge WL is programmed and its adjacent WLs are unprogrammed, charge migrates from the edge WL to the unprogrammed WLs, such as... Figure 8 As shown, the reliability of edge read loops (WL) will be affected at this time. Therefore, it is necessary to develop corresponding solutions to address read interference and open block issues in order to reduce their negative impact.

[0007] Currently, the common practice in chip usage to address read interference issues is to first record the number of reads on a block-by-block basis. When the number of reads for a block exceeds a threshold, garbage collection (GC) is initiated for that block. The drawback of this approach is that block-level control is not granular enough, and in some scenarios, reaching the threshold for reads may not cause reliability issues; initiating GC at this point would reduce the block's lifespan. Regarding open blocks, existing technologies rely entirely on the manufacturer's process reliability, assuming that NAND flash memory in open blocks requires no special handling and that the manufacturer has guaranteed it will not fail at the factory. This approach is only suitable for high-quality, high-grade chips. Manufacturers typically screen and grade chips from the same wafer during manufacturing, but consumer-grade products usually use lower-grade chips, making it difficult for manufacturers to guarantee reliability through process technology. Summary of the Invention

[0008] This invention provides a method and electronic device for controlling flash memory, which can effectively improve the lifespan and reliability of NAND flash memory.

[0009] In one aspect of the invention, a method for controlling flash memory is provided. The method includes: in response to a read request for the flash memory, obtaining the number of reads of a current word line corresponding to the read request in the flash memory; if the number of reads of the current word line is greater than a first threshold, obtaining the number of errors of the previous or next word line of the current word line; and if the number of errors of the previous or next word line is greater than a second threshold, performing garbage collection on the block containing the current word line.

[0010] In another aspect of the invention, a method for controlling flash memory is provided. The method includes: in response to a write request for the flash memory, programming a block in the flash memory corresponding to the write request; after programming of the block is completed, if there are unprogrammed word lines in the block, marking the last programmed word line in the block according to the write request as a programming edge word line; and programming data programmed in the programming edge word line to the next word line of the programming edge word line as backup data.

[0011] In another aspect of the invention, an electronic device is provided. The electronic device includes a plurality of flash memory blocks configured to store data; and a controller electrically coupled to the plurality of flash memory blocks and configured to perform the aforementioned method for controlling the flash memory.

[0012] According to the present invention, when a read request is received, the read count of the current word line corresponding to the read request is obtained. If the read count of the current word line is greater than a first threshold, the error count of the previous or next word line is obtained. If the error count of the previous or next word line is greater than a second threshold, garbage collection is performed on the block where the current word line is located. Unlike the prior art, which only determines whether to start garbage collection based on the read count of the block, this method judges according to the word line granularity, which can more accurately determine whether the current word line is reliable, so as to achieve more effective garbage collection, effectively avoid read interference, and thus effectively improve the service life and reliability of NAND flash memory. Attached Figure Description

[0013] Figure 1 This is a flowchart of a method for controlling flash memory according to an embodiment of the present invention;

[0014] Figure 2 This is a flowchart illustrating a method for controlling flash memory according to an embodiment of the present invention;

[0015] Figure 3 This is a flowchart of an open block read / write control method according to an embodiment of the present invention;

[0016] Figure 4 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention.

[0017] Figure 5 This is a schematic diagram of the read circuit of a 3D NAND flash memory in the prior art;

[0018] Figure 6 A schematic diagram illustrating the performance of a read operation on a string in a 3D NAND flash memory in the prior art;

[0019] Figure 7 This is a schematic diagram of the threshold voltage distribution affected by read interference in the prior art;

[0020] Figure 8 This is a schematic diagram of charge transfer in the character lines of the prior art. Detailed Implementation

[0021] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0022] In existing technologies, to address the read interference problem, the number of reads is recorded on a block-by-block basis. When the number of reads for a block exceeds a threshold, garbage collection (GC) is initiated for that block. However, once the number of reads reaches the threshold, no reliability issues arise. Initiating GC at this point reduces the lifespan of the block. As for the open block problem, it relies entirely on the manufacturer's process reliability, which is only suitable for high-quality and high-grade chips. It cannot guarantee the reliability of chips used in lower-grade consumer products, leading to a decrease in the reliability of NAND flash memory.

[0023] To address at least the aforementioned technical problems, this disclosure provides a method for controlling flash memory. According to embodiments of this disclosure, when a read request is received, the read count of the current word line corresponding to the read request is obtained. If the read count of the current word line is greater than a first threshold, the error count of the previous or next word line is obtained. If the error count of the previous or next word line is greater than a second threshold, garbage collection is performed on the block containing the current word line. By judging according to word line granularity in this way, the reliability of the current word line can be determined more accurately, enabling more effective garbage collection, effectively avoiding read interference, and thus effectively improving the lifespan and reliability of NAND flash memory.

[0024] In the following, the technical solutions according to this disclosure will be described with reference to specific embodiments and in conjunction with the accompanying drawings.

[0025] Figure 1 This is a flowchart illustrating a method 100 for controlling flash memory according to an embodiment of the present disclosure. (Refer to...) Figure 1 The method 100 includes the following steps 102 to 106.

[0026] In step 102, in response to a read request for the flash memory, the number of reads of the current word line in the flash memory corresponding to the read request is obtained.

[0027] In some embodiments, the current word line connects the gates of an entire layer of memory cells in the flash memory together. The current word line selects an entire layer of memory cells in the flash memory, and gate voltages are applied to the entire layer of memory cells simultaneously.

[0028] In step 104, if the number of reads of the current word line is greater than the first threshold, the error count of the previous or next word line of the current word line is obtained.

[0029] In some embodiments, the previous word line or the next word line is a word line adjacent to the current word line. The previous word line or the next word line can connect to the storage cells of the layers adjacent to the current word line above or below.

[0030] In some embodiments, if the number of reads of the current word line does not exceed the first threshold, data is read according to the read request. In this way, when the number of reads of the current word line does not exceed the first threshold, it indicates that the word line is reliable, garbage collection is not required, and data can be read directly.

[0031] In some embodiments, a low-density parity check code corresponding to the previous or next word line of the current word line is obtained from the error correction module, and the low-density parity check code is decoded to obtain the error count of the previous or next word line of the current word line. In this way, the error count of the previous and next word lines of the current word line can be obtained simply and quickly.

[0032] In step 106, if the number of errors in the previous word line or the next word line is greater than the second threshold, garbage collection is performed on the block where the current word line is located.

[0033] In this way, garbage collection is only initiated when the number of reads of the current word line is greater than the first threshold and the number of errors of the previous or next word line is greater than the second threshold. This determines whether the current word line is indeed unreliable, thereby improving both the lifespan and reliability of NAND flash memory.

[0034] In some embodiments, the method 100 may further include: if the number of errors of the previous word line or the next word line is not greater than the second threshold, then obtaining the reduced number of reads of the current word line by a preset ratio; and if the reduced number of reads of the current word line is greater than the third threshold, then performing garbage collection on the block where the current word line is located.

[0035] In this way, since the impact of read interference is cumulative, if the number of reads of the current word line is greater than the first threshold, and the number of errors of the previous or next word line is not greater than the second threshold, it is then determined whether the current word line has already undergone multiple read reductions. When the word line has undergone multiple read reductions, even if the number of errors is low at this time, future reliability cannot be guaranteed. Therefore, garbage collection will be initiated, further improving the reliability of flash memory.

[0036] In some embodiments, the method 100 may further include: if the number of reduced reads of the current word line is not greater than the third threshold, then reducing the number of reads of the current word line by the preset ratio to obtain the reduced number of reduced reads of the current word line, and incrementing the reduced number of reads by one; and reading data according to the read request.

[0037] In some embodiments, the reduced read count plus one for the current word line is recorded as the read count for the current word line corresponding to the next read request. In some embodiments, the preset ratio is 50%, and performing garbage collection on the block containing the current word line includes: if the halved read count resulting from the 50% reduction of the current word line's read count is greater than the third threshold, then performing garbage collection. In some embodiments, the preset ratio is 50%, and reducing the read count of the current word line by the preset ratio to obtain the reduced read count for the current word line includes: reducing the current read count of the current word line by 50% to obtain the halved read count for the current word line.

[0038] In this way, if the number of reads for the word line is reduced by no more than the third threshold, it means that the current situation is reliable. Then, the number of reads for the current word line is reduced by a preset ratio, and the next time, this step of the verification process will not be required, thus reducing the verification overhead.

[0039] In some embodiments, prior to step 102, the method 100 may further include: in response to a write request for flash memory, programming a block in the flash memory according to the write request; after the programming of the block is completed, if there are unprogrammed word lines in the block, marking the last programmed word line in the block according to the write request as a programming edge word line; and programming the data programmed in the programming edge word line to the next word line of the programming edge word line as backup data.

[0040] In this way, since the open block problem mainly affects the reliability of the last programmed word line, the data of the programming edge word line is reprogrammed into the next word line as backup data, thereby achieving backup of the data of the programming edge word line, preventing data loss in the programming edge word line, and further improving the reliability of flash memory.

[0041] In some embodiments, in response to a read request for flash memory, current data is read from a read word line corresponding to the read request, and it is determined whether the current data is error-correctable. If the current data is error-correctable, it is determined whether the read word line corresponding to the current data is a programming edge word line. If the read word line is the programming edge word line, the backup data is read from the next word line of the programming edge word line as the data corresponding to the read request. Furthermore, if the read word line is not the programming edge word line, the current data in the read word line is invalidated.

[0042] In this way, when reading data, if the data is uncorrectable and the current word line is the programming edge word line, backup data is read from the next word line, which reduces the probability of overall data failure, avoids charge migration problems, and thus improves flash memory reliability.

[0043] According to embodiments of this disclosure, for a read request, if the number of reads for the current word line is greater than a first threshold, the error count of the previous or next word line is obtained. If the error count of the previous or next word line is greater than a second threshold, garbage collection is performed on the block containing the current word line. Furthermore, if the error count of the previous or next word line is not greater than the second threshold, the reduced read count of the current word line is obtained by decreasing the read count by a preset ratio. If the reduced read count of the current word line is greater than a third threshold, garbage collection is performed on the block containing the current word line. By judging according to word line granularity in this way, the reliability of the current word line can be determined more accurately, enabling more effective garbage collection, effectively avoiding read interference, and thus effectively improving the lifespan and reliability of NAND flash memory.

[0044] According to another aspect of the present invention, a method for controlling flash memory according to embodiments of the present disclosure is provided, the method comprising the following steps: In response to a write request for the flash memory, programming a block in the flash memory corresponding to the write request. After programming of the block is completed, if there are unprogrammed word lines in the block, the last programmed word line in the block according to the write request is marked as a programming edge word line. Furthermore, data programmed in the programming edge word line is programmed into the next word line as backup data. In this way, since the open block problem mainly affects the reliability of the last programmed word line, repeatedly programming the data of the programming edge word line into the next word line as backup data achieves backup of the data in the programming edge word line, prevents data loss in the programming edge word line, and further improves the reliability of the flash memory.

[0045] In some embodiments, in response to a first read request for the flash memory, current data is read from the read word line corresponding to the first read request. If the current data is uncorrectable, and if the read word line corresponding to the current data is the programming edge word line, then backup data is read from the next word line of the programming edge word line as the data corresponding to the first read request. In this way, when reading data, if the data is uncorrectable and the current word line is the programming edge word line, backup data is read from the next word line, reducing the probability of overall data failure, avoiding charge migration problems, and thus improving flash memory reliability.

[0046] In some embodiments, in response to a second read request for flash memory, the read count of the current word line corresponding to the second read request in the flash memory is obtained. If the read count of the current word line is greater than a first threshold, the error count of the previous or next word line of the current word line is obtained. If the error count of the previous or next word line is greater than a second threshold, garbage collection is performed on the block where the current word line is located. If the error count of the previous or next word line is not greater than the second threshold, the reduced read count of the current word line is obtained by decreasing the read count by a preset ratio. If the reduced read count of the current word line is greater than a third threshold, garbage collection is performed on the block where the current word line is located. If the reduced read count of the current word line is not greater than the third threshold, the read count of the current word line is reduced by the preset ratio to obtain the reduced read count of the current word line, and the reduced read count is incremented by one. Furthermore, data is read according to the second read request. In this way, by judging according to word line granularity, the reliability of the current word line can be more accurately determined, so as to achieve more effective garbage collection, effectively avoid read interference, and thus effectively improve the lifespan and reliability of NAND flash memory.

[0047] Figure 2 This is a flowchart illustrating a method for controlling flash memory according to an embodiment of the present invention. Figure 2 As shown, the method includes steps 201 to 212.

[0048] In step 201, a write request for the flash memory is received.

[0049] In step 202, the block in the flash memory is programmed according to the write request.

[0050] In step 203, after each block is programmed, it is determined whether each word line in the block has been programmed. If not, step 204 is executed; if yes, the process ends.

[0051] In step 204, the last programmed word line in the block according to the write request is marked as the programming edge word line (edgeWL), and the programmed data in the programming edge word line is programmed into the next word line of the programming edge word line as backup data.

[0052] In step 205, a read request for the flash memory is received, and the number of reads of the current word line corresponding to the read request in the flash memory is obtained.

[0053] In step 206, determine whether the number of reads of the current word line is greater than the first threshold. If it is greater than the first threshold, obtain the error count of the previous or next word line of the current word line and execute step 207. If it is less than or equal to the first threshold, execute steps 211 to 212.

[0054] Obtaining the error count of the previous or next word line of the current word line includes: obtaining the low-density parity check code corresponding to the previous or next word line of the current word line from the error correction module, and decoding the low-density parity check code to obtain the error count of the previous or next word line of the current word line.

[0055] In step 207, it is determined whether the number of errors in the previous word line or the next word line is greater than the second threshold. If it is greater than the second threshold, garbage collection is performed on the block where the current word line is located. If it is less than or equal to the second threshold, steps 208 to 209 are executed.

[0056] In step 208, the number of reads for the current word line is reduced by a preset ratio.

[0057] In step 209, it is determined whether the reduction in the number of reads is greater than the third threshold. If it is greater than the third threshold, garbage collection is performed on the block where the current word line is located. If it is less than or equal to the third threshold, steps 210 to 212 are executed.

[0058] In step 210, the number of reads of the current character line is reduced by a preset ratio to obtain the reduced number of reads of the current character line, and the reduced number of reads is incremented by one.

[0059] In one optional embodiment, the preset ratio is 50%. The current number of reads for the current word line is reduced by 50% to obtain half the number of reads for the current word line.

[0060] In step 211, data is read according to the read request. Specifically, in response to a read request for flash memory, the current data is read from the read word line corresponding to the read request, and it is determined whether the current data is error-correctable. If it is error-correctable, the process ends. If it is not error-correctable, it is determined whether the read word line corresponding to the current data is a programming edge word line. If it is a programming edge word line, backup data is read from the next word line of the programming edge word line as the data corresponding to the read request. If it is not a programming edge word line, the current data in the read word line is invalidated.

[0061] The next WL will have similar reliability issues as the edge WL, but this WL is programmed with the same data as the previous WL. First, because the next WL is programmed with data, the probability of data failure in the original edge WL is already less than the case where only one edge WL contains valid data. In addition, now that there are two WLs containing the same data, the overall probability of data failure is much less than the original case. Moreover, after the next WL is repeatedly programmed with data, the charge migration problem of the original edge WL is eliminated, and the next WL becomes a new edge WL. Even if there is a charge migration problem, the data in it is the same as the original edge WL.

[0062] In step 212, the number of reads for the current word line, which is reduced by one, is recorded as the number of reads for the current word line corresponding to the next read request.

[0063] Since 3D NAND flash memory manufactured using different processes has varying tolerance to read interference, the first, second, and third thresholds can be set according to the actual situation.

[0064] Figure 3 This is a flowchart of an open block read / write control method according to an embodiment of the present invention. Figure 3 As shown, the method includes the following (1) to (6).

[0065] (1) Receive write requests for flash memory.

[0066] (2) Program the blocks in the flash memory according to the write request.

[0067] (3) After each block is programmed, determine whether each word line in the block has been programmed. If not, execute (4); if yes, end.

[0068] (4) Mark the last programmed word line in the block according to the write request as the programming edge word line, and program the programmed data in the programming edge word line into the next word line of the programming edge word line as backup data.

[0069] (5) Receive a read request for the flash memory, read the current data from the read word line corresponding to the read request, and determine whether the current data can be corrected. If it cannot be corrected, execute (6). If it can be corrected, end.

[0070] (6) Determine whether the read word line corresponding to the current data is a programming edge word line. If it is a programming edge word line, read the backup data from the next word line of the programming edge word line as the data corresponding to the read request. If it is not a programming edge word line, invalidate the current data in the read word line.

[0071] According to another aspect of the invention, Figure 4 This is a schematic diagram illustrating an electronic device 300 according to an embodiment of the present invention. (Refer to...) Figure 4 The electronic device 300 includes a plurality of flash memory blocks 302 and a controller 304. The plurality of flash memory blocks 302 are configured to store data. The controller 304 is electrically coupled to the plurality of flash memory blocks 302 and is configured to perform the various steps of the method for controlling flash memory as described above.

[0072] In summary, the method and electronic device for controlling flash memory provided by this invention, upon receiving a read request, obtains the read count of the current word line corresponding to the read request. If the read count of the current word line is greater than a first threshold, it obtains the error count of the previous or next word line. If the error count of the previous or next word line is greater than a second threshold, it performs garbage collection on the block containing the current word line. By judging according to word line granularity, it can more accurately determine whether the current word line is reliable, thereby achieving more effective garbage collection, effectively avoiding read interference, and thus effectively improving the lifespan and reliability of NAND flash memory. Furthermore, during the programming process, the data of the programming edge word line is repeatedly programmed into the next word line, achieving data backup of the programming edge word line, preventing data loss in the programming edge word line, and further improving the reliability of the flash memory.

[0073] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for controlling a flash memory, the method comprising: comprising: in response to a read request for a flash memory, obtaining a read count of a current word line corresponding to the read request in the flash memory; if the read count of the current word line is greater than a first threshold, obtaining an error count of a previous word line or a next word line of the current word line; if the error count of the previous word line or the next word line is greater than a second threshold, performing garbage collection for a block in which the current word line is located; in response to a write request for the flash memory, programming a block in the flash memory according to the write request; after the programming of the block is completed, if there is a word line in the block that has not been programmed, marking a last programmed word line in the block according to the write request as a programming edge word line; programming data that has been programmed in the programming edge word line to a next word line of the programming edge word line as backup data; in response to a read request for the flash memory, reading current data from a read word line corresponding to the read request, and determining whether the current data is correctable; if the current data is not correctable, determining whether the read word line corresponding to the current data is the programming edge word line; if the read word line is the programming edge word line, reading the backup data from a next word line of the programming edge word line as data corresponding to the read request; and if the read word line is not the programming edge word line, performing invalidation processing on the current data in the read word line.

2. The method of claim 1, wherein, further comprising: if the error count of the previous word line or the next word line is not greater than the second threshold, obtaining a reduced read count in which the read count of the current word line is reduced by a preset ratio; and if the reduced read count of the current word line is greater than a third threshold, performing garbage collection for the block in which the current word line is located.

3. The method of claim 2, wherein, further comprising: if the reduced read count of the current word line is not greater than the third threshold, reducing the read count of the current word line by the preset ratio to obtain a reduced read count of the current word line after reduction, and adding one to the reduced read count; and reading data according to the read request.

4. The method of claim 3, wherein, further comprising: recording the read count in which one is added to the reduced read count of the current word line as the read count of the current word line corresponding to a next read request.

5. The method of claim 2, wherein, the preset ratio is 50%, and performing garbage collection for the block in which the current word line is located includes: if a halved read count in which the read count of the current word line is reduced by 50% is greater than the third threshold, performing the garbage collection.

6. The method of claim 3, wherein, the preset ratio is 50%, and reducing the read count of the current word line by the preset ratio to obtain a reduced read count of the current word line after reduction includes: reducing the current read count of the current word line by 50% to obtain a halved read count of the current word line.

7. The method of claim 1, wherein, further comprising: if the read count of the current word line does not exceed the first threshold, reading data according to the read request.

8. The method of claim 1, wherein, obtaining the error count of the previous word line or the next word line of the current word line includes: Obtaining a low density parity check code corresponding to a previous word line or a next word line of the current word line from an error correction module, and decoding the low density parity check code to obtain an error number of the previous word line or the next word line of the current word line.

9. A method for controlling a flash memory, the method comprising: Comprising: In response to a write request for a flash memory, programming a block in the flash memory corresponding to the write request; After the programming for the block is completed, if there is a word line in the block that has not been programmed, marking a last programmed word line in the block according to the write request as a programming edge word line; Programming data that has been programmed in the programming edge word line to a next word line of the programming edge word line as backup data; In response to a first read request for a flash memory, reading current data from a read word line corresponding to the first read request; And If the current data is not correctable, and if the read word line corresponding to the current data is the programming edge word line, reading the backup data from a next word line of the programming edge word line as data corresponding to the first read request.

10. The method of claim 9, wherein, Further comprising: In response to a second read request for a flash memory, obtaining a read number of a current word line in the flash memory corresponding to the second read request; If the read number of the current word line is greater than a first threshold value, obtaining an error number of a previous word line or a next word line of the current word line; If the error number of the previous word line or the next word line is greater than a second threshold value, performing garbage collection for a block in which the current word line is located; If the error number of the previous word line or the next word line is not greater than the second threshold value, obtaining a reduced read number in which the read number of the current word line is reduced by a preset ratio; If the reduced read number of the current word line is greater than a third threshold value, performing garbage collection for the block in which the current word line is located; If the reduced read number of the current word line is not greater than the third threshold value, reducing the read number of the current word line by the preset ratio to obtain a reduced read number of the current word line after reduction, and adding one to the reduced read number; And Reading data according to the second read request.

11. An electronic device, comprising: Comprising: A plurality of flash memory blocks configured to store data; And A controller electrically coupled to the plurality of flash memory blocks and configured to perform the method according to any one of claims 1 to 8 or the method according to any one of claims 9 to 10.

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