Resistance trimming circuit, method, integrated circuit and computer-readable storage medium

Abstract

Embodiments of the present application provide a resistor trimming circuit, method, integrated circuit, and computer-readable storage medium. Among them, the resistor trimming circuit includes: N parallel trimming branches, where N≥2 and N is an integer. The i-th trimming branch includes: the i-th trimming resistor R i and the i-th trimming switch, 1≤i≤N and i is an integer; R1×(1 - P)+R D1 >R m , where P is the maximum process deviation, 0<P<1, R1 is the trimming resistor with the smallest resistance value among the N trimming branches, and R m is the target resistor; R D1 is the on-resistance of the trimming switch in the first trimming branch. By adopting this embodiment, a high-precision resistor can be obtained by controlling the on or off of the trimming switch.

Description

Technical Field

[0001] This application relates to electronic technologies, and in particular, to a resistance trimming circuit, method, integrated circuit, and computer-readable storage medium. Background Art

[0002] In integrated circuits such as CMOS (Complementary Metal-Oxide-Semiconductor), precise resistors are often required. In related resistance trimming circuits, a trimming switch is connected in parallel with the resistor. When the trimming switch is turned on, the resistor is short-circuited to achieve the purpose of adjusting the total resistance in the circuit. The trimming switch has a certain on-resistance, which causes the on-resistance when the switch is turned on to affect the actual resistance between terminals A and B, resulting in trimming errors.

[0003] To improve the accuracy of the trimming circuit, in related solutions, the size of the switching transistor is increased to reduce the on-resistance of the switch, but this will increase the area of the circuit. Another idea is to increase the resistance value of the resistor to reduce the influence of the switch on-resistance. However, a larger resistance value limits the application range of the resistor, making the resistance trimming circuit inapplicable to the case of small resistance values. Therefore, how to provide a resistance trimming circuit with a simple circuit structure and a convenient trimming method is a technical problem to be solved urgently. Summary of the Invention

[0004] This application provides a resistance trimming circuit, method, integrated circuit, and computer-readable storage medium, and a high-precision resistor can be obtained by controlling the trimming switch in the resistance trimming circuit to be turned on or off.

[0005] To achieve the above object, this application adopts the following technical solutions.

[0006] In a first aspect, an embodiment of this application provides a resistance trimming circuit, including: N parallel trimming branches, where N≥2 and N is an integer. The i-th trimming branch includes: the i-th trimming resistor R i and the i-th trimming switch, where 1≤i≤N and i is an integer; R 1 ×(1 - P)+R D1 >R m , where P is the maximum process deviation, 0<P<1, R 1 is the trimming resistor with the smallest resistance value among the N trimming branches, R m is the target resistor; R D1 is the on-resistance of the trimming switch in the first trimming branch.

[0007] In the above solution, the trimming circuit adopts multiple parallel trimming branches, and each branch includes a trimming resistor and a trimming switch. By controlling the trimming switch to be turned on or off, a high-precision resistor can be obtained.

[0008] In a possible implementation, it further includes a control circuit for controlling the trimming switches in the N parallel trimming branches to be turned on or off, so that the equivalent resistance of the N parallel trimming branches is equal to R m .

[0009] In a possible implementation, in the N parallel trimming branches, the ratio of the trimming resistor to the on-resistance of the trimming switch in each trimming branch is equal.

[0010] In a possible implementation, min{(U / (R j +R Dj )) / (U / (R 1 +R D1 ))-(U / (R j-1 +R Dj-1 )) / (U / (R 1 +R D1 ))、U / (R 2 +R D2 ) / (U / (R 1 +R D1 )} ≤ E, where 3 ≤ j ≤ N, U is the voltage value across the resistor trimming circuit, j is an integer, and E is a preset trimming accuracy, 0 < E < 1.

[0011] In a possible implementation, U / (R k +R Dk ) < I m , where 1 ≤ k ≤ N, k is an integer, and I m is the target current value; U / (R 1 +R D 1 ) < I z < U / ((R 1 +R D1 ) × (1 + F)), where 0 < F < 1, P < F; I z is the total current value of the N parallel trimming branches in the resistor trimming circuit.

[0012] In a possible implementation, R 2 = 100 × R 1 , R j / R j-1 = 1 / 2, where 3 ≤ j ≤ N, j is an integer.

[0013] In a possible implementation, the trimming switch in the trimming branch is a MOS switch.

[0014] In a possible implementation, the trimming resistor in the trimming branch is a resistor fabricated using a CMOS process.

[0015] In a second aspect, the present application provides a resistor trimming method, which controls the conduction or cutoff of the trimming switches in N parallel trimming branches in the resistor trimming circuit provided in the first aspect and any of its possible implementations, so that the equivalent resistance of the N parallel trimming branches is equal to the target resistance.

[0016] In a third aspect, the present application provides an integrated circuit, including the resistor trimming circuit provided in the first aspect and any of its possible implementations.

[0017] In a fourth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it controls the conduction or cutoff of the trimming switches in N parallel trimming branches in the resistor trimming circuit, so that the equivalent resistance of the N parallel trimming branches is equal to R m 。

[0018] It can be understood that for the beneficial effects that can be achieved by the resistor trimming method in the second aspect, the integrated circuit in the third aspect, and the computer-readable storage medium in the fourth aspect provided above, reference can be made to the beneficial effects in the first aspect, and details will not be repeated. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a schematic structural diagram of a resistor trimming circuit in the prior art;

[0020] Figure 2 is a schematic structural diagram of a resistor trimming circuit provided in an embodiment of the present application;

[0021] Figure 3 is a schematic structural diagram of a resistor trimming circuit provided in an embodiment of the present application.

[0022] The realization, functional features, and advantages of the objectives of the present application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. Through the above-mentioned accompanying drawings, the related solutions in the prior art and the embodiments of the present application have been shown, and more detailed descriptions will be provided later. These drawings and textual descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] Next, the technical solutions in the embodiments of the present application will be described in conjunction with the accompanying drawings in the embodiments of the present application.

[0024] Hereinafter, the terms "first", "second", and "third" are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", and "third" may explicitly or implicitly include one or more of such features.

[0025] Figure 1 is a schematic diagram of a resistor trimming circuit in the prior art of the present field, as Figure 1 shown, the equivalent resistance between terminals A and B depends on the conduction state of the trimming switches. When swN is conducted and the other switches are disconnected, assuming the switches are ideal switches and the resistance value of each resistor is R, then the conducted swN switch will short-circuit part of the resistors, so that only N resistors have current flowing through between terminals A and B, and the equivalent resistance between terminals A and B is N×R. In an actual circuit, the trimming switches have a certain on-resistance, so that the on-resistance when the switches are conducted will affect the actual resistance between terminals A and B, resulting in trimming errors.

[0026] Figure 2 is a schematic structural diagram of a resistor trimming circuit provided in an embodiment of the present application. The two ends of AB include N parallel trimming branches. The first trimming branch includes the first resistor R 1 and the first trimming switch, the second trimming branch includes the second resistor R 2 and the second trimming switch, and the Nth trimming branch includes the Nth resistor R N and the Nth trimming switch. By controlling the conduction or disconnection of the trimming switches in the N parallel trimming branches, the target resistance can be achieved. In this trimming circuit, R1 is the trimming resistor with the smallest resistance value in all branches. When the maximum process deviation is P, 0 < P < 1, R 1 ×(1 - P) + R D1 > R m ; R m is the target resistance; R D1 is the on-resistance of the trimming switch in the first trimming branch, and the maximum process deviation can be obtained from the technical manual of the relevant process. The on-resistance of trimming switch 1 can be obtained through circuit simulation in the design stage. For example, if the maximum process deviation is 30%, then due to the process deviation, the resistance value of the trimming resistor will have a maximum deviation of 30%. Then R 1 ×(1 - 30%) + R D1 > R m . It should be noted that the conduction or closing of the modification switch can be controlled manually or by a controller.

[0027] In some possible implementation manners, the resistor trimming circuit may include: a control circuit for controlling the conduction or disconnection of the trimming switches in the N parallel trimming branches.

[0028] In some possible implementations, among the N parallel trimming branches, the ratio of the trimming resistor to the on-resistance of the trimming switch in each trimming branch is equal. That is:

[0029]

[0030] Since the ratio of the on-resistance of the trimming switch to the trimming resistor in the branch where it is located is fixed, the following equation holds:

[0031]

[0032]

[0033] In some possible implementations, min{(U / (R j +R Dj )) / (U / (R 1 +R D1 ))-(U / (R j-1 +R Dj-1 )) / (U / (R 1 +R D1 ))、U / (R 2 +R D2 ) / (U / (R 1 +R D1 )} ≤ E, where 3 ≤ j ≤ N, U is the voltage value across the resistor trimming circuit, j is an integer, E is the preset trimming accuracy, and 0 < E < 1.

[0034] In some possible implementations, U / (R k +R Dk ) < I m , where 1 ≤ k ≤ N, k is an integer, and I m is the target current value;

[0035] U / (R 1 +R D1 ) < I z < U / ((R 1 +R D1 ) × (1 + F)), where 0 < F < 1 and P < F;

[0036] I z is the total current value of the N parallel trimming branches in the resistor trimming circuit.

[0037] As Figure 3 shown, in some possible implementations, R 2 = 100 × R 1 , R j / R j-1 = 1 / 2, where 3 ≤ j ≤ N and j is an integer.

[0038] In some possible implementation manners, the trimming switch in the trimming branch is a MOS switch; the trimming resistor in the trimming branch is a resistor fabricated by a CMOS process.

[0039] The embodiment of the present application further provides a resistor trimming method. By controlling the conduction or cutoff of the trimming switches in N parallel trimming branches in the resistor trimming circuit, the equivalent resistance of the N parallel trimming branches is made equal to the target resistance. Specifically, the total current flowing through the resistor trimming circuit can be trimmed to achieve the resistor trimming method. Since resistance = voltage across the trimming circuit / total current, when the voltage across the trimming circuit is fixed, adjusting the total current can achieve the purpose of trimming the resistor. In the design extreme, it is necessary to ensure that the on-resistance R of the first trimming branch 1 +R D1 >R m .

[0040] By selecting appropriate resistance values of the resistors in the second trimming branch, the third trimming branch... the Nth trimming branch, the conduction current of the second trimming branch, the conduction current of the third trimming branch... the conduction current of the Nth trimming branch can be determined. Closing the trimming switch of a certain branch, the total current will increase by the conduction current of the corresponding branch. And there is:

[0041] Conduction current of the second trimming branch = (R 1 / R 2 ) Conduction current of the first trimming branch

[0042] Conduction current of the third trimming branch = (R 1 / R 3 ) Conduction current of the first trimming branch

[0043] ……

[0044] Conduction current of the Nth trimming branch = (R1 / RN Conduction current of the first trimming branch

[0045] It should be noted that during actual trimming, the voltage applied to the resistor trimming circuit is a fixed voltage. During trimming, first turn on the first trimming branch and turn off other trimming branches, and measure the current of the first trimming branch. Since the on-resistance of the first trimming branch > target resistance value, at this time there is:

[0046] Conduction current of the first trimming branch < voltage across the trimming current / target resistance value = target current

[0047] For the resistor trimming method, during actual trimming, the conduction current of the first trimming branch is measured, so the conduction current of the second trimming branch, the conduction current of the third trimming branch,..., and the conduction current of the Nth trimming branch can be determined.

[0048] After determining the conduction currents of the first trimming branch, the second trimming branch, …, the Nth trimming branch and the target current, the conduction or cutoff state of the trimming switch is changed to make the total current equal to the target current. When the total current is equal to the target current, the resistor trimming is completed.

[0049] For example, if the trimming accuracy E = 1%, first determine the designed value of R1.

[0050] Resistance of the first trimming branch = conduction resistance of trimming switch 1 + R1*(1 ± relative process deviation).

[0051] The following conditions need to be satisfied:

[0052] Conduction resistance of trimming switch 1 + R1*(1 - maximum relative process deviation) > target resistance value

[0053] The maximum relative process deviation can be obtained by querying the technical manual of the relevant process, and the conduction resistance of trimming switch 1 can be obtained through circuit simulation in the design stage.

[0054] According to the trimming accuracy, determine the designed resistance values of the second trimming branch, the third trimming branch … the Nth trimming branch.

[0055] If the trimming accuracy is 1%, the circuit shown in Figure 3 can be adopted.

[0056] The conduction current of the second trimming branch is 1% of the conduction current of the first trimming branch.

[0057] The conduction current of the third trimming branch is 2% of the conduction current of the first trimming branch.

[0058] The conduction current of the fourth trimming branch is 4% of the conduction current of the first trimming branch.

[0059] The conduction current of the fifth trimming branch is 8% of the conduction current of the first trimming branch.

[0060] The conduction current of the sixth trimming branch is 16% of the conduction current of the first trimming branch.

[0061] Therefore, by adjusting the states of the switches of each branch, the total current passing through the trimming circuit can be adjusted. The trimming range of the total current is:

[0062] Conduction current of the first trimming branch < total current < conduction current of the first trimming branch * (1 + 31%).

[0063] The above completes the design stage of the trimming circuit. It can be understood that in the specific design of the circuit, the circuit to achieve the purpose is not unique. For example Figure 3The circuit shown can achieve the object of the present application. For example, the above-mentioned third to sixth trimming branches can also be replaced by thirty parallel second trimming branches, which is also feasible.

[0064] During actual trimming, a constant voltage is added across the trimming circuit, and the conduction current of the first trimming branch across the trimming circuit is measured at this time. If the conduction current of the first trimming branch is less than the target current, according to the difference between the conduction current of the first trimming branch and the target current, the corresponding trimming switch is selected to conduct, so that the total current is equal to the target current, and the trimming is completed. For example, assuming the target resistance is 1k, when a constant voltage of 1V is applied across the trimming circuit, the target current is 1mA. If the measured conduction current of the first trimming branch is 0.9mA, then the difference between the conduction current of the first trimming branch and the target current = 11.11% of the conduction current of the first trimming branch. Then, only by additionally conducting the conduction current of the fifth trimming branch (8%), the conduction current of the third trimming branch (2%), and the conduction current of the second trimming branch (1%), the total current can be made close to the target current, and the circuit trimming is completed.

[0065] The embodiment of the present application also provides an integrated circuit, which includes a resistor trimming circuit. The resistor trimming circuit includes: N parallel trimming branches, N≥2, N is an integer, and the i-th trimming branch includes: the i-th trimming resistor R i and the i-th trimming switch, 1≤i≤N, i is an integer; R 1 ×(1 - P)+R D1 >R m , where P is the maximum process deviation, 0<P<1, R 1 is the trimming resistor with the smallest resistance value among the N trimming branches, R m is the target resistor; R D1 is the conduction resistance of the trimming switch in the first trimming branch.

[0066] In a possible implementation, the resistor trimming circuit further includes: a control circuit, configured to control the trimming switch in the N parallel trimming branches to conduct or turn off, so that the equivalent resistance of the N parallel trimming branches is equal to R m .

[0067] In a possible implementation, among the N parallel trimming branches, the ratio of the trimming resistor to the conduction resistance of the trimming switch in each trimming branch is equal.

[0068] In a possible implementation, min{(U / (R j +R Dj )) / (U / (R 1 +R D1 ))-(U / (R j-1 +R Dj-1)) / (U / (R 1 +R D1 ))、U / (R 2 +R D2 ) / (U / (R 1 +R D1 )} ≤ E, where 3 ≤ j ≤ N, U is the voltage value across the resistor trimming circuit, j is an integer, E is the preset trimming accuracy, and 0 < E < 1.

[0069] In a possible implementation, U / (R k +R Dk ) < I m , where 1 ≤ k ≤ N, k is an integer, and I m is the target current value; U / (R 1 +R D 1 ) < I z < U / ((R 1 +R D1 ) × (1 + F)), where 0 < F < 1 and P < F; I z is the total current value of the N parallel trimming branches in the resistor trimming circuit.

[0070] In a possible implementation, R 2 = 100 × R 1 , R j / R j-1 = 1 / 2, where 3 ≤ j ≤ N and j is an integer.

[0071] In a possible implementation, the trimming switch in the trimming branch is a MOS switch; the trimming resistor in the trimming branch is a resistor made by CMOS process.

[0072] In an embodiment, an electronic device is provided. The electronic device includes the chip in the previous embodiment. The chip includes a resistor trimming circuit. The resistor trimming circuit includes: N parallel trimming branches, N ≥ 2 and N is an integer. The i-th trimming branch includes: the i-th trimming resistor R i and the i-th trimming switch, 1 ≤ i ≤ N and i is an integer; R 1 × (1 - P) + R D1 > R m , where P is the maximum process deviation, 0 < P < 1, R 1 is the trimming resistor with the smallest resistance value among the N trimming branches, R m is the target resistor; R D1is the on-resistance of the trimming switch in the first trimming branch. In a possible implementation, the resistance trimming circuit further includes: a control circuit, configured to control the trimming switches in N parallel trimming branches to be turned on or off, so that the equivalent resistance of the N parallel trimming branches is equal to R m . In a possible implementation, in the N parallel trimming branches, the ratio of the trimming resistance to the on-resistance of the trimming switch in each trimming branch is equal. In a possible implementation, min{(U / (R j +R Dj )) / (U / (R 1 +R D1 ))-(U / (R j-1 +R Dj-1 )) / (U / (R 1 +R D1 ))、U / (R 2 +R D2 ) / (U / (R 1 +R D1 )}≤E, where 3≤j≤N, U is the voltage value across the resistance trimming circuit, j is an integer, E is a preset trimming accuracy, and 0<E<1. In a possible implementation, U / (R k +R Dk )<I m , where 1≤k≤N, k is an integer, and I m is the target current value; U / (R 1 +R D 1 )<I z <U / ((R 1 +R D1 )×(1+F), where 0<F<1, P<F; I z is the total current value of the N parallel trimming branches in the resistance trimming circuit. In a possible implementation, R 2 =100×R 1 , R j / R j-1 =1 / 2, where 3≤j≤N and j is an integer. In a possible implementation, the trimming switch in the trimming branch is a MOS switch; the trimming resistance in the trimming branch is a resistor made by using a CMOS process.

[0073] The present application also provides a computer program product, which implements the resistance trimming method in any method embodiment of the present application when executed by a processor.

[0074] The present application also provides a computer-readable storage medium. The computer-readable storage medium includes instructions that, when running on an electronic device, cause the electronic device to execute the resistance trimming method as described in any of the previous method embodiments. For the specific implementation steps, refer to the descriptions in the previous method embodiments and will not be elaborated here.

[0075] The present application also provides a chip. The chip is coupled to a memory and is used to read and execute a computer program or instructions stored in the memory to execute the methods in the above embodiments. The chip can be a general-purpose processor or a dedicated processor.

[0076] The electronic device, computer-readable storage medium, computer program product, and chip provided in the embodiments of the present application are all used to execute the methods provided in the above embodiments. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects corresponding to the methods provided above and will not be elaborated here.

[0077] In several embodiments provided by the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed couplings or direct couplings or communication connections to each other can be through some interfaces, indirect couplings or communication connections of devices or units. The replaced units may or may not be physically separated. The components displayed as units can be one physical unit or multiple physical units, that is, they can be located in one place or distributed to multiple different places. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0078] In addition, each functional unit in various embodiments of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of a software functional unit. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product. The software product is stored in a storage medium and includes several instructions for causing a device (which may be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the methods in various embodiments of the present application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks, or optical discs that can store program codes. The above content is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered by the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A resistance trimming circuit, characterized in that: include: N parallel-connected trimming branches, wherein N≥2, N is an integer, and the i-th trimming branch comprises: the i-th trimming resistor R i and the i-th trim switch, 1≤i≤N, i is an integer; R1×(1-P)+R D1 >R m , where P is the maximum process deviation, 0<P<1, R1 is the smallest trimming resistor among the N trimming branches, R m is the target resistance; the R D1 is the on-resistance of the trimming switch in the first trimming branch; min{(U / (R j +R Dj )) / (U / (R1+R D1 ))-(U / (R j-1 +R Dj-1 )) / (U / (R1+R D1 ))、U / (R2+R D2 ) / (U / (R1+R D1 )}≤E, wherein 3≤j≤N, U is the voltage value across the resistance trimming circuit, j is an integer, E is the preset trimming accuracy, and 0<E<1.

2. The resistance adjustment circuit according to claim 1, characterized in that: Also includes: A control circuit is used to control the adjustment switches in the N parallel adjustment branches to turn on or off, so that the equivalent resistance of the N parallel adjustment branches is equal to R m .

3. The resistance adjustment circuit according to claim 1 or 2, characterized in that: In the N parallel-connected trimming branches, the ratio of the trimming resistor in each of the trimming branches to the on-resistance of the trimming switch is equal.

4. The resistance adjustment circuit according to claim 1, characterized in that: U / (R k +R Dk ) <I m , where 1≤k≤N, k is an integer, and I m is the target current value; U / (R1+R D1 ) <I z <U / ((R1+R D1 )×(1+F), where, 0<F<1, P<F; I z It is the total current value of the N parallel-connected trimming branches in the resistance trimming circuit.

5. The resistance adjustment circuit according to claim 4, characterized in that: R2=100×R1, R j / R j-1 =1 / 2, where 3≤j≤N, and j is an integer.

6. The resistance adjustment circuit according to claim 1, characterized in that: The trimming switch in the trimming branch is a MOS switch; the trimming resistor in the trimming branch is a resistor made by using CMOS technology.

7. A resistance adjustment method, characterized in that: The on or off of the trimming switches in the N parallel trimming branches in the resistance trimming circuit described in any one of claims 1 to 6 is controlled so that the equivalent resistance of the N parallel trimming branches is equal to the target resistance.

8. An integrated circuit, characterized in that: It comprises the resistance trimming circuit as described in any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps in the resistance trimming method according to claim 7 are implemented.

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