Method of manufacturing a semiconductor structure and manufacturing apparatus

Abstract

The present disclosure provides a semiconductor structure manufacturing method and manufacturing device, and relates to the technical field of semiconductor. The semiconductor structure manufacturing method comprises the following steps: providing a substrate, and arranging a stack structure on the substrate; forming at least one opening, the opening penetrating through the stack structure and extending into the substrate, and the opening exposing part of the substrate; and performing heat treatment on the substrate in a reducing gas environment to remove residues in the opening, and in the process of heat treatment, the residues and products generated by the reaction of the reducing gas are extracted from the opening. The present disclosure removes the reaction products in the process of heat treatment, promotes the reaction of the residues and the reducing gas, improves the reaction rate of the residues and the reducing gas, removes all the residues in the opening, avoids the residues in the opening from entering the subsequent process, and has no adverse effect on the semiconductor structure, improves the reading signal capability of the semiconductor structure, and improves the sensitivity and response speed of the semiconductor structure.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor technology, and in particular to a method and apparatus for manufacturing a semiconductor structure. Background Art

[0002] With the advancement of integrated circuit technology, 3D NAND flash memory (3D NAND) has seen rapid growth in pursuit of higher storage density. During the fabrication process, a channel structure is formed within a trench, and an epitaxial layer is grown on the substrate at the bottom of the trench. This epitaxial layer connects the channel structure to the substrate. However, during the etching process to form the trench, some broken crystals and organic polymers / oxides remain in the trench, resulting in voids at the bottom of the epitaxial layer. This reduces the memory's channel current and makes it impossible to distinguish signals. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail in this disclosure. This overview is not intended to limit the scope of the claims.

[0004] The present disclosure provides a method and apparatus for manufacturing a semiconductor structure.

[0005] A first aspect of the present disclosure provides a method for manufacturing a semiconductor structure, the method comprising:

[0006] providing a substrate, on which a laminated structure is disposed;

[0007] forming at least one opening, the opening penetrating the stacked structure and extending into the substrate, the opening exposing a portion of the substrate;

[0008] The substrate is heat-treated in a reducing gas environment to remove residues in the openings. During the heat treatment, products generated by the reaction between the residues and the reducing gas are extracted from the openings.

[0009] Optionally, heat-treating the substrate in a reducing gas environment comprises:

[0010] Hydrogen is introduced into the opening, and the substrate is heat-treated at a temperature of 800° C. to 1000° C., so that the residue reacts with the hydrogen to generate a gaseous product.

[0011] Optionally, heat-treating the substrate in a reducing gas environment comprises:

[0012] Controlling the pressure of the heat treatment process to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure;

[0013] At the first pressure, the gaseous product is withdrawn from the opening.

[0014] Optionally, during the heat treatment of the substrate, the flow rate of the hydrogen gas varies between a first flow rate and a second flow rate.

[0015] Optionally, before heat-treating the substrate in a reducing gas environment, the manufacturing method further comprises:

[0016] The residue is pretreated.

[0017] A second aspect of the present disclosure provides a semiconductor structure fabrication apparatus, the fabrication apparatus comprising:

[0018] reaction chamber;

[0019] a gas pipeline, for supplying reducing gas into the reaction chamber to form a reducing gas environment in the reaction chamber;

[0020] A heater is arranged in the reaction chamber and is used to support at least one substrate, a stacked structure is provided on the substrate, and at least one opening is provided on the substrate, the opening penetrates the stacked structure and extends into the substrate, and the heater is used to heat-treat the substrate in the reducing gas environment to remove residues remaining in the opening during the process of forming the opening, and to extract products generated by the reaction of the residue and the reducing gas from the opening during the heat treatment of the substrate.

[0021] Optionally, the gas pipeline includes:

[0022] an air inlet pipe, used for introducing hydrogen into the reaction chamber;

[0023] A gas extractor is used to extract gaseous products generated by the reaction between the residue and the hydrogen.

[0024] Optionally, the heater is arranged in the reaction chamber along a preset direction;

[0025] The air inlet pipe is arranged on one side of the heater in parallel with the heater, the air inlet pipe includes a plurality of air inlet holes arranged along the preset direction, and the gas extractor is arranged on the other side of the heater relative to the air inlet pipe.

[0026] Optionally, the production device further includes:

[0027] a controller, configured to control the pressure in the reaction chamber to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure;

[0028] When the pressure in the reaction chamber is the first pressure, the controller controls the gas extractor to open and extract the gaseous product from the opening;

[0029] When the pressure in the reaction chamber is the second pressure, the controller controls the gas extractor to be closed.

[0030] Optionally, the controller is further configured to control a flow rate of the hydrogen gas introduced through the air intake pipe to vary between a first flow rate and a second flow rate.

[0031] In the semiconductor structure manufacturing method and manufacturing device provided in the embodiments of the present disclosure, by removing reaction products during the heat treatment process, the reaction between the residue and the reducing gas is promoted, and the reaction rate of the residue and the reducing gas is increased, so as to completely remove the residue in the opening, prevent the residue remaining in the opening from entering the subsequent process and having an adverse effect on the semiconductor structure, thereby improving the semiconductor structure's ability to read signals, and improving the sensitivity and response speed of the semiconductor structure.

[0032] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings, which are incorporated into and constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, are used to explain the principles of the embodiments of the present disclosure. In these drawings, similar reference numerals are used to represent similar elements. The drawings described below are some embodiments of the present disclosure, not all embodiments. For those skilled in the art, other drawings can be derived from these drawings without inventive effort.

[0034] Figure 1 The figure is a flow chart of a method for manufacturing a semiconductor structure according to an exemplary embodiment.

[0035] Figure 2 is a schematic diagram showing a stacked structure formed on a substrate according to an exemplary embodiment.

[0036] Figure 3 FIG. 1 is a schematic diagram showing a state after an opening is formed according to an exemplary embodiment.

[0037] Figure 4 is a schematic diagram showing the extraction of gaseous products according to an exemplary embodiment.

[0038] Figure 5 is a schematic diagram showing the introduction of hydrogen into the opening at a second flow rate according to an exemplary embodiment.

[0039] Figure 6is a schematic diagram showing a substrate after heat treatment according to an exemplary embodiment.

[0040] Figure 7 is a schematic diagram showing a state after an epitaxial layer is formed according to an exemplary embodiment.

[0041] Figure 8 is a schematic diagram showing a state after a channel structure is formed according to an exemplary embodiment.

[0042] Figure 9 The figure is a flow chart showing a device for manufacturing a semiconductor structure according to an exemplary embodiment.

[0043] Reference numerals:

[0044] 100, substrate; 110, oxide layer; 200, stacked structure; 210, first dielectric layer; 220, second dielectric layer; 310, opening; 410, residue; 500, epitaxial layer; 600, channel structure; 601, barrier layer; 602, charge storage layer; 603, tunneling layer; 604, semiconductor layer; 605, dielectric layer;

[0045] 1. Reaction chamber; 2. Gas pipeline; 3. Heater; 4. Inlet pipe; 41. Inlet hole; 42. Flow valve; 5. Gas extractor; 6. Controller; 8. Switch. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the disclosed embodiments will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure. It should be noted that, in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other.

[0047] With the development of 3D NAND memory, the number of stacked layers has continued to increase, from 32 to 128 layers, and 3D NAND memory is still breaking through the original stacking layer number and continuously increasing the number of stacking layers. In the 3D NAND manufacturing process, after forming a stacked structure with a predetermined number of stacked layers on a substrate, a portion of the stacked structure is etched away to form a trench. The trench penetrates the stacked structure and extends into the substrate. The trench is very deep.

[0048] During the etching process of the stacked structure, some broken crystals and organic polymers / oxides remain in the trench. However, the trench is very deep and small in size. It is difficult to completely remove all the residues at the bottom of the trench in the related technology. Some residues remain in the trench and enter the subsequent process, which may cause voids at the bottom of the epitaxial layer grown epitaxially on the substrate surface. It will also have an adverse effect on the channel structure formed in the trench, resulting in a decrease in the channel current of the 3D NAND memory and an inability to distinguish signals.

[0049] In view of this, the present disclosure provides a method for manufacturing a semiconductor structure, in which a substrate is heat-treated in a reducing gas environment, and reaction products are removed during the heat treatment process to promote the reaction between the residue and the reducing gas, thereby increasing the reaction rate between the residue and the reducing gas, so as to completely remove the residue in the opening, thereby preventing the residue remaining in the opening from entering subsequent processes and having an adverse effect on the semiconductor structure, thereby improving the semiconductor structure's ability to read signals, and improving the sensitivity and response speed of the semiconductor structure.

[0050] In an exemplary embodiment of the present disclosure, a method for manufacturing a semiconductor structure is provided. Figure 1 As shown, Figure 1 A flowchart of a method for manufacturing a semiconductor structure according to an exemplary embodiment of the present disclosure is shown. Figure 2-Figure 8 The schematic diagram of each stage of the semiconductor structure manufacturing method is shown below. Figure 2-Figure 8 The fabrication method of semiconductor structures is introduced.

[0051] This embodiment does not limit the semiconductor structure. The following description will take a three-dimensional flash memory (3D NAND) as an example, but this embodiment is not limited thereto. The semiconductor structure in this embodiment may also be other structures.

[0052] like Figure 1 As shown, an exemplary embodiment of the present disclosure provides a method for manufacturing a semiconductor structure, comprising the following steps:

[0053] Step S110: providing a substrate, and setting a stacked structure on the substrate.

[0054] like Figure 2As shown, substrate 100 may be a semiconductor substrate, which may include a silicon substrate, a germanium (Ge) substrate, a silicon germanium (SiGe) substrate, an SOI (Silicon-on-Insulator) substrate, or a GOI (Germanium-on-Insulator) substrate. The semiconductor substrate may be doped with ions. For example, the semiconductor substrate may be a P-type doped substrate or an N-type doped substrate. In this embodiment, substrate 100 is a silicon crystal substrate.

[0055] Then, a stacked structure 200 is formed on the substrate 100. For example, the stacked structure 200 includes a first dielectric layer 210 and a second dielectric layer 220 alternately stacked on the substrate 100. The first dielectric layer 210 may be a silicon oxide layer, and the second dielectric layer 220 may be a silicon nitride layer. In some examples, the first dielectric layer 210 and the second dielectric layer 220 may be connected. In other examples, other film layers, such as metal material layers or semiconductor material layers, may be disposed between the first dielectric layer 210 and the second dielectric layer 220.

[0056] In this embodiment, there is no limit on the number of layers of the stacked structure 200. The first dielectric layer 210 and the second dielectric layer 220 can be alternately stacked in 2 to 1024 layers or more. For example, 48 layers, 64 layers, 128 layers, 256 layers or 512 layers can be alternately stacked.

[0057] Step S120: forming at least one opening, wherein the opening penetrates the stacked structure and extends into the substrate, and the opening exposes a portion of the substrate.

[0058] In this embodiment, at least one opening is formed by adopting the following implementation methods:

[0059] like Figure 3 As shown, a photoresist layer (not shown) is formed on the top surface of the stacked structure 200. The photoresist layer defines a photoresist pattern, and the photoresist pattern exposes a portion of the top surface of the stacked structure 200. From the top surface of the stacked structure 200 toward the substrate 100, the first dielectric layer 210 and the second dielectric layer 220 are etched layer by layer according to the photoresist pattern. After the top surface of the substrate 100 is exposed, a portion of the substrate 100 is etched away to form an opening 310 that penetrates the stacked structure 200 and extends into the substrate 100. The opening 310 formed in this embodiment is a trench. In this embodiment, the stacked structure 200 and the substrate 100 can be etched using a dry process or a wet process.

[0060] During the process of etching to form the opening 310 , some residues 410 are generated and remain in the opening 310 . The residues 410 may remain on the substrate 100 at the bottom of the opening 310 or on the sidewalls of the opening 310 .

[0061] Analysis of the composition of residue 410 reveals that residue 410 includes broken crystals of semiconductor material, polymer residues from the etching process, and oxides formed by oxidation of substrate 100 exposed to the process chamber. In this embodiment, substrate 100 is a silicon crystal substrate, and the oxide is a silicon oxide compound, primarily comprising SiO2 and a small amount of SiO.

[0062] Step S130: heat-treating the substrate in a reducing gas environment to remove residues in the openings. During the heat treatment, products generated by the reaction between the residues and the reducing gas are extracted from the openings.

[0063] Reference Figure 4 、 Figure 5 、 Figure 6 As shown, at least one reducing gas is provided to form a reducing gas environment, and the semiconductor structure is placed in the reducing gas environment so that the residue 410 located in the opening 100 is fully exposed to the reducing gas. During the heat treatment, the residue 410 undergoes a reduction reaction with the reducing gas, thereby removing the residue 410. Simultaneously, during the heat treatment, products generated by the reaction between the residue 410 and the reducing gas are extracted from the opening to promote the reaction between the residue 410 and the reducing gas, thereby completely removing the residue 410 from the opening 100.

[0064] According to the principle of chemical equilibrium shift, if the conditions of a reversible reaction (such as the concentration of the reacting chemicals, pressure, temperature, etc.) are changed, the chemical equilibrium is disrupted and shifts in a direction that weakens the change. For example, if the concentration of the reactants is increased or the concentration of the products is decreased, the equilibrium shifts toward the forward reaction; if the concentration of the reactants is decreased or the concentration of the products is increased, the equilibrium shifts toward the reverse reaction.

[0065] The manufacturing method of the semiconductor structure of this embodiment removes reaction products during the heat treatment process, promotes the reaction between the residue and the reducing gas, and increases the reaction rate of the residue and the reducing gas to completely remove the residue in the opening, thereby preventing the residue remaining in the opening from entering the subsequent process and affecting the subsequently formed epitaxial layer, forming a void at the bottom of the epitaxial layer, and causing the channel current of the semiconductor structure to decrease. This improves the ability of the semiconductor structure to read signals and improves the sensitivity and response speed of the semiconductor structure.

[0066] According to an exemplary embodiment, the substrate is heat-treated in a reducing gas environment using the following implementation:

[0067] Step S131: hydrogen is introduced into the opening, and the substrate is heat-treated at a temperature of 800° C. to 1000° C., so that the residue reacts with the hydrogen to generate gaseous products.

[0068] Reference Figure 3 、 Figure 4 、 Figure 5 As shown, the temperature of the heat-treated substrate 100 is between 800° C. and 1000° C. In some examples, the temperature of the heat-treated substrate 100 is controlled to be between 900° C. and 1000° C. In some examples, the temperature of the heat-treated substrate 100 is controlled to be between 950° C. and 1000° C.

[0069] The residue 410 reacts with hydrogen to produce gaseous products. The gaseous products include compound gases containing silicon and hydrogen, such as silane (SiH4), generated by the reaction of broken crystals in the residue 410 with hydrogen. The gaseous products also include polymer gas generated by the reduction of polymers in the residue 410 by hydrogen. The gaseous products 410 also include compound gases containing silicon and oxygen, such as gaseous silicon monoxide (SiO), generated by the reaction of oxides in the residue 410 with hydrogen.

[0070] It can be understood that the oxide in the residue 410 includes SiO2 oxygen and a small amount of SiO. During the actual reaction process, part of the oxide reacts with hydrogen and is reduced to gaseous silicon monoxide by hydrogen, and another part of the oxide is reduced to single crystal silicon by hydrogen. The single crystal silicon and the substrate material at the bottom of the oxide layer 110 serve as the substrate of the semiconductor structure.

[0071] Reference Figure 3 、 Figure 4 、 Figure 5 As shown, after the residue 410 reacts with hydrogen to generate gaseous products, the gaseous products flow from the bottom of the opening 310 to the top of the opening 310, thereby escaping into the process space through the opening 310. The flow of the gaseous products forms a pressure gradient in the opening 310. The hydrogen subsequently introduced into the opening 310 is difficult to overcome the pressure gradient and flow to the bottom of the opening 310, resulting in the difficulty of the reaction between the remaining residue 410 and hydrogen on the substrate 100 to continue. In addition, the reaction between the residue 410 and hydrogen is a reversible reaction. After the reaction between the residue 410 and hydrogen reaches equilibrium, the reaction rate of the residue 410 and hydrogen slows down, the generation rate of the gaseous products slows down, and the rate of escaping the gaseous products into the process space slows down. The reaction products retained in the opening 310 may undergo a reverse reaction, and the products of the reverse reaction may not only adhere to the surface of the substrate 100, but may also adhere to the sidewalls of the opening 310, not only resulting in the subsequent formation of the epitaxial layer 500 (refer to Figure 8 ) has a void at the bottom, which also affects the bonding between the channel structure 600 formed in the opening 310 and the sidewall of the opening 310, affecting the channel structure 600 (refer to Figure 8 )’s electrical properties, causing the channel current of the semiconductor structure to decrease, reducing the semiconductor structure’s ability to sense signals, and reducing the response speed of the semiconductor structure.

[0072] In view of this, in this embodiment, during the heat treatment of the substrate 100 in a reducing gas environment, gaseous products generated by the reaction between the residue 410 and hydrogen are extracted from the opening 310 .

[0073] Reference Figure 4 A schematic diagram showing the extraction of gaseous products from the opening 310 is shown. Figure 4 The arrows in the figure indicate the flow direction of the gas extracted from the opening 310. In this embodiment, the gaseous products generated by the reaction between the residue 410 and the hydrogen are extracted from the opening 310, reducing the concentration of the products of the reaction between the residue 410 and the hydrogen, thereby encouraging the residue 410 and the hydrogen to continue to react. Furthermore, the rate at which the gaseous products are extracted from the opening 310 is much greater than the rate at which the gaseous products diffuse into the process space. Extracting the gaseous products from the opening 310 prevents the pressure gradient formed by the accumulation of the gaseous products in the opening 310 from hindering the flow of hydrogen into the opening 310, thereby promoting more hydrogen to flow to the bottom of the opening 310, increasing the concentration of hydrogen in the opening 310, and further increasing the reaction rate between the residue 410 and the hydrogen, thereby completely removing the residue 410 from the opening 310.

[0074] According to an exemplary embodiment, the substrate is heat-treated in a reducing gas environment, and the following steps are further performed:

[0075] Step S132: controlling the pressure of the heat treatment process to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure; at the first pressure, extracting the gaseous product from the opening.

[0076] Reference Figure 3 、 Figure 4 、 Figure 5 、 Figure 6 As shown, the pressure in the opening 310 can be controlled by extracting the gaseous product so that the pressure in the opening 310 changes cyclically between a first pressure and a second pressure, wherein the first pressure is 0 torr-0.1 torr and the second pressure is 10 torr-15 torr.

[0077] In some examples, the pressure in the opening 310 cycles between a first pressure and a second pressure pulse. When the pressure in the opening 310 is the first pressure, the gaseous product is extracted from the opening 310. When the pressure in the opening 310 is the second pressure, the extraction of the gaseous product is stopped to allow hydrogen to flow into the opening 310 and the hydrogen and the residue 410 to fully react.

[0078] In other examples, the pressure in opening 310 gradually changes between a first pressure and a second pressure, where the pressure in opening 310 gradually increases from the first pressure to the second pressure and then gradually decreases from the second pressure to the first pressure. When the pressure in opening 310 is at the first pressure, the gaseous product is extracted from opening 310.

[0079] According to an exemplary embodiment, the substrate is heat-treated in a reducing gas environment, and the following steps are further performed:

[0080] Step S133: During the heat treatment of the substrate, the flow rate of hydrogen gas is changed between a first flow rate and a second flow rate.

[0081] Reference Figure 3 、 Figure 4 、 Figure 5 As shown, the flow rate of hydrogen can be adjusted according to the reaction progress. For example, the following implementation is adopted: at a first pressure, hydrogen is introduced into the opening at a first flow rate, and the gaseous product is extracted from the opening at the same time; at a second pressure, hydrogen is introduced into the opening at a second flow rate, and the hydrogen flows to the bottom of the opening under the action of the second pressure.

[0082] During the heat treatment of the substrate 100, the pressure in the opening 310 is adjusted by intermittently extracting the gaseous product and adjusting the flow rate of hydrogen gas, so that the pressure in the opening 310 changes cyclically between a first pressure and a second pressure. Figure 4 As shown, during the process of extracting the gaseous product from the opening 310, the pressure in the opening 310 is a first pressure, and hydrogen is introduced into the opening 310 at a lower first flow rate, which is 0.1 L / min-1 L / min, for example, 0.1 L / min, 0.3 / min, 0.5 / min, 0.7 / min, 0.9, or 1 L / min. Then, the extraction of the gaseous product from the opening 310 is stopped, the pressure in the opening 310 is increased to a second pressure, and hydrogen is introduced into the opening 310 at a higher second flow rate, which is 9 L / min-10 L / min, for example, 9 L / min, 9.2 / min, 9.5 / min, 9.7 / min, 9.9, or 10 L / min.

[0083] like Figure 5 Schematic diagram showing the introduction of hydrogen into the opening 310 at a second flow rate, Figure 5 The arrow in the middle indicates the direction of hydrogen flow toward the opening 310, refer to Figure 5As shown, when hydrogen is introduced into the opening 310 at a higher second flow rate, the hydrogen flows toward the bottom of the opening 310, and the hydrogen fully contacts the residue 410 located in the opening 310, promoting the reaction between the hydrogen and the residue 410 to generate a gaseous product. In this way, the steps of extracting the gaseous product and introducing hydrogen into the opening 310 at the second flow rate are repeated many times until the residue 410 in the opening 310 is completely removed, ensuring that no residue 410 remains in the opening 310, and the surface of the substrate 100 exposed by the opening 310 is a uniform silicon crystal material. The epitaxial layer 500 (see FIG. 1 ) subsequently formed on the surface of the substrate 100 by epitaxial growth is formed. Figure 8 ) has no voids, and the channel structure 600 (refer to Figure 8 ) and the sidewall of the opening 310 have good bonding force, which can increase the channel current of the semiconductor structure and improve the response speed of the semiconductor structure.

[0084] According to an exemplary embodiment, before heat-treating the substrate in a reducing gas environment, the following steps are further performed:

[0085] Step S1201: pre-processing the residue.

[0086] Reference Figure 3 Before heat-treating the substrate 100, the residue 410 is pre-treated to remove part of the residue 410 that does not react with hydrogen or is not easy to react with hydrogen, so as to avoid the situation where the heat treatment process cannot completely remove the residue 410, and ensure that the pre-treated residue 410 is completely removed during the heat treatment process.

[0087] During the treatment process, the composition of the residue 410 can be analyzed, and appropriate gas or reagent can be used to pre-treat the residue 410 according to the composition of the residue 410 to remove the portion of the residue 410 that is not easily reactive with hydrogen. For example, chlorine gas can be used to treat the residue 410 in the opening 310.

[0088] According to an exemplary embodiment, during the process of forming the opening, an oxide layer 110 is formed on the surface of the substrate 100 exposed by the opening. Before the substrate 100 is subjected to a heat treatment in a reducing gas environment, the following steps are further performed:

[0089] Step S1202: etching the oxide layer based on the opening.

[0090] Reference Figure 3 , a dry process or a wet process can be used to etch the residue 410, remove part of the residue 410 in the opening 310, and reduce the total amount of residue 410 that needs to be removed during the heat treatment process in step S130, which is beneficial to improve the efficiency of removing the residue 410 by heat treatment, reduce the heat treatment time, and save production costs.

[0091] According to an exemplary embodiment, after the substrate is heat-treated in a reducing gas environment, the following steps are further performed:

[0092] Step S140 : forming an epitaxial layer on the surface of the substrate exposed by the opening using a selective epitaxial process.

[0093] Reference Figure 6 、 Figure 7 Using the substrate 100 exposed by the opening 310 as a seed crystal, a gas source for forming the epitaxial layer 500 is introduced into the opening 310. A chemical vapor deposition process is used to epitaxially grow the epitaxial layer 500 on the surface of the substrate 100. The epitaxial layer 500 partially fills the opening 310, and the top surface of the epitaxial layer 500 is higher than the bottom surface of the stacked structure 200. After heat treatment, no residue 410 is left on the substrate 100, and the surface exposed by the opening 310 is a uniform silicon crystal material. Therefore, the epitaxial layer 500 formed in this embodiment has a uniform structure and no internal voids.

[0094] The epitaxial layer 500 may be made of silicon, germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium. In this embodiment, the epitaxial layer 500 is made of silicon. The epitaxial layer 500 may be doped with conductive ions, either P-type or N-type. The types of conductive ions doped in the epitaxial layer 500 and the substrate 100 may be the same or different.

[0095] Step S150: forming a channel structure in the opening, wherein the channel structure covers the epitaxial layer and is in contact with the epitaxial layer.

[0096] Reference Figure 7 、 Figure 8 , from the sidewall of the opening 310 to the center of the opening 310, the channel structure 600 includes a blocking layer 601, a charge storage layer 602, a tunneling layer 603, a semiconductor layer 604 and a dielectric layer 605 arranged in sequence, the blocking layer 601, the charge storage layer 602, and the tunneling layer 603 sequentially cover the sidewall of the opening 310, the semiconductor layer 604 covers the tunneling layer 603, and the dielectric layer 605 covers the semiconductor layer 604 and fills the unfilled portion of the opening 310.

[0097] The method for manufacturing the semiconductor structure of this embodiment promotes the forward reaction between the residue and hydrogen by intermittently extracting the reaction products during the heat treatment of the substrate, thereby removing all the residues remaining in the opening, so that the formed epitaxial layer has no structural defects, reducing the resistance of the epitaxial layer, and at the same time, the side walls of the opening of the channel structure have good bonding force, thereby increasing the channel current of the channel structure, thereby improving the ability of the semiconductor structure to sense signals, and improving the sensitivity and response speed of the semiconductor structure.

[0098] According to an exemplary embodiment, this embodiment provides a semiconductor structure manufacturing device, such as Figure 9 As shown, the manufacturing apparatus includes a reaction chamber 1, a gas pipeline 2 and a heater 3. The gas pipeline 2 is used to supply reducing gas to the reaction chamber 1 to form a reducing gas environment in the reaction chamber 1. The heater 3 is arranged in the reaction chamber 1 to carry at least one substrate 100 (refer to Figure 3 ), a stacked structure 200 is provided on the substrate 100 (refer to Figure 3 ), at least one opening 310 is provided on the substrate 100 (refer to Figure 3 ), the opening 310 penetrates the stacked structure 200 and extends into the substrate 100, and the heater 3 is used to perform a heat treatment on the substrate 100 in a reducing gas environment to remove the residue 410 in the opening 310 (refer to Figure 3 ), during the heat treatment process, the product generated by the reaction of the residue 410 and the reducing gas is extracted from the opening 310.

[0099] In some embodiments, as Figure 9 As shown, the gas pipeline 2 includes an inlet pipe 4 and a gas extractor 5. The inlet pipe 4 is used to introduce hydrogen into the reaction chamber 1 to form a reducing gas environment in the reaction chamber 1. The gas extractor 5 is used to extract gaseous products generated by the reaction between the residue 410 and the hydrogen in the reaction chamber 1 to promote the reaction between the residue 410 and the hydrogen.

[0100] In some embodiments, as Figure 9 As shown, the heater 3 is arranged in the reaction chamber 1 along a preset direction, at least one substrate 100 is arranged in the heater 3, and the opening 310 on the substrate 100 is arranged toward the preset direction. For example, the heater 3 can be a heating furnace tube.

[0101] like Figure 9 As shown, an air inlet pipe 4 is arranged parallel to the heater 3 on one side of the heater 3 and includes a plurality of air inlet holes 41 arranged along a predetermined direction. A gas extractor 5 is arranged on the other side of the heater 3 relative to the air inlet pipe 4. It is understood that the gas extractor 5 can be arranged outside the reaction chamber 1, and the gas extractor 5 communicates with the reaction chamber 1 and can extract the gas in the reaction chamber 1. For example, the gas extractor 5 can be an air pump.

[0102] In some embodiments, as Figure 9 As shown, the manufacturing apparatus further includes a controller 6, which is used to control the pressure in the reaction chamber 1 to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure. For example, the first pressure is 0 torr to 0.1 torr, and the second pressure is 10 torr to 15 torr.

[0103] When the pressure in the reaction chamber 1 is a first pressure, the controller 6 controls the gas extractor 5 to open and extract the gaseous product from the opening 310 ; when the pressure in the reaction chamber 1 is a second pressure, the controller 6 controls the gas extractor 5 to close.

[0104] like Figure 9 As shown, in this embodiment, the controller 6 and the gas extractor 5 are connected through a switch 8. The controller 6 controls the gas extraction state of the gas extractor 5 by opening or closing the switch 8, so that during the process of the heater 3 performing heat treatment on the substrate 100, the gas extractor 5 is intermittently opened to react the residue 410 in the reaction chamber 1 with hydrogen to generate gaseous products.

[0105] In some embodiments, as Figure 9 As shown, the inlet pipe 4 is also used to control the flow rate of hydrogen gas introduced into the reaction chamber 1 through the inlet pipe 4, varying between a first flow rate and a second flow rate. A flow valve 42 for adjusting the flow of hydrogen is provided on the inlet pipe 4. The controller 6 is connected to the flow valve 42 on the inlet pipe 4 to adjust the flow rate of hydrogen gas introduced into the reaction chamber 1 through the inlet pipe 4. In this embodiment, the first flow rate is less than the second flow rate. For example, the first flow rate is between 0.1 L / min and 1 L / min, and the second flow rate is between 9 L / min and 10 L / min.

[0106] In some examples, when the pressure in the reaction chamber 1 is a first pressure, the controller 6 controls the gas inlet pipe 4 to introduce hydrogen into the reaction chamber 1 at a first flow rate, and simultaneously controls the gas extractor 5 to open to extract the gaseous product from the opening 310 .

[0107] When the pressure in the reaction chamber 1 is the second pressure, the controller 6 controls the gas inlet pipe 4 to introduce hydrogen into the reaction chamber 1 at a second flow rate, and at the same time controls the gas extractor 5 to be closed, so that the hydrogen flows to the bottom of the opening 310 under the action of the second pressure.

[0108] In some embodiments, as Figure 9 As shown, in some embodiments, as Figure 9 As shown, the controller 6 controls the heater 3 to heat the substrate 100 at a heating temperature of 800-1000° C. In some examples, the controller 6 controls the heater 3 to heat the substrate 100 at a heating temperature of 900-1000° C. In some examples, the controller 6 controls the heater 3 to heat the substrate 100 at a heating temperature of 950-1000° C.

[0109] The various embodiments or implementation methods in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referenced to each other.

[0110] In the description of this specification, reference to the terms "embodiment", "exemplary embodiment", "some embodiments", "illustrative embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure.

[0111] In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable manner in any one or more embodiments or examples.

[0112] In the description of the present disclosure, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present disclosure.

[0113] It is to be understood that the terms "first", "second", etc. used in the present disclosure can be used to describe various structures in the present disclosure, but these structures are not limited by these terms. These terms are only used to distinguish a first structure from another structure.

[0114] In one or more of the accompanying drawings, identical elements are represented by similar reference numerals. For clarity, many parts in the accompanying drawings are not drawn to scale. In addition, certain well-known parts may not be shown. For simplicity, a structure obtained after several steps may be described in a single figure. Many specific details of the present disclosure, such as device structure, materials, dimensions, processing techniques, and technologies, are described below to facilitate a clearer understanding of the present disclosure. However, as will be appreciated by those skilled in the art, the present disclosure may be practiced without following these specific details.

[0115] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that: The method for manufacturing the semiconductor structure comprises: providing a substrate, on which a laminated structure is disposed; forming at least one opening, the opening penetrating the stacked structure and extending into the substrate, the opening exposing a portion of the substrate; performing a heat treatment on the substrate in a reducing gas environment to remove residues in the openings, and during the heat treatment, extracting products generated by a reaction between the residues and the reducing gas from the openings; The step of heat-treating the substrate in a reducing gas environment comprises: introducing hydrogen into the opening, and heat-treating the substrate at a temperature of 800° C. to 1000° C., so that the residue reacts with the hydrogen to generate a gaseous product; Controlling the pressure of the heat treatment process to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure; At the first pressure, the gaseous product is withdrawn from the opening.

2. The method for manufacturing a semiconductor structure according to claim 1, wherein: During the heat treatment of the substrate, the flow rate of the hydrogen gas is changed between a first flow rate and a second flow rate.

3. The method for manufacturing a semiconductor structure according to claim 1 or 2, wherein: Before heat-treating the substrate in a reducing gas environment, the manufacturing method further includes: The residue is pretreated.

4. A semiconductor structure manufacturing device, characterized in that: The production device comprises: reaction chamber; a gas pipeline, for supplying reducing gas into the reaction chamber to form a reducing gas environment in the reaction chamber; a heater disposed in the reaction chamber and configured to support at least one substrate, wherein a laminated structure is disposed on the substrate and at least one opening is disposed on the substrate, wherein the opening penetrates the laminated structure and extends into the substrate, wherein the heater is configured to heat-treat the substrate in the reducing gas environment to remove residue in the opening, and during the heat-treating process, extract a product generated by a reaction between the residue and the reducing gas from the opening; The step of heat-treating the substrate in the reducing gas environment comprises: introducing hydrogen into the opening, and heat-treating the substrate at a temperature of 800° C. to 1000° C., so that the residue reacts with the hydrogen to generate a gaseous product; Controlling the pressure of the heat treatment process to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure; At the first pressure, the gaseous product is withdrawn from the opening.

5. The semiconductor structure manufacturing device according to claim 4, characterized in that: The gas pipeline comprises: an air inlet pipe, used for introducing hydrogen into the reaction chamber; A gas extractor is used to extract gaseous products generated by the reaction between the residue and the hydrogen.

6. The semiconductor structure manufacturing device according to claim 5, characterized in that: The heater is arranged in the reaction chamber along a preset direction; The air inlet pipe is arranged on one side of the heater in parallel with the heater, the air inlet pipe includes a plurality of air inlet holes arranged along the preset direction, and the gas extractor is arranged on the other side of the heater relative to the air inlet pipe.

7. The semiconductor structure manufacturing device according to claim 6, characterized in that: The production device also includes: a controller, configured to control the pressure in the reaction chamber to vary between a first pressure and a second pressure, wherein the first pressure is less than the second pressure; When the pressure in the reaction chamber is the first pressure, the controller controls the gas extractor to open and extract the gaseous product from the opening; When the pressure in the reaction chamber is the second pressure, the controller controls the gas extractor to be closed.

8. The semiconductor structure manufacturing device according to claim 7, characterized in that: The controller is further configured to control the flow rate of the hydrogen gas introduced into the intake pipe to vary between a first flow rate and a second flow rate.

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