A Dual-Mode Cross-Coupled Charge Pump DC-DC Converter

Abstract

The present invention provides a dual-mode cross-coupled charge pump DC-DC converter. The converter comprises a cross-coupled charge pump, a mode selector, a voltage limiter, an oscillator and a level shifter which are electrically connected in sequence; the voltage limiter is used to generate an enable signal for controlling the start and shut down of the oscillator; the oscillator is used to generate a clock signal required for the operation of the cross-coupled charge pump; the level shifter is used to pull the clock signal to a low voltage terminal V L The same level is used to drive the cross-coupled charge pump to work; when the selection signal SL of the mode selector is at a high level, the cross-coupled charge pump works in a boost mode; when the selection signal SL is at a low level, the cross-coupled charge pump works in a buck mode. The present invention realizes the switching of two functions in one circuit, which can reduce the difficulty and time of circuit design compared to the traditional charge pump which needs to perform boost or buck design on the circuit separately.

Description

Technical Field

[0001] The present invention relates to the technical field of charge pumps, in particular to a dual-mode cross-coupled charge pump DC-DC converter. Background Art

[0002] DC-DC converters can be categorized based on the method used to transfer charge and convert voltage. If an inductor is used as the energy storage element, it is called an inductive converter. If only capacitors are used to store and transfer charge, it falls into the category of switched capacitor converters. A charge pump is a common type of switched capacitor converter because it consists of only capacitors and switches. A charge pump transfers charge through a capacitor to increase or decrease the voltage. Since external inductors are generally more expensive, larger, and bulkier than capacitors, charge pumps are a good choice when power, area, and cost are limited.

[0003] Figure 1 The Dickson charge pump shown is one of the most common charge pumps. The Dickson charge pump is an n-stage architecture consisting of switches and capacitors, where each stage consists of a MOSFET and a capacitor. The working principle of this topology is based on the charging and discharging capabilities of capacitors. In each clock cycle, the capacitor of each stage alternately increases and transmits its voltage to the next stage through a transistor. In the Dickson CP architecture, the number of stages determines the final output voltage. The main disadvantage of the Dickson topology is that the threshold voltage drop is too high, resulting in reduced power efficiency, which is particularly critical in low supply voltage circuits.

[0004] In order to improve power efficiency, a cross-coupled charge pump (CP) was proposed, and its topology is as follows: Figure 2 As shown in FIG. 1 , the architecture is a voltage doubler, and each stage is composed of two NMOS, two PMOS and two capacitors. However, both the cross-coupled charge pump and the Dickson charge pump can only achieve one of the functions of boost or buck in the same circuit design. If you want to achieve the mode conversion of boost or buck, you need a separate boost CP circuit and a separate buck CP circuit. The purpose of mode conversion is achieved by switching the circuit, which is costly and complex. Summary of the invention

[0005] Based on this, it is necessary to provide a dual-mode cross-coupled charge pump DC-DC converter to address the problems of high cost and complex circuits in the existing charge pump to set up additional circuits to achieve buck-boost switching through switching.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] A dual-mode cross-coupled charge pump DC-DC converter, comprising a cross-coupled charge pump, a mode selector, a voltage limiter, an oscillator and a level shifter electrically connected in sequence; the voltage limiter is used to generate an enable signal for controlling the start and shut down of the oscillator; the oscillator is used to generate a clock signal required for the operation of the cross-coupled charge pump; the level shifter is used to pull the clock signal to a low voltage terminal V L The same level is used to drive the cross-coupled charge pump to work;

[0008] The mode selector consists of two groups of selection units with the same structure. The connection ends of the two selection units are connected to the high voltage end V of the cross-coupled charge pump one by one. H and low voltage terminal V L One of the selection units is composed of two NMOS tubes N10, N20 and two PMOS tubes P10, P20, and the source of N10, N20, P10, P20 is used as the connection end of the selection unit and the high voltage end V of the cross-coupled charge pump H The drains of N10 and P10 are connected to form the selection terminal V of the selection unit. W1 , the drains of N20 and P20 are connected to form the selection terminal V of the selection unit W2 , N10 and P20 are controlled by the selection signal SL; another selection unit forms a selection terminal V based on the same connection method W3 and V W4 , and the connection end of the selection unit is connected to the low voltage end V of the cross-coupled charge pump L Connected; V W1 and V W4 The voltage output terminal of the dual-mode cross-coupled charge pump DC-DC converter is connected to form W2 and V W3 connected to form a voltage input terminal of a dual-mode cross-coupled charge pump DC-DC converter;

[0009] When the selection signal SL is at a high level, V W1 and V W3 When the select signal SL is low, V W2 and V W4 When turned on, the cross-coupled charge pump operates in buck mode.

[0010] Furthermore, the cross-coupled charge pump includes two NMOS transistors N1 and N2, two PMOS transistors P1 and P2, and two capacitors C1 and C2; wherein P1 and N1 form an inverter structure, P2 and N2 form another inverter structure, and the sources of P1 and P2 are connected to form a high voltage terminal V of the cross-coupled charge pump. H , the sources of N1 and N2 are connected to form the low voltage terminal V of the cross-coupled charge pump LThe drain of P1, the drain of N1, the gate of P2, the gate of N2 are connected and connected to one end of C1, and the other end of C1 is connected to the output end V CLK The drain of P2, the drain of N2, the gate of P1, the gate of N1 are connected and connected to one end of C2, and the other end of C2 is connected to the output end of the level shifter. connected;

[0011] Load capacitance C L and resistor R L One end of the circuit is grounded, and the other end is connected to the voltage output end of the dual-mode cross-coupled charge pump DC-DC converter.

[0012] Furthermore, when the cross-coupled charge pump operates in boost mode, the low voltage terminal V L As the voltage input terminal, the high voltage terminal V H As voltage output terminal;

[0013] The first stage complementary clock signal CLK and They are low level and high level respectively, N1 and P2 are turned on, N2 and P1 are turned off, and C1 is charged to V IN , which has been charged to V IN C2 continues to charge, and the load capacitor C L The voltage rises to 2V IN ;

[0014] In the second stage, CLK is high level, is low level, N2 and P1 are turned on, N1 and P2 are turned off, and C2 is charged to V IN , C1 connects C through P1 L Charge to 2V IN ;

[0015] The output voltage of the cross-coupled charge pump working in boost mode is:

[0016] V OUT =V IN +V C =2V IN .

[0017] Among them, V C Indicates the voltage of C1 or C2.

[0018] Furthermore, the number of cross-coupled charge pumps is n and they are connected in series to form an n-stage cross-coupled charge pump. The output voltage of the n-stage cross-coupled charge pump working in the boost mode is:

[0019] V OUT =V IN +nV C =(n+1)V IN .

[0020] Furthermore, when the cross-coupled charge pump operates in buck mode, the low voltage terminal V L As the voltage output terminal, the high voltage terminal V H As voltage input terminal;

[0021] The first stage complementary clock signal CLK and High level and low level respectively, N2 and P1 are turned on, N1 and P2 are turned off, and C1 is charged to V IN -V OUT , C2 discharges and C L Charge to V IN / 2;

[0022] In the second stage, CLK is low level, High level, N1 and P2 are turned on, N2 and P1 are turned off, and C2 is charged to V IN -V OUT , C1 discharges and C L Charge to V IN / 2;

[0023] The output voltage of the cross-coupled charge pump operating in buck mode is:

[0024]

[0025] Furthermore, the number of cross-coupled charge pumps is n and they are connected in series to form an n-stage cross-coupled charge pump. The output voltage of the n-stage cross-coupled charge pump working in the buck mode is:

[0026]

[0027] The present invention also relates to a dual-mode cross-coupled charge pump DC-DC converter chip, which is encapsulated by the circuit structure of the aforementioned dual-mode cross-coupled charge pump DC-DC converter. The interface of the dual-mode cross-coupled charge pump DC-DC converter chip at least includes a power supply interface V DD , ground interface V SS , mode selection interface SL, voltage input interface V IN , voltage output interface V OUT .

[0028] Power interface V DD Used to connect power supply; ground interface V SS Used for grounding; the mode selection interface SL is used to input a mode selection signal to the circuit, and the mode selection signal is used to adjust the switching of the circuit boost and buck to adjust the different working modes of the circuit; the voltage input interface V IN Used to input voltage to the circuit; voltage output interface V OUT Used to output the actual voltage of the circuit.

[0029] The present invention also relates to a dual-mode cross-coupled charge pump AC-DC converter, comprising a cross-coupled charge pump, a mode selector, an AC / DC rectifier, an oscillator and a level shifter electrically connected in sequence; the oscillator is used to generate a clock signal required for the operation of the cross-coupled charge pump; the level shifter is used to pull the clock signal to a low voltage terminal V L The same level is used to drive the cross-coupled charge pump to work;

[0030] When the selection signal SL of the mode selector is high, the cross-coupled charge pump is always in boost mode, and the AC / DC rectifier receives the small AC signal V E AC-DC conversion is also performed, and the cross-coupled charge pump outputs DC according to a certain functional relationship based on the AC input to achieve signal amplification.

[0031] Compared with the prior art, the beneficial effects of the present invention include:

[0032] 1. The present invention realizes the switching of two functions in one circuit, which can reduce the difficulty and time of circuit design compared with the traditional charge pump which needs to design the circuit for boosting or bucking separately;

[0033] 2. The circuit design of the present invention uses no inductor and is integrated using CMOS technology, which reduces the overall circuit footprint and manufacturing cost;

[0034] 3. The present invention adopts modular design, and the modules can be modified according to the functions required by the external circuit environment, thereby improving the design freedom and adaptability to complex functions. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The disclosure of the present invention is described with reference to the accompanying drawings. It should be understood that the drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present invention. Among them:

[0036] Figure 1 A circuit diagram of a Dickson charge pump is introduced as background technology;

[0037] Figure 2 is a circuit diagram of a cross-coupled charge pump;

[0038] Figure 3 A circuit diagram of a dual-mode cross-coupled charge pump DC-DC converter introduced in Example 1;

[0039] Figure 4 Based on Figure 3 Circuit diagram of the oscillator;

[0040] Figure 5 Based on Figure 3 Circuit diagram of voltage limiter;

[0041] Figure 6 Based on Figure 3 Circuit diagram of a level shifter;

[0042] Figure 7 Based on Figure 3 Circuit diagram of mode selector;

[0043] Figure 8 Based on Figure 3 Schematic diagram of boost mode;

[0044] Fig. 9 Based on Figure 3 Schematic diagram of the buck mode;

[0045] Fig.10 Based on Figure 3 A converter circuit diagram for a wide range of fluctuations or unknown input voltage;

[0046] Fig.11 Based on Figure 3 The circuit diagram of the converter using only boost;

[0047] Fig.12 Based on Figure 3 The circuit diagram of the converter using only the buck function;

[0048] Fig.13 A circuit diagram of a dual-mode cross-coupled charge pump AC-DC converter introduced in Example 2;

[0049] Fig.14 This is a schematic diagram of a dual-mode cross-coupled charge pump DC-DC converter chip introduced in Example 3. DETAILED DESCRIPTION

[0050] It is easy to understand that according to the technical solution of the present invention, without changing the essential spirit of the present invention, a person skilled in the art can propose a variety of interchangeable structural modes and implementation modes. Therefore, the following specific implementation modes and drawings are only exemplary descriptions of the technical solution of the present invention, and should not be regarded as the whole of the present invention or as a limitation or restriction to the technical solution of the present invention.

[0051] Example 1

[0052] See also Figure 3 , this embodiment introduces a dual-mode cross-coupled charge pump DC-DC converter, which includes a cross-coupled charge pump, a mode selector, a voltage limiter, an oscillator and a level shifter electrically connected in sequence.

[0053] like Figure 2As shown in FIG. 1 , a circuit schematic diagram of a cross-coupled charge pump (abbreviated as CP) is shown, which includes two NMOS tubes N1 and N2, two PMOS tubes P1 and P2, and two capacitors C1 and C2; wherein P1 and N1 form an inverter structure, P2 and N2 form another inverter structure, and the sources of P1 and P2 are connected to form a high voltage terminal V of the cross-coupled charge pump. H , the sources of N1 and N2 are connected to form the low voltage terminal V of the cross-coupled charge pump L The drain of P1, the drain of N1, the gate of P2, the gate of N2 are connected and connected to one end of C1, and the other end of C1 is connected to the output end V CLK The drain of P2, the drain of N2, the gate of P1, the gate of N1 are connected and connected to one end of C2, and the other end of C2 is connected to the output end of the level shifter. Connected; load capacitance C L and resistor R L One end of the circuit is grounded, and the other end is connected to the voltage output end of the dual-mode cross-coupled charge pump DC-DC converter.

[0054] The capacitance value of CP can be calculated based on the expected output current and the clock signal frequency provided by the oscillator. The reference formula is:

[0055]

[0056] Where C represents the capacitance of CP, the clock signal frequency provided by the dV / dt oscillator, and I out Indicates the expected output current.

[0057] Theoretically, the maximum and minimum voltages that CP can output are limited only by the withstand voltage of MOSFET. In practical applications, this voltage range is usually around 0.5V to 30V.

[0058] In addition to the CP input voltage (V IN ) and output voltage (V OUT ), a power supply voltage (V DD ) is used to power the oscillator. This voltage is provided externally to the CP and is usually available from the entire system that includes the converter.

[0059] like Figure 4 As shown, it is a circuit schematic diagram of an oscillator, which is used to generate the clock signal necessary for the CP operation. In this embodiment, a ring oscillator design is adopted, which is composed of a certain number of delay units in a closed loop. The clock frequency of the oscillator is determined by the number of inverters in the delay unit. The ring oscillator is also provided with an enable terminal (AND gate). When the enable signal EN is at a high level, the oscillator is turned on; when EN is at a low level, the oscillator is turned off.

[0060] like Figure 5 As shown in the figure, it is the circuit schematic diagram of the voltage limiter, including a comparator U1 and four resistors R11~R14; the power supply terminal of U1 is connected to the power supply voltage V DD , the ground end is grounded, the non-inverting input end is connected to one end of R11 and R12, the other end of R12 is grounded, the inverting input end of U1 is connected to one end of R13 and R14, the other end of R14 is grounded, the other end of R13 is connected to the voltage output end of the cross-coupled charge pump, and the output end of U1 outputs an enable signal EN.

[0061] The voltage limiter is used to generate an enable signal for the oscillator to control the start and stop of the oscillator, and can play a role in adjusting the output voltage and controlling the ripple. In this embodiment, it is composed of a comparator, which converts the actual output voltage (V OUT ) and the desired voltage (V REF ) for comparison (actually, the voltage of the comparator input pin is compared after resistor voltage division). OUT <V REF When the oscillator is turned on, CP starts to work, charging the load and increasing V OUT ; When V OUT >V REF When the oscillator is turned off, CP stops working, and the load discharges V OUT reduce.

[0062] It should be noted that when there is no voltage limiter, although CP can work, it will lose the regulation function of a specific voltage and CP will work in the maximum boost or buck state. At the same time, the output voltage V OUT The ripple will also become larger.

[0063] like Figure 6 As shown in FIG. 1 , the circuit schematic diagram of the level shifter is shown. The level shifter at least includes an NMOS tube N50, resistors R5-R6, and an inverter U2. The source of N50 is connected to one end of R5 and serves as the input end of the level shifter. The gate of N50 and the other end of R5 are connected to the power supply voltage V DD , the drain of N50, the input of U2 and one end of R6 are connected together and serve as the output terminal V CLK , the power supply end of U2 and the other end of R6 are connected to V L , the output terminal of U2 is used as the output terminal

[0064] The level shifter is used to pull the clock signal to the same level as V L The same voltage level is used to drive the CP to work. It should be noted that when there is no level shifter, the CP can work, but the maximum step-up and step-down range of the CP will be smaller.

[0065] like Figure 7 As shown, Figure 7(a) is the circuit diagram of the mode selector. Figure 7 (b) is the circuit diagram of the selection unit.

[0066] The mode selector consists of two groups of selection units with the same structure. The connection ends of the two selection units are connected to the high voltage end V of the cross-coupled charge pump one by one. H and low voltage terminal V L One of the selection units is composed of two NMOS tubes N10, N20 and two PMOS tubes P10, P20, and the source of N10, N20, P10, P20 is used as the connection end of the selection unit and the high voltage end V of the cross-coupled charge pump H The drains of N10 and P10 are connected to form the selection terminal V of the selection unit. W1 , the drains of N20 and P20 are connected to form the selection terminal V of the selection unit W2 , N10 and P20 are controlled by the selection signal SL; another selection unit forms a selection terminal V based on the same connection method W3 and V W4 , and the connection end of the selection unit is connected to the low voltage end V of the cross-coupled charge pump L Connected; V W1 and V W4 The voltage output terminal of the dual-mode cross-coupled charge pump DC-DC converter is connected to form W2 and V W3 The two are connected to form the voltage input terminal of a dual-mode cross-coupled charge pump DC-DC converter.

[0067] When the selection signal SL is high, CP works in boost mode; when SL is low, CP works in buck mode. W1 and V W3 Turn on, at this time the high voltage end (V H ) is the output (V OUT ), low voltage terminal (V L ) is the input (V IN ), CP works in boost mode; conversely, when SL is low, V W2 and V W4 When turned on, the high voltage end is input, the low voltage end is output, and CP works in buck mode.

[0068] The working principle of boost mode is as follows:

[0069] like Figure 8 As shown, Figure 8 (a) is the CP conduction condition in the first stage. Figure 8 (b) is the conduction condition of CP in the second stage. When working in boost mode, the V L The input terminal is V HAssume that the first half cycle of the clock signal is phase 1, the complementary clock signals CLK and The transistor N1 is turned on, P1 is turned off, and the capacitor C1 is charged to V IN At the same time, it has been charged to V IN C2 continues to charge, and the output load capacitance (C L ) The voltage rises to 2V through the turned-on P2 IN During Phase 2 (the second half cycle), CLK is high. is low, N2 is turned on, P2 is turned off, and capacitor C2 is charged to V IN At the same time, C1 transfers the load capacitance C through P1. L Charge to 2V IN The output voltage in boost mode is:

[0070] V OUT =V IN +V C =2V IN

[0071] Similarly, the output voltage of the boost mode with n-stage CP series is:

[0072] V OUT =V IN +nV C =(n+1)V IN

[0073] Among them, V C Indicates the voltage of C1 or C2.

[0074] The buck mode works as follows:

[0075] like Fig. 9 As shown, Fig. 9 (a) is the CP conduction condition in the first stage. Fig. 9 (b) is the conduction condition of CP in the second stage. When working in buck mode, the V L The output terminal is V H The terminal is the input. In phase 1, CLK is high, Low, transistor P1 is turned on, N1 is turned off, and C1 is charged to V IN -V OUT At the same time, N2 is turned on, P2 is turned off, and C2 discharges to L Charge to maximum V IN / 2; in phase 2, CLK is low and High, P2, N1 are turned on. C2 is charged to V IN -V OUT At the same time, C1 discharges to V IN / 2. The output voltage in buck mode is:

[0076]

[0077] Similarly, the output voltage of the buck mode with n-stage CP series is:

[0078]

[0079] In addition, modules such as oscillators, level shifters, and voltage limiters can be adjusted according to functions and environments. This embodiment only provides a specific implementation method, and is not limited to the circuit structure mentioned in this embodiment in actual use. This embodiment is mainly used for voltage regulation of DC signals. Connecting n levels of CP in series can expand the range of boost and buck, so the n value can be designed based on different voltage range requirements. At the same time, the integrated circuit can be modified according to the requirements of external functions.

[0080] like Fig.10 As shown, a converter circuit diagram for a wide range of fluctuations or unknown input voltage is shown, the input end of the mode selector is connected to the inverting input end of the regulator, and the output end of the regulator is connected to the selection signal SL of the mode selector. REF When the input is lower than the expected value, the voltage is boosted, and when the input is higher than the expected value, the voltage is bucked, thereby adjusting the voltage to the expected value.

[0081] Fig.11 and Fig.12 The converter circuit diagrams when only the boost and buck functions are used are shown respectively, which are mainly applicable to the case where the approximate range of the input voltage is known. When the SL of the mode selector is set to a high level, the CP continuously operates in the boost mode, and when the SL is set to a low level, the CP continuously operates in the buck mode.

[0082] This embodiment realizes the switching of two functions in one circuit. Compared with the traditional charge pump which needs to design the circuit for boosting or bucking separately, it can reduce the difficulty and time of circuit design. The circuit design uses no inductor and is integrated using CMOS technology, which reduces the overall circuit footprint and manufacturing cost. The modular design allows the module to be modified according to the functions required by the external circuit environment, which improves the design freedom and adaptability to complex functions.

[0083] Example 2

[0084] like Fig.13As shown, this embodiment introduces a dual-mode cross-coupled charge pump AC-DC converter, which is basically the same as the dual-mode cross-coupled charge pump DC-DC converter introduced in Example 1. The difference is that this embodiment does not use a voltage limiter and an enable end of the oscillator, and an AC / DC rectifier is added, which is connected to the input end of the oscillator and the V IN The SL of the mode selector is connected to V DD , so that the circuit always works in boost mode, the sensor receives the change from the external environment and generates a small AC signal V E The AC / DC rectifier completes the AC-DC conversion, and then amplifies the small DC signal output by the AC / DC rectifier. According to the specific design of each module, it can be calculated that CP produces a DC output with a certain functional relationship according to different AC inputs, thereby completing the function of sensor signal amplification and achieving the purpose of detecting external changes.

[0085] Example 3

[0086] like Fig.14 As shown, this embodiment introduces a dual-mode cross-coupled charge pump DC-DC converter chip, which is encapsulated using the circuit structure of the aforementioned dual-mode cross-coupled charge pump DC-DC converter. The interface of the dual-mode cross-coupled charge pump DC-DC converter chip at least includes a power supply interface V DD , ground interface V SS , mode selection interface SL, voltage input interface V IN , voltage output interface V OUT .

[0087] Power interface V DD Used to connect power supply; ground interface V SS Used for grounding; the mode selection interface SL is used to input a mode selection signal to the circuit, and the mode selection signal is used to adjust the switching of the circuit boost and buck to adjust the different working modes of the circuit; the voltage input interface V IN Used to input voltage to the circuit; voltage output interface V OUT Used to output the actual voltage of the circuit.

[0088] Designing the conversion circuit into a chip mode facilitates its promotion in the market and rapid use by those skilled in the art.

[0089] The technical scope of the present invention is not limited to the contents in the above description. Those skilled in the art can make various deformations and modifications to the above embodiments without departing from the technical idea of ​​the present invention, and these deformations and modifications should all fall within the protection scope of the present invention.

Claims

1. A dual-mode cross-coupled charge pump DC-DC converter, characterized in that: It includes a cross-coupled charge pump, a mode selector, a voltage limiter, an oscillator and a level shifter which are electrically connected in sequence; the voltage limiter is used to generate an enable signal for controlling the start and shut down of the oscillator; the oscillator is used to generate a clock signal required for the operation of the cross-coupled charge pump; the level shifter is used to pull the clock signal to a low voltage terminal V L The same level is used to drive the cross-coupled charge pump to work; The mode selector is composed of two groups of selection units with the same structure, and the connection ends of the two selection units are connected to the high voltage end V of the cross-coupled charge pump in a one-to-one correspondence. H and low voltage terminal V L One of the selection units is composed of two NMOS tubes N10, N20 and two PMOS tubes P10, P20, and the source of N10, N20, P10, P20 is used as the connection end of the selection unit and the high voltage end V of the cross-coupled charge pump H The drains of N10 and P10 are connected to form the selection terminal V of the selection unit. W1 , the drains of N20 and P20 are connected to form the selection terminal V of the selection unit W2 , N10 and P20 are controlled by the selection signal SL; another selection unit forms a selection terminal V based on the same connection method W3 and V W4 , and the connection end of the selection unit is connected to the low voltage end V of the cross-coupled charge pump L Connected; V W1 and V W4 The voltage output terminal of the dual-mode cross-coupled charge pump DC-DC converter is connected to form W2 and V W3 connected to form a voltage input terminal of a dual-mode cross-coupled charge pump DC-DC converter; When the selection signal SL is at a high level, V W1 and V W3 When the select signal SL is at a low level, V W2 and V W4 When turned on, the cross-coupled charge pump operates in a buck mode; The cross-coupled charge pump includes two NMOS transistors N1 and N2, two PMOS transistors P1 and P2, and two capacitors C1 and C2; Wherein, P1 and N1 form an inverter structure, P2 and N2 form another inverter structure, and the sources of P1 and P2 are connected to form the high voltage terminal V of the cross-coupled charge pump. H , the sources of N1 and N2 are connected to form the low voltage terminal V of the cross-coupled charge pump L The drain of P1, the drain of N1, the gate of P2, the gate of N2 are connected and connected to one end of C1, and the other end of C1 is connected to the output end V CLK The drain of P2, the drain of N2, the gate of P1, the gate of N1 are connected and connected to one end of C2, and the other end of C2 is connected to the output end of the level shifter. connected; Load capacitance C L and resistor R L One end is grounded, and the other end is commonly connected to the voltage output end of the dual-mode cross-coupled charge pump DC-DC converter; When the cross-coupled charge pump operates in boost mode, the low voltage terminal V L As the voltage input terminal, the high voltage terminal V H As voltage output terminal; The first stage complementary clock signal CLK and They are low level and high level respectively, N1 and P2 are turned on, N2 and P1 are turned off, and C1 is charged to V IN , which has been charged to V IN C2 continues to charge, and the load capacitor C L The voltage rises to 2V IN ; In the second stage, CLK is high level, is low level, N2 and P1 are turned on, N1 and P2 are turned off, and C2 is charged to V IN , C1 connects C through P1 L Charge to 2V IN ; The output voltage of the cross-coupled charge pump working in boost mode is: V OUT =V IN +V C =2V IN ; Among them, V C Indicates the voltage of C1 or C2.

2. The dual-mode cross-coupled charge pump DC-DC converter according to claim 1, characterized in that: The number of the cross-coupled charge pumps is n and they are connected in series to form an n-stage cross-coupled charge pump. The output voltage of the n-stage cross-coupled charge pump working in the boost mode is: In OUT =V IN +nV C =(n+1)V IN 。 3. The dual-mode cross-coupled charge pump DC-DC converter according to claim 1, characterized in that: When the cross-coupled charge pump operates in buck mode, the low voltage terminal V L As the voltage output terminal, the high voltage terminal V H As voltage input terminal; The first stage complementary clock signal CLK and High level and low level respectively, N2 and P1 are turned on, N1 and P2 are turned off, and C1 is charged to V IN -V OUT , C2 discharges and C L Charge to V IN / 2; In the second stage, CLK is low level, High level, N1 and P2 are turned on, N2 and P1 are turned off, and C2 is charged to V IN -V OUT , C1 discharges and C L Charge to V IN / 2; The output voltage of the cross-coupled charge pump operating in buck mode is:

4. The dual-mode cross-coupled charge pump DC-DC converter according to claim 3, characterized in that: The number of the cross-coupled charge pumps is n and they are connected in series to form an n-stage cross-coupled charge pump. The output voltage of the n-stage cross-coupled charge pump working in the buck mode is:

5. The dual-mode cross-coupled charge pump DC-DC converter according to claim 1, characterized in that: The oscillator adopts a ring oscillator, the input end of the ring oscillator is connected to the output end of the voltage limiter, and the output end of the ring oscillator outputs a clock signal V OSC .

6. The dual-mode cross-coupled charge pump DC-DC converter according to claim 1, characterized in that: The level shifter at least includes an NMOS tube N50, resistors R5-R6, and an inverter U2; The source of N50 is connected to one end of R5 and serves as the input end of the level shifter, and the gate of N50 and the other end of R5 are connected to the power supply voltage V DD , the drain of N50, the input of U2 and one end of R6 are connected together and serve as the output terminal V CLK , the power supply end of U2 and the other end of R6 are connected to V L , the output terminal of U2 is used as the output terminal 7. A dual-mode cross-coupled charge pump DC-DC converter chip, characterized in that: It is encapsulated by the circuit structure of the dual-mode cross-coupled charge pump DC-DC converter according to any one of claims 1 to 6, and the interface of the dual-mode cross-coupled charge pump DC-DC conversion chip at least includes: Power interface V DD , which is used to connect to the power supply; Ground interface V SS , which is used for grounding; A mode selection interface SL, which is used to input a mode selection signal to the circuit, wherein the mode selection signal is used to adjust the switching between voltage boost and voltage reduction of the circuit to adjust different working modes of the circuit; Voltage input interface V IN , which is used to input voltage to the circuit; Voltage output interface V OUT , which is used to output the actual voltage of the circuit.

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