An alignment system and an alignment method
By designing an alignment system in a holographic lithography system, using the circuit hologram area and mask alignment mark hologram area on the holographic mask plate, the problem of inability to accurately align the holographic mask in the holographic lithography system is solved, and the accurate judgment of the alignment position is achieved.
Patent Information
- Application Number
- CN202310484012.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-28
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2043-04-28
AI Technical Summary
In a holographic lithography system, the alignment position of the holographic mask cannot be obtained by the mask on the holographic mask and the workbench alignment mark, resulting in the inability to correctly align the holographic mask.
An alignment system is designed, including a mask alignment measurement module and an exposure system on the workbench. The circuit hologram area and mask alignment mark hologram area are used on the holographic mask plate to determine the alignment position of the holographic mask plate through the image sensing unit and the reference pattern.
The alignment position of the holographic mask plate is accurately judged by comparing the mask alignment mark pattern on the holographic mask plate, and the problem of difficulty in determining the alignment position in the holographic lithography system is solved.
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Figure CN118859649B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of holographic lithography technology, and particularly relates to an alignment system and an alignment method. Background Art
[0002] A holographic lithography system can be used for the manufacture of integrated circuits (ICs). A key step in the holographic lithography process is to determine the positional relationship between the holographic mask and the wafer, so that each layer of pattern can be accurately exposed at the correct position on the wafer during the multi-layer nested etching process. Different from traditional projection lithography, in a holographic mask, circuit patterns are presented on the holographic mask in the form of phase information and amplitude information. In the exposure optical path, the holographic mask is installed at a fixed position, and the amplitude and phase information on the holographic mask is restored into a circuit pattern by using the restoring wave, and the photoresist on the wafer is exposed.
[0003] In a traditional projection lithography system, the mask used contains alignment marks (wafer alignment marks, overlay error measurement marks, and mask-to-stage alignment marks), and image information such as integrated circuit patterns. However, in a holographic lithography system, the original integrated circuit patterns are presented on the hologram in the form of phase and amplitude and used as a mask. Alignment marks (wafer alignment marks, overlay error measurement marks, and mask-to-stage alignment marks) are also included in the holographic mask in the form of phase and amplitude. Among them, the wafer alignment marks, overlay error measurement marks, and integrated circuit patterns are directly exposed on the photoresist of the wafer after the holographic mask is imaged and used in subsequent steps. However, the mask-to-stage alignment marks are used in the mask alignment process, and the alignment scheme used is different from the alignment scheme of passing through the projection objective lens imaging in traditional projection lithography. In a holographic lithography system, a projection objective lens is not used, and it is impossible to measure and calculate the mask-to-stage alignment marks on the holographic mask by using the object-image relationship to determine the alignment position relationship of the mask. Summary of the Invention
[0004] Therefore, the technical problem to be solved by the present invention is to overcome the problem in the prior art that the alignment position of the holographic mask cannot be obtained through the mask-to-stage alignment marks on the holographic mask, so as to provide an alignment system and an alignment method.
[0005] The present invention provides an alignment system, comprising: a workbench, on the upper surface of which a mask alignment measurement module is provided, the mask alignment measurement module including an image sensing unit, and a reference pattern is provided at the light incident port of the image sensing unit; an exposure system, located above the workbench; a holographic mask plate, the holographic mask plate including a circuit hologram area and a mask alignment mark hologram area, the holographic mask plate being adapted to be aligned with the workbench at a characteristic height position between the exposure system and the mask alignment measurement module; the light emitted by the exposure system is adapted to pass through at least the mask alignment mark hologram area during the alignment process of the holographic mask plate and the workbench to obtain a mask alignment mark pattern at the light incident port of the image sensing unit, the mask alignment mark pattern being the same as and having the same size as the reference pattern; the image sensing unit is adapted to judge the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate.
[0006] Optionally, the upper surface of the workbench further includes a wafer setting area, which is spaced from the mask alignment measurement module, and the wafer setting area is used for placing a wafer; a translation unit, the translation unit being adapted to translate the aligned holographic mask plate above the wafer; the exposure system is further used to expose the surface of the wafer through the circuit hologram area.
[0007] Optionally, the light emitted by the exposure system is adapted to pass only through the mask alignment mark hologram area in the holographic mask plate during the alignment process of the holographic mask plate.
[0008] Optionally, the light emitted by the exposure system passes through the circuit hologram area and the mask alignment mark hologram area during the alignment process of the holographic mask plate.
[0009] Optionally, the exposure system is adapted to emit a first light, and the first light is an exposure light source for the circuit hologram area and the mask alignment mark hologram area.
[0010] Optionally, the exposure system is adapted to emit a second light, the second light is an exposure light source for the mask alignment mark hologram area, and the second light is a non-exposure light source for the circuit hologram area.
[0011] Optionally, the characteristic height is the radius of the circumscribed circle of the area occupied by the circuit hologram area and the mask alignment mark hologram area.
[0012] The present invention also provides an alignment method, including: providing a workbench, on the upper surface of which a mask alignment measurement module is provided, the mask alignment measurement module includes an image sensing unit, and a reference pattern is provided at the light inlet of the image sensing unit; arranging an exposure system above the workbench; providing a holographic mask plate, the holographic mask plate includes a circuit hologram area and a mask alignment mark hologram area; arranging the holographic mask plate at a characteristic height position between the exposure system and the mask alignment measurement module; the light emitted by the exposure system passes through at least the mask alignment mark hologram area to obtain a mask alignment mark pattern at the light inlet of the image sensing unit, the mask alignment mark pattern is the same as and has the same size as the reference pattern; the image sensing unit determines the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate.
[0013] Optionally, the step of arranging the holographic mask plate between the exposure system and the mask alignment measurement module includes: arranging both the circuit hologram area and the mask alignment mark hologram area between the exposure system and the mask alignment measurement module; the light emitted by the exposure system passes through the circuit hologram area and the mask alignment mark hologram area.
[0014] Optionally, the step of arranging the holographic mask plate between the exposure system and the mask alignment measurement module includes: arranging the mask alignment mark hologram area between the exposure system and the mask alignment measurement module, and arranging the circuit hologram area and the exposure system in a lateral dislocation manner; the light emitted by the exposure system passes through the mask alignment mark hologram area and does not pass through the circuit hologram area.
[0015] Optionally, the exposure system is adapted to emit a first light, and the first light is an exposure light source for the circuit hologram area and the mask alignment mark hologram area; or, the exposure system is adapted to emit a second light, the second light is an exposure light source for the mask alignment mark hologram area, and the second light is a non-exposure light source for the circuit hologram area.
[0016] Optionally, the upper surface of the workbench further includes a wafer setting area, and the wafer setting area is arranged at an interval from the mask alignment measurement module; the alignment method further includes: providing a wafer, and coating a photoresist film on the upper surface of the wafer; after coating the photoresist film on the upper surface of the wafer, placing the wafer in the wafer setting area; translating the aligned holographic mask plate above the wafer; moving the exposure system above the holographic mask plate, and the exposure system exposes the photoresist film on the surface of the wafer through the circuit hologram area.
[0017] Optionally, the process by which the image sensing unit determines the alignment position of the holographic mask plate based on the light intensity information received from the holographic mask plate includes: adjusting the position of the holographic mask plate on the horizontal plane at the characteristic height position, and when the light intensity received by the image sensing unit reaches the maximum value, determining the position of the holographic mask plate as the alignment position.
[0018] The technical solution of the present invention has the following advantages:
[0019] For the alignment system provided by the present invention, a mask alignment measurement module is provided on the upper surface of the workbench. The mask alignment measurement module includes an image sensing unit, and a reference pattern is provided at the light inlet of the image sensing unit; the holographic mask plate includes a circuit hologram area and a mask alignment mark hologram area, and the holographic mask plate is adapted to be aligned with the workbench at the characteristic height position between the exposure system and the mask alignment measurement module; the light emitted by the exposure system is adapted to pass through at least the mask alignment mark hologram area during the alignment process of the holographic mask plate to obtain a mask alignment mark pattern at the light inlet of the image sensing unit, and the mask alignment mark pattern is the same as and has the same size as the reference pattern; the image sensing unit is adapted to reflect the relative position deviation in the horizontal plane between the mask alignment mark pattern and the reference pattern according to the light intensity information received from the holographic mask plate, and further determine the alignment position of the holographic mask plate. Description of the Drawings
[0020] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.
[0021] Figure 1 It is a schematic structural diagram of an alignment system provided by an embodiment of the present invention;
[0022] Figure 2 It is a schematic diagram of a holographic mask plate provided by an embodiment of the present invention;
[0023] Figure 3 For Figure 2 It is a schematic diagram of the corresponding mask alignment mark hologram area and circuit hologram area in
[0024] Figure 4 It is the restored pattern after the light path of the holographic mask plate provided by an embodiment of the present invention passes through the exposure system;
[0025] Figure 5 It is a mask alignment mark pattern provided by an embodiment of the present invention;
[0026] Figure 6 In an embodiment of the present invention, the exposure system emits a first light, and the alignment pattern formed after the first light passes through the circuit hologram area and the mask alignment mark hologram area;
[0027] Figure 7 The exposure system provided by an embodiment of the present invention emits a second light, and the mask alignment mark pattern is formed after the second light passes through the mask alignment mark hologram area;
[0028] Figure 8 The structural schematic diagram of the alignment system provided by another embodiment of the present invention;
[0029] Figure 9 In another embodiment of the present invention, the exposure system emits a first light, and the mask alignment mark pattern formed after the first light only passes through the mask alignment mark hologram area;
[0030] Figure 10 In an embodiment of the present invention, the exposure system emits a second light, and the mask alignment mark pattern is formed after the second light only passes through the mask alignment mark hologram area;
[0031] Figure 11 The flow chart of the alignment method provided by another embodiment of the present invention. Detailed implementation manners
[0032] Next, the technical solutions of the present invention will be clearly and completely described in conjunction with the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0033] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present invention. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.
[0034] In the description of the present invention, it should be noted that, unless otherwise clearly specified and defined, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be a direct connection or an indirect connection through an intermediate medium, and it may be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0035] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.
[0036] Embodiment 1
[0037] This embodiment provides an alignment system. With reference to Figure 1 、 Figure 2 、 Figure 3 and Figure 4 , it includes:
[0038] A workbench 1, on the upper surface of the workbench 1, a mask alignment measurement module 2 is provided. The mask alignment measurement module 2 includes an image sensing unit, and a reference pattern is provided at the light incident port of the image sensing unit;
[0039] An exposure system 3, located above the workbench 1;
[0040] A holographic mask 4, the holographic mask 4 includes a circuit hologram area 41 and a mask alignment mark hologram area 42. The holographic mask 4 is adapted to be aligned with the workbench 1 at a characteristic height position between the exposure system 3 and the mask alignment measurement module 2; the light emitted by the exposure system is adapted to pass through at least the mask alignment mark hologram area 42 during the alignment process between the holographic mask 4 and the workbench 1 to obtain a mask alignment mark pattern 42a at the light incident port of the image sensing unit. The mask alignment mark pattern 42a is the same as and has the same size as the reference pattern;
[0041] The image sensing unit is adapted to judge the alignment position of the holographic mask 4 according to the light intensity information received from the holographic mask 4.
[0042] For the alignment system provided in this embodiment, the image sensing unit is adapted to reflect the relative position deviation in the horizontal plane between the mask alignment mark pattern 42a and the reference pattern according to the light intensity information received from the holographic mask, and then judge the alignment position of the holographic mask 4.
[0043] In one embodiment, the exposure system 3 is a spherical wave illumination system.
[0044] ReferenceFigure 2 , Figure 2 is the hologram of the holographic mask plate 4. The holographic mask plate 4 is the phase and amplitude representation form of the hologram.
[0045] Reference Figure 3 , Figure 3 are the mask alignment mark hologram area 42 and the circuit hologram area 41 in the hologram of the holographic mask plate 4. The mask alignment mark hologram area 42 is used as the hologram for the alignment between the holographic mask plate 4 and the workbench 1. Reference Figure 3 , the circuit hologram area 41 includes an integrated circuit hologram area, a wafer alignment mark hologram area, and a registration error measurement mark hologram area. The light emitted by the exposure system 3 above the image sensing unit forms a mask alignment mark pattern 42a (reference Figure 4 ) after passing through the mask alignment mark hologram area 42 and is then received by the image sensing unit. The light emitted by the exposure system 3 above the wafer forms a circuit pattern 41a (reference Figure 4 ) in the photoresist film on the wafer surface after passing through the circuit hologram area 41. The light emitted by the exposure system 3 above the wafer forms an integrated circuit pattern in the photoresist film on the wafer surface after passing through the integrated circuit hologram area. The light emitted by the exposure system 3 above the wafer forms a wafer alignment mark pattern in the photoresist film on the wafer surface after passing through the wafer alignment mark hologram area, and the light emitted by the exposure system 3 above the wafer forms a registration error measurement mark pattern in the photoresist film on the wafer surface after passing through the registration error measurement mark hologram area. Reference Figure 4 , the circuit pattern 41a has opposite first and second sides, and opposite third and fourth sides, and the direction from the first side to the second side is perpendicular to the direction from the third side to the fourth side; the number of the mask alignment mark patterns 42a is two, and one mask alignment mark pattern is disposed opposite to the area where the third side is close to the first side, and the other mask alignment mark pattern is disposed opposite to the area where the fourth side is close to the second side.
[0046] In one embodiment, reference Figure 5 , the mask alignment mark pattern 42a includes a first grating area, a second grating area, a third grating area, and a fourth grating area. The first grating area and the third grating area are diagonally distributed, and the second grating area and the fourth grating area are diagonally distributed; the extending direction of the slits in the first grating area is perpendicular to the extending direction of the slits in the second grating area, the extending direction of the slits in the first grating area is the same as the extending direction of the slits in the third grating area, and the extending direction of the slits in the second grating area is the same as the extending direction of the slits in the fourth grating area. The grating period of the first grating area is the same as the grating period of the second grating area, for example, both are P1, and the grating period of the third grating area is the same as the grating period of the fourth grating area, for example, both are P2.
[0047] The reference pattern is the same as and has the same size as the mask alignment mark pattern 42a, which will not be elaborated further.
[0048] The feature height refers to the height between the holographic mask plate 4 and the mask alignment measurement module 2.
[0049] The feature height is set to the radius of the circumscribed circle of the area occupied by the circuit hologram area and the mask alignment mark hologram area. In one embodiment, the shape of the area occupied by the circuit hologram area and the mask alignment mark hologram area is circular, and the height between the holographic mask plate 4 and the mask alignment measurement module 2 is equal to the radius of the circumscribed circle of the area occupied by the circuit hologram area and the mask alignment mark hologram area. In another embodiment, the shape of the area occupied by the circuit hologram area and the mask alignment mark hologram area is rectangular, and the height between the holographic mask plate and the mask alignment measurement module is equal to the radius of the circumscribed circle of the area occupied by the circuit hologram area and the mask alignment mark hologram area.
[0050] In one embodiment, continuing to refer to Figure 1 , the upper surface of the workbench 1 further includes a wafer setting area, which is spaced from the mask alignment measurement module 2, and the wafer setting area is used for placing a wafer; a translation unit, which is adapted to translate the aligned holographic mask plate 4 above the wafer; and the exposure system 3 is further used to expose the surface of the wafer through the circuit hologram area.
[0051] In one embodiment, referring to Figure 1 and Figure 6 , the light emitted by the exposure system passes through the circuit hologram area 41 and the mask alignment mark hologram area 42 during the alignment of the holographic mask plate.
[0052] In one embodiment, referring to Figure 6 , the exposure system is adapted to emit a first light, and the first light is an exposure light source for the circuit hologram area 41 and the mask alignment mark hologram area 42. After passing through the circuit hologram area 41 and the mask alignment mark hologram area 42, the first light forms a registration pattern, and the registration pattern includes a circuit pattern and a mask alignment mark pattern.
[0053] The circuit hologram area 41 corresponds to the circuit pattern, and the mask alignment mark hologram area 42 corresponds to the mask alignment mark pattern.
[0054] In one embodiment, referring to Figure 7, the exposure system is adapted to emit a second light, which is an exposure light source for the mask alignment mark hologram region 42, and the second light is a non-exposure light source for the circuit hologram region 41. After passing through the mask alignment mark hologram region 42, the second light forms a mask alignment mark pattern, and the second light does not form a circuit pattern after passing through the circuit hologram region.
[0055] In another embodiment, referring to Figure 8 and Figure 9 , the light emitted by the exposure system is adapted to pass only through the mask alignment mark hologram region in the holographic mask plate during the alignment process of the holographic mask plate.
[0056] In one embodiment, referring to Figure 9 , the exposure system is adapted to emit a first light, which is an exposure light source for the circuit hologram region and the mask alignment mark hologram region. The first light forms a mask alignment mark pattern only after passing through the mask alignment mark hologram region.
[0057] In one embodiment, referring to Figure 10 , the exposure system is adapted to emit a second light, which is an exposure light source for the mask alignment mark hologram region, and the second light is a non-exposure light source for the circuit hologram region. The second light is adapted to form a mask alignment mark pattern only after passing through the mask alignment mark hologram region.
[0058] For a certain hologram light source to be an exposure light source means that: if the light emitted by this light source can restore and form the corresponding pattern after passing through this hologram, it indicates that this light source is an exposure light source. For example, if the light emitted by the light source can form a mask alignment mark pattern after passing through the mask alignment mark hologram region 42, it indicates that this light source is an exposure light source for the mask alignment mark hologram region 42, and vice versa, this light source is a non-exposure light source for the mask alignment mark hologram region 42; if the light emitted by the light source can form a circuit pattern after passing through the circuit hologram region 41, it indicates that this light source is an exposure light source for the circuit hologram region 41, and vice versa, this light source is a non-exposure light source for the circuit hologram region 41.
[0059] Embodiment 2
[0060] This embodiment provides an alignment method, referring to Figure 11 , including the following steps:
[0061] Step S1: Provide a workbench, on the upper surface of which a mask alignment measurement module is provided. The mask alignment measurement module includes an image sensing unit, and a reference pattern is provided at the light input port of the image sensing unit.
[0062] Step S2: Set the exposure system above the workbench;
[0063] Step S3: Provide a holographic mask plate, which includes a circuit hologram area and a mask alignment mark hologram area;
[0064] Step S4: Set the holographic mask plate at a characteristic height position between the exposure system and the mask alignment measurement module; the light emitted by the exposure system passes through at least the mask alignment mark hologram area to obtain a mask alignment mark pattern at the light inlet of the image sensing unit, and the mask alignment mark pattern is the same as and has the same size as the reference pattern;
[0065] Step S5: The image sensing unit determines the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate.
[0066] In one embodiment, the upper surface of the workbench further includes a wafer setting area, which is spaced from the mask alignment measurement module; the alignment method further includes: providing a wafer, coating a photoresist film on the upper surface of the wafer; after coating the photoresist film on the upper surface of the wafer, placing the wafer in the wafer setting area; translating the aligned holographic mask plate above the wafer; moving the exposure system above the holographic mask plate, and the exposure system exposes the photoresist film on the surface of the wafer through the circuit hologram area.
[0067] In one embodiment, the process of the image sensing unit determining the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate includes: adjusting the position of the holographic mask plate in the horizontal plane at the characteristic height position, and when the light intensity received by the image sensing unit reaches the maximum value, determining the position of the holographic mask plate as the alignment position.
[0068] In one embodiment, the step of setting the holographic mask plate between the exposure system and the mask alignment measurement module includes: setting both the circuit hologram area and the mask alignment mark hologram area between the exposure system and the mask alignment measurement module; the light emitted by the exposure system passes through the circuit hologram area and the mask alignment mark hologram area.
[0069] In one embodiment, the exposure system is adapted to emit a first light, and the first light is an exposure light source for the circuit hologram area and the mask alignment mark hologram area; in another embodiment, the exposure system is adapted to emit a second light, the second light is an exposure light source for the mask alignment mark hologram area, and the second light is a non-exposure light source for the circuit hologram area.
[0070] In another embodiment, the step of disposing the holographic mask plate between the exposure system and the mask alignment measurement module includes: disposing the mask alignment mark hologram region between the exposure system and the mask alignment measurement module, and laterally misaligning the circuit hologram region and the exposure system; the light emitted by the exposure system passes through the mask alignment mark hologram region and does not pass through the circuit hologram region.
[0071] In one embodiment, the exposure system is adapted to emit a first light, and the first light is an exposure light source for the circuit hologram region and the mask alignment mark hologram region; in another embodiment, the exposure system is adapted to emit a second light, the second light is an exposure light source for the mask alignment mark hologram region, and the second light is a non-exposure light source for the circuit hologram region.
[0072] Parts that are the same as those in the previous embodiment will not be described in detail in this embodiment.
[0073] Obviously, the above embodiments are merely examples for clear illustration and are not limitations on the implementation manners. For those of ordinary skill in the art, other different forms of changes or variations can be made based on the above description. It is not necessary and impossible to enumerate all the implementation manners here. And the obvious changes or variations derived therefrom are still within the protection scope of the present invention.
Claims
1. An alignment system, characterized in that, Comprising: A workbench, on the upper surface of which a mask alignment measurement module is provided. The mask alignment measurement module includes an image sensing unit, and a reference pattern is provided at the light incident port of the image sensing unit; An exposure system, located above the workbench; A holographic mask plate, which includes a circuit hologram area and a mask alignment mark hologram area. The holographic mask plate is adapted to be aligned with the workbench at a characteristic height position between the exposure system and the mask alignment measurement module. The characteristic height is the height between the holographic mask plate and the mask alignment measurement module. The light emitted by the exposure system is adapted to pass through at least the mask alignment mark hologram area during the alignment process of the holographic mask plate and the workbench to obtain a mask alignment mark pattern at the light incident port of the image sensing unit. The mask alignment mark pattern is the same as and has the same size as the reference pattern; The image sensing unit is adapted to judge the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate.
2. The alignment system according to claim 1, characterized in that, The upper surface of the workbench further includes a wafer setting area, which is spaced from the mask alignment measurement module, and the wafer setting area is used for placing wafers; A translation unit, which is adapted to translate the aligned holographic mask plate above the wafer; The exposure system is further used to expose the surface of the wafer through the circuit hologram area.
3. The alignment system according to claim 1, wherein The light emitted by the exposure system is adapted to pass only through the mask alignment mark hologram area in the holographic mask plate during the alignment process of the holographic mask plate.
4. The alignment system according to claim 1, wherein The light emitted by the exposure system passes through the circuit hologram area and the mask alignment mark hologram area during the alignment process of the holographic mask plate.
5. The alignment system according to claim 3 or 4, characterized in that, The exposure system is adapted to emit a first light, and the first light is an exposure light source for the circuit hologram area and the mask alignment mark hologram area.
6. The alignment system according to claim 3 or 4, characterized in that, The exposure system is adapted to emit a second light, the second light is an exposure light source for the mask alignment mark hologram area, and the second light is a non-exposure light source for the circuit hologram area.
7. The alignment system according to claim 1, characterized in that, The characteristic height is the radius of the circumscribed circle of the area occupied by the circuit hologram area and the mask alignment mark hologram area.
8. An alignment method, characterized in that, Comprising: Providing a workbench, on the upper surface of which a mask alignment measurement module is provided. The mask alignment measurement module includes an image sensing unit, and a reference pattern is provided at the light incident port of the image sensing unit; Setting the exposure system above the workbench; Providing a holographic mask plate, which includes a circuit hologram area and a mask alignment mark hologram area; Setting the holographic mask plate at a characteristic height position between the exposure system and the mask alignment measurement module. The characteristic height is the height between the holographic mask plate and the mask alignment measurement module. The light emitted by the exposure system passes through at least the mask alignment mark hologram area to obtain a mask alignment mark pattern at the light incident port of the image sensing unit. The mask alignment mark pattern is the same as and has the same size as the reference pattern; The image sensing unit judges the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate.
9. The alignment method according to claim 8, wherein The step of disposing the holographic mask plate between the exposure system and the mask alignment measurement module includes: disposing both the circuit hologram region and the mask alignment mark hologram region between the exposure system and the mask alignment measurement module; The light emitted by the exposure system passes through the circuit hologram region and the mask alignment mark hologram region.
10. The alignment method according to claim 8, characterized in that, The step of disposing the holographic mask plate between the exposure system and the mask alignment measurement module includes: disposing the mask alignment mark hologram region between the exposure system and the mask alignment measurement module, and horizontally misaligning the circuit hologram region and the exposure system; The light emitted by the exposure system passes through the mask alignment mark hologram region but does not pass through the circuit hologram region.
11. The alignment method according to claim 9 or 10, characterized in that, The exposure system is adapted to emit a first light, which is an exposure light source for the circuit hologram region and the mask alignment mark hologram region; or, the exposure system is adapted to emit a second light, which is an exposure light source for the mask alignment mark hologram region and a non-exposure light source for the circuit hologram region.
12. The alignment method according to claim 8, wherein The upper surface of the workbench further includes a wafer setting area, which is spaced from the mask alignment measurement module; the alignment method further includes: providing a wafer, coating a photoresist film on the upper surface of the wafer; after coating the photoresist film on the upper surface of the wafer, placing the wafer in the wafer setting area; translating the aligned holographic mask plate above the wafer; moving the exposure system above the holographic mask plate, and the exposure system exposes the photoresist film on the surface of the wafer through the circuit hologram region.
13. The alignment method according to claim 8, wherein The process in which the image sensing unit determines the alignment position of the holographic mask plate according to the light intensity information received from the holographic mask plate includes: adjusting the position of the holographic mask plate in the horizontal plane at the characteristic height position, and when the light intensity received by the image sensing unit reaches the maximum value, determining the position of the holographic mask plate as the alignment position.
Citation Information
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