Processor voltage and frequency adjustment method, device, electronic device and storage medium

Abstract

The present invention provides a method, device, electronic device and storage medium for adjusting processor voltage and frequency. The processor voltage and frequency adjustment method provided by the present invention includes: monitoring a dynamic voltage and frequency adjustment request from a client; obtaining frequency change values, timestamps and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request; determining the adjustment order of the voltage and frequency of the multiple processing cores according to the frequency change values, the timestamps and the preset weight configuration values; adjusting the frequency and voltage of the multiple processing cores according to the adjustment order of the voltage and frequency of the multiple processing cores, as well as the core-requested frequency values and core-requested voltage values of the multiple processing cores. The processor voltage and frequency adjustment method of the present invention can enhance the flexibility of the processor in some application scenarios, and can improve the energy efficiency ratio of the processor.

Description

Technical Field

[0001] The present invention relates to the field of processor technology, and in particular to a method, device, electronic device, and storage medium for adjusting processor voltage and frequency. Background Art

[0002] As the performance of single processors continues to increase, the rate of improvement has encountered numerous bottlenecks. Processor manufacturers have proposed placing multiple processing cores within a single processor, known as a multi-core processor, to improve overall processor performance. As the number of cores integrated within a single processor continues to increase, overall processor performance continues to improve, but this comes with the associated challenges of increasing power consumption, design, and manufacturing costs. The industry primarily utilizes dynamic voltage and frequency adjustment technologies to improve processor energy efficiency. Processors contain up to hundreds of processing cores. To dynamically adjust the voltage and frequency of each processor core independently, chip design requires each core to have its own independent voltage and clock domain, and motherboard design requires independent external power supply for each core. Some processor manufacturers have adopted solutions where all cores within the processor share a single voltage and clock domain, or each core has its own independent clock domain. For the first solution mentioned above, since each processing core cannot independently adjust the frequency and voltage, it lacks flexibility in some application scenarios such as virtualization and fixed-frequency scenarios, thereby limiting the user's usage scenarios; in the second solution mentioned above, each processing core cannot independently adjust the voltage, but can only independently adjust the frequency, resulting in relatively low energy efficiency of the processor. Summary of the Invention

[0003] The purpose of the present invention is to provide a processor voltage and frequency adjustment method, device, electronic device and storage medium to solve the technical problems in the prior art of insufficient flexibility of processors in some application scenarios and relatively low energy efficiency of processors.

[0004] The technical solution of the present invention is as follows: a method for adjusting processor voltage and frequency is provided, comprising: monitoring a dynamic voltage and frequency adjustment request from a client;

[0005] Obtain frequency change values, timestamps, and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request;

[0006] determining an adjustment order of voltages and frequencies of the plurality of processing cores according to the frequency change value, the timestamp, and the preset weight configuration value;

[0007] The frequencies and voltages of the multiple processing cores are adjusted according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores.

[0008] Furthermore, the monitoring of the dynamic voltage and frequency adjustment request of the client includes monitoring the dynamic voltage and frequency adjustment requests of multiple clients;

[0009] Correspondingly, before obtaining the frequency change values, timestamps and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request, it also includes determining the response order of the dynamic voltage and frequency adjustment request of the client according to the performance requirement modes of the multiple clients, and the performance requirement modes include hardware automatic control performance mode, low power consumption control mode, temperature control mode, power consumption control mode or operating system internal control processing core performance mode.

[0010] Furthermore, monitoring dynamic voltage and frequency adjustment requests from multiple clients includes:

[0011] At each interval preset duration, the client's dynamic voltage and frequency adjustment request is polled once to monitor the dynamic voltage and frequency adjustment requests of multiple clients, or, after receiving the dynamic voltage and frequency adjustment request sent by the client, the monitoring of the dynamic voltage and frequency adjustment request is awakened to monitor the dynamic voltage and frequency adjustment requests of multiple clients.

[0012] Furthermore, obtaining frequency change values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request includes:

[0013] The core-requested frequency values and current frequency values of the plurality of processing cores corresponding to the dynamic voltage frequency adjustment request are obtained, and a frequency change value is obtained according to the core-requested frequency values and the current frequency values.

[0014] Furthermore, obtaining timestamps of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request includes:

[0015] The current time point of the core request and the time point of the last core request of the plurality of processing cores corresponding to the dynamic voltage and frequency adjustment request are obtained, and a timestamp is obtained according to the current time point of the core request and the time point corresponding to the last core request.

[0016] Furthermore, determining an adjustment order of the voltages and frequencies of the plurality of processing cores according to the frequency change value, the timestamp, and the preset weight configuration value includes:

[0017] An arbitration value is determined according to the frequency change value, the timestamp, the preset weight configuration value, and an arbitration calculation formula, and an adjustment order of the voltage and frequency of the multiple processing cores is determined according to the arbitration value. The arbitration calculation formula includes ,in, V is the arbitration value, weight is the preset weight configuration value, is the frequency change value, m The default dimension value.

[0018] Further, adjusting the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores, includes:

[0019] The frequencies and voltages of the multiple processing cores are adjusted in sequence according to the adjustment order of the voltages and frequencies of the multiple processing cores, as well as the core-requested frequency values and core-requested voltage values of the multiple processing cores. If the core-requested voltage value of the processing core is less than the actual voltage value of the current shared voltage domain of the processing core, the voltage of the processing core is not adjusted.

[0020] Another technical solution of the present invention is as follows: a processor voltage and frequency adjustment device is provided, comprising a monitoring module, a processing core information acquisition module, an adjustment sequence determination module, and an adjustment module;

[0021] The monitoring module is used to monitor the dynamic voltage and frequency adjustment request of the client;

[0022] The processing core information acquisition module is configured to acquire frequency change values, timestamps, and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request;

[0023] The adjustment sequence determining module is configured to determine an adjustment sequence of the voltages and frequencies of the plurality of processing cores according to the frequency change value, the timestamp, and the preset weight configuration value;

[0024] The adjustment module is configured to adjust the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores.

[0025] Another technical solution of the present invention is as follows: an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program that can be executed by the processor, and when the processor executes the computer program, the processor voltage and frequency adjustment method described in any of the above technical solutions is implemented.

[0026] Another technical solution of the present invention is as follows: a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the processor voltage and frequency adjustment method as described in any of the above technical solutions is implemented.

[0027] The beneficial effects of the present invention are: monitoring the dynamic voltage and frequency adjustment request of the client; obtaining the frequency change values, timestamps and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request; determining the adjustment order of the voltage and frequency of the multiple processing cores according to the frequency change values, the timestamps and the preset weight configuration values; adjusting the frequency and voltage of the multiple processing cores according to the adjustment order of the voltage and frequency of the multiple processing cores, as well as the core-requested frequency values and core-requested voltage values of the multiple processing cores; through the above technical solution, the flexibility of the processor in some application scenarios can be enhanced, and the energy efficiency ratio of the processor can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A flowchart of a method for adjusting processor voltage and frequency provided by an embodiment of the present invention.

[0029] Figure 2 A schematic diagram of a framework for adjusting processor voltage and frequency provided by an embodiment of the present invention.

[0030] Figure 3 This is a structural diagram of a processor voltage and frequency adjustment device provided by an embodiment of the present invention.

[0031] Figure 4 A schematic structural diagram of an electronic device provided by an embodiment of the present invention.

[0032] Figure 5 A schematic structural diagram of a computer-readable storage medium provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0034] References herein to "embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute a separate or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0035] Figure 1 FIG is a flow chart of a method for adjusting processor voltage and frequency according to an embodiment of the present invention. It should be noted that the method for adjusting processor voltage and frequency according to the present invention is not limited to the method for adjusting processor voltage and frequency according to an embodiment of the present invention if substantially the same results are achieved. Figure 1 The process sequence shown is limited. Figure 1 As shown, the processor voltage and frequency adjustment method includes:

[0036] S101, monitoring a client's dynamic voltage and frequency adjustment request;

[0037] As an implementation method, a schematic diagram of a processor voltage and frequency adjustment framework is shown in FIG. Figure 2 As shown, Figure 2 In the figure, the processing core Core 0-n represents the n+1 processing cores inside the processor. Each processing core can dynamically adjust the voltage and frequency. Figure 2 The microprocessor unit MCU in the DVFS controller can be used to initialize and configure the dynamic voltage and frequency scaling control unit (DVFS controller). The functions of the microprocessor unit can be implemented in software, and the functions of the dynamic voltage and frequency scaling control unit can also be implemented in software to achieve the same logical functions as the hardware of the dynamic voltage and frequency scaling control unit.

[0038] In some embodiments, monitoring dynamic voltage and frequency adjustment requests from multiple clients includes:

[0039] At each interval preset duration, the client's dynamic voltage and frequency adjustment request is polled once to monitor the dynamic voltage and frequency adjustment requests of multiple clients, or, after receiving the dynamic voltage and frequency adjustment request sent by the client, the monitoring of the dynamic voltage and frequency adjustment request is awakened to monitor the dynamic voltage and frequency adjustment requests of multiple clients.

[0040] As an embodiment, during the processor startup phase, the firmware within the microprocessor unit initializes the dynamic voltage and frequency adjustment control unit, performs basic configuration, and enables it. After being enabled, the dynamic voltage and frequency adjustment control unit can be in a listening state and can receive dynamic voltage and frequency adjustment (DVFS) requests from various clients. The dynamic voltage and frequency adjustment control unit can have an active mode and a passive mode. In the active mode, the dynamic voltage and frequency adjustment control unit can poll whether a dynamic voltage and frequency adjustment request is triggered at intervals of a preset duration according to a configured period. When the dynamic voltage and frequency adjustment control unit is configured in this mode, the dynamic voltage and frequency adjustment control unit polls whether a dynamic voltage and frequency adjustment request is triggered at intervals of a preset duration to batch collect dynamic voltage and frequency adjustment requests from various clients. In the passive mode, each client can actively wake up the dynamic voltage and frequency adjustment control unit by sending a dynamic voltage and frequency adjustment request. After receiving the dynamic voltage and frequency adjustment request sent by the client, the dynamic voltage and frequency adjustment control unit wakes up to monitor the dynamic voltage and frequency adjustment request, thereby monitoring the dynamic voltage and frequency adjustment request and collecting the dynamic voltage and frequency adjustment request from the client.

[0041] In some embodiments, monitoring the dynamic voltage and frequency adjustment request of the client includes monitoring the dynamic voltage and frequency adjustment requests of multiple clients;

[0042] Correspondingly, before obtaining the frequency change values, timestamps and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request, it also includes determining the response order of the dynamic voltage and frequency adjustment request of the client according to the performance requirement modes of the multiple clients, and the performance requirement modes include hardware automatic control performance mode, low power consumption control mode, temperature control mode, power consumption control mode or operating system internal control processing core performance mode.

[0043] As an implementation method, the response order of the dynamic voltage and frequency adjustment requests of the clients is determined according to the performance requirement modes of the multiple clients. The response order of the dynamic voltage and frequency adjustment requests of the clients corresponding to different performance requirement modes may be, in order, the dynamic voltage and frequency adjustment request of the client corresponding to the low power control mode, the dynamic voltage and frequency adjustment request of the client corresponding to the temperature control mode, the dynamic voltage and frequency adjustment request of the client corresponding to the power consumption control mode, the dynamic voltage and frequency adjustment request of the client corresponding to the hardware automatic control performance mode, and the dynamic voltage and frequency adjustment request of the client corresponding to the operating system control processing core performance mode. The response priority of the dynamic voltage and frequency adjustment request of the client corresponding to the temperature control mode and the dynamic voltage and frequency adjustment request of the client corresponding to the power consumption control mode may be the same. For example, if the performance requirement mode of the first client is the low power control mode and the performance requirement mode of the second client is the temperature control mode, the dynamic voltage and frequency adjustment request of the first client will be responded to first.

[0044] As an implementation method, Figure 2 As shown, the dynamic voltage and frequency adjustment request arbitration unit (DVFS requestarbiter) can be used to arbitrate the dynamic voltage and frequency adjustment requests of each client. Figure 2 In the dynamic voltage and frequency adjustment control request register table (DVFS Request register Table), each client corresponds to a table. The client corresponding to the hardware automatic control performance mode and the client corresponding to the operating system control processing core performance mode can share the same table. Each entry in the table corresponds to the dynamic voltage and frequency adjustment control request register (DVFSRequest register) of each processing core. The dynamic voltage and frequency adjustment processing core entry register table is shown in Table 1.

[0045] Table 1 Dynamic voltage and frequency adjustment processing core entry register table

[0046]

[0047] The client's id table is shown in Table 2.

[0048] Table 2 Client ID table

[0049]

[0050] The second row in Table 2 indicates the client ID, and the third row in Table 2 indicates the performance requirement mode of the client with the corresponding ID. In Table 2, perf management, thermal management, power management, and low power management respectively indicate the hardware automatic control performance mode, temperature control mode, power consumption control mode, and low power consumption control mode. The priority level can be independently configured for each client, with 0 indicating the lowest priority and 15 indicating the highest priority. The client priority definition is shown in Table 3.

[0051] Table 3 Client priority table

[0052]

[0053] The second row of Table 3 shows the IDs corresponding to different clients, and the third row of Table 3 shows the priorities of clients with different IDs.

[0054] As an implementation method, Figure 2 The hardware automatic control performance unit (hardware performance management) can be the client corresponding to the hardware automatic control performance mode. This unit indicates that the hardware automatically analyzes the processor performance requirements to send dynamic voltage and frequency adjustment requests (dynamic voltage and frequency adjustment control requests). The low power control unit (low power management) can be the client of the low power control mode. This unit sends dynamic voltage and frequency adjustment requests when the processing core enters or exits the low power state. The temperature control unit (thermal management) can be the client of the temperature control mode. This unit collects temperature and sends dynamic voltage and frequency adjustment requests when temperature control is required. The power consumption control unit (power limit management) can be the client corresponding to the power consumption control mode. This unit collects power consumption and sends dynamic voltage and frequency adjustment requests when power control is required. The processor dynamic voltage and frequency adjustment driver unit (CPU DVFS driver) represents the driver unit that controls the processor core performance in the operating system. It can be the client corresponding to the processing core performance mode in the operating system. This unit sends dynamic voltage and frequency adjustment requests based on the dynamic performance requirements of the application.

[0055] S102, obtaining frequency change values, timestamps, and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request;

[0056] In some embodiments, obtaining frequency change values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request includes:

[0057] The core-requested frequency values and current frequency values of the plurality of processing cores corresponding to the dynamic voltage frequency adjustment request are obtained, and a frequency change value is obtained according to the core-requested frequency values and the current frequency values.

[0058] In one implementation, a client's dynamic voltage and frequency adjustment request may correspond to multiple processing cores. After the dynamic voltage and frequency adjustment request is sent to a processing core, a core request is generated for the processing core. By obtaining the core requested frequency value and current frequency value of each processing core, the frequency change values of the multiple processing cores are obtained. The larger the frequency change value of the processing core, the higher the priority of its voltage and frequency adjustment.

[0059] In some embodiments, obtaining timestamps of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request includes:

[0060] The current time point of the core request and the time point corresponding to the last core request of the plurality of processing cores corresponding to the dynamic voltage and frequency adjustment request are obtained, and a timestamp is obtained according to the current time point of the core request and the time point of the last core request.

[0061] As an implementation method, after the dynamic voltage and frequency adjustment request is sent to the processing core, a core request of the processing core is generated. By obtaining the current time point of the core request of each processing core and the time point corresponding to the last core request, the current time point is subtracted from the time point corresponding to the last core request to obtain a timestamp (time difference), and then the timestamps of multiple processing cores are obtained.

[0062] S1033, determining an adjustment order of the voltages and frequencies of the plurality of processing cores according to the frequency change value, the timestamp, and the preset weight configuration value;

[0063] In some embodiments, determining an adjustment order of voltages and frequencies of the plurality of processing cores according to the frequency change value, the timestamp, and the preset weight configuration value includes:

[0064] An arbitration value is determined according to the frequency change value, the timestamp, the preset weight configuration value, and an arbitration calculation formula, and an adjustment order of the voltage and frequency of the multiple processing cores is determined according to the arbitration value. The arbitration calculation formula includes ,in, V is the arbitration value, weight is the preset weight configuration value, is the frequency change value, m The default dimension value.

[0065] As an implementation method, Figure 2 As shown, the preset dimension value mWith preset weight configuration value weight The value range of the dynamic voltage and frequency adjustment configuration register (DVFS configuration register) is related to the dynamic voltage and frequency adjustment control unit. The configuration format of the dynamic voltage and frequency adjustment configuration register is shown in Table 4.

[0066] Table 4 Configuration format of dynamic voltage and frequency adjustment configuration register

[0067]

[0068] The second to fifth rows of Table 4 are the bit value range, preset weight configuration, preset weight configuration value and corresponding description, respectively. weight The value range of is 0~255, then the preset dimension value m The default weight configuration value is 256. The corresponding description of the preset weight configuration value is 0, which can be inclined to the optimal power consumption of arbitration. The default weight configuration value is 255, which can be inclined to the optimal performance of arbitration. The default weight configuration value is a number between 0 and 255, which can be described as between the optimal power consumption and the optimal performance of arbitration.

[0069] S104 , adjusting the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores.

[0070] As an implementation method, under the same client, the adjustment order of the voltage and frequency of multiple processing cores can be based on the frequency change value, timestamp, preset weight configuration value and arbitration value determined by the arbitration calculation formula V To determine the arbitration value V The larger the value, the higher the priority of the voltage and frequency adjustment of the corresponding processing core, and the core request of the corresponding processing core is input to the Figure 2 The dynamic voltage and frequency adjustment processing unit (DVFS handler) is used to process specific dynamic voltage and frequency adjustment requests (or core requests). The dynamic voltage and frequency adjustment processing unit is used to adjust the voltage and frequency of the processing core by communicating with the clock generation unit and the board power supply module unit. Figure 2 In the Core 0-n clock generator, each processing core corresponds to a private clock generation unit to provide clock for the corresponding processing core. The dynamic voltage and frequency adjustment processing unit can directly control this unit to adjust the frequency of the corresponding processing core. Figure 2In the system, the voltage regulator (VR) provides the voltage required for the processing cores Core0-n to operate. The specific number of VRs can be determined based on the target energy efficiency ratio. The dynamic voltage and frequency adjustment processing unit can directly control this unit to adjust the voltage of the corresponding processing core.

[0071] In some embodiments, adjusting the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores and the core-requested frequency values and core-requested voltage values of the multiple processing cores includes:

[0072] The frequencies and voltages of the multiple processing cores are adjusted in sequence according to the adjustment order of the voltages and frequencies of the multiple processing cores, as well as the core-requested frequency values and core-requested voltage values of the multiple processing cores. If the core-requested voltage value of the processing core is less than the actual voltage value of the current shared voltage domain of the processing core, the voltage of the processing core is not adjusted.

[0073] In one embodiment, the dynamic voltage and frequency adjustment request arbitration unit may output arbitration information. The dynamic voltage and frequency adjustment processing unit receives the arbitration information output by the dynamic voltage and frequency adjustment request arbitration unit and configures the voltage and frequency of the corresponding processing core based on the arbitration information. The arbitration information includes a processing core ID, a voltage ID, and a frequency ID. The processing core ID can be used to identify the specific processing core, and the voltage ID and frequency ID can be used to determine the specific core's requested frequency and voltage, respectively. If the arbitrated required voltage of the processing core (the core's requested voltage) is lower than the actual voltage value of the current shared voltage domain, only the frequency adjustment may be performed without adjusting the voltage.

[0074] The processor voltage and frequency adjustment method of an embodiment of the present invention monitors the dynamic voltage and frequency adjustment request of the client; obtains the frequency change value, timestamp and preset weight configuration value of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request; determines the adjustment order of the voltage and frequency of the multiple processing cores according to the frequency change value, the timestamp and the preset weight configuration value; adjusts the frequency and voltage of the multiple processing cores according to the adjustment order of the voltage and frequency of the multiple processing cores, as well as the core-requested frequency value and the core-requested voltage value of the multiple processing cores, which can enhance the flexibility of the processor in some application scenarios and improve the energy efficiency ratio of the processor.

[0075] The processor voltage and frequency adjustment method of the embodiment of the present invention can achieve the maximum balance between design cost and energy efficiency by dynamically adjusting the voltage and frequency of each processing core when the number of processor cores and the external power supply are not one-to-one corresponding. The processor voltage and frequency adjustment method of the embodiment of the present invention can support user-defined arbitration weight parameters, that is, preset weight configuration values, to provide a flexible operating mode for the processor.

[0076] Based on the above processor voltage and frequency adjustment method, an embodiment of the present invention further provides a processor voltage and frequency adjustment device, the structural diagram of which is as follows: Figure 3 As shown, the processor voltage and frequency adjustment device 30 includes a monitoring module 31, a processing core information acquisition module 32, an adjustment sequence determination module 33 and an adjustment module 34;

[0077] The monitoring module 31 is used to monitor the dynamic voltage and frequency adjustment request of the client;

[0078] The processing core information acquisition module 32 is configured to acquire frequency change values, timestamps, and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request;

[0079] The adjustment sequence determining module 33 is configured to determine an adjustment sequence of the voltages and frequencies of the plurality of processing cores according to the frequency change value, the timestamp, and the preset weight configuration value;

[0080] The adjustment module 34 is configured to adjust the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores.

[0081] For other details about how the modules in the processor voltage and frequency adjustment device 30 implement the above technical solution, please refer to the description of the processor voltage and frequency adjustment method provided in the above invention embodiment, which will not be repeated here.

[0082] Based on the above processor voltage and frequency adjustment method, an embodiment of the present invention further provides an electronic device 40, the structural diagram of which is as follows: Figure 4 As shown, the electronic device 40 includes a processor 41 and a memory 42 coupled to the processor 41. The memory 42 stores a computer program, which, when executed by the processor 41, enables the processor 41 to perform the steps of the processor voltage and frequency adjustment method in the above embodiment.

[0083] For other details about how the processor 41 in the electronic device 40 implements the above technical solution, please refer to the description of the processor voltage and frequency adjustment method provided in the above invention embodiment, which will not be repeated here.

[0084] Among them, the processor 41 may be an integrated circuit chip with signal processing capabilities; the processor 41 can also be a general-purpose processor, a digital signal processor, a dedicated integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, wherein the general-purpose processor can be a microprocessor or the processor 41 can also be any conventional processor, etc.

[0085] The embodiment of the present invention further provides a computer-readable storage medium, the structural diagram of which is as follows: Figure 5 As shown, a readable computer program 51 is stored on the storage medium 50. The computer program 51 may be stored in the storage medium in the form of a software product, including instructions for causing a computer device (such as a personal computer, server, or network device) or a processor to execute all or part of the steps of the method described in various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, a mobile hard drive, a magnetic or optical disk, a read-only memory, a random access memory, or a terminal device such as a computer, server, mobile phone, or tablet.

[0086] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0087] The modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules may be selected to achieve the purpose of the present embodiment according to actual needs.

[0088] In addition, the functional modules in the various embodiments of the present application may be integrated into a single processing module, or each module may exist physically separately, or two or more modules may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or in the form of software functional modules. If the integrated modules are implemented in the form of software functional modules and sold or used as independent products, they may be stored in a computer-readable storage medium.

[0089] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented by software, all or part of the embodiments may be implemented in the form of a computer program product.

[0090] The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in accordance with the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that can be stored on a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., a floppy disk, hard disk, or tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0091] The above is a detailed introduction to the technical solution provided by the present application. Specific examples are used in the present application to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for those skilled in the art, according to the ideas of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

[0092] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0093] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices and computer program products according to the present application. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0094] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0095] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0096] Obviously, those skilled in the art may make various changes and modifications to this application without departing from the spirit and scope of this application. Thus, if these modifications and variations of this application fall within the scope of the claims of this application and their equivalents, this application is intended to include these modifications and variations.

Claims

1. A method for adjusting processor voltage and frequency, characterized in that: include: Monitor the client's dynamic voltage and frequency adjustment requests; Obtaining frequency change values and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request; Obtaining a current time point of a core request and a time point of a previous core request of a plurality of processing cores corresponding to the dynamic voltage and frequency adjustment request, and obtaining a timestamp according to the current time point of the core request and the time point corresponding to the previous core request; An arbitration value is determined according to the frequency change value, the timestamp, the preset weight configuration value, and an arbitration calculation formula, and an adjustment order of the voltage and frequency of the multiple processing cores is determined according to the arbitration value. The arbitration calculation formula includes ,in, V is the arbitration value, weight is the preset weight configuration value, is the frequency change value, m is the preset dimension value, T is the timestamp; The frequencies and voltages of the multiple processing cores are adjusted according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores.

2. The processor voltage and frequency adjustment method according to claim 1, wherein: The monitoring of the dynamic voltage and frequency adjustment request of the client includes monitoring the dynamic voltage and frequency adjustment requests of multiple clients; Correspondingly, before obtaining the frequency change values, timestamps and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request, it also includes determining the response order of the dynamic voltage and frequency adjustment request of the client according to the performance requirement modes of the multiple clients, and the performance requirement modes include hardware automatic control performance mode, low power consumption control mode, temperature control mode, power consumption control mode or operating system internal control processing core performance mode.

3. The processor voltage and frequency adjustment method according to claim 1, wherein: The monitoring of dynamic voltage and frequency adjustment requests from multiple clients includes: At each interval preset duration, the client's dynamic voltage and frequency adjustment request is polled once to monitor the dynamic voltage and frequency adjustment requests of multiple clients, or, after receiving the dynamic voltage and frequency adjustment request sent by the client, the monitoring of the dynamic voltage and frequency adjustment request is awakened to monitor the dynamic voltage and frequency adjustment requests of multiple clients.

4. The processor voltage and frequency adjustment method according to claim 1, wherein: Obtaining frequency change values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request includes: The core-requested frequency values and current frequency values of the plurality of processing cores corresponding to the dynamic voltage frequency adjustment request are obtained, and a frequency change value is obtained according to the core-requested frequency values and the current frequency values.

5. The processor voltage and frequency adjustment method according to claim 1, wherein: Adjusting the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores, includes: The frequencies and voltages of the multiple processing cores are adjusted in sequence according to the adjustment order of the voltages and frequencies of the multiple processing cores, as well as the core-requested frequency values and core-requested voltage values of the multiple processing cores. If the core-requested voltage value of the processing core is less than the actual voltage value of the current shared voltage domain of the processing core, the voltage of the processing core is not adjusted.

6. A processor voltage and frequency adjustment device, characterized in that: It includes a monitoring module, a core information acquisition processing module, an adjustment sequence determination module, and an adjustment module; The monitoring module is used to monitor the dynamic voltage and frequency adjustment request of the client; The processing core information acquisition module is configured to acquire frequency change values and preset weight configuration values of multiple processing cores corresponding to the dynamic voltage and frequency adjustment request, and is further configured to acquire a current time point of a core request and a time point of a previous core request of the multiple processing cores corresponding to the dynamic voltage and frequency adjustment request, and acquire a timestamp based on the current time point of the core request and the time point corresponding to the previous core request; The adjustment sequence determination module is configured to determine an arbitration value based on the frequency change value, the timestamp, the preset weight configuration value, and an arbitration calculation formula, and determine the adjustment sequence of the voltage and frequency of the multiple processing cores based on the arbitration value. The arbitration calculation formula includes ,in, V is the arbitration value, weight is the preset weight configuration value, is the frequency change value, m is the preset dimension value, T is the timestamp; The adjustment module is configured to adjust the frequencies and voltages of the multiple processing cores according to the adjustment order of the voltages and frequencies of the multiple processing cores, and the core-requested frequency values and core-requested voltage values of the multiple processing cores.

7. An electronic device comprising a memory and a processor, wherein the memory stores a computer program executable by the processor, wherein: When the processor executes the computer program, the processor voltage and frequency adjustment method according to any one of claims 1 to 5 is implemented.

8. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the processor voltage and frequency adjustment method according to any one of claims 1 to 5 is implemented.

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