A switch tube regulating circuit

Abstract

The present invention relates to the technical field of switching power supply circuits, and in particular to a switching tube regulating circuit. In the switching power supply circuit regulating structure, the output end of a first operational amplifier is connected to the control end of a first sub-power switching tube, and the control end of a second sub-power switching tube is connected to the control end of the first sub-power switching tube through at least one control switching tube; the voltage source end is connected to the voltage output end through the first sub-power switching tube and the second sub-power switching tube respectively; in a capacitance detection circuit, the voltage source end is connected to the first node in turn through a current source and the first switching tube, and is grounded through the second switching tube and a load capacitor; the control end of the first switching tube and the control end of the second switching tube are respectively connected to an associated voltage. The present invention realizes automatic adjustment of the width-to-length ratio of the power switching tube, thereby increasing the application range of the integrated circuit control chip.

Description

Technical Field

[0001] The present invention relates to the technical field of switch power supply circuits, and in particular to a switch tube regulating circuit. Background Art

[0002] The switching power supply circuit structure is used to adjust and stabilize the output voltage. Its specific structure is as follows Figure 1 shown.

[0003] in, Figure 1 The circuit in the box is located inside the integrated circuit control chip. The first operational amplifier ea adjusts the feedback voltage fb to be equal to the reference voltage vref. Therefore, the output voltage At this time, since the resistance values ​​of the first feedback resistor rf1 and the second feedback resistor rf2 are relatively large, and when the circuit is in a stable state, the current flowing through the load capacitor CL is 0A, so at this time, the load current iout is equal to the current flowing through the power switch tube Mp. In the prior art, when the load current iout flowing through the power switch tube Mp is relatively large, after comprehensively considering the current bearing capacity and the adjustment speed of the power switch tube Mp, the width-to-length ratio of the power switch tube Mp is designed to be relatively large. When the load current iout flowing through the power switch tube Mp is relatively small, after comprehensively considering the current bearing capacity and the adjustment speed of the power switch tube Mp, the width-to-length ratio of the power switch tube Mp is designed to be relatively small. Therefore, when the power switch tube Mp has a fixed width-to-length ratio, the size of the load current iout that can flow through the power switch tube Mp is also fixed.

[0004] Therefore, in the above scheme, the integrated circuit control chip of the switching power supply circuit can usually only be used in applications with a load current iout of a single size or with a small range of variation, which greatly limits the application scope of the integrated circuit control chip. Summary of the invention

[0005] The present invention provides a switch tube regulating circuit to solve the problem that the integrated circuit control chip of the switching power supply circuit can usually only be used in applications with a load current of a single size or with a small range of variation, thereby greatly limiting the application scope of the integrated circuit control chip. The technical solution is as follows:

[0006] The switch tube regulating circuit includes a switch power circuit regulating structure and a capacitor value detection circuit; the switch power circuit regulating structure includes at least two sub-power switch tubes, and the at least two sub-power switch tubes include a first sub-power switch tube and a second sub-power switch tube;

[0007] In the switching power supply circuit adjustment structure, the output end of the first operational amplifier is connected to the control end of the first sub-power switch tube, and the control end of the second sub-power switch tube is connected to the control end of the first sub-power switch tube through at least one control switch tube; the voltage source end is connected to the voltage output end through the first sub-power switch tube and the second sub-power switch tube respectively; the voltage output end is grounded through a load capacitor;

[0008] In the capacitance detection circuit, the voltage source end is connected to the first node through the current source and the first switch tube in sequence, and the first node is grounded through the second switch tube and the load capacitor in sequence; the first node is connected to the second node through the fourth operational amplifier, the second operational amplifier and the third operational amplifier in sequence; the voltage on the second node is used to control the conduction state of the at least one control switch tube; the control end of the first switch tube and the control end of the second switch tube are respectively connected to the associated voltage; the associated voltage is switched to a high level when the switch tube adjustment circuit is started, and is switched to a low level after a specified period of time.

[0009] In a possible implementation manner, the first node is connected to the non-inverting input terminal of the fourth operational amplifier, and the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier;

[0010] The output end of the fourth operational amplifier is connected to the inverting input end of the second operational amplifier through a first capacitor, and the non-inverting input end of the second operational amplifier is grounded; the inverting input end of the second operational amplifier is also connected to the output end of the second operational amplifier through a first resistor;

[0011] The output end of the second operational amplifier is connected to the inverting input end of the third operational amplifier through a second resistor, and the non-inverting input end of the third operational amplifier is grounded; the inverting input end of the third operational amplifier is also connected to the output end of the third operational amplifier through a third resistor.

[0012] In a possible implementation manner, a resistance value of the second resistor is equal to a resistance value of the third resistor.

[0013] In a possible implementation, in the switching power supply circuit adjustment structure, the voltage output terminal is connected to the non-inverting input terminal of the first operational amplifier through a first feedback resistor; the non-inverting input terminal of the first operational amplifier is also grounded through a second feedback resistor, and the inverting input terminal of the first operational amplifier is connected to a reference voltage; the voltage output terminal is also grounded through an electrical appliance.

[0014] In a possible implementation manner, when the switch tube adjustment circuit includes N comparators, N D flip-flops, and N control switch tubes, the switch power supply circuit adjustment structure includes N+1 sub-power switch tubes;

[0015] Among them, the Mth comparator, the MDth trigger, the Mth control switch tube and the M+1th sub-power switch tube correspond to each other one by one;

[0016] The inverting input terminal of the Mth comparator is connected to the second node, the non-inverting input terminal of the Mth comparator is connected to the Mth comparison voltage, the output terminal of the Mth comparator is connected to the first input terminal of the MDth trigger; the second input terminal of the MDth trigger is connected to the associated voltage; the output terminal of the MDth trigger is connected to the control terminal of the Mth control switch tube;

[0017] When 1≤M<N, and N≥2, the control end of the M+1th sub-power switch tube is connected to the control end of the M+2th sub-power switch tube through the Mth control switch tube.

[0018] In a possible implementation manner, when 1≤M=N, the control end of the M+1th sub-power switch tube is connected to the control end of the first sub-power switch tube through the Mth control switch tube.

[0019] In a possible implementation, when N≥2, the Mth comparison voltage is less than the M+1th comparison voltage.

[0020] In a possible implementation manner, when the switch tube adjustment circuit includes N comparators, N D flip-flops, and N control switch tubes, the switch power supply circuit adjustment structure includes N+1 sub-power switch tubes;

[0021] Among them, the Mth comparator, the MDth trigger, the Mth control switch tube and the M+1th sub-power switch tube correspond to each other one by one;

[0022] The inverting input terminal of the Mth comparator is connected to the second node, the non-inverting input terminal of the Mth comparator is connected to the Mth comparison voltage, the output terminal of the Mth comparator is connected to the first input terminal of the MDth trigger; the second input terminal of the MDth trigger is connected to the associated voltage; the output terminal of the MDth trigger is connected to the control terminal of the Mth control switch tube;

[0023] When 1≤M≤N, and N≥1, the control end of the M+1th sub-power switch tube is connected to the control end of the Mth sub-power switch tube through the Mth control switch tube.

[0024] In a possible implementation, when N≥2, the Mth comparison voltage is greater than the M+1th comparison voltage.

[0025] In a possible implementation manner, the integrated circuit control chip includes various components in the switch tube regulation circuit described above except for the load capacitor;

[0026] The integrated circuit control chip includes a voltage output pin; the voltage output pin is connected to a load capacitor outside the integrated circuit control chip.

[0027] The technical solution provided by the present invention may include the following beneficial effects:

[0028] The present invention provides a switch tube regulation circuit. First, a corresponding load capacitor is selected according to the size of the load current. After the circuit is powered on, the associated voltage is temporarily switched to a high level. At this time, the corresponding load capacitor is connected to the switch tube regulation circuit to obtain a voltage on the second node that is inversely proportional to the capacitance of the load capacitor. The D trigger obtains a corresponding output voltage according to the size of the voltage on the second node. After a short period of time, the associated voltage is switched to a low level, the first switch tube and the second switch tube are both turned off, and the state of the D trigger output voltage is locked. Afterwards, the output voltage of each D trigger controls the conduction and shutdown of each control switch tube, thereby realizing automatic adjustment of the width-to-length ratio of the power switch tube inside the integrated circuit control chip, so that the power switch tube can have a relatively fast adjustment speed on the basis of matching the load current, thereby increasing the application range of the integrated circuit control chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0030] Figure 1 It is a structural schematic diagram of a switching power supply circuit structure in the related art;

[0031] Figure 2 is a structural schematic diagram of a capacitance detection circuit according to an exemplary embodiment;

[0032] Figure 3 is a waveform diagram of an associated voltage according to an exemplary embodiment;

[0033] Figure 4 is a structural schematic diagram of a switch tube regulating circuit according to an exemplary embodiment;

[0034] Figure 5It is a structural schematic diagram of another switch tube regulation circuit according to an exemplary embodiment. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0036] The present invention provides a switch tube regulating circuit, which can adjust the width-to-length ratio of the power switch tube inside the integrated circuit control chip according to the load current, thereby increasing the application range of the integrated circuit control chip. A switch tube regulating circuit of the present invention includes a switch power supply circuit regulating structure and a capacitor value detection circuit.

[0037] Figure 2 The present invention is a schematic diagram of a capacitance detection circuit according to an exemplary embodiment. In the art, when the load current iout flowing through the power switch tube Mp is large, a large-capacity load capacitor CL is required to stabilize the output voltage vout. When the load current iout flowing through the power switch tube Mp is small, a small-capacity load capacitor CL is required to stabilize the output voltage vout. Therefore, the load current iout is proportional to the capacitance of the load capacitor CL and the width-to-length ratio of the power switch tube Mp. Therefore, at this time, the present invention first obtains the following Figure 2 A capacitance detection circuit is shown.

[0038] like Figure 2 As shown, the capacitance detection circuit includes a current source, a first switch tube Mc1, a second switch tube Mc2, a second operational amplifier ea2, a third operational amplifier ea3, a fourth operational amplifier ea4, a first D trigger D1, a second D trigger D2, a first capacitor ca, a load capacitor CL, a first resistor ra, a second resistor rb, a third resistor rc, a first comparator com1 and a second comparator com2.

[0039] In the capacitance detection circuit, the voltage source terminal vdd is connected to the first node A through the current source and the first switch tube Mc1 in turn, and the first node A is grounded through the second switch tube Mc2 and the load capacitor CL in turn; the first node A is connected to the second node B through the fourth operational amplifier ea4, the second operational amplifier ea2 and the third operational amplifier ea3 in turn; the voltage on the second node B is used to control the conduction state of the at least one control switch tube; the control end of the first switch tube Mc1 and the control end of the second switch tube Mc2 are respectively connected to the associated voltage enx; the associated voltage enx switches to a high level when the switch tube adjustment circuit is started, and switches to a low level after a specified period of time.

[0040] In a possible implementation manner, the first node A is connected to the non-inverting input terminal of the fourth operational amplifier ea4, and the inverting input terminal of the fourth operational amplifier ea4 is connected to the output terminal of the fourth operational amplifier ea4;

[0041] The output end of the fourth operational amplifier ea4 is connected to the inverting input end of the second operational amplifier ea2 through the first capacitor ca, and the non-inverting input end of the second operational amplifier ea2 is grounded; the inverting input end of the second operational amplifier ea2 is also connected to the output end of the second operational amplifier ea2 through the first resistor ra;

[0042] The output end of the second operational amplifier ea2 is connected to the inverting input end of the third operational amplifier ea3 through the second resistor rb, and the non-inverting input end of the third operational amplifier ea3 is grounded; the inverting input end of the third operational amplifier ea3 is also connected to the output end of the third operational amplifier ea3 through the third resistor rc.

[0043] In a possible implementation manner, the resistance value of the second resistor rb is equal to the resistance value of the third resistor rc.

[0044] In a possible implementation, Figure 2 As shown, when the capacitance detection circuit includes two comparators (i.e., the first comparator com1 and the second comparison voltage com2) and two D flip-flops (i.e., the first D flip-flop D1 and the second D flip-flop D2), the second node B is connected to the inverting input terminal of the first comparator com1; the non-inverting input terminal of the first comparator com1 is connected to the first comparison voltage vcomp1; the output terminal of the first comparator com1 is connected to the first input terminal of the first D flip-flop D1; the second input terminal of the first D flip-flop D1 is connected to the associated voltage enx; the output terminal of the first D flip-flop D1 is connected to the control terminal of the first control switch tube Mk1 in the switch power supply circuit adjustment structure;

[0045] The second node B is also connected to the inverting input terminal of the second comparator com2; the non-inverting input terminal of the second comparator com2 is connected to the second comparison voltage vcomp2; the output terminal of the second comparator com2 is connected to the first input terminal of the second D flip-flop D2; the second input terminal of the second D flip-flop D2 is connected to the associated voltage enx; the output terminal of the second D flip-flop D2 is connected to the control terminal of the second control switch tube Mk2 in the switching power supply circuit adjustment structure.

[0046] In a possible implementation manner, the first comparison voltage vcomp1 is smaller than the second comparison voltage vcomp2;

[0047] Alternatively, the first comparison voltage vcomp1 is greater than the second comparison voltage vcomp2.

[0048] based on Figure 2 A capacitance detection circuit, whose working principle can be shown as follows:

[0049] The current source is a current source inside the integrated circuit control chip, which generates a current source current ix. The associated voltage enx is in a normally low state. When the circuit starts working, the associated voltage enx switches from a low level to a high level. The associated voltage enx switches to a high level for a period of time and then switches back to a low level.

[0050] See also Figure 3 The waveform diagram of the associated voltage enx is shown as follows: Figure 3 As shown, after the circuit is started, the associated voltage enx briefly reaches a high level state, causing the first switch tube Mc1 and the second switch tube Mc2 to be turned on. Subsequently, the current ix from the current source flows to the load capacitor CL through the first switch tube Mc1 and the second switch tube Mc2 to charge the load capacitor CL. This charging process causes the voltage vx of the first node A (i.e., the non-inverting input terminal of the fourth operational amplifier ea4) to gradually rise. According to the capacitor charging formula, The fourth operational amplifier ea4 adjusts its output voltage va so that the output voltage va of the fourth operational amplifier ea4 is equal to the voltage vx at the non-inverting input terminal of the fourth operational amplifier ea4.

[0051] because Figure 2In the circuit structure, the non-inverting input terminal of the second operational amplifier ea2 and the non-inverting input terminal of the third operational amplifier ea3 are both grounded. Using the virtual short characteristic of the operational amplifier, it can be seen that the voltage vb of the inverting input terminal of the second operational amplifier ea2 and the voltage vd of the inverting input terminal of the third operational amplifier ea3 are both 0V. Further, according to the virtual short characteristic, the current flowing through the first capacitor ca and the first resistor ra are equal (denoted as ia). Similarly, the current flowing through the second resistor rb and the current flowing through the third resistor rc are also equal (denoted as ib). Since the output voltage of the fourth operational amplifier ea4 is , and the output voltage va gradually increases, so the current ia is generated in the first capacitor ca, and since the voltage vb of the inverting input terminal of the second operational amplifier ea2 is 0V, , , and since the voltage vd of the inverting input terminal of the third operational amplifier ea3 is also 0V, therefore, , it can be deduced that When the resistance value of the third resistor rc is set equal to the resistance value of the second resistor rb, , and because ,therefore, , we can get , it can be deduced that the voltage ve (the voltage on the second node B) is inversely proportional to the capacitance of the load capacitor CL.

[0052] This embodiment sets and analyzes the relationship between the comparison voltage and the capacitance of the load capacitor CL in detail. First, the first comparison voltage vcomp1 is explicitly designed to be smaller than the second comparison voltage vcomp2. When the capacitance of the load capacitor CL is in a smaller range, for example, smaller than the first load capacitance threshold: at this time, the voltage ve will rise to a voltage value that not only exceeds the second comparison voltage vcomp2, but also exceeds the first comparison voltage vcomp1, that is, the voltage ve is greater than the second comparison voltage vcomp2 and greater than the first comparison voltage vcomp1. Therefore, the output voltage vt1 of the first comparator com1 and the output voltage vt2 of the second comparator com2 are both low levels. Subsequently, these low-level signals (output voltage vt1 and output voltage vt2) are respectively sent to the first D flip-flop D1 and the second D flip-flop D2. Due to the characteristics of the D flip-flop, under the action of the clock signal (the falling edge of the associated voltage enx in this example), the output voltage vk1 of the first D flip-flop D1 and the output voltage vk2 of the second D flip-flop D2 are both locked to a low level until the next time the circuit is started and the capacitance of the load capacitor CL is re-evaluated;

[0053] When the capacitance of the load capacitor CL is in a slightly larger range, for example, greater than or equal to the first load capacitance threshold, and less than the second load capacitance threshold: at this time, the voltage ve will rise to a voltage value between the first comparison voltage vcomp1 and the second comparison voltage vcomp2, that is, the second comparison voltage vcomp2 is greater than the voltage ve and greater than the first comparison voltage vcomp1. The first comparator com1 will detect that the voltage ve exceeds the first comparison voltage vcomp1, and the output voltage vt1 of the first comparator com1 is a low level; while the second comparator com2 will detect that the voltage ve does not exceed the second comparison voltage vcomp2, and the output voltage vt2 of the second comparator com2 is a high level. Similarly, these level signals (output voltage vt1 and output voltage vt2) are respectively sent to the first D flip-flop D1 and the second D flip-flop D2. Under the action of the falling edge of the associated voltage enx, the output voltage vk1 of the first D flip-flop D1 is locked at a low level, while the output voltage vk2 of the second D flip-flop D2 is locked at a high level until the next time the circuit is started and the capacitance of the load capacitor CL is re-evaluated; when the capacitance of the load capacitor CL is in a larger range, for example, greater than or equal to the second load capacitance threshold: in this case, the rise of the voltage ve is not enough to exceed the first comparison voltage vcomp1 or the second comparison voltage vcomp2, that is, the second comparison voltage vcomp2 is greater than the first comparison voltage vcomp1 and greater than the voltage ve. Therefore, the output voltage vt1 of the first comparator com1 and the output voltage vt2 of the second comparator com2 are both high-level signals, and these high-level signals (output voltage vt1 and output voltage vt2) are subsequently captured by the first D flip-flop D1 and the second D flip-flop D2, and under the triggering of the falling edge of the associated voltage enx, the output voltage vk1 of the first D flip-flop D1 and the output voltage vk2 of the second D flip-flop D2 are both locked at a high level, until the next time the circuit is started and the capacitance of the load capacitor CL is re-evaluated, the high-level states of vk1 and vk2 will remain unchanged.

[0054] Based on the above switching power supply circuit structure and capacitor value detection circuit, the present invention proposes a switching tube adjustment circuit, the switching power supply circuit adjustment structure includes at least two sub-power switching tubes, the at least two sub-power switching tubes include a first sub-power switching tube Mp0 and a second sub-power switching tube Mp1;

[0055] In the switching power supply circuit regulation structure, the output terminal vg of the first operational amplifier ea is connected to the control terminal of the first sub-power switch tube Mp0, and the control terminal of the second sub-power switch tube Mp1 is connected to the control terminal of the first sub-power switch tube Mp0 through at least one control switch tube; the voltage source terminal vdd is connected to the voltage output terminal through the first sub-power switch tube Mp0 and the second sub-power switch tube Mp1 respectively; the voltage output terminal is grounded through the load capacitor CL.

[0056] In a possible implementation, in the switching power supply circuit adjustment structure, the voltage output terminal is connected to the non-inverting input terminal of the first operational amplifier EA through the first feedback resistor rf1; the non-inverting input terminal of the first operational amplifier EA is also grounded through the second feedback resistor rf2, and the inverting input terminal of the first operational amplifier EA is connected to the reference voltage vref; the voltage output terminal is also grounded through the electrical appliance.

[0057] In a possible implementation manner, when the switch tube adjustment circuit includes N comparators, N D flip-flops, and N control switch tubes, the circuit includes N+1 sub-power switch tubes;

[0058] Among them, the Mth comparator, the MDth trigger, the Mth control switch tube and the M+1th sub-power switch tube correspond to each other one by one;

[0059] The inverting input terminal of the Mth comparator is connected to the second node B, the non-inverting input terminal of the Mth comparator is connected to the Mth comparison voltage, the output terminal of the Mth comparator is connected to the first input terminal of the MDth trigger; the second input terminal of the MDth trigger is connected to the associated voltage enx; the output terminal of the MDth trigger is connected to the control terminal of the Mth control switch tube;

[0060] When 1≤M<N, and N≥2, the control end of the M+1th sub-power switch tube is connected to the control end of the M+2th sub-power switch tube through the Mth control switch tube.

[0061] In a possible implementation manner, when 1≤M=N, the control end of the M+1th sub-power switch tube is connected to the control end of the first sub-power switch tube Mp0 through the Mth control switch tube.

[0062] In a possible implementation, when N≥2, the Mth comparison voltage is less than the M+1th comparison voltage.

[0063] According to the actual needs of the circuit, the present invention can set N comparators, N D flip-flops, N control switch tubes and N+1 sub-power switch tubes in the switch tube adjustment circuit, thereby increasing the adjustment range of the width-to-length ratio of the power switch tube Mp and the application range of the integrated circuit control chip.

[0064] For example, taking the switch tube adjustment circuit including four comparators, four D flip-flops and four control switch tubes as an example, the circuit should include five sub-power switch tubes; that is, N=4 at this time;

[0065] If M indicates the third element, that is, M=3, then the third comparator, the third D flip-flop, the third control switch tube and the fourth sub-power switch tube correspond to each other.

[0066] The inverting input terminal of the third comparator is connected to the second node B, the non-inverting input terminal of the third comparator is connected to the third comparison voltage value, the output terminal of the third comparator is connected to the first input terminal of the third D flip-flop; the second input terminal of the third D flip-flop is connected to the associated voltage enx; the output terminal of the third D flip-flop is connected to the control terminal of the third control switch tube;

[0067] Since M=3<N=4 at this time, the control end of the fourth sub-power switch tube is connected to the control end of the fifth sub-power switch tube through the third control switch tube.

[0068] If 1≤M=N=4, the control end of the fifth sub-power switch tube is connected to the control end of the first sub-power switch tube Mp0 through the fourth control switch tube. At this time, the fourth comparison voltage is less than the fifth comparison voltage.

[0069] See also Figure 4 The schematic diagram of the structure of a switch tube regulation circuit is shown, which includes two comparators, two D flip-flops, two control switch tubes and three sub-power switch tubes as an example. Figure 4 As shown, the at least one control switch tube includes a first control switch tube Mk1 and a second control switch tube Mk2; the at least two sub-power switch tubes include a third sub-power switch tube Mp2 in addition to the first sub-power switch tube Mp0 and the second sub-power switch tube Mp1; wherein the first sub-power switch tube Mp0, the second sub-power switch tube Mp1 and the third sub-power switch tube Mp2 can be connected in parallel to form a power switch tube Mp.

[0070] The control end of the second sub-power switch tube Mp1 is connected to the control end of the third sub-power switch tube Mp2 through the first control switch tube Mk1, and the control end of the third sub-power switch tube Mp2 is connected to the control end of the first sub-power switch tube Mp0 through the second control switch tube Mk2.

[0071] based on Figure 4 A switch tube regulation circuit, its working principle is as follows:

[0072] When the integrated circuit control chip is used in an application where the load current iout is relatively large, for example, greater than or equal to the second load current threshold, at this time, it can be seen from the above analysis that the circuit needs to use a load capacitor CL with a larger capacitance, for example, greater than or equal to the second load capacitance threshold. Therefore, at this time, after the load capacitor CL with a larger capacitance is connected to the switch tube adjustment circuit, the state of the output voltage vk1 of the first D flip-flop D1 is locked to a high level, and the state of the output voltage vk2 of the second D flip-flop D2 is also locked to a high level. At this time, the first control switch tube Mk1 and the second control switch tube Mk2 are both turned on. Therefore, the power switch tube Mp is composed of the first sub-power switch tube Mp0, the second sub-power switch tube Mp1 and the third sub-power switch tube Mp2 connected in parallel, that is, at this time, the width-to-length ratio of the power switch tube Mp is relatively large, for example, greater than or equal to the second width-to-length ratio threshold, so that the power switch tube Mp can flow through a larger load current iout; for example, greater than or equal to the second load current threshold;

[0073] When the integrated circuit control chip is applied to an application where the load current iout is slightly larger, for example, greater than or equal to the first load current threshold and less than the second load current threshold, at this time, it can be seen from the above analysis that the circuit needs to use a load capacitor CL with a slightly larger capacitance, for example, greater than or equal to the first load capacitance threshold and less than the second load capacitance threshold. Therefore, at this time, after the load capacitor CL with a slightly larger capacitance is connected to the switch tube adjustment circuit, the state of the output voltage vk1 of the first D flip-flop D1 is locked to a low level, and the state of the output voltage vk2 of the second D flip-flop D2 is locked to a high level. At this time, the first control switch tube Mk1 is turned off, and the second control switch tube Mk2 is turned on. Therefore, the power switch tube Mp is composed of the first sub-power switch tube Mp0 and the third sub-power switch tube Mp2 connected in parallel, that is, at this time, the width-to-length ratio of the power switch tube Mp is slightly larger, for example, greater than or equal to the first width-to-length ratio threshold, and less than the second width-to-length ratio threshold, so that the power switch tube Mp can flow through a slightly larger load current iout (for example, greater than or equal to the first load current threshold and less than the second load current threshold) and also has a relatively fast adjustment speed;

[0074] When the integrated circuit control chip is used in an application with a small load current iout, for example, less than the first load current threshold, at this time, it can be seen from the above analysis that the circuit needs to use a load capacitor CL with a smaller capacitance, for example, less than the first load capacitance threshold. Therefore, at this time, after the load capacitor CL with a smaller capacitance is connected to the switch tube adjustment circuit, the state of the output voltage vk1 of the first D flip-flop D1 is locked to a low level, and the state of the output voltage vk2 of the second D flip-flop D2 is also locked to a low level. At this time, the first control switch tube Mk1 and the second control switch tube Mk2 are both turned off. Therefore, the power switch tube Mp is only composed of the first sub-power switch tube Mp0, that is, at this time, the width-to-length ratio of the power switch tube Mp is small, for example, less than the first width-to-length ratio threshold, so that the power switch tube Mp has a relatively fast adjustment speed on the basis of flowing a small load current iout (for example, less than the first load current threshold).

[0075] In a possible implementation manner, when the switch tube adjustment circuit includes N comparators, N D flip-flops, and N control switch tubes, the circuit includes N+1 sub-power switch tubes;

[0076] Among them, the Mth comparator, the MDth trigger, the Mth control switch tube and the M+1th sub-power switch tube correspond to each other one by one;

[0077] The inverting input terminal of the Mth comparator is connected to the second node B, the non-inverting input terminal of the Mth comparator is connected to the Mth comparison voltage, the output terminal of the Mth comparator is connected to the first input terminal of the MDth trigger; the second input terminal of the MDth trigger is connected to the associated voltage enx; the output terminal of the MDth trigger is connected to the control terminal of the Mth control switch tube;

[0078] When 1≤M≤N, and N≥1, the control end of the M+1th sub-power switch tube is connected to the control end of the Mth sub-power switch tube through the Mth control switch tube.

[0079] In a possible implementation, when N≥2, the Mth comparison voltage is greater than the M+1th comparison voltage.

[0080] Exemplarily, the switch tube adjustment circuit includes four comparators, four D flip-flops and four control switch tubes, that is, N=4 at this time; wherein, if M indicates the fourth element, that is, M=4 at this time; then the non-inverting input terminal of the fourth comparator is connected to the fourth comparison voltage, and the output terminal of the fourth comparator is connected to the first input terminal of the fourth D flip-flop; the second input terminal of the fourth D flip-flop is connected to the associated voltage enx; the output terminal of the fourth D flip-flop is connected to the control terminal of the fourth control switch tube;

[0081] Since M=N=4 at this time, the control end of the fifth sub-power switch tube is connected to the control end of the fourth sub-power switch tube through the fourth control switch tube. At this time, the fourth comparison voltage is greater than the fifth comparison voltage.

[0082] See also Figure 5 Another schematic diagram of the structure of the switch tube regulation circuit is shown, which includes three comparators, three D flip-flops, three control switch tubes and four sub-power switch tubes as an example. Figure 5 As shown, the at least one control switch tube includes a first control switch tube Mk1, a second control switch tube Mk2 and a third control switch tube Mk3; the at least two sub-power switch tubes, in addition to the first sub-power switch tube Mp0 and the second sub-power switch tube Mp1, also include a third sub-power switch tube Mp2 and a fourth sub-power switch tube Mp3; wherein the first sub-power switch tube Mp0, the second sub-power switch tube Mp1, the third sub-power switch tube Mp2 and the fourth sub-power switch tube Mp3 can be connected in parallel to form a power switch tube Mp.

[0083] The control end of the fourth sub-power switch tube Mp3 is connected to the control end of the third sub-power switch tube Mp2 through the third control switch tube Mk3, the control end of the third sub-power switch tube Mp2 is connected to the control end of the second sub-power switch tube Mp1 through the second control switch tube Mk2, and the control end of the second sub-power switch tube Mp1 is connected to the control end of the first sub-power switch tube Mp0 through the first control switch tube Mk1.

[0084] The second node B is also connected to the inverting input terminal of the first comparator com1; the non-inverting input terminal of the first comparator com1 is connected to the first comparison voltage vcomp1; the output terminal of the first comparator com1 is connected to the first input terminal of the first D trigger D1; the second input terminal of the first D trigger D1 is connected to the associated voltage enx; the output terminal of the first D trigger D1 is connected to the control terminal of the first control switch tube Mk1 in the switching power supply circuit adjustment structure.

[0085] The second node B is also connected to the inverting input terminal of the second comparator com2; the non-inverting input terminal of the second comparator com2 is connected to the second comparison voltage vcomp2; the output terminal of the second comparator com2 is connected to the first input terminal of the second D flip-flop D2; the second input terminal of the second D flip-flop D2 is connected to the associated voltage enx; the output terminal of the second D flip-flop D2 is connected to the control terminal of the second control switch tube Mk2 in the switching power supply circuit adjustment structure.

[0086] The second node B is also connected to the inverting input terminal of the third comparator com3; the non-inverting input terminal of the third comparator com3 is connected to the third comparison voltage vcomp3; the output terminal of the third comparator com3 is connected to the first input terminal of the third D trigger D3; the second input terminal of the third D trigger D3 is connected to the associated voltage enx; the output terminal of the third D trigger D3 is connected to the control terminal of the third control switch tube Mk3 in the switching power supply circuit adjustment structure.

[0087] based on Figure 5 Another switch tube regulation circuit, its working principle can be shown as follows:

[0088] The first comparison voltage vcomp1 is designed to be greater than the second comparison voltage vcomp2 and greater than the third comparison voltage vcomp3. Therefore, when the capacitance of the load capacitor CL is small, for example, smaller than the first load capacitance threshold value, so that the voltage ve is greater than the first comparison voltage vcomp1, greater than the second comparison voltage vcomp2 and greater than the third comparison voltage vcomp3, the output voltage vt1 of the first comparator com1, the output voltage vt2 of the second comparator com2 and the output voltage vt3 of the third comparator com3 are all low levels. After that, the output voltage vt1 of the first comparator com1 is input into the first D flip-flop D1, the output voltage vk1 of the first D flip-flop D1 is low level, the output voltage vt2 of the second comparator com2 is input into the second D flip-flop D2, the output voltage vk2 of the second D flip-flop D2 is also low level, and the output voltage vk3 of the third D flip-flop D3 is also low level. After the associated voltage enx is switched from a high level back to a low level, the state of the output voltage vk1 of the first D flip-flop D1 is locked to a low level, and the states of the output voltage vk2 of the second D flip-flop D2 and the output voltage vk3 of the third D flip-flop D3 are also locked to a low level. At this time, the first control switch tube Mk1, the second control switch tube Mk2 and the third control switch tube Mk3 are all turned off, so the power switch tube Mp is only composed of the first sub-power switch tube Mp0, that is, at this time, the width-to-length ratio of the power switch tube Mp is small, for example, less than the first width-to-length ratio threshold, so that the power switch tube Mp has a relatively fast regulation speed on the basis of a small load current iout (for example, less than the first load current threshold) flowing through it;

[0089] When the capacitance of the load capacitor CL is slightly larger, for example, greater than or equal to the first load capacitance threshold and less than the second load capacitance threshold, so that the first comparison voltage vcomp1 is greater than the voltage ve, greater than the second comparison voltage vcomp2, and greater than the third comparison voltage vcomp3, the output voltage vt1 of the first comparator com1 is high, the output voltage vt2 of the second comparator com2 and the output voltage vt3 of the third comparator com3 are both low, and then the output voltage vt1 of the first comparator com1 is input into the first D flip-flop D1, the output voltage vk1 of the first D flip-flop D1 is high, the output voltage vt2 of the second comparator com2 is input into the second D flip-flop D2, the output voltage vk2 of the second D flip-flop D2 is also low, and the output voltage vk3 of the third D flip-flop D3 is also low, to be associated After the voltage enx switches from a high level back to a low level, the state of the output voltage vk1 of the first D flip-flop D1 is locked at a high level, and the states of the output voltage vk2 of the second D flip-flop D2 and the output voltage vk3 of the third D flip-flop D3 are locked at a low level. At this time, the first control switch tube Mk1 is turned on, and the second control switch tube Mk2 and the third control switch tube Mk3 are turned off. Therefore, the power switch tube Mp is composed of the first sub-power switch tube Mp0 and the second sub-power switch tube Mp1 connected in parallel. That is, at this time, the width-to-length ratio of the power switch tube Mp is slightly larger, for example, greater than or equal to the first width-to-length ratio threshold value and less than the second width-to-length ratio threshold value, so that the power switch tube Mp can flow a slightly larger load current iout (for example, greater than or equal to the first load current threshold value and less than the second load current threshold value) and also has a relatively fast regulation speed;

[0090] When the capacitance of the load capacitance CL is slightly larger, for example, greater than or equal to the second load capacitance threshold and less than the third load capacitance threshold, so that the first comparison voltage vcomp1 is greater than the second comparison voltage vcomp2, greater than the voltage ve, and greater than the third comparison voltage vcomp3, the output voltage vt1 of the first comparator com1 and the output voltage vt2 of the second comparator com2 are high level, and the output voltage vt3 of the third comparator com3 is low level. Afterwards, the output voltage vt1 of the first comparator com1 is input into the first D flip-flop D1, and the output voltage vt2 of the second comparator com2 is input into the second D flip-flop D2. The output voltage vk1 of the first D flip-flop D1 and the output voltage vk2 of the second D flip-flop D2 are high level, and the output voltage vk3 of the third D flip-flop D3 is low level, and the associated voltage enx is switched from high level back to low level. After the voltage level is equalized, the output voltage vk1 of the first D flip-flop D1 and the output voltage vk2 of the second D flip-flop D2 are locked at a high level, and the output voltage vk3 of the third D flip-flop D3 is locked at a low level until the next circuit is started; at this time, the first control switch tube Mk1 and the second control switch tube Mk2 are turned on, and the third control switch tube Mk3 is turned off. Therefore, the power switch tube Mp is composed of the first sub-power switch tube Mp0, the second sub-power switch tube Mp1 and the third sub-power switch tube Mp2 connected in parallel, that is, at this time, the width-to-length ratio of the power switch tube Mp is slightly larger, for example, greater than or equal to the second width-to-length ratio threshold value and less than the third width-to-length ratio threshold value, so that the power switch tube Mp can flow through a slightly larger load current iout (for example, greater than or equal to the second load current threshold value and less than the third load current threshold value) and also has a relatively fast regulation speed;

[0091] When the capacitance of the load capacitor CL is relatively large, for example, greater than or equal to the third load capacitance threshold value, so that the first comparison voltage vcomp1 is greater than the second comparison voltage vcomp2, greater than the third comparison voltage vcomp3, and greater than the voltage ve, the output voltage vt1 of the first comparator com1, the output voltage vt2 of the second comparator com2, and the output voltage vt3 of the third comparator com3 are all high levels. Afterwards, the output voltage vt1 of the first comparator com1 is input into the first D flip-flop D1, the output voltage vk1 of the first D flip-flop D1 is high level, the output voltage vt2 of the second comparator com2 is input into the second D flip-flop D2, the output voltage vk2 of the second D flip-flop D2 is also high level, and the output voltage vk3 of the third D flip-flop D3 is also high level, and the shutdown is pending. After the link voltage enx switches from a high level back to a low level, the state of the output voltage vk1 of the first D flip-flop D1 is locked at a high level, and the states of the output voltage vk2 of the second D flip-flop D2 and the output voltage vk3 of the third D flip-flop D3 are also locked at a high level. At this time, the first control switch tube Mk1, the second control switch tube Mk2 and the third control switch tube Mk3 are all turned on. Therefore, the power switch tube Mp is composed of a first sub-power switch tube Mp0, a second sub-power switch tube Mp1, a third sub-power switch tube Mp2 and a fourth sub-power switch tube Mp3 connected in parallel. That is, at this time, the width-to-length ratio of the power switch tube Mp is relatively large, for example, greater than or equal to the third width-to-length ratio threshold, so that a larger load current iout can flow through the power switch tube Mp, for example, greater than or equal to the third load current threshold.

[0092] In summary, the present invention provides a switch tube regulation circuit. First, a corresponding load capacitor CL is selected according to the size of the load current iout. After the circuit is powered on, the associated voltage enx is temporarily switched to a high level. At this time, the corresponding load capacitor CL is connected to the switch tube regulation circuit to obtain a voltage ve on the second node B that is inversely proportional to the capacitance of the load capacitor CL. The D trigger obtains a corresponding output voltage according to the size of the voltage ve on the second node B. After a short period of time, the associated voltage enx is switched to a low level, the first switch tube Mc1 and the second switch tube Mc2 are both turned off, and the state of the D trigger output voltage is locked. Thereafter, the output voltage of each D trigger controls the conduction and shutdown of each control switch tube, thereby automatically adjusting the width-to-length ratio of the power switch tube inside the integrated circuit control chip, so that the power switch tube can have a relatively fast adjustment speed on the basis of matching the load current iout, thereby increasing the application range of the integrated circuit control chip.

[0093] Based on the above-mentioned switch tube regulation circuit, the present invention also proposes an integrated circuit control chip, which includes various components in the switch tube regulation circuit except the load capacitor; the integrated circuit control chip includes a voltage output pin; the voltage output pin is connected to the load capacitor outside the integrated circuit control chip.

[0094] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the defined scope.

Claims

1. A switch tube regulation circuit, characterized in that: The switch tube regulating circuit includes a switch power circuit regulating structure and a capacitor value detection circuit; the switch power circuit regulating structure includes at least two sub-power switch tubes, and the at least two sub-power switch tubes include a first sub-power switch tube and a second sub-power switch tube; In the switching power supply circuit regulation structure, the output end of the first operational amplifier is connected to the control end of the first sub-power switch tube, and the control end of the second sub-power switch tube is connected to the control end of the first sub-power switch tube through at least one control switch tube; the voltage source end is connected to the voltage output end through the first sub-power switch tube, and the voltage source end is also connected to the voltage output end through the second sub-power switch tube; the voltage output end is grounded through a load capacitor; the voltage output end is connected to the non-inverting input end of the first operational amplifier through a first feedback resistor; the non-inverting input end of the first operational amplifier is also grounded through a second feedback resistor, and the inverting input end of the first operational amplifier is connected to a reference voltage; In the capacitance detection circuit, the voltage source end is connected to the first node through the current source and the first switch tube in sequence, and the first node is grounded through the second switch tube and the load capacitor in sequence; the first node is connected to the second node through the fourth operational amplifier, the second operational amplifier and the third operational amplifier in sequence; the voltage on the second node is inversely proportional to the capacitance of the load capacitor; the control end of the first switch tube and the control end of the second switch tube are respectively connected to the associated voltage; the associated voltage is switched to a high level when the switch tube regulation circuit is started, and is switched to a low level after a specified period of time; when the associated voltage is a high level, the first switch tube and the second switch tube are turned on; when the associated voltage is a low level, the first switch tube and the second switch tube are turned off; the switch tube regulation circuit also includes at least one D trigger; the at least one D trigger is used to obtain the output voltage of the corresponding D trigger according to the voltage on the second node; the output voltage of the D trigger is used to control the on and off of at least one control switch tube.

2. The switch tube regulating circuit according to claim 1, characterized in that: The first node is connected to the non-inverting input terminal of the fourth operational amplifier, and the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the fourth operational amplifier; The output end of the fourth operational amplifier is connected to the inverting input end of the second operational amplifier through a first capacitor, and the non-inverting input end of the second operational amplifier is grounded; the inverting input end of the second operational amplifier is also connected to the output end of the second operational amplifier through a first resistor; The output end of the second operational amplifier is connected to the inverting input end of the third operational amplifier through a second resistor, and the non-inverting input end of the third operational amplifier is grounded; the inverting input end of the third operational amplifier is also connected to the output end of the third operational amplifier through a third resistor.

3. The switch tube regulating circuit according to claim 2, characterized in that: The resistance value of the second resistor is equal to the resistance value of the third resistor.

4. The switch tube regulating circuit according to any one of claims 1 to 3, characterized in that: In the switching power supply circuit adjustment structure, the voltage output terminal is also grounded through an electrical appliance.

5. The switch tube regulating circuit according to claim 4, characterized in that: When the switch tube adjustment circuit includes N comparators, N D flip-flops and N control switch tubes, the switch power supply circuit adjustment structure includes N+1 sub-power switch tubes; Among them, the Mth comparator, the MDth trigger, the Mth control switch tube and the M+1th sub-power switch tube correspond to each other one by one; The inverting input terminal of the Mth comparator is connected to the second node, the non-inverting input terminal of the Mth comparator is connected to the Mth comparison voltage, the output terminal of the Mth comparator is connected to the first input terminal of the MDth trigger; the second input terminal of the MDth trigger is connected to the associated voltage; the output terminal of the MDth trigger is connected to the control terminal of the Mth control switch tube; When 1≤M<N, and N≥2, the control end of the M+1th sub-power switch tube is connected to the control end of the M+2th sub-power switch tube through the Mth control switch tube.

6. The switch tube regulating circuit according to claim 5, characterized in that: When 1≤M=N, the control end of the M+1th sub-power switch tube is connected to the control end of the first sub-power switch tube through the Mth control switch tube.

7. The switch tube regulating circuit according to claim 5, characterized in that: When N≥2, the Mth comparison voltage is less than the M+1th comparison voltage.

8. The switch tube regulating circuit according to claim 4, characterized in that: When the switch tube adjustment circuit includes N comparators, N D flip-flops and N control switch tubes, the switch power supply circuit adjustment structure includes N+1 sub-power switch tubes; Among them, the Mth comparator, the MDth trigger, the Mth control switch tube and the M+1th sub-power switch tube correspond to each other one by one; The inverting input terminal of the Mth comparator is connected to the second node, the non-inverting input terminal of the Mth comparator is connected to the Mth comparison voltage, the output terminal of the Mth comparator is connected to the first input terminal of the MDth trigger; the second input terminal of the MDth trigger is connected to the associated voltage; the output terminal of the MDth trigger is connected to the control terminal of the Mth control switch tube; When 1≤M≤N, and N≥1, the control end of the M+1th sub-power switch tube is connected to the control end of the Mth sub-power switch tube through the Mth control switch tube.

9. The switch tube regulating circuit according to claim 8, characterized in that: When N≥2, the Mth comparison voltage is greater than the M+1th comparison voltage.

10. An integrated circuit control chip, characterized in that: The integrated circuit control chip includes various components in the switch tube regulation circuit according to any one of claims 1 to 9 except the load capacitor; The integrated circuit control chip includes a voltage output pin; the voltage output pin is connected to a load capacitor outside the integrated circuit control chip.

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