Display panel and manufacturing method thereof

Abstract

The present application provides a display panel and a method for manufacturing the same. The display panel includes a peripheral region and a display region, wherein the peripheral region surrounds the display region. The display panel includes: a substrate; a film layer group having multiple film layers, disposed on one side of the substrate; wherein the portion of the film layer group located in the peripheral region is formed with a receiving hole and a first overlapping hole, the receiving hole being provided with a metal barrier layer, the first overlapping hole being provided with a metal overlapping layer, and the receiving hole and the first overlapping hole being spaced apart to disconnect the metal barrier layer from the metal overlapping layer. The present application can effectively improve the ability of the display panel to block water vapor, preventing the edge of the display panel from lighting up due to water vapor intrusion.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for manufacturing the same. Background Art

[0002] In related technologies, organic light-emitting display devices include low-temperature poly-oxide thin-film transistors (LTPO TFTs), which are used instead of low-temperature poly-silicon thin-film transistors (LTPS TFTs) to reduce energy consumption. However, organic light-emitting display devices currently using LTPS TFTs have at least the following problems:

[0003] Organic light-emitting display devices using low-temperature polycrystalline oxide thin-film transistors need to etch away part of the SiNx film layer used to block water vapor due to overall electrical problems. This results in poor water vapor barrier effect of the display device, and the edge area of ​​the display device may not light up due to water vapor intrusion. Summary of the Invention

[0004] In view of this, the present application provides a display panel and a method for manufacturing the same, so as to improve the problem of poor water vapor barrier effect of a display panel using low-temperature polysilicon thin film transistors.

[0005] The technical solutions adopted by this application to solve the above technical problems are:

[0006] In a first aspect, an embodiment of the present application provides a display panel, comprising a peripheral area and a display area, wherein the peripheral area surrounds the display area, and the display panel comprises:

[0007] substrate;

[0008] A film layer group having multiple film layers is provided on one side of the substrate;

[0009] In which, the portion of the film layer group located in the peripheral area is formed with a receiving hole and a first overlapping hole, a metal barrier layer is provided in the receiving hole, a metal overlapping layer is provided in the first overlapping hole, and the receiving hole and the first overlapping hole are spaced apart to disconnect the metal barrier layer from the metal overlapping layer.

[0010] In some embodiments of the present application, the peripheral area includes a peripheral routing area and a peripheral non-routing area, the peripheral routing area is arranged adjacent to the peripheral non-routing area, the accommodating hole is arranged in the peripheral non-routing area, and the first overlapping hole is arranged in the peripheral routing area.

[0011] In some embodiments of the present application, the peripheral non-routing area includes a corner area located at the corner of the display panel and a top area located at the top of the display panel, the peripheral routing area includes a side area and a bottom area located at the bottom of the display panel, the bottom area is arranged opposite to the top area, and the side area is located between the bottom area and the top area; the first overlapping hole is arranged in the bottom area and the side area, and the accommodating hole is arranged in the corner area and the top area.

[0012] In some embodiments of the present application, the bottom wall, side wall and outer side of the accommodating hole are all provided with the metal barrier layer, and the metal barrier layer located on the outer side of the accommodating hole surrounds the edge of the hole opening of the accommodating hole.

[0013] In some embodiments of the present application, a first metal trace and a second metal trace are provided on the side of the film layer group facing away from the substrate, the first metal trace surrounds the display area, the second metal trace surrounds the first metal trace, and the second metal trace is spaced apart from the first metal trace, and a plurality of the accommodating holes and a plurality of the first overlapping holes are provided between the first metal trace and the second metal trace.

[0014] In some embodiments of the present application, the first metal trace and the second metal trace are both spaced apart from the metal barrier layer.

[0015] In some embodiments of the present application, the plurality of accommodating holes are arranged in an array, and the metal barrier layers in adjacent accommodating holes are spaced apart.

[0016] In some embodiments of the present application, the side wall of the accommodating hole is inclined, the inclination angle of the side wall is greater than 90° and less than 135°, the aperture of the accommodating hole is greater than the bottom wall diameter of the accommodating hole, and the first overlapping hole has the same shape as the accommodating hole.

[0017] In some embodiments of the present application, the membrane layer group includes a water-blocking layer, a buffer layer, an active layer and an insulating layer. The water-blocking layer, the buffer layer, the active layer and the insulating layer are stacked in sequence on one side of the substrate. The accommodating hole passes through the insulating layer and the active layer in sequence, and the bottom wall of the accommodating hole is located inside the buffer layer.

[0018] In some embodiments of the present application, the buffer layer includes a silicon oxide layer and a silicon nitride layer, and the silicon nitride layer and the silicon oxide layer are stacked in sequence on the side of the water-blocking layer facing away from the substrate, the accommodating hole passes through the silicon oxide layer and the bottom wall of the accommodating hole is located inside the silicon nitride layer.

[0019] In summary, due to the adoption of the above technical solution, this application has at least the following beneficial effects:

[0020] The embodiment of the present application provides a display panel and a preparation method thereof, which mainly deposits a metal barrier layer in the receiving hole, and uses the metal barrier layer and at least part of the film layer in the film layer group to jointly play the role of resisting water vapor intrusion. In detail, the display panel adopts the structure of a low-temperature polycrystalline silicon thin-film transistor, so that the film layer group that plays the main role of water blocking in the original inorganic barrier layer will be cancelled, resulting in a decrease in the water blocking ability of the display panel. Therefore, the present application opens a receiving hole in the peripheral area and deposits a metal barrier layer in the receiving hole, and uses the metal barrier layer to replace the original film layer group that plays the main role of water blocking, so that the water blocking ability of the display panel is improved to meet the water blocking requirements. In addition, in order to avoid the metal barrier layer in the receiving hole from being electrically connected to the metal overlapping layer in the overlapping hole, this embodiment sets the receiving hole and the first overlapping hole at intervals and disconnects the metal barrier layer from the metal overlapping layer, so that the metal barrier layer does not form electrical interference with the metal overlapping layer, ensuring that the metal overlapping layer can play a normal conductive role. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A schematic diagram of a display panel provided in an embodiment of the present application;

[0022] Figure 2 for Figure 1 Schematic diagram of the enlarged structure of part A;

[0023] Figure 3 for Figure 2 Schematic diagram of the cross-sectional structure of part B.

[0024] Description of reference numerals:

[0025] 100, display panel; 110, substrate; 111, first base; 112, second base; 113, first water vapor barrier layer; 114, second water vapor barrier layer; 120, water blocking layer; 130, buffer layer; 132, silicon oxide layer; 133, silicon nitride layer; 140, insulating layer; 141, accommodation hole; 142, interlayer insulating layer; 143, gate insulating layer; 144, first overlapping hole; 1441, metal overlapping layer; 150, metal barrier layer; 160, first metal trace; 170, second metal trace; 180, second overlapping hole; 190, planarization layer; 1100, active layer; L, peripheral area; L1, peripheral trace area; L11, bottom area; L12, side area; L2, peripheral non-trace area; L21, corner area; L22, top area; M, display area. DETAILED DESCRIPTION

[0026] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0027] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or the number of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise specifically specified.

[0028] In this application, the word “exemplary” is used to mean “serving as an example, instance, or illustration.” Any embodiment described in this application as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0029] See Figures 1 to 3 An embodiment of the present application provides a display panel 100, which includes a peripheral area L and a display area M. The peripheral area L is adjacently disposed around the display area M. The display panel 100 includes:

[0030] substrate 110;

[0031] A film layer group having multiple film layers is provided on one side of the substrate 110;

[0032] Among them, the part of the film layer group located in the peripheral area L is formed with a receiving hole 141 and a first overlapping hole 144, a metal barrier layer 150 is provided in the receiving hole 141, and a metal overlapping layer 1441 is provided in the first overlapping hole 144, and the receiving hole 141 and the first overlapping hole 144 are spaced apart to disconnect the metal barrier layer 150 from the metal overlapping layer 1441.

[0033] The technical solution provided by the present application is mainly to deposit a metal barrier layer 150 in the accommodation hole 141, and use the metal barrier layer 150 and at least part of the film layer in the film layer group to jointly play the role of resisting the invasion of water vapor. In detail, the display panel 100 adopts the structure of a low-temperature polycrystalline silicon thin-film transistor, so that the film layer group that plays the main role of water blocking in the original inorganic barrier layer will be cancelled, resulting in a decrease in the water blocking ability of the display panel 100. Therefore, the present application opens an accommodation hole 141 in the peripheral area L and deposits a metal barrier layer 150 in the accommodation hole 141, and uses the metal barrier layer 150 to replace the original film layer group that plays the main role of water blocking, so that the water blocking ability of the display panel 100 is improved and meets the water blocking requirements. In addition, in order to avoid electrical connection between the metal barrier layer 150 in the accommodating hole 141 and the metal overlapping layer 1441 in the overlapping hole, this embodiment sets the accommodating hole 141 and the first overlapping hole 144 at intervals and disconnects the metal barrier layer 150 from the metal overlapping layer 1441, so that the metal barrier layer 150 will not cause electrical interference to the metal overlapping layer 1441, ensuring that the metal overlapping layer 1441 can play a normal conductive role.

[0034] In some embodiments, the peripheral area L includes a peripheral routing area L1 and a peripheral non-routing area L2. The peripheral routing area L1 is arranged adjacent to the peripheral non-routing area L2. The accommodating hole 141 is arranged in the peripheral non-routing area L2, and is mainly used to deposit the metal barrier layer 150 to improve the water-blocking ability of the display panel 100. The first overlapping hole 144 is arranged in the peripheral routing area L1, and is mainly used to deposit the metal overlapping layer 1441 to realize metal transfer routing between different layers and / or the same layer. Setting the accommodating hole 141 in the peripheral non-routing area L2 can effectively prevent the metal barrier layer 150 in the accommodating hole 141 from being connected to the metal overlapping layer 1441 in the peripheral routing area L1, resulting in a short circuit or other adverse effects in the circuit of the display panel 100.

[0035] Furthermore, the peripheral non-wiring area L2 includes corner areas L21 located at the corners of the display panel 100 and a top area L22 located at the top of the display panel 100. The peripheral wiring area L1 includes a side area L12 and a bottom area L11 located at the bottom of the display panel 100. The bottom area L11 and the top area L22 are arranged opposite each other, and the side area L12 is located between the bottom area L11 and the top area L22. The first overlapping holes 144 are provided in the bottom area L11 and the side area L12, and the receiving holes 141 are provided in the corner areas L21 and the top area L22. By providing the receiving holes 141 in multiple areas, it is beneficial to balance the consumption rate of the etching solution and the average consumption of the etching solution. Specifically, if only overlapping holes are formed in the display panel 100, areas without holes, such as the corner area L21 and the top area L22, do not need to be etched, resulting in etchant retention. This means that the etchant is not consumed in areas without holes, resulting in a higher etchant concentration near these areas than in areas with holes. This causes the etching rate of the overlapping holes near these areas to be higher than that of other areas. Therefore, by consuming the etching solution in multiple areas to form the overlapping holes and the receiving hole 141, it is beneficial to balance the consumption rate of the etching solution.

[0036] It should be noted that the top area L22 generally also includes a blind hole area (not shown in the figure), and a part of the accommodating holes 141 can be opened in the blind hole area, but it is necessary to avoid the area in the blind hole area used to set the camera, that is, the accommodating holes 141 are mainly set in the area of ​​the blind hole area other than the area used to set the camera, so as to avoid the opening of the accommodating holes 141 affecting the setting of the camera.

[0037] In some embodiments, the film layer group includes a water-blocking layer 120, a buffer layer 130, an active layer 1100, and an insulating layer 140. The water-blocking layer 120, the buffer layer 130, the active layer 1100, and the insulating layer 140 are sequentially stacked on one side of the substrate 110. The receiving hole 141 passes through the insulating layer 140 and the active layer 1100 in sequence, and the bottom wall of the receiving hole 141 is located within the buffer layer 130. By utilizing the water-blocking layer 120 and the metal barrier layer 150 to jointly resist water vapor intrusion, the ability of the display panel 100 to resist water vapor intrusion is improved. Specifically, the display panel 100 adopts a low-temperature polycrystalline silicon thin-film transistor structure, which eliminates the film layer group that plays the primary role in water blocking in the original inorganic barrier layer, leaving only the water-blocking layer 120, resulting in a decrease in the water-blocking ability of the display panel 100. Therefore, the present application provides a receiving hole 141 in the peripheral region L and deposits a metal barrier layer 150 within the receiving hole 141. This metal barrier layer 150 replaces the original film layer group that primarily functions as a water barrier, thereby improving the water barrier capability of the display panel 100 and meeting water barrier requirements. Furthermore, because the metal barrier layer 150 is disposed within the receiving hole 141, which is formed by opening a portion of the buffer layer 130, the metal barrier layer 150 can also cooperate with the unetched portion of the buffer layer 130 to effectively block water, thereby enhancing the water vapor barrier effect.

[0038] It should be noted that in related art, the display panel 100 is driven by low-temperature polysilicon thin-film transistors, which require relatively high drive power. However, in terms of water vapor barrier, in addition to the water barrier layer 120, this type of display panel 100 can also be provided with an additional inorganic water barrier layer 120 made of silicon nitride, thereby improving the water barrier capability of the display panel 100 and effectively preventing water vapor intrusion. In the present application, because the display panel 100 uses low-temperature polycrystalline oxide thin-film transistors, the drive power can be significantly reduced, saving energy. However, due to partial changes in the electrical structure of the display panel 100, the additional inorganic water barrier layer 120 made of silicon oxide is eliminated. Compared with related art, the water barrier effect of relying solely on the water barrier layer 120 is not ideal. To this end, the core solution of the present application is to form a plurality of accommodating holes 141 in the peripheral area L and to form a metal barrier layer 150 in the accommodating holes 141. The metal barrier layer 150 is used to replace the inorganic water-blocking layer 120 that has been eliminated, so that the display panel 100 can reduce the driving power while meeting the water vapor blocking requirements.

[0039] In addition, in the display area M of the display panel 100, it is also necessary to open a second overlap hole 180 to electrically connect some metal wiring to the source and drain, and some metal wiring includes but is not limited to data lines. The second overlap hole 180 is formed by etching. In order to make the size and contact area of ​​the multiple second overlap holes 180 basically consistent, it is necessary to improve the uniformity of the developer and the etching solution so that the rate of consumption of the liquid in the center and the edge of the display area M is basically the same. The present application forms a receiving hole 141 by etching the liquid in the peripheral area L, that is, the edge of the display area M, thereby improving the uniformity of the developer and the etching solution and ensuring that the rate of consumption of the liquid in the center and the edge of the display area M is basically the same.

[0040] In some embodiments, a metal barrier layer 150 is provided on the bottom wall, sidewalls, and outer side of the receiving hole 141, and the metal barrier layer 150 located on the outer side of the receiving hole 141 surrounds the edge of the opening of the receiving hole 141. In other words, the metal barrier layer 150 extends along the inner wall of the receiving hole 141 to the outer side of the receiving hole 141 and is deposited on the side of the insulating layer 140 facing away from the substrate 110. This allows the metal barrier layer 150 to be located not only at the bottom of the receiving hole 141 but also attached to the sidewalls of the receiving hole 141 and the opening of the receiving hole 141. This allows the metal barrier layer 150 to block water vapor intrusion not only from the front and back sides of the display panel 100, but also from the sides of the display panel 100, thereby improving the water vapor barrier effect. Furthermore, the metal barrier layer 150 is deposited on the bottom wall and sidewall of the receiving hole 141 . Compared with being deposited only on the bottom wall of the receiving hole 141 , the process precision requirement is lower and the process is simpler.

[0041] Furthermore, the portion of the metal barrier layer 150 extending to the outside of the accommodating hole 141 is disposed around the opening edge of the accommodating hole 141 , which can further reduce the process accuracy of the metal barrier layer 150 deposition and improve the water vapor barrier effect.

[0042] In some embodiments, a first metal trace 160 and a second metal trace 170 are provided on a side of the insulating layer 140 facing away from the substrate 110. The first metal trace 160 surrounds the display area M, while the second metal trace 170 surrounds the first metal trace 160. The second metal trace 170 is spaced apart from the first metal trace 160 to prevent interference between the first and second metal traces 160, 170. Multiple receiving holes 141 with a metal barrier layer 150 deposited therein and multiple first bonding holes 144 with a metal bonding layer 1441 deposited therein are provided between the first and second metal traces 160, 170, to facilitate balancing the consumption rates of the developer and etchant in the display area M and the peripheral area L.

[0043] Furthermore, the first metal trace 160 and the second metal trace 170 are both separated from the metal barrier layer 150 , thereby preventing the first metal trace 160 and the second metal trace 170 from being connected to the metal barrier layer 150 and affecting the normal operation of the circuit of the display panel 100 .

[0044] It should be noted that the first metal trace 160, the second metal trace 170, the metal barrier layer 150, and the metal bonding layer 1441 can all be formed in the same process step. Specifically, after the receiving hole 141 and the first bonding hole 144 are formed, metal wiring is performed on the side of the insulating layer 140 facing away from the substrate 110, so that a portion of the metal wiring is deposited into the receiving hole 141, a portion is located on the insulating layer 140, and a portion is deposited into the first bonding hole 144. Then, the metal wiring outside the receiving hole 141 is removed and the remaining metal wiring is plated, so that the metal wiring is divided into four parts, namely the first metal trace 160, the second metal trace 170, the metal barrier layer 150, and the metal bonding layer 1441. These four metal traces are not connected to each other and do not affect each other.

[0045] It should also be noted that the technical solution provided by the present application will retain the metal barrier layer 150 in the accommodating hole 141. In addition to being able to block water vapor, compared with the related art that requires etching and eliminating the part of the metal wiring located in the accommodating hole 141, the metal barrier layer 150 in the present application does not need to be etched, and the buffer layer 130 will not be etched a second time, thereby avoiding the reduction of the water vapor blocking ability of the display panel 100 due to the etching of the metal wiring.

[0046] In some embodiments, multiple accommodating holes 141 are arranged in an array in corresponding areas. Specifically, multiple accommodating holes 141 are arranged in an array in the corner area L21, multiple accommodating holes 141 are also arranged in an array in the top area, and multiple accommodating holes 141 are also arranged in an array in the blind hole area. Furthermore, the metal barrier layers 150 in adjacent accommodating holes 141 are spaced apart from each other, which helps to improve the uniformity of the distribution of the developer and etching solution and the consistency of the rate at which the developer and etching solution are consumed. The spacing of the metal barrier layers 150 in adjacent accommodating holes 141 can prevent excessive clutter in the peripheral area L of the display panel 100. Of course, in other embodiments, the metal barrier layers 150 in adjacent accommodating holes 141 may also be connected to each other, which is equivalent to etching away only the metal wiring located next to the first metal wiring and the second metal wiring during the process, so that the first metal wiring and the metal barrier layer 150 are disconnected, and the second metal wiring is disconnected from the metal barrier layer 150. This can ensure that the metal barrier layer 150 in the accommodating hole 141 does not affect the circuit operation of the first metal wiring and the second metal wiring, and can also reduce the process difficulty and improve the process efficiency.

[0047] In some embodiments, the receiving hole 141 has a flared shape, which facilitates the deposition of the metal barrier layer 150, improves the adhesion of the metal barrier layer 150 to the sidewalls, bottom wall, and corners of the sidewalls and bottom wall of the receiving hole 141, and reduces the gap between the metal barrier layer 150 and the inner wall of the receiving hole 141. It should be noted that the flared shape of the receiving hole 141 refers to the sidewalls of the receiving hole 141 being inclined, with the angle of the sidewalls being greater than 90° and less than 135°, and the diameter of the hole 141 being larger than the diameter of the bottom wall of the receiving hole 141. During deposition, the metal barrier layer 150 can be deposited along the sidewalls of the receiving hole 141. Due to the gravity acting on the metal barrier layer 150, the metal barrier layer 150 can be closely attached to the inner wall of the receiving hole 141, thereby avoiding excessive gaps between the metal barrier layer 150 and the inner wall of the receiving hole 141, which could affect the water vapor barrier effect.

[0048] In some embodiments, the active layer 1100 is an amorphous silicon layer, the buffer layer 130 includes a silicon oxide layer 131 and a silicon nitride layer 132, the silicon nitride layer 132 and the silicon oxide layer 131 are stacked in sequence on the side of the water-blocking layer 120 facing away from the substrate 110, the receiving hole 141 penetrates the silicon oxide layer 131 and the bottom wall of the receiving hole 141 is located inside the silicon nitride layer 132. The buffer layer 130 is a two-layer inorganic layer structure, both of which can block water vapor, and the silicon nitride layer 132 has the best effect in blocking water vapor. Because the metal barrier layer 150 is located in the accommodating hole 141, it does not need to be etched, so that at least part of the silicon nitride layer 132 can be retained. Compared with the related art, because it is necessary to etch the metal wiring located in the accommodating hole 141, the silicon nitride layer 132 located under the metal wiring will also be etched, and the thickness of the silicon nitride layer 132 will be further thinned. The metal barrier layer 150 in the present application can also protect the silicon nitride layer 132 in the buffer layer 130, thereby preventing the silicon nitride layer 132 from being too thin, resulting in a decrease in the water vapor blocking ability.

[0049] In some embodiments, substrate 110 includes a first base 111, a second base 112, a first water vapor barrier layer 113, and a second water vapor barrier layer 114. The first base 111, the first water vapor barrier layer 113, the second base 112, the second water vapor barrier layer 114, and a water-blocking layer 120 are stacked in this order. The first base 111, the second base 112, the first water vapor barrier layer 113, and the second water vapor barrier layer 114 all function to block water vapor. The water-blocking layer 120 is specifically made of silicon oxide, which provides a certain degree of auxiliary water-blocking effect.

[0050] In some embodiments, the insulating layer 140 includes multiple interlayer insulating layers 142140 and multiple gate insulating layers 143140, which are alternately stacked on the side of the buffer layer 130 facing away from the substrate 110. To form the receiving hole 141, both the multiple interlayer insulating layers 142140 and the multiple gate insulating layers 143140 need to be etched. The etching solution and developer used for etching are the same, and the etching of the multiple interlayer insulating layers 142140, the multiple gate insulating layers 143140, and the buffer layer 130 is performed in the same etching process to ensure the accuracy of the formation of the receiving hole 141 and avoid separate etching processes that may cause misalignment of the holes formed in different layers, resulting in the failure to form the receiving hole 141.

[0051] In some embodiments, the display panel 100 further includes a planarization layer 190. Planarization layer 190 is an organic layer disposed on the side of the insulating layer 140 facing away from the substrate 110 and covers the first metal trace 160, the second metal trace 170, and the metal barrier layer 150. The side of the planarization layer 190 facing away from the substrate 110 is flat, facilitating subsequent processes on the planarization layer 190 and preventing the accommodating hole 141 from interfering with subsequent processes.

[0052] The present application also provides a method for preparing a display panel, the method comprising:

[0053] S1. forming a film layer group on a substrate, wherein the film layer group has multiple film layers;

[0054] S2, etching the portion of the film layer group located in the peripheral area to form a receiving hole and a first overlapping hole;

[0055] S3, depositing a metal barrier layer in the receiving hole, and depositing a metal overlapping layer in the first overlapping hole, wherein the metal barrier layer and the metal overlapping layer are disconnected.

[0056] By utilizing the above-mentioned preparation method, the film layer group in the peripheral region L is provided with a receiving hole 141, and a metal barrier layer 150 is deposited in the receiving hole 141. The metal barrier layer 150 and at least part of the film layer in the film layer group are used together to resist the intrusion of water vapor. In detail, the display panel 100 adopts the structure of a low-temperature polycrystalline silicon thin-film transistor, so that the film layer group that plays the main role of water blocking in the original inorganic barrier layer is eliminated, and only the water blocking layer 120 is retained, resulting in a decrease in the water blocking capability of the display panel 100. Therefore, the present application provides a receiving hole 141 in the peripheral region L and deposits a metal barrier layer 150 in the receiving hole 141, and uses the metal barrier layer 150 to replace the original film layer group that plays the main role of water blocking, thereby improving the water blocking capability of the display panel 100 and meeting the water blocking requirements.

[0057] Wherein, step S3 specifically further includes:

[0058] S31, performing metal wiring on a side of the film layer group facing away from the substrate, wherein a portion of the metal wiring is deposited in the receiving hole and the first overlapping hole;

[0059] S32. Etch the metal wiring to separate the metal wiring into a metal barrier layer, a metal overlapping layer, a first metal trace and a second metal trace. The metal barrier layer is arranged in the accommodating hole, the metal overlapping layer is arranged in the first overlapping hole, the first metal wiring surrounds the display area M, the second metal trace surrounds the first metal trace, and the second metal trace is spaced apart from the first metal trace, and the metal overlapping layer is spaced apart from the metal barrier layer.

[0060] By first setting up metal wiring on the film layer group, a portion of the metal wiring can be located within the receiving hole 141 and the first overlapping hole 144, and then etching the metal wiring. The specific etching location is mainly the part outside the receiving hole 141, so that the metal wiring in the receiving hole 141 is disconnected from the metal wiring outside the receiving hole 141, effectively preventing the metal wiring required for circuit routing from interfering with the metal wiring in the receiving hole 141 that does not require circuit routing. After etching, the metal wiring is divided into four parts, namely the first metal wiring 160, the second metal wiring 170, the metal overlapping layer 1441, and the metal barrier layer 150. These four parts of wiring are all formed in the same process, which can not only ensure the positional accuracy of the formation of each metal wiring and the metal barrier layer 150, but also simplify the process and improve process efficiency.

[0061] It should also be noted that after the first metal trace 160, the second metal trace 170, the metal overlap layer 1441 and the metal barrier layer 150 are formed, the first metal trace 160, the second metal trace 170, the metal overlap layer 1441 and the metal barrier layer 150 can be coated separately, or coated before etching and then etched to achieve protection of the metal traces, the metal overlap layer 1441 and the metal barrier layer 150.

[0062] This application uses specific terms to describe the embodiments of this application. For example, "one embodiment," "an embodiment," and / or "some embodiments" refer to a certain feature, structure, or characteristic associated with at least one embodiment of this application. Therefore, it should be emphasized and noted that "one embodiment," "an embodiment," or "an alternative embodiment" mentioned twice or multiple times in different locations in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application may be appropriately combined.

[0063] Similarly, it should be noted that, in order to simplify the description of this application and thus facilitate understanding of one or more embodiments of the application, the foregoing description of the embodiments of this application sometimes combines multiple features into a single embodiment, figure, or description thereof. However, this disclosure method does not mean that the subject matter of this application requires more features than those recited in the claims. In fact, the features of an embodiment may be fewer than all the features of the individual embodiments disclosed above.

Claims

1. A display panel, characterized in that: The display panel includes a peripheral area and a display area, wherein the peripheral area surrounds the display area, and the display panel includes: substrate; A film layer group having multiple film layers is provided on one side of the substrate; The portion of the film layer group located in the peripheral area is formed with a receiving hole and a first overlapping hole, a metal barrier layer is provided in the receiving hole, a metal overlapping layer is provided in the first overlapping hole, and the receiving hole and the first overlapping hole are spaced apart to disconnect the metal barrier layer from the metal overlapping layer; The peripheral area includes a peripheral routing area and a peripheral non-routing area. The peripheral routing area is adjacent to the peripheral non-routing area. The accommodating hole is provided in the peripheral non-routing area. The first overlapping hole is provided in the peripheral routing area.

2. The display panel according to claim 1, wherein The peripheral non-routing area includes a corner area located at the corner of the display panel and a top area located at the top of the display panel. The peripheral routing area includes a side area and a bottom area located at the bottom of the display panel. The bottom area is arranged opposite to the top area, and the side area is located between the bottom area and the top area. The first overlapping hole is arranged in the bottom area and the side area, and the accommodating hole is arranged in the corner area and the top area.

3. The display panel according to any one of claims 1 to 2, wherein: The bottom wall, the side wall and the outer side of the accommodating hole are all provided with the metal barrier layer, and the metal barrier layer located on the outer side of the accommodating hole surrounds the edge of the hole opening of the accommodating hole.

4. The display panel according to any one of claims 1 to 2, wherein: A first metal trace and a second metal trace are provided on the side of the film layer group facing away from the substrate. The first metal trace surrounds the display area, the second metal trace surrounds the first metal trace, and the second metal trace is spaced apart from the first metal trace. A plurality of the accommodating holes and a plurality of the first overlapping holes are provided between the first metal trace and the second metal trace.

5. The display panel according to claim 4, wherein: The first metal trace and the second metal trace are both spaced apart from the metal barrier layer.

6. The display panel according to claim 4, wherein: The metal barrier layers in adjacent accommodating holes are spaced apart.

7. The display panel according to any one of claims 1 to 2, wherein: The side wall of the accommodating hole is inclined, and the inclination angle of the side wall is greater than 90° and less than 135°. The aperture of the accommodating hole is greater than the bottom wall diameter of the accommodating hole, and the first overlapping hole has the same shape as the accommodating hole.

8. The display panel according to claim 1, wherein: The membrane layer group includes a water-blocking layer, a buffer layer, an active layer and an insulating layer. The water-blocking layer, the buffer layer, the active layer and the insulating layer are stacked in sequence on one side of the substrate. The accommodating hole passes through the insulating layer and the active layer in sequence, and the bottom wall of the accommodating hole is located inside the buffer layer.

9. The display panel according to claim 8, wherein: The buffer layer includes a silicon oxide layer and a silicon nitride layer, which are sequentially stacked on the side of the water-blocking layer away from the substrate. The accommodating hole penetrates the silicon oxide layer and the bottom wall of the accommodating hole is located inside the silicon nitride layer.

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