Efuse control method, electronic device and storage medium

Abstract

The embodiment of the present application relates to the field of communication technology, and discloses an Efuse control method, an electronic device, and a storage medium. The method of the present application includes: obtaining a target request of an application; the application is test software or product software; the target request is an access request or a burning request; when the application is product software and the target request is the burning request, burning at least one corresponding information bit in the Efuse memory according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits. In this embodiment, by setting an information bit composed of a plurality of bits, when the product software initiates a burning request, the corresponding at least one information bit in the Efuse memory is burned according to the operation address corresponding to the burning request, thereby improving the success rate of burning the Efuse memory after productization.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of communication technology, and in particular to an Efuse control method, an electronic device, and a storage medium. Background Art

[0002] At present, electronic fuse (Efuse) memory is generally used in the chip testing phase to save various production and test data, as well as some control information for later use. In related technologies, usually in a test scenario, all the data to be written into the Efuse memory is prepared, the test equipment is connected to the Efuse memory, and all the data is burned into the Efuse memory through the test equipment.

[0003] However, after the chip is commercialized, there is also an application demand for burning efuse to record information. However, after the chip is commercialized, its burning faces two major problems: one is that the power quality during burning is not as good as the power quality before testing and product release; the other is that the demand for security is getting higher and higher, and security control is becoming more and more important, especially when it comes to burning sensitive data. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide an Efuse control method, an electronic device, and a storage medium, so as to improve the success rate of Efuse memory burning after productization.

[0005] To solve the above technical problems, an embodiment of the present application provides an Efuse control method, which is applied to an Efuse controller, and the method includes: obtaining a target request of an application; the application is test software or product software; the target request is an access request or a burning request; when the application is product software and the target request is the burning request, burning at least one corresponding information bit in the Efuse memory according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits.

[0006] An embodiment of the present application also provides an Efuse control method, which is applied to a processing module running an application, wherein the application is test software or product software; the method comprises: sending a target request to an Efuse controller, wherein the target request is an access request or a burn request; and the Efuse controller burns at least one corresponding information bit in the Efuse memory according to the operation address information carried by the target request when the application is the product software and the target request is the burn request; wherein the information bit is composed of a plurality of bits.

[0007] An embodiment of the present application also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the Efuse control method as described above.

[0008] An embodiment of the present application further provides a computer-readable storage medium storing a computer program, wherein the computer program implements the Efuse control method as described above when executed by a processor.

[0009] In some embodiments, the method further includes: when the application is the test software and the target request is the burning request, burning at least one corresponding bit in the Efuse memory according to the operation address information carried by the target request.

[0010] In some embodiments, the Efuse controller is connected to a bus through a register interface, the processing module running the application is connected to the bus through a corresponding access channel, and the Efuse controller is also connected to a security register; the security register stores a first information value of a first control bit in the Efuse memory; the first information value corresponds to the access channel of the application, and the first information value is used to control the opening or closing of the access channel of the application; the method also includes: obtaining the first information value from the security register; determining whether the access channel of the application is opened or closed according to the first information value through the register interface; and when the access channel of the application is opened, executing the step of obtaining the target request of the application.

[0011] In some embodiments, there are multiple applications, and the processing module corresponding to each application is connected to the bus through a corresponding access channel; there are multiple first information values, and the access channels of multiple applications correspond one-to-one to the multiple first information values; when the access channel of the application is turned on, the step of obtaining the target request of the application is performed, including: when the access channel of the target application among the multiple applications is turned on, obtaining the target request of the target application.

[0012] In some embodiments, the security register also stores a second information value of a second control bit in the Efuse memory; the second information value corresponds to the application, and the second information value indicates the read and write permissions of the application to the Efuse memory; the method also includes: obtaining the second information value from the security register; determining the read and write permissions of the application to the Efuse memory according to the second information value through the register interface; after obtaining the target request of the application, it also includes: opening the read and write area corresponding to the Efuse memory according to the read and write permissions.

[0013] In some embodiments, the method further includes: when the Efuse memory is powered on, the Efuse controller reads the first information value of the first control bit and / or the second information value of the second control bit in the Efuse memory, and saves them to the security register.

[0014] The technical solution provided by the embodiments of the present application has at least the following advantages:

[0015] This embodiment sets an information bit composed of multiple bits. When the product software initiates a burning request, at least one corresponding information bit in the Efuse memory is burned according to the operation address corresponding to the burning request, thereby providing multi-bit redundant burning during the burning process of the productized Efuse memory, thereby improving the success rate of burning the Efuse memory after productization. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0017] Figure 1 is a flow chart of an Efuse control method according to an embodiment of the present application;

[0018] Figure 2 is a schematic diagram of the area division of the Efuse memory according to an embodiment of the present application;

[0019] Figure 3 is a flow chart of an Efuse control method according to an embodiment of the present application;

[0020] Figure 4 It is a schematic diagram of the connection relationship between the Efuse controller, the bus, and the security register according to an embodiment of the present application;

[0021] Figure 5is a flow chart of an Efuse control method according to an embodiment of the present application;

[0022] Figure 6 is a flow chart of an Efuse control method according to an embodiment of the present application;

[0023] Figure 7 is a flow chart of an Efuse control method according to an embodiment of the present application;

[0024] Figure 8 is a flow chart of an Efuse control method according to an embodiment of the present application;

[0025] Fig. 9 It is a structural schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] Before the chip leaves the factory, the chip manufacturer usually burns chip-related information (such as chip identification, power supply voltage that the chip can use, frequency of key clocks, chip production date and other data) into the Efuse memory. In related technologies, usually in a test scenario, all the data to be written into the Efuse memory is prepared, the test equipment is connected to the Efuse memory, and all the data is burned into the Efuse memory through the test equipment.

[0027] However, after the chip is commercialized, there is also an application demand for burning Efuse to record information. However, since the Efuse memory burning process has high requirements for power quality, in order to achieve reliable burning in the test scenario, a stable power supply is usually used to provide stable voltage and current for burning in the test phase; but the power quality during burning is not as good as the power quality before testing and product release, and it cannot provide stable voltage and current for burning Efuse memory, thus affecting the success rate of Efuse memory burning. In addition, the need for security is getting higher and higher, and security control is becoming more and more important, especially when it comes to burning sensitive data.

[0028] Therefore, the present application provides an Efuse control method, which is applied to an Efuse controller, and the method includes: obtaining a target request of an application; the application is test software or product software; the target request is an access request or a burning request; when the application is product software and the target request is a burning request, burning at least one corresponding information bit in the Efuse memory according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits.

[0029] This embodiment sets an information bit composed of multiple bits. When the product software initiates a burning request, at least one corresponding information bit in the Efuse memory is burned according to the operation address corresponding to the burning request, thereby providing multi-bit redundant burning during the burning process of the productized Efuse memory, thereby improving the success rate of burning the Efuse memory after productization.

[0030] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not be construed as any limitation, and the various embodiments can be combined and referenced with each other under the premise of no contradiction.

[0031] An embodiment of the present application relates to an Efuse control method applied to an Efuse controller. The specific flow chart is as follows: Figure 1 As shown, the Efuse control method includes the following steps:

[0032] Step 101, obtaining the target request of the application.

[0033] Specifically, the execution subject of this embodiment is the Efuse controller, which is connected to the Efuse memory and to the current application through a bus. The Efuse controller is used to receive a target request of the current application through the bus.

[0034] Among them, the application is test software or product software; the target request is an access request or a burning request; when the Efuse memory is in the testing stage, the application is test software, and after the Efuse memory is productized, the application is product software; in the testing stage, the test software can send access requests or burning requests to the Efuse controller, and in the product stage, the product software can send access requests or burning requests to the Efuse controller.

[0035] Step 102: When the application is product software and the target request is a programming request, programming is performed on at least one corresponding information bit in the electronic fuse memory according to the operation address information carried by the target request.

[0036] Specifically, the information bit is composed of multiple bits combined, such as Figure 2As shown, it is a schematic diagram of the area division of the Efuse memory of this embodiment. The Efuse memory includes a writable area (single-bit single information bit) in the test phase, a multi-bit mapping information bit area for secure online writing (multi-bit single information bit), a readable area that is only initialized securely in the product application phase, and an accessible area that is only initialized non-securely in the product application phase (single-bit single information bit), wherein one information bit in the multi-bit mapping information bit area is composed of multiple bits, and the multiple bits can be continuous or discontinuous; when the Efuse memory is in the test phase, the test software can perform single-bit programming on the writable area in the test phase. After the Efuse memory is commercialized, the product software can perform multi-bit single-information programming on the multi-bit mapping information bit area for secure online writing. In the test phase, the readable area that is only initialized securely in the product application phase and the accessible area that is only initialized non-securely in the product application phase can also be programmed with a single bit. In the productization phase, the multi-bit information bits of the readable area that is only initialized securely in the product application phase can also be programmed with only securely in the product application phase, as long as the corresponding permissions are met. The Efuse memory is a non-volatile one-time programmable memory. The default value of each bit in the Efuse memory is "0". The specified bit can be changed to "1" through programming (burning), but once modified, it can no longer be restored from "1" to "0".

[0037] Specifically, the characteristics of the multiple regions of the Efuse memory may be specified in the product design stage, or the characteristics of these regions may be divided by burning at a later stage.

[0038] Specifically, after the Efuse memory is commercialized, the application program is the product software. When the product software sends a programming request to the Efuse controller through the bus, the corresponding area is searched in the Efuse memory according to the operation address information carried in the programming request. If the corresponding area found in the Efuse memory according to the operation address information is a multi-bit mapping information bit area for secure online programming, at least one information bit in the multi-bit mapping information bit area for secure online programming in the Efuse memory is programmed. This is reliability programming. If the corresponding area found in the Efuse memory according to the operation address information is other areas, such as a programmable area in the test phase, a readable area that is only securely initialized in the product application phase, and an accessible area that is only non-securely initialized in the product application phase, single-bit single-information bit programming is performed in other areas. This is non-reliability programming.

[0039] When multiple bits of information need to be programmed, the Efuse controller will program multiple bits corresponding to the information bits in sequence. Finally, as long as one of the bits is programmed successfully, it means that the information bit has been programmed successfully. By mapping multiple bits to one information bit, the programming fault tolerance rate is improved, and the programming reliability can be guaranteed even when the power quality fluctuates during programming. At the same time, the software side checks the system power quality before initiating a programming request, further improving the programming reliability.

[0040] Specifically, the information bits of the multi-bit mapping information bit area for secure online programming are composed of multiple bits. The more bits included in the information bits, the higher the success rate of the information bit programming. This embodiment can improve the success rate of Efuse memory programming by setting as many information bits as possible.

[0041] Specifically, when the target request initiated by the test software or the product software is an access request, the Efuse memory is accessed according to the access address information carried by the target request.

[0042] This embodiment sets an information bit composed of multiple bits. When the product software initiates a burning request, at least one corresponding information bit in the Efuse memory is burned according to the operation address corresponding to the burning request, thereby providing multi-bit redundant burning during the burning process of the productized Efuse memory, thereby improving the success rate of burning the Efuse memory after productization.

[0043] After step 101, i.e., obtaining the target request of the application, it also includes: when the application is test software and the target request is a burning request, burning at least one corresponding bit in the Efuse memory according to the operation address information carried by the target request. Specifically, during the burning of the Efuse memory in the test phase, the power quality is good and the burning reliability is high. Therefore, when the Efuse memory is in the test phase, the test software can burn a single bit of the burnable area in the test phase, or burn a single bit of the readable area that is only securely initialized in the product application phase and the accessible area that is only non-securely initialized in the product application phase, without the need for multi-bit redundant burning.

[0044] In actual applications, during the burning process of the Efuse memory test phase, all areas in the Efuse memory are in an unburned state, wherein the Efuse memory pre-stores corresponding information of control bits, which are used to secondary control the opening state of the corresponding access channel of the application and whether the application has read and write permissions to certain areas. Most of these control bits are in an unburned state, which is 0. At this time, the permissions of the Efuse memory are open, and any application software can burn it, with the maximum open permissions; wherein, the control bits have been determined during chip design, that is, some control bits are used to cut off the access channel, and other control bits are used to control the permissions of the secondary burning area of ​​the EFUSE memory.

[0045] When the Efuse memory enters the test phase of burning, the data bits of the corresponding area in the Efuse memory can be burned, and these control bits can also be burned to change the control bits from 0 to 1, that is, to close certain access channels or the read and write permissions of certain areas, and the process is irreversible, thus forming secondary control. These changed control bits are used to limit the opening state of the corresponding access channels of the application and the read and write permissions of the application to certain areas; when the Efuse memory needs to be burned after commercialization, the Efuse memory is powered on, and the Efuse controller first reads the information values ​​of these control bits, including the above-mentioned changed control bits and the unchanged control bits, According to the information value of the control bit, the opening state of the access channel corresponding to the application and the read and write permissions of the application to certain areas are secondary controlled; if the corresponding access channel of the current product software is opened and has read and write permissions to some areas of the Efuse memory, the current product software can burn some areas of the Efuse memory. At this time, the data bits of the corresponding areas in the Efuse memory can be burned, and the unburned control bits in these areas can also be burned, so as to continue to limit the opening state of the access channel corresponding to the application and whether the application has read and write permissions to certain areas; then the Efuse memory is powered off and then powered on, and the above process is repeated. It should be noted that in the process of continuous burning of the Efuse memory, the control bit is continuously burned, changing from 0 to 1, and the permissions opened by the Efuse memory are gradually reduced until no application can burn the Efuse memory.

[0046] Another embodiment of the present application relates to an Efuse control method applied to an Efuse controller. The specific flow chart is as follows: Figure 3 As shown, the Efuse control method includes the following steps:

[0047] Step 201: Obtain a first information value from a security register.

[0048] Specifically, the execution subject of this embodiment is the Efuse controller. The connection relationship between the Efuse controller of this embodiment and the bus and the security register is as follows: Figure 4 As shown, the Efuse controller, i.e., the electronic fuse controller 10, is connected to the bus through a register interface, the processing module 40 running the application is connected to the bus through the corresponding access channel, the electronic fuse controller 10 is connected to the Efuse memory, i.e., the electronic fuse memory 20, and the electronic fuse controller 10 is also connected to the security register 30, and sends the information value read from the electronic fuse memory 20 to the security register 30, and the security register 30 can return the information value to the register interface of the electronic fuse controller 10, so as to provide different permission burning and access control in different application stages of the Efuse memory through the register interface. Among them, the register interface can be connected through JTAG, SPI, I2C, etc.; however, the register interface is not limited to JTAG, SPI, I2C, the bus is not limited to ARM, AMBA bus, and the bus interface is not limited to AXI, AHI, APB, etc.

[0049] Specifically, the security register stores a first information value of a first control bit in the Efuse memory; the first information value corresponds to an access channel of the application program, and the first information value is used to control whether the access channel of the application program is turned on or off.

[0050] Step 202: Determine whether the access channel of the application is turned on or off according to the first information value through the register interface.

[0051] Step 203: When the access channel of the application is enabled, the target request of the application is obtained.

[0052] Step 204: When the application is product software and the target request is a programming request, programming is performed on at least one corresponding information bit in the electronic fuse memory according to the operation address information carried by the target request.

[0053] Step 203 and step 204 are the same as step 101 and step 102, and will not be described again to avoid repetition.

[0054] Specifically, the initial rights of the Efuse memory are open (most of the control bits are 0), and most applications can be burned. However, as the control bits are burned (changed from 0 to 1), some rights are turned off. When the Efuse memory is powered off and then on again, and the control process is re-entered, the burned control bits will close some access channels and some areas that can be burned a second time. That is, the control bits burned later determine whether subsequent applications can be burned. For example, after the test phase is completed, the control bits of the test software have been burned. In the later stage of the product, it is impossible to return to the test or assembly stage, and the test software is not allowed to burn any area again, because the control bits of the corresponding test software have been burned, and these rights can only be opened for the product application phase. Figure 4 As shown, if the test assembly stage of the electronic fuse memory 20, the test software passes Figure 4 The first processing module 40 from left to right initiates the burning task. For example, the processing module 40 initiates the burning task through the JTAG method, and then changes the information value of the control bit of the access channel corresponding to the processing module 40 to 1. After the subsequent electronic fuse memory 20 is commercialized, the burning task issued by the first processing module 40 is cut off, and the test software can no longer initiate burning.

[0055] according to Figure 4 It can be seen that the number of applications can be multiple, and the corresponding number of processing modules 40 is multiple, but the application that sends the target request to the electronic fuse controller 10 can be a part of them. In order to achieve the safe burning or access of the target request sent by the current application, the first information value of the communication channel corresponding to the application that has not sent the target request to the electronic fuse controller 10 also needs to be obtained, so that the electronic fuse controller 10 determines whether to open or close the communication channels corresponding to these applications.

[0056] Therefore, another embodiment of the present application relates to an Efuse control method, which is applied to an Efuse controller. The specific flow chart is as follows: Figure 5 As shown, the Efuse control method includes the following steps:

[0057] Step 301: Obtain a first information value from a security register.

[0058] Specifically, there are multiple applications, and the processing module corresponding to each application is connected to the bus through a corresponding access channel, and the processing module corresponding to each application is different; there are multiple first information values, and the access channels of multiple applications correspond one-to-one to multiple first information values.

[0059] Specifically, when the Efuse memory of this embodiment is powered on, the Efuse controller reads the first information value of the first control bit in the Efuse memory and saves it to the security register. The Efuse memory power-on process can be performed at any time during the test phase and the product phase. When the Efuse memory is powered on, the Efuse controller parses the Efuse memory and obtains the information value of the control bit, thereby controlling the subsequent software initialization process or hardware behavior.

[0060] In terms of secure and non-secure access control, this embodiment realizes that the key control bits in the Efuse memory are automatically read to the security register when powered on. The security register can also reversely control the register interface to control the programming access rights of subsequent test software and application software, thereby realizing secure or non-secure access control.

[0061] Step 302: Determine whether the access channel of the application is turned on or off according to the first information value through the register interface.

[0062] Specifically, when there are multiple applications, each first information value is used to control the opening or closing of the access channel of the corresponding application. Among them, the application that sends the target request to the Efuse controller is the target application. When the Efuse controller determines that the access channel of the target application is opened according to the first information value of the target application, the Efuse controller can obtain the target request of the target application. Other applications can determine whether the access channel is opened or closed according to the corresponding first information value, thereby eliminating the interference of non-safe applications and realizing safe burning and access of the target application.

[0063] Specifically, the application may be allowed to run in an insecure execution environment. Some insecure execution environments may also be application scenarios that can be burned, that is, the product software can be provided with the permission to burn without the help of security permissions. In this case, there is no need to determine whether the access channel of the application is enabled through the above-mentioned first information value, and all access channels can be enabled. If the application's secure execution environment requirements are high, the application may only be allowed to run in a secure execution environment, that is, the product software can be provided with the permission to burn with the help of security permissions. In this case, it is necessary to determine whether the access channel of the application is enabled through the above-mentioned first information value, so that only the access channels that are allowed to be enabled will be enabled, and the prohibited access channels will be closed.

[0064] Step 303 : when the access channel of the target application program among the multiple applications is opened, obtain the target request of the target application program.

[0065] Step 304: When the target application is product software and the target request is a programming request, programming is performed on at least one corresponding information bit in the electronic fuse memory according to the operation address information carried in the target request.

[0066] Step 303 and step 304 are substantially the same as step 101 and step 102 of the previous embodiment, and will not be described again to avoid repetition.

[0067] Another embodiment of the present application relates to an Efuse control method applied to an Efuse controller. The specific flow chart is as follows: Figure 6 As shown, the Efuse control method includes the following steps:

[0068] Step 401: Obtain a first information value from a security register.

[0069] Step 402: Obtain a second information value from a security register.

[0070] The execution order of step 401 and step 402 is not limited. The first information value and the second information value may be obtained at the same time, or the first information value or the second information value may be obtained first.

[0071] Specifically, the execution subject of this embodiment is the Efuse controller. The connection relationship between the Efuse controller of this embodiment and the bus and the security register is as follows: Figure 4 As shown, the Efuse controller is connected to the bus through a register interface, the processing module 40 running the application is connected to the bus through a corresponding access channel, and the Efuse controller is also connected to a security register.

[0072] Specifically, the security register not only stores the first information value of the first control bit in the Efuse memory, but also stores the second information value of the second control bit in the Efuse memory; the second information value corresponds to the application, and the second information value indicates the application's read and write permissions for the Efuse memory.

[0073] Specifically, when the Efuse memory of this embodiment is powered on, the Efuse controller reads the first information value of the first control bit and the second information value of the second control bit in the Efuse memory, and saves them to the security register. Among them, the Efuse memory power-on process can be at any time in the test phase and the product phase. When the Efuse memory is powered on, the Efuse controller parses the Efuse memory and obtains the information value of the control bit, including the first information value of the first control bit and the second information value of the second control bit, so as to control the subsequent software initialization process or hardware behavior.

[0074] During the power-on phase of the Efuse memory of this embodiment, the Efuse controller needs to automatically read the contents of the key control bits in the Efuse memory. The control bits also include information bits that map multiple bits to 1 bit of information. This process also needs to identify the information bits that map multiple bits to 1 bit of information, and put the merged mapped information values ​​into security registers. These security registers are parsed by subsequent secure boot codes and control the secure boot process. These security registers are also used to control the register interface of efuse to achieve secure or non-secure controllable access.

[0075] Specifically, after the Efuse memory is manufactured, two types of control are performed on the application. One is to determine whether the application can burn or access the Efuse memory, which is controlled by the first information bit of the first control bit; the other is to determine the application's read and write permissions for each area of ​​the Efuse memory, that is, which segments of the Efuse memory can be read and written and which segments cannot be read and written, which is controlled by the second information bit of the second control bit.

[0076] Step 403: Determine whether the access channel of the application is turned on or off according to the first information value through the register interface.

[0077] Step 404: Determine the read and write permissions of the application program to the electronic fuse memory according to the second information value through the register interface.

[0078] The execution order of step 403 and step 403 is not limited. Step 403 and step 403 may be acquired at the same time, or step 403 may be executed first or step 403 may be executed first.

[0079] Step 405: When the access channel of the application is enabled, the target request of the application is obtained.

[0080] Step 406: open the read / write area corresponding to the electronic fuse memory according to the read / write permission.

[0081] Specifically, the read and write permissions include information about the burning area of ​​the Efuse memory that is open or prohibited for the application, and information about the access area that is open or prohibited for the application. The read and write permissions of the application are determined by a second information value, which is set in a second control bit corresponding to the Efuse memory, and the second control bit is used to store information corresponding to the read and write permissions of the application.

[0082] Step 407: When the application is product software and the target request is a programming request, programming is performed on at least one corresponding information bit in the electronic fuse memory according to the operation address information carried in the target request.

[0083] Specifically, whether it is test software or product software, when the operation address information carried by the burning request is consistent with the read-write area of ​​the Efuse memory opened according to the read-write permission, the Efuse controller directly burns the Efuse memory according to the operation address information carried by the burning request; when the operation address information carried by the burning request is inconsistent with the read-write area of ​​the Efuse memory opened according to the read-write permission, the Efuse controller restricts the application from burning the area corresponding to the operation address information.

[0084] Specifically, if the target request is an access request, when the access address information carried by the access request is consistent with the read-write area of ​​the Efuse memory opened according to the read-write permissions, the Efuse controller directly accesses the Efuse memory according to the access address information carried by the access request; when the access address information carried by the access request is inconsistent with the read-write area of ​​the Efuse memory opened according to the read-write permissions, the Efuse controller restricts the application's access to the area corresponding to the access address information.

[0085] Step 401 , step 403 , step 405 , and step 407 are substantially the same as step 201 , step 202 , step 203 , and step 204 of the previous embodiment, and will not be described again to avoid repetition.

[0086] An embodiment of the present application relates to an Efuse control method, which is applied to a processing module running an application program, wherein the application program of the present embodiment can be a test software or a product software. The specific flow chart is as follows: Figure 7 As shown, the Efuse control method includes the following steps:

[0087] Step 501, sending a target request to an electronic fuse controller, the target request being an access request or a burn request; when the application is product software and the target request is a burn request, the Efuse controller burns at least one corresponding information bit in the electronic fuse memory according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits.

[0088] Specifically, the application is test software or product software. When the application needs to burn or access the Efuse memory, the application sends a target request. When the application is product software and the target request is a burning request, the Efuse controller burns at least one corresponding information bit in the Efuse memory according to the operation address information carried by the target request; wherein the information bit is composed of multiple bits.

[0089] Specifically, the processing module is the hardware basis for running the application. Each application corresponds to a different processing module, and each processing module corresponds to running an application. For example, in the case where the application is product software, the processing module is a functional module in the central processor of the Efuse memory after the finished product is completed. The finished product is installed with the product software, and the central processor of the finished product provides the corresponding functional module, i.e., the processing module, to run the product software; in the case where the application is test software, the processing module is a functional module in the central processor of the test device, and the test device is used to test the Efuse memory before productization. The test device is installed with the test software, and the central processor of the test device provides the corresponding functional module, i.e., the processing module, to run the test software. It is not difficult to find that this embodiment is a method embodiment of the processing module side of running the application corresponding to the method embodiment on the Efuse controller side, and this embodiment can be implemented in conjunction with the method embodiment on the Efuse controller side. The relevant technical details mentioned in the method embodiment on the Efuse controller side are still valid in this embodiment, and in order to reduce repetition, they are not repeated here. Accordingly, the relevant technical details mentioned in this embodiment can also be applied in the method embodiment on the Efuse controller side.

[0090] In addition, in order to highlight the innovative part of the present application, the present embodiment does not introduce units that are not closely related to solving the technical problems proposed by the present application, but this does not mean that there are no other units in the present embodiment.

[0091] Another embodiment of the present application relates to an Efuse control method, which is applied to a processing module running an application program, wherein the application program of the present embodiment is product software, and the target request is a programming request; the specific flow chart is as follows Figure 8 As shown, the Efuse control method includes the following steps:

[0092] Step 601, obtaining current power supply information.

[0093] Step 602, determining whether the current power supply information meets the preset programming conditions.

[0094] When the current power information meets the preset burning condition, the step of sending a target request to the Efuse controller is executed, and the process goes to step 603; when the current power information does not meet the preset burning condition, the process ends.

[0095] Step 603, sending a target request to the electronic fuse controller; the electronic fuse controller burns at least one corresponding information bit in the electronic fuse memory according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits.

[0096] Step 603 is substantially the same as step 501 of the previous embodiment, and will not be described here to avoid repetition. In this embodiment, when the application is product software and the target request is a burning request, the product software is unstable in the power environment. In order to improve the accuracy of burning, before the application initiates the burning request, the current power information is first obtained to determine whether the current power information meets the preset burning conditions. When the current power information meets the preset burning conditions, the burning request is sent to the Efuse controller. After the Efuse memory is commercialized, the success rate of the product software burning the Efuse memory is improved.

[0097] In actual applications, different processes have different requirements for power quality. For example, the 12nm process requires the power supply voltage to be 1.8V, and a 10% fluctuation is allowed.

[0098] An embodiment of the present application relates to an electronic device, such as Fig. 9 As shown, it includes: at least one processor 701; and a memory 702 that is communicatively connected to the at least one processor 701; wherein the memory stores instructions that can be executed by the at least one processor 701, and the instructions are executed by the at least one processor 701 so that the at least one processor 701 can execute the above-mentioned Efuse control method.

[0099] The memory 702 and the processor 701 are connected in a bus manner, and the bus may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors 701 and the memory 702 together. The bus can also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium. The data processed by the processor 701 is transmitted on a wireless medium via an antenna, and further, the antenna also receives data and transmits the data to the processor 701.

[0100] The processor 701 is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management and other control functions. The memory 702 can be used to store data used by the processor when performing operations.

[0101] An embodiment of the present application relates to a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the above method embodiment is implemented.

[0102] That is, those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including several instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0103] Those skilled in the art will appreciate that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.

Claims

1. An Efuse control method, characterized in that: Applied to an Efuse controller, the Efuse controller is connected to a bus through a register interface, a processing module running an application is connected to the bus through a corresponding access channel, and the Efuse controller is also connected to a security register; the security register stores a first information value of a first control bit in the Efuse memory; the first information value corresponds to the access channel of the application, and the first information value is used to control the opening or closing of the access channel of the application; the security register also stores a second information value of a second control bit in the Efuse memory; The second information value corresponds to the application, and the second information value indicates the read and write permission of the application to the Efuse memory; the method includes: Acquire the first information value and the second information value from the security register; wherein, when the Efuse memory is powered on, the Efuse controller reads the first information value of the first control bit and the second information value of the second control bit in the Efuse memory, and saves them to the security register; Determine, through the register interface, whether the access channel of the application is turned on or off according to the first information value; determine, through the register interface, according to the second information value, the read and write permission of the application to the Efuse memory; When the access channel of the application is turned on, obtaining the target request of the application; the application product software; the target request is an access request or a burning request; wherein the application sends the target request to the Efuse controller when it is determined that the current power information meets the preset burning condition; Open the read-write area corresponding to the Efuse memory according to the read-write permission; In the case where the target request is the programming request, at least one corresponding information bit in the productized Efuse memory is programmed according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits.

2. The Efuse control method according to claim 1, characterized in that: There are multiple applications, and the processing module corresponding to each application is connected to the bus through a corresponding access channel; there are multiple first information values, and the access channels of multiple applications correspond to multiple first information values ​​one by one; When the access channel of the application is opened, the step of obtaining the target request of the application is performed, including: When an access channel of a target application among the multiple applications is opened, a target request of the target application is obtained.

3. An Efuse control method, characterized in that: A processing module applied to run an application, the application being product software; an Efuse controller connected to a bus via a register interface, the processing module connected to the bus via a corresponding access channel, and the Efuse controller also connected to a security register; the security register stores a first information value of a first control bit in the Efuse memory; the first information value corresponds to the access channel of the application, and the first information value is used to control the opening or closing of the access channel of the application; the security register also stores a second information value of a second control bit in the Efuse memory; The second information value corresponds to the application, and the second information value indicates the read and write permission of the application to the Efuse memory; the method includes: Get current power information; Determine whether the current power supply information meets the preset burning condition; When the current power information meets the preset burning condition, a target request is sent to the Efuse controller, and the target request is an access request or a burning request; the Efuse controller opens the read and write area corresponding to the Efuse memory according to the read and write permissions, and when the target request is the burning request, the at least one corresponding information bit in the productized Efuse memory is burned according to the operation address information carried by the target request; wherein the information bit is composed of a plurality of bits; wherein the Efuse controller obtains the first information value and the second information value from the security register; when the Efuse memory is powered on, the Efuse controller reads the first information value of the first control bit and the second information value of the second control bit in the Efuse memory, and saves them to the security register; the Efuse controller determines whether the access channel of the application is turned on or off according to the first information value through the register interface; and the Efuse controller determines the read and write permissions of the application to the Efuse memory according to the second information value through the register interface.

4. An electronic device, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute the Efuse control method as claimed in claim 1 or 2, or execute the Efuse control method as claimed in claim 3.

5. A computer-readable storage medium storing a computer program, characterized in that: The computer program implements the Efuse control method according to claim 1 or 2 when executed by a processor, or implements the Efuse control method according to claim 3 when executed.

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