Solar cell, method for manufacturing the same, photovoltaic module, and photovoltaic system

By setting the intrinsic region and doped structure on the intrinsic semiconductor substrate of the solar cell to form a p-i-n structure, the problem of growth complexity of silicon single crystals is solved, electrical consistency and conversion efficiency are improved, and manufacturing costs are reduced.

CN118943226BActive Publication Date: 2025-08-01YANGTZE INSTITUTE FOR SOLAR TECHNOLOGY +1

Patent Information

Application Number
CN202410084669.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-01-19
Publication Date
2025-08-01
Estimated Expiration
2044-01-19

AI Technical Summary

Technical Problem

During the preparation process, due to the complex growth of silicon single crystals, the incorporated elements are unevenly distributed in the radial or longitudinal direction, which affects the resistivity consistency, increases the complexity of the preparation process and reduces the conversion efficiency.

Method used

Using an intrinsic semiconductor substrate containing an intrinsic region, a p-i-n structure is formed by providing a first doping structure and a second doping structure on both sides thereof to avoid doping p-type or n-type dopants, simplifying the preparation process and reducing the silicon crystal defect density.

Benefits of technology

Improve the electrical consistency of silicon wafers, enhance carrier separation effect, improve solar cell conversion efficiency and reduce manufacturing costs.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to a solar cell, a method for manufacturing the same, a photovoltaic module, and a photovoltaic system. The solar cell includes: an intrinsic semiconductor substrate including an intrinsic region, a first surface, and a second surface, the first surface and the second surface being disposed on opposite sides of the intrinsic semiconductor substrate, and the intrinsic region being disposed between the first surface and the second surface; a first doping structure having a first doping type, the first doping structure being disposed on a side of the intrinsic region close to the first surface; a second doping structure having a second doping type, the second doping structure being disposed on a side of the intrinsic region close to the second surface; wherein the first doping type and the second doping type are opposite to each other, and the first doping structure, the intrinsic region, and the second doping structure form a p-i-n structure. On the one hand, the present application can reduce the complexity and manufacturing cost of the solar cell manufacturing process, and on the other hand, can improve the conversion efficiency of the solar cell.
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Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and particularly to a solar cell, a preparation method thereof, a photovoltaic module, and a photovoltaic system. Background Art

[0002] A solar cell is a device that directly converts light energy into electrical energy through the photovoltaic effect. Generally speaking, a solar cell is manufactured on a semiconductor wafer or substrate by using semiconductor processing technology to form a p-n junction near the surface of the substrate.

[0003] The silicon substrate of a solar cell generally uses a p-type silicon substrate or an n-type silicon substrate. Whether it is a p-type silicon substrate or an n-type silicon substrate, relevant elements need to be doped during the growth process of the silicon single crystal. Due to the relatively complex growth process of the silicon single crystal, the doped elements are differently distributed in the radial or longitudinal direction of the silicon single crystal, resulting in different resistivities of the silicon wafers cut from a single silicon rod. Moreover, for a single silicon wafer, the resistivity also varies from the center to the edge of the wafer. Thus, not only will the preparation process of the solar cell be complicated, but also the conversion efficiency of the solar cell will be affected. Summary of the Invention

[0004] Based on this, it is necessary to provide a solar cell, a preparation method thereof, a photovoltaic module, and a photovoltaic system for the above problems.

[0005] In a first aspect, an embodiment of the present application provides a solar cell, including:

[0006] An intrinsic semiconductor substrate, including an intrinsic region, a first surface, and a second surface, the first surface and the second surface being disposed on opposite sides of the intrinsic semiconductor substrate, and the intrinsic region being disposed between the first surface and the second surface;

[0007] A first doping structure, having a first doping type, the first doping structure being disposed on a side of the intrinsic region close to the first surface; and

[0008] A second doping structure, having a second doping type, the second doping structure being disposed on a side of the intrinsic region close to the second surface;

[0009] Wherein, the first doping type and the second doping type are opposite, and the first doping structure, the intrinsic region, and the second doping structure form a p-i-n structure.

[0010] In one embodiment, the resistivity of the intrinsic region is greater than 100 Ω·cm;

[0011] And / or, the doping concentration of the p-type dopant in the intrinsic region is less than or equal to 1.3×10 14 ㎝ -3and the doping concentration of the n-type dopant in the intrinsic region is less than or equal to 4.4×10 13 cm -3 .

[0012] In one embodiment, the thickness of the intrinsic semiconductor substrate is between 50 μm and 300 μm.

[0013] In one embodiment, the doping concentration of the first doping structure is between 3×10 18 cm -3 -5×10 20 cm -3 ;

[0014] and / or, the doping concentration of the second doping structure is between 3×10 18 cm -3 -5×10 20 cm -3 .

[0015] In one embodiment, there is a first dimension between the side of the first doping structure close to the first surface and the side of the first doping structure far from the first surface, and the first dimension is between 5 nm and 5000 nm;

[0016] and / or, there is a second dimension between the side of the second doping structure close to the first surface and the side of the second doping structure far from the first surface, and the second dimension is between 5 nm and 5000 nm.

[0017] In one embodiment, the solar cell further includes a third doping structure, the third doping structure has a second doping type, and is disposed on a side of the first doping structure away from the intrinsic region;

[0018] The third doping structure and the first doping structure form a p-n junction.

[0019] In one embodiment, the solar cell further includes a fourth doping structure, the fourth doping structure has a first doping type, and is disposed on a side of the second doping structure away from the intrinsic region;

[0020] The fourth doping structure and the second doping structure form a p-n junction.

[0021] In one embodiment, the first doping structure is embedded in the intrinsic semiconductor substrate and is located between the intrinsic region and the first surface.

[0022] In one embodiment, the second doping structure is embedded in the intrinsic semiconductor substrate and is located between the intrinsic region and the second surface.

[0023] In one embodiment, the second doping structure is disposed on a side of the second surface away from the first surface.

[0024] In one embodiment, the solar cell further includes a first tunneling layer disposed on the second surface, and the second doping structure is disposed on a side of the first tunneling layer away from the first surface.

[0025] In one embodiment, the solar cell further includes:

[0026] A first passivation and antireflection layer disposed on a side of the first doping structure away from the intrinsic region;

[0027] A first electrode disposed on a side of the first doping structure away from the second doping structure, passing through the first passivation and antireflection layer and electrically connected to the first doping structure;

[0028] A second passivation and antireflection layer disposed on a side of the second doping structure away from the intrinsic region; and

[0029] A second electrode disposed on a side of the second doping structure away from the first doping structure, passing through the second passivation and antireflection layer and electrically connected to the second doping structure.

[0030] In one embodiment, the first doping structure is disposed on a side of the first surface away from the second surface.

[0031] In one embodiment, the second doping structure is disposed on a side of the second surface away from the first surface.

[0032] In one embodiment, the solar cell further includes: a first intrinsic semiconductor layer disposed on the first surface, and the first doping structure is disposed on a side of the first intrinsic semiconductor layer away from the second surface; and

[0033] A second intrinsic semiconductor layer disposed on the second surface, and the second doping structure is disposed on a side of the second intrinsic semiconductor layer away from the first surface.

[0034] In one embodiment, the solar cell further includes:

[0035] A first transparent conductive layer disposed on a side of the first doping structure away from the first intrinsic semiconductor layer;

[0036] A first electrode disposed on a side of the first transparent conductive layer away from the first intrinsic semiconductor layer and electrically connected to the first transparent conductive layer;

[0037] A second transparent conductive layer, disposed on a side of the second doping structure away from the second intrinsic semiconductor layer; and

[0038] A second electrode, disposed on a side of the second transparent conductive layer away from the second intrinsic semiconductor layer and electrically connected to the second transparent conductive layer.

[0039] In one embodiment, the solar cell further includes:

[0040] A second tunneling layer, disposed on the first surface, and the first doping structure is disposed on a side of the second tunneling layer away from the second surface; and

[0041] A third tunneling layer, disposed on the second surface, and the second doping structure is disposed on a side of the third tunneling layer away from the first surface.

[0042] In a second aspect, an embodiment of the present application provides another solar cell, including:

[0043] An intrinsic semiconductor substrate having a first surface and a second surface disposed opposite to each other; a first conductive region and a second conductive region arranged along a first direction are provided on the intrinsic semiconductor substrate, and the first direction is perpendicular to the thickness direction of the intrinsic semiconductor substrate;

[0044] A first passivation layer, disposed on the first surface and located in the first conductive region;

[0045] A second passivation layer, disposed on the first surface and located in the second conductive region;

[0046] A first doping structure having a first doping type and disposed on a side of the first passivation layer away from the intrinsic semiconductor substrate; and

[0047] A second doping structure having a second doping type and disposed on a side of the second passivation layer away from the intrinsic semiconductor substrate;

[0048] Wherein, the first doping type and the second doping type are opposite, and the first doping structure, the intrinsic semiconductor substrate and the second doping structure form a p-i-n structure.

[0049] In one embodiment, the resistivity of the intrinsic semiconductor substrate is greater than 100 Ω·cm;

[0050] And / or, the doping concentration of the p-type dopant in the intrinsic semiconductor substrate is less than or equal to 1.3×10 14 ㎝ -3 And the doping concentration of the n-type dopant in the intrinsic semiconductor substrate is less than or equal to 4.4×10 13 ㎝ -3。

[0051] In one embodiment, the thickness of the intrinsic semiconductor substrate is between 50 μm and 300 μm.

[0052] In one embodiment, the doping concentration of the first doping structure is between 3×10 18 cm -3 -5×10 20 cm -3 ;

[0053] and / or, the doping concentration of the second doping structure is between 3×10 18 cm -3 -5×10 20 cm -3 。

[0054] In one embodiment, there is a third dimension between the side of the first doping structure close to the first surface and the side of the first doping structure far from the first surface, and the third dimension is between 5 nm and 5000 nm;

[0055] and / or, there is a fourth dimension between the side of the second doping structure close to the first surface and the side of the second doping structure far from the first surface, and the fourth dimension is between 5 nm and 5000 nm.

[0056] In one embodiment, the solar cell further includes a third doping structure, the third doping structure has a second doping type, and is disposed on the side of the first doping structure far from the intrinsic semiconductor substrate;

[0057] The third doping structure and the first doping structure form a p-n junction.

[0058] In one embodiment, the solar cell further includes a fourth doping structure, the fourth doping structure has a first doping type, and is disposed on the side of the second doping structure far from the intrinsic semiconductor substrate;

[0059] The fourth doping structure and the second doping structure form a p-n junction.

[0060] In one embodiment, the first passivation layer and the second passivation layer are configured as tunneling dielectric layers;

[0061] and / or, the materials of the first doping structure and the second doping structure include polysilicon.

[0062] In one embodiment, the materials of the first passivation layer and the second passivation layer include intrinsic semiconductor materials;

[0063] And / or, the material of the first doping structure and the material of the second doping structure include microcrystalline silicon or amorphous silicon.

[0064] In one embodiment, the solar cell further includes:

[0065] A first anti-reflection layer disposed on a side of the first doping structure away from the intrinsic semiconductor substrate and on a side of the second doping structure away from the intrinsic semiconductor substrate;

[0066] A first electrode disposed on a side of the first doping structure away from the intrinsic semiconductor substrate, passing through the first anti-reflection layer and electrically connected to the first doping structure;

[0067] A second electrode disposed on a side of the second doping structure away from the intrinsic semiconductor substrate, passing through the first anti-reflection layer and electrically connected to the second doping structure;

[0068] A third passivation layer disposed on the second surface; and

[0069] A second anti-reflection layer disposed on a side of the third passivation layer away from the intrinsic semiconductor substrate.

[0070] In a third aspect, an embodiment of the present application provides a method for manufacturing a solar cell, including:

[0071] Providing an intrinsic semiconductor substrate, the intrinsic semiconductor substrate including an intrinsic region, a first surface and a second surface, the first surface and the second surface being disposed on opposite sides of the intrinsic semiconductor substrate, and the intrinsic region being disposed between the first surface and the second surface;

[0072] Forming a first doping structure and a second doping structure on the intrinsic semiconductor substrate; the first doping structure having a first doping type and being disposed on a side of the intrinsic region close to the first surface; the second doping structure having a second doping type and being disposed on a side of the intrinsic region close to the second surface; the first doping type and the second doping type being opposite, and the first doping structure, the intrinsic region and the second doping structure constituting a p-i-n structure.

[0073] In a fourth aspect, an embodiment of the present application provides another method for manufacturing a solar cell, including:

[0074] Providing an intrinsic semiconductor substrate, the intrinsic semiconductor substrate having a first surface and a second surface disposed opposite to each other; a first conductive region and a second conductive region arranged along a first direction are provided on the intrinsic semiconductor substrate, and the first direction is perpendicular to the thickness direction of the intrinsic semiconductor substrate;

[0075] A first passivation layer is formed on the first surface, and a first doping structure is formed on a side of the first passivation layer away from the intrinsic semiconductor substrate; the first passivation layer is located in the first conductive region, and the first doping structure has a first doping type;

[0076] A second passivation layer is formed on the first surface, and a second doping structure is formed on a side of the second passivation layer away from the intrinsic semiconductor substrate; the second passivation layer is located in the second conductive region, the second doping structure has a second doping type, the first doping type and the second doping type are opposite, and the first doping structure, the intrinsic semiconductor substrate, and the second doping structure constitute a p-i-n structure.

[0077] In a fifth aspect, an embodiment of the present application provides a photovoltaic module, including the solar cell according to any one of the first aspect and the second aspect.

[0078] In a sixth aspect, an embodiment of the present application provides a photovoltaic system, including the photovoltaic module in the fifth aspect.

[0079] The solar cell, its manufacturing method, the photovoltaic module, and the photovoltaic system provided by the embodiments of the present application are provided. By providing an intrinsic region, a first doping structure, and a second doping structure on an intrinsic semiconductor substrate, the first doping structure, the intrinsic region, and the second doping structure constitute a p-i-n structure. Thus, compared with the conventional technology of manufacturing a solar cell using a p-type or n-type semiconductor substrate, the substrate of the solar cell provided by the embodiments of the present application, due to using an intrinsic semiconductor substrate containing an intrinsic region, does not need to be doped with a p-type or n-type dopant during the process of manufacturing the blank (such as a silicon rod) of the intrinsic semiconductor substrate. On the one hand, it is beneficial to reduce the complexity of the solar cell manufacturing process. On the other hand, it is more beneficial to the growth of silicon crystals, can reduce the dislocation density in the silicon crystals, increase the pulling speed of the single crystal silicon, and reduce the defect density. Further, after the silicon rod is cut into wafers, there is no resistivity difference in both the radial and longitudinal directions of the intrinsic silicon wafers. On the one hand, it is beneficial to improve the electrical consistency of the wafers, thereby improving the conversion efficiency of the solar cell; on the other hand, it is beneficial to improve the utilization rate of the silicon rod, thereby reducing the manufacturing cost of the solar cell. Description of the Drawings

[0080] In order to more clearly illustrate the technical solutions in the embodiments of the present application or exemplary embodiments, the following will briefly introduce the drawings required for the description of the embodiments or exemplary embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0081] Figure 1Schematic diagram of a partial cross-sectional structure of a solar cell provided by an embodiment of the present application.

[0082] Figure 2 Schematic diagram of a partial cross-sectional structure of another solar cell provided by an embodiment of the present application.

[0083] Figure 3 Schematic diagram of a partial cross-sectional structure of yet another solar cell provided by an embodiment of the present application.

[0084] Figure 4 Schematic diagram of a partial cross-sectional structure of yet another solar cell provided by an embodiment of the present application.

[0085] Figure 5 Schematic diagram of a partial cross-sectional structure of yet another solar cell provided by an embodiment of the present application.

[0086] Figure 6 Schematic diagram of a partial cross-sectional structure of yet another solar cell provided by an embodiment of the present application.

[0087] Figure 7 Schematic diagram of a partial cross-sectional structure of yet another solar cell provided by an embodiment of the present application.

[0088] Figure 8 Schematic diagram of a partial cross-sectional structure of yet another solar cell provided by an embodiment of the present application.

[0089] Figure 9 Schematic diagram of a process flow of a method for manufacturing a solar cell provided by an embodiment of the present application.

[0090] Figure 10 Schematic diagram of a process flow of a method for manufacturing a solar cell provided by an embodiment of the present application.

[0091] Reference numerals:

[0092] 1, solar cell; 111, semiconductor substrate; 111a, intrinsic region; 111b, first surface; 111c, second surface; 111d, first conductive region; 111e, second conductive region; 112, first doping structure; 113, second doping structure; 114, first tunneling layer; 115, first passivation and antireflection layer; 116, second passivation and antireflection layer; 117, first electrode; 118, second electrode; 119, first intrinsic semiconductor layer; 120, second intrinsic semiconductor layer; 121, first transparent conductive layer; 122, second transparent conductive layer; 123, second tunneling layer; 124, third tunneling layer; 125, first passivation layer; 126, second passivation layer; 127, first antireflection layer; 128, second antireflection layer; 129, third passivation layer; 130, third doping structure; 131, fourth doping structure. Detailed implementation manners

[0093] To make the above objects, features, and advantages of the present application more apparent and understandable, the following provides a detailed description of the specific embodiments of the present application with reference to the accompanying drawings. Many specific details are set forth in the following description to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0094] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this application belongs. The terms used in the description of the present application herein are for the purpose of describing specific embodiments only and are not intended to limit the present application.

[0095] It should be understood that when an element or layer is referred to as "on", "adjacent to", "connected to", or "coupled to" another element or layer, it can be directly on, adjacent to, connected, or coupled to the other element or layer, or there can be intervening elements or layers. In contrast, when an element is referred to as "directly on", "directly adjacent to", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types, and / or parts, these elements, components, regions, layers, doping types, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, doping type, or part from another element, component, region, layer, doping type, or part. Thus, the first element, component, region, layer, doping type, or part discussed below may be denoted as the second element, component, region, layer, or part without departing from the teachings of the present application.

[0096] Spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. may be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms also include different orientations of the device during use and operation. For example, if the device in the figures is flipped, an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "above" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. In addition, the device may also include other orientations (such as, rotated 90 degrees or other orientations), and the spatial descriptors used herein are to be interpreted accordingly.

[0097] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprises / comprising" or "has / have" etc. specify the presence of the stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. At the same time, in this specification, the term "and / or" includes any and all combinations of the related listed items.

[0098] Embodiments of the application are described herein with reference to cross-sectional views that are schematic illustrations of ideal embodiments (and intermediate structures) of the application, such that variations in the shapes shown are to be expected, for example, due to manufacturing techniques and / or tolerances. Accordingly, embodiments of the application should not be limited to the particular shapes of regions shown herein, but include shape deviations due to, for example, manufacturing techniques. For example, an implantation region shown as rectangular will typically have rounded or curved features at its edges and / or an implantation concentration gradient, rather than a binary change from the implantation region to the non-implantation region. Similarly, a buried region formed by implantation can result in some implantation in the region between the buried region and the surface through which the implantation occurs. Thus, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of the application.

[0099] In a first aspect, with reference to Figure 1 As shown, an embodiment of the present application provides a solar cell 1, which may be a PERT (Passivated Emitter Rear Totally-diffused) cell, a TOPCon (Tunnel Oxide Passivated Contact) cell, an SHJ (Silicon HeteroJunction) cell, a tandem cell, etc.

[0100] Specifically, the solar cell 1 includes an intrinsic semiconductor substrate 111, a first doping structure 112, and a second doping structure 113. The intrinsic semiconductor substrate 111 includes an intrinsic region 111a, a first surface 111b, and a second surface 111c. The first surface 111b and the second surface 111c are disposed on opposite sides of the intrinsic semiconductor substrate 111, and the intrinsic region 111a is disposed between the first surface 111b and the second surface 111c. Here, the first surface 111b may be one of the light-facing surface and the backlight-facing surface of the solar cell 1, and the second surface 11(1)c may be the other of the light-facing surface and the backlight-facing surface of the solar cell 1.

[0101] Further, the first doping structure 112 has a first doping type and is disposed on one side of the intrinsic region 111a close to the first surface 111b. The second doping structure 113 has a second doping type and is disposed on one side of the intrinsic region 111a close to the second surface 111c. Wherein, the first doping type and the second doping type are opposite, and the first doping structure 112, the intrinsic region 111a, and the second doping structure 113 form a p-i-n structure. It can be understood that, in one example, the first doping type is a p-type and the second doping type is an n-type. In a contrary example, the first doping type is an n-type and the second doping type is a p-type.

[0102] It should be noted that the first doping structure 112 and the second doping structure 113 can be doping regions provided on the intrinsic semiconductor substrate 111 or film layer structures containing dopants. When at least one of the first doping structure 112 and the second doping structure 113 is a doping region provided on the intrinsic semiconductor substrate 111, the intrinsic region 111a is a part of the intrinsic semiconductor substrate 111. When both the first doping structure 112 and the second doping structure 113 are film layer structures containing dopants, the intrinsic region 111a is the entire region of the intrinsic semiconductor substrate 111.

[0103] The solar cell 1 provided by the embodiment of the present application, by providing the intrinsic region 111a on the intrinsic semiconductor substrate 111 and respectively providing the first doping structure 112 and the second doping structure 113 on opposite sides of the intrinsic region 111a, enables the first doping structure 112, the intrinsic region 111a, and the second doping structure 113 to form a p-i-n structure. Thus, compared with the conventional technology of manufacturing the solar cell 1 using a p-type or n-type semiconductor substrate 111, the substrate of the solar cell 1 provided by the embodiment of the present application, due to using the intrinsic semiconductor substrate 111 containing the intrinsic region 111a, therefore, in the process of manufacturing the blank (such as a silicon rod) of the intrinsic semiconductor substrate 111, it is not necessary to incorporate p-type or n-type dopants. On the one hand, it is beneficial to reduce the complexity of the manufacturing process of the solar cell 1. On the other hand, it is more conducive to the growth of silicon crystals, can reduce the dislocation density in the silicon crystals, increase the pulling speed, and reduce the defect density. Further, after the silicon rod is cut into slices, there is no resistivity difference in both the radial and longitudinal directions of the intrinsic silicon wafer. On the one hand, it is beneficial to improve the electrical consistency of the silicon wafer, thereby improving the conversion efficiency of the solar cell 1; on the other hand, it is beneficial to improve the utilization rate of the silicon rod, thereby reducing the manufacturing cost of the solar cell 1.

[0104] Here, it should also be noted that the solar cell 1 provided by the embodiments of the present application is equivalent to having a p-i junction and an i-n junction on both sides of the intrinsic semiconductor substrate 111. This structure can make the carrier separation effect better, thereby improving the photoelectric conversion efficiency of the solar cell 1. Specifically, compared with the substrate of the traditional solar cell 1, since the intrinsic semiconductor substrate 111 in the embodiments of the present application includes an intrinsic region 111a, the doping concentration of the intrinsic semiconductor substrate 111 is much lower than that of the traditional substrate. Also, because the lower the doping concentration of the substrate, the deeper the built-in electric field of the solar cell 1 penetrates into the substrate. Therefore, in the solar cell 1 of the embodiments of the present application, the built-in electric field penetrates deeper into the substrate, and the influence range of the built-in electric field is larger, thereby improving the carrier separation effect.

[0105] In one embodiment, the resistivity of the intrinsic region 111a is greater than 100 Ω·cm. In this way, it is equivalent to making the content of the dopant in the intrinsic region 111a extremely small. Thus, it is beneficial to increase the depth of the built-in electric field penetrating into the intrinsic semiconductor substrate 111, thereby helping to improve the carrier separation effect.

[0106] In one embodiment, the doping concentration of the p-type dopant in the intrinsic region 111a is less than or equal to 1.3×10 14 cm -3 , and the doping concentration of the n-type dopant in the intrinsic region 111a is less than or equal to 4.4×10 13 cm -3 . In this way, it is equivalent to making the content of the dopant in the intrinsic region 111a extremely small. Thus, it is beneficial to increase the depth of the built-in electric field penetrating into the intrinsic semiconductor substrate 111, thereby helping to improve the carrier separation effect.

[0107] In one embodiment, the thickness of the intrinsic semiconductor substrate 111 is between 50 μm and 300 μm. Exemplarily, the thickness of the intrinsic semiconductor substrate 111 can be 50 μm, 60 μm, 65 μm, 80 μm, 100 μm, 130 μm, 160 μm, 190 μm, 230 μm, 270 μm, 290 μm, 300 μm or between any two of the above values. By making the thickness of the intrinsic semiconductor substrate 111 within the above range, on the one hand, it is beneficial to reduce the thickness of the solar cell 1, and on the other hand, it is beneficial to form a stable p-i-n structure.

[0108] In one embodiment, the doping concentration of the first doping structure 112 is between 3×10 18 cm -3 to 5×10 20 cm -3 . Exemplarily, the doping concentration of the first doping structure 112 can be 3×10 18 cm-3 , 5×10 18 cm -3 , 1×10 19 cm -3 , 5×10 20 cm -3 or between any two of the above values. By making the doping concentration of the first doping structure 112 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, the first doping structure 112 can have good electrical conductivity.

[0109] In one embodiment, the doping concentration of the second doping structure 113 is between 3×10 18 cm -3 to 5×10 20 cm -3 . Exemplarily, the doping concentration of the second doping structure 113 can be 3×10 18 cm -3 , 5×10 18 cm -3 , 1×10 19 cm -3 , 5×10 20 cm -3 or between any two of the above values. By making the doping concentration of the second doping structure 113 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, the second doping structure 113 can have good electrical conductivity.

[0110] In one embodiment, referring to Figure 1 as shown, there is a first dimension H1 between the side of the first doping structure 112 close to the first surface 111b and the side of the first doping structure 112 far from the first surface 111b, and the first dimension H1 is between 5 nm - 5000 nm. Exemplarily, the first dimension H1 can be (5 nm, 10 nm, 100 nm, 1500 nm, 2500 nm, 3000 nm, 4000 nm, 5000 nm) or between any two of the above values. By making the first dimension H1 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, it is beneficial to form a stable p-i-n structure.

[0111] In one embodiment, referring to Figure 1As shown, there is a second dimension H2 between one side of the second doping structure 113 close to the first surface 111b and the other side of the second doping structure 113 far from the first surface 111b. The second dimension H2 is between 5 nm and 5000 nm. Exemplarily, the second dimension H2 can be 5 nm, 10 nm, 100 nm, 1500 nm, 2500 nm, 3000 nm, 4000 nm, 5000 nm or between any two of the above values. By making the second dimension H2 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, it is beneficial to form a stable p-i-n structure.

[0112] In one embodiment, referring to Figure 2 As shown, the solar cell 1 further includes a third doping structure 130. The third doping structure 130 has a second doping type and is disposed on a side of the first doping structure 112 far from the intrinsic region 111a. The third doping structure 130 and the first doping structure 112 form a p-n junction. By providing the third doping structure 130, it is beneficial to increase the doping concentration at the contact interface between the first electrode 117 and the intrinsic semiconductor substrate 111, thereby reducing the contact resistance at the contact interface between the first electrode 117 and the intrinsic semiconductor substrate 111, and further improving the efficiency of the solar cell 1.

[0113] In one embodiment, the solar cell 1 further includes a fourth doping structure 131. The fourth doping structure 131 has a first doping type and is disposed on a side of the second doping structure 113 far from the intrinsic region 111a. The fourth doping structure 131 and the second doping structure 113 form a p-n junction. By providing the fourth doping structure 131, it is beneficial to increase the doping concentration at the contact interface between the second electrode 118 and the intrinsic semiconductor substrate 111, thereby reducing the contact resistance at the contact interface between the second electrode 118 and the intrinsic semiconductor substrate 111, and further improving the efficiency of the solar cell 1.

[0114] In one embodiment, referring to Figure 1 、 Figure 2 、 Figure 3 and Figure 4 As shown, the first doping structure 112 is embedded in the intrinsic semiconductor substrate 111 and is located between the intrinsic region 111a and the first surface 111b. Specifically, a first doping region is provided in the intrinsic semiconductor substrate 111, and a dopant of the first doping type is doped in the first doping region, and the first doping region is the first doping structure 112.

[0115] In one embodiment, the first doping region can be formed by diffusion starting from the first surface 111b in the direction towards the second surface 111c. The doping depth of the first doping region can be between 0.1 μm and 3 μm. The doping concentration of the first doping region can be between 3×10 18 ㎝ -3to 5×10 20 cm -3 。

[0116] In one embodiment, in the direction from the first surface 111b to the second surface 111c, the doping concentration of the first doping region gradually decreases.

[0117] In one embodiment, referring to Figure 1 and Figure 2 as shown, the second doping structure 113 is embedded in the intrinsic semiconductor substrate 111 and is located between the intrinsic region 111a and the second surface 111c. Specifically, a second doping region is provided in the intrinsic semiconductor substrate 111, and a dopant of a second doping type is doped in the second doping region, and the second doping region is the second doping structure 113.

[0118] In one embodiment, the second doping region can be formed by diffusion starting from the second surface 111c in the direction toward the first surface 111b. The doping depth of the second doping region can be between 0.1 μm and 3 μm. The doping concentration of the second doping region can be between 3×10 18 cm -3 to 5×10 20 cm -3 。

[0119] In one embodiment, in the direction from the second surface 111c to the first surface 111b, the doping concentration of the second doping region gradually decreases.

[0120] In one embodiment, referring to Figure 2 as shown, the third doping structure 130 and the fourth doping structure 131 are also embedded in the intrinsic semiconductor substrate 111. Specifically, a third doping region and a fourth doping region are provided in the intrinsic semiconductor substrate 111. The third doping region is of the second doping type, and the fourth doping region is of the first doping type. The third doping region is located on the side of the first doping region close to the first surface 111b, and the fourth doping region is located on the side of the second doping region close to the second surface 111c. The third doping region forms the third doping structure 130, and the fourth doping region forms the fourth doping structure 131.

[0121] Thus, it is beneficial to increase the doping concentration on the surface of the intrinsic semiconductor substrate 111, thereby reducing the contact resistance between the electrode and the intrinsic semiconductor substrate 111, and further improving the efficiency of the solar cell 1.

[0122] In one embodiment, referring to Figure 3 and Figure 4As shown, the second doping structure 113 is disposed on the side of the second surface 111c away from the first surface 111b. Exemplarily, the second doping structure 113 may be a polysilicon thin film containing a dopant. Further, the thickness of the polysilicon thin film may be between 10 nm and 300 nm, and the doping concentration of the polysilicon thin film may be between 1×10 19 cm -3 to 5×10 20 cm -3 .

[0123] In one embodiment, the solar cell 1 further includes a first tunneling layer 114. The first tunneling layer 114 is disposed on the second surface 111c, and the second doping structure 113 is disposed on the side of the first tunneling layer 114 away from the first surface 111b. Thus, a passivated contact structure can be formed on the second surface 111c to increase the open-circuit voltage of the solar cell 1, thereby improving the conversion efficiency of the solar cell 1.

[0124] In one embodiment, the thickness of the first tunneling layer 114 is between 0.5 nm and 5 nm.

[0125] In one embodiment, referring to Figures 1-4 as shown, the solar cell 1 further includes a first passivation and antireflection layer 115, a first electrode 117, a second passivation and antireflection layer 116, and a second electrode 118. The first passivation and antireflection layer 115 is disposed on the side of the first doping structure 112 away from the intrinsic region 111a. The first electrode 117 is disposed on the side of the first doping structure 112 away from the second doping structure 113, penetrates through the first passivation and antireflection layer 115 and is electrically connected to the first doping structure 112. The second passivation and antireflection layer 116 is disposed on the side of the second doping structure 113 away from the intrinsic region 111a. The second electrode 118 is disposed on the side of the second doping structure 113 away from the first doping structure 112, penetrates through the second passivation and antireflection layer 116 and is electrically connected to the second doping structure 113. Specifically, Figure 1 and Figure 2 the solar cell 1 shown is a PERT cell, Figure 3 and Figure 4 the solar cell 1 shown is a TOPCon cell.

[0126] In one embodiment, referring to Figure 4 as shown, a third doping structure 130 may be embedded in the intrinsic semiconductor substrate 111. Thus, it is beneficial to increase the doping concentration on the surface of the intrinsic semiconductor substrate 111, thereby reducing the contact resistance between the first electrode 117 and the intrinsic semiconductor substrate 111, and further improving the efficiency of the solar cell 1.

[0127] In one embodiment, the material of the first passivation and antireflection layer includes one or more of materials such as AlOx, SiNx, SiOx, SiNxOy, TiOx, MgF2, etc.

[0128] In one example, the first passivation and antireflection layer is an AlOx layer, and the thickness of the AlOx layer ranges from 1 nm to 20 nm.

[0129] In one example, the first passivation and antireflection layer is an SiNx layer, and the thickness of the SiNx layer ranges from 10 nm to 100 nm.

[0130] In one example, the first passivation and antireflection layer is an SiOx layer, and the thickness of the SiOx layer ranges from 10 nm to 150 nm.

[0131] In one example, the first passivation and antireflection layer is an SiNxOy layer, and the thickness of the SiNxOy layer ranges from 10 nm to 150 nm.

[0132] In one example, the first passivation and antireflection layer is a TiOx layer, and the thickness of the TiOx layer ranges from 10 nm to 150 nm.

[0133] In one example, the first passivation and antireflection layer is an MgF2 layer, and the thickness of the MgF2 layer ranges from 10 nm to 150 nm.

[0134] In one embodiment, the material of the second passivation and antireflection layer includes one or more of materials such as AlOx, SiNx, SiOx, SiNxOy, TiOx, MgF2, etc. The material of the second passivation and antireflection layer may be the same as that of the first passivation and antireflection layer, and the thickness of the second passivation and antireflection layer may be the same as that of the first passivation and antireflection layer, which will not be elaborated herein in the embodiments of the present application.

[0135] In one embodiment, the materials of the first electrode 117 and the second electrode 118 may include one or more of metals such as Ag, Al, Cu, Ni, etc. or mixtures of these metals and glass frit.

[0136] In one embodiment, referring to Figure 5 and Figure 6 as shown, the first doping structure 112 is disposed on the side of the first surface 111b away from the second surface 111c. Exemplarily, the first doping structure 112 may be a microcrystalline or amorphous thin film containing a dopant. Further, the thickness of the first doping structure 112 may range from 5 nm to 25 nm.

[0137] In one embodiment, the second doping structure 113 is disposed on a side of the second surface 111c away from the first surface 111b. Exemplarily, the second doping structure 113 may be a microcrystalline or amorphous thin film containing a dopant. Further, the thickness of the second doping structure 113 may be between 5 nm and 25 nm.

[0138] In one embodiment, the solar cell 1 further includes a first intrinsic semiconductor layer 119 and a second intrinsic semiconductor layer 120. The first intrinsic semiconductor layer 119 is disposed on the first surface 111b, and the first doping structure 112 is disposed on a side of the first intrinsic semiconductor layer 119 away from the second surface 111c. The second intrinsic semiconductor layer 120 is disposed on the second surface 111c, and the second doping structure 113 is disposed on a side of the second intrinsic semiconductor layer 120 away from the first surface 111b. Exemplarily, both the first intrinsic semiconductor layer 119 and the second intrinsic semiconductor layer 120 are intrinsic amorphous silicon thin films.

[0139] In one embodiment, the thicknesses of the first intrinsic semiconductor layer 119 and the second intrinsic semiconductor layer 120 are between 2 nm and 20 nm.

[0140] In one embodiment, referring to Figure 5 As shown, the solar cell 1 further includes a first transparent conductive layer 121, a first electrode 117, a second transparent conductive layer 122, and a second electrode 118. The first transparent conductive layer 121 is disposed on a side of the first doping structure 112 away from the first intrinsic semiconductor layer 119. The first electrode 117 is disposed on a side of the first transparent conductive layer 121 away from the first intrinsic semiconductor layer 119 and is electrically connected to the first transparent conductive layer 121. The second transparent conductive layer 122 is disposed on a side of the second doping structure 113 away from the second intrinsic semiconductor layer 120. The second electrode 118 is disposed on a side of the second transparent conductive layer 122 away from the second intrinsic semiconductor layer 120 and is electrically connected to the second transparent conductive layer 122. Exemplarily, the material of the first transparent conductive layer 121 may include one or more of indium tin oxide, tin oxide, and zinc oxide. The material of the second transparent conductive layer 122 may include one or more of indium tin oxide, tin oxide, and zinc oxide.

[0141] Here, it should be noted that Figure 5 As shown, the solar cell 1 is an SHJ cell, Figure 6 As shown, the solar cell 1 is a tandem cell, and only the bottom cell in the tandem cell is shown in the figure, and the bottom cell is an SHJ cell. Exemplarily, the tandem cell may be a perovskite-silicon heterojunction tandem cell.

[0142] In one embodiment, referring to Figure 7As shown, the solar cell 1 further includes a second tunneling layer 123 and a third tunneling layer 124. The second tunneling layer 123 is disposed on the first surface 111b, and the first doping structure 112 is disposed on a side of the second tunneling layer 123 away from the second surface 111c. The third tunneling layer 124 is disposed on the second surface 111c, and the second doping structure 113 is disposed on a side of the third tunneling layer 124 away from the first surface 111b.

[0143] Here, it should be noted that Figure 7 the shown solar cell 1 is a tandem cell, and only the bottom cell in the tandem cell is shown in the figure. The bottom cell is a TOPCon cell. Exemplarily, the tandem cell can be a perovskite-TOPCon tandem cell.

[0144] In one example, the first doping structure 112 is a polysilicon thin film containing an n-type dopant. Further, the doping concentration of the first doping structure 112 is between 1×10 19 cm -3 and 5×10 20 cm -3 , and the thickness of the first doping structure 112 is between 10 nm and 300 nm.

[0145] In one example, the second doping structure 113 is a polysilicon thin film containing a p-type dopant. Further, the doping concentration of the second doping structure 113 is between 5×10 18 cm -3 and 5×10 20 cm -3 , and the thickness of the second doping structure 113 is between 10 nm and 300 nm.

[0146] It should be noted that in the solar cell 1 shown in Figure 5 , Figure 6 and Figure 7 , a third doping structure 130 and / or a fourth doping structure 131 may also be included. In one example, the third doping structure 130 may be disposed in the same film layer as the first doping structure 112, and the fourth doping structure 131 may be disposed in the same film layer as the second doping structure 113. In another example, the first doping structure 112, the second doping structure 113, the third doping structure 130, and the fourth doping structure 131 may also be separate film layer structures respectively.

[0147] Second, referring to Figure 8As shown in the figure, an embodiment of the present application provides another solar cell 1, which is a BC (Back Contact) cell. Specifically, the solar cell 1 includes an intrinsic semiconductor substrate 111, a first passivation layer 125, a second passivation layer 126, a first doping structure 112, and a second doping structure 113. The intrinsic semiconductor substrate 111 has a first surface 111b and a second surface 111c arranged oppositely; on the intrinsic semiconductor substrate 111, a first conductive region 111d and a second conductive region 111e are arranged along the first direction X, and the first direction X is perpendicular to the thickness direction of the intrinsic semiconductor substrate 111. The first passivation layer 125 is disposed on the first surface 111b and is located in the first conductive region 111d. The second passivation layer 126 is disposed on the first surface 111b and is located in the second conductive region 111e. The first doping structure 112 has a first doping type and is disposed on the side of the first passivation layer 125 away from the intrinsic semiconductor substrate 111. The second doping structure 113 has a second doping type and is disposed on the side of the second passivation layer 126 away from the intrinsic semiconductor substrate 111.

[0148] Wherein, the first doping type and the second doping type are opposite, and the first doping structure 112, the intrinsic semiconductor substrate 111, and the second doping structure 113 form a p-i-n structure.

[0149] For the solar cell 1 provided by the embodiment of the present application, by providing an intrinsic region 111a, a first doping structure 112, and a second doping structure 113 on the intrinsic semiconductor substrate 111, the first doping structure 112, the intrinsic region 111a, and the second doping structure 113 form a p-i-n structure. In this way, compared with the traditional technology of manufacturing the solar cell 1 using a p-type or n-type semiconductor substrate 111, the substrate of the solar cell 1 provided by the embodiment of the present application, due to using an intrinsic semiconductor substrate 111 containing an intrinsic region 111a, therefore, in the process of manufacturing the blank (such as a silicon rod) of the intrinsic semiconductor substrate 111, it is not necessary to dope with a p-type or n-type dopant. On the one hand, it is beneficial to reduce the complexity of the manufacturing process of the solar cell 1. On the other hand, it is more beneficial to the growth of silicon crystals, can reduce the dislocation density in the silicon crystals, increase the pulling speed, and reduce the defect density. Further, after cutting the silicon rod into slices, there is no resistivity difference in both the radial and longitudinal directions of the intrinsic silicon wafer. On the one hand, it is beneficial to improve the electrical consistency of the silicon wafer, thereby improving the conversion efficiency of the solar cell 1; on the other hand, it is beneficial to improve the utilization rate of the silicon rod, thereby reducing the manufacturing cost of the solar cell 1.

[0150] Here, it should also be noted that the solar cell 1 provided in the embodiment of the present application is equivalent to having a p-i junction and an i-n junction on an intrinsic semiconductor substrate 111. This structure can make the carrier separation effect better, thereby improving the photoelectric conversion efficiency of the solar cell 1. Specifically, compared with the substrate of the traditional solar cell 1, since the intrinsic semiconductor substrate 111 in the embodiment of the present application includes an intrinsic region 111a, the doping concentration of the intrinsic semiconductor substrate 111 is much lower than that of the traditional substrate. Also, because the lower the doping concentration of the substrate, the deeper the built-in electric field of the solar cell 1 extends into the substrate. Therefore, in the solar cell 1 of the embodiment of the present application, the built-in electric field extends deeper into the substrate, and the influence range of the built-in electric field is larger, thereby improving the carrier separation effect.

[0151] It can be understood that a plurality of first conductive regions 111d and a plurality of second conductive regions 111e can be provided on the intrinsic semiconductor substrate 111, and the plurality of first conductive regions 111d and the plurality of second conductive regions 111e are alternately arranged along the first direction X. Each first conductive region 111d is provided with a first passivation layer 125 and a first doping structure 112, and each second conductive region 111e is provided with a second passivation layer 126 and a second doping structure 113. An isolation groove is provided between adjacent first doping structures 112 and second doping structures 113.

[0152] In one embodiment, the resistivity of the intrinsic semiconductor substrate 111 is greater than 100 Ω·cm. In this way, it is equivalent to making the content of the dopant in the intrinsic region 111a particularly small. Thus, it is beneficial to increase the depth of the built-in electric field extending into the intrinsic semiconductor substrate 111, thereby helping to improve the carrier separation effect.

[0153] In one embodiment, the doping concentration of the p-type dopant in the intrinsic semiconductor substrate 111 is less than or equal to 1.3×10 14 ㎝ -3 , and the doping concentration of the n-type dopant in the intrinsic semiconductor substrate 111 is less than or equal to 4.4×10 13 ㎝ -3 . In this way, it is equivalent to making the content of the dopant in the intrinsic region 111a particularly small. Thus, it is beneficial to increase the depth of the built-in electric field extending into the intrinsic semiconductor substrate 111, thereby helping to improve the carrier separation effect.

[0154] In one embodiment, the thickness of the intrinsic semiconductor substrate 111 ranges from 50 μm to 300 μm. Exemplarily, the thickness of the intrinsic semiconductor substrate 111 can be 50 μm, 60 μm, 65 μm, 80 μm, 100 μm, 130 μm, 160 μm, 190 μm, 230 μm, 270 μm, 290 μm, 300 μm, or any value between the above two values. By making the thickness of the intrinsic semiconductor substrate 111 within the above range, on the one hand, it is beneficial to reduce the thickness of the solar cell 1, and on the other hand, it is beneficial to form a stable p-i-n structure.

[0155] In one embodiment, the doping concentration of the first doping structure 112 ranges from 3×10 18 cm -3 to 5×10 20 cm -3 . Exemplarily, the doping concentration of the first doping structure 112 can be 3×10 18 cm -3 , 5×10 18 cm -3 , 1×10 19 cm -3 , 5×10 20 cm -3 or any value between the above two values. By making the doping concentration of the first doping structure 112 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, it can make the first doping structure 112 have better conductivity.

[0156] In one embodiment, the doping concentration of the second doping structure 113 ranges from 3×10 18 cm -3 to 5×10 20 cm -3 . Exemplarily, the doping concentration of the second doping structure 113 can be 3×10 18 cm -3 , 5×10 18 cm -3 , 1×10 19 cm -3 , 5×10 20 cm -3 or any value between the above two values. By making the doping concentration of the second doping structure 113 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, it can make the second doping structure 113 have better conductivity.

[0157] In one embodiment, there is a third dimension H3 between the side of the first doping structure 112 close to the first surface 111b and the side of the first doping structure 112 far from the first surface 111b, and the third dimension H3 is between 5 nm and 5000 nm. Exemplarily, the third dimension H3 can be 5 nm, 10 nm, 100 nm, 1500 nm, 2500 nm, 3000 nm, 4000 nm, 5000 nm or between any two of the above values. By making the third dimension H3 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, it is beneficial to form a stable p-i-n structure.

[0158] In one embodiment, there is a fourth dimension H4 between the side of the second doping structure 113 close to the first surface 111b and the side of the second doping structure 113 far from the first surface 111b, and the fourth dimension H4 is between 5 nm and 5000 nm. Exemplarily, the fourth dimension H4 can be 5 nm, 10 nm, 100 nm, 1500 nm, 2500 nm, 3000 nm, 4000 nm, 5000 nm or between any two of the above values. By making the fourth dimension H4 within the above range, on the one hand, it is beneficial to reduce the manufacturing cost, and on the other hand, it is beneficial to form a stable p-i-n structure.

[0159] In one embodiment, the solar cell 1 further includes a third doping structure 130, the third doping structure 130 has a second doping type and is disposed on the side of the first doping structure 112 far from the intrinsic semiconductor substrate 111; the third doping structure 130 and the first doping structure 112 form a p-n junction. In one example, the third doping structure 130 and the first doping structure 112 can be disposed in the same film layer structure. Thus, it is beneficial to increase the doping concentration at the contact interface between the first electrode 117 and the intrinsic semiconductor substrate 111, thereby reducing the contact resistance at the contact interface between the first electrode 117 and the intrinsic semiconductor substrate 111, and further improving the efficiency of the solar cell 1. It can be understood that the first doping structure 112 and the third doping structure 130 can also be separate film layer structures respectively.

[0160] In one embodiment, the solar cell 1 further includes a fourth doping structure 131 having a first doping type and disposed on a side of the second doping structure 113 away from the intrinsic semiconductor substrate 111; the fourth doping structure 131 and the second doping structure 113 form a p-n junction. In one example, the fourth doping structure 131 and the second doping structure 113 may be disposed in the same film layer structure. Thus, it is beneficial to increase the doping concentration at the contact interface between the second electrode 118 and the intrinsic semiconductor substrate 111, thereby reducing the contact resistance at the contact interface between the second electrode 118 and the intrinsic semiconductor substrate 111, and further improving the efficiency of the solar cell 1. It can be understood that the second doping structure 113 and the fourth doping structure 131 may also be separate film layer structures respectively.

[0161] In one embodiment, the first passivation layer 125 and the second passivation layer 126 are configured as tunneling dielectric layers. Exemplarily, the materials of the first passivation layer 125 and the second passivation layer 126 may be SiOx. The thicknesses of the first passivation layer 125 and the second passivation layer 126 may be between 0.5 nm and 5 nm.

[0162] Furthermore, the materials of the first doping structure 112 and the second doping structure 113 include polysilicon. The thicknesses of the first doping structure 112 and the second doping structure 113 may be between 10 nm and 300 nm.

[0163] In one embodiment, the materials of the first passivation layer 125 and the second passivation layer 126 include intrinsic semiconductor materials. Exemplarily, the materials of the first passivation layer 125 and the second passivation layer 126 may be intrinsic microcrystalline silicon or intrinsic amorphous silicon. The thicknesses of the first passivation layer 125 and the second passivation layer 126 may be between 2 nm and 20 nm. Furthermore, the materials of the first doping structure 112 and the second doping structure 113 include microcrystalline silicon or amorphous silicon. The thicknesses of the first doping structure 112 and the second doping structure 113 may be between 5 nm and 25 nm.

[0164] In one embodiment, the solar cell 1 further includes a first antireflection layer 127, a first electrode 117, a second electrode 118, a third passivation layer 129, and a second antireflection layer 128. The first antireflection layer 127 is disposed on the side of the first doping structure 112 away from the intrinsic semiconductor substrate 111 and on the side of the second doping structure 113 away from the intrinsic semiconductor substrate 111. The first electrode 117 is disposed on the side of the first doping structure 112 away from the intrinsic semiconductor substrate 111, penetrates through the first antireflection layer 127, and is electrically connected to the first doping structure 112. The second electrode 118 is disposed on the side of the second doping structure 113 away from the intrinsic semiconductor substrate 111, penetrates through the first antireflection layer 127, and is electrically connected to the second doping structure 113. The third passivation layer 129 is disposed on the second surface 111c. The second antireflection layer 128 is disposed on the side of the third passivation layer 129 away from the intrinsic semiconductor substrate 111.

[0165] In one embodiment, the material of the third passivation layer 129 may include SiNx, AlOx, amorphous silicon, etc. When the material of the third passivation layer 129 is SiNx, the thickness of the third passivation layer 129 may be between 50 nm and 120 nm. When the material of the third passivation layer 129 is AlOx, the thickness of the third passivation layer 129 may be between 1 nm and 20 nm. When the material of the third passivation layer 129 is amorphous silicon, the thicknesses of the first passivation layer 125 and the second passivation layer 126 may be between 2 nm and 20 nm.

[0166] In one embodiment, the materials of the first antireflection layer 127 and the second antireflection layer 128 may include one or more of SiNx, SiOx, SiNxOy, AlOx, ITO, SnO2, MgF2, TiOx, and ZnO.

[0167] It should be noted that the inventor conducted experiments on the electrical properties of the traditional BC cell using a silicon-based silicon wafer and the BC cell in the embodiment of the present application. The data are as follows in the table:

[0168]

[0169] As can be seen from the above table, compared with the traditional BC cell, the embodiment of the present application improves the fill factor and open-circuit voltage, reduces the short-circuit current. In particular, the efficiency is increased by 0.04%. It can be seen that the embodiment of the present application has an obvious efficiency gain.

[0170] It should be noted that the above experimental results are limited by the current experimental level. The inventor believes that the solar cell using the intrinsic semiconductor substrate still has room for further improvement.

[0171] In the third aspect, referring to Figure 9As shown, an embodiment of the present application provides a method for manufacturing a solar cell. This manufacturing method is used to manufacture the solar cell in the first aspect. Specifically, the manufacturing method specifically includes the following steps:

[0172] S100: Provide an intrinsic semiconductor substrate. The intrinsic semiconductor substrate includes an intrinsic region, a first surface, and a second surface. The first surface and the second surface are disposed on opposite sides of the intrinsic semiconductor substrate, and the intrinsic region is disposed between the first surface and the second surface.

[0173] S200: Form a first doping structure and a second doping structure on the intrinsic semiconductor substrate. The first doping structure has a first doping type and is disposed on the side of the intrinsic region close to the first surface; the second doping structure has a second doping type and is disposed on the side of the intrinsic region close to the second surface; the first doping type and the second doping type are opposite, and the first doping structure, the intrinsic region, and the second doping structure form a p-i-n structure.

[0174] In one embodiment, taking the Figure 1 solar cell shown as an example, S200 specifically includes the following steps:

[0175] S210: Place the intrinsic semiconductor substrate in a high-temperature diffusion furnace, diffuse a p-type dopant (such as boron) into the intrinsic semiconductor substrate, and then remove the oxide layer (borosilicate glass) and the diffusion layer on the second surface of the intrinsic semiconductor substrate to form the first doping structure. Exemplarily, the diffusion depth can be 0.8 μm, and the doping concentration can be 5×10 18 cm -3 . It can be understood that before S210, it is necessary to fabricate a pyramid-shaped textured surface on the first surface and the second surface of the intrinsic semiconductor substrate.

[0176] S220: Clean the intrinsic semiconductor substrate.

[0177] S230: Place the intrinsic semiconductor substrate in a high-temperature diffusion furnace, diffuse an n-type dopant (such as phosphorus) into the intrinsic semiconductor substrate, and then remove the oxide layers (such as borosilicate glass and phosphosilicate glass) on the first surface and the second surface to form the second doping structure, and clean the intrinsic semiconductor substrate. Exemplarily, the diffusion depth can be 0.8 μm, and the doping concentration can be 1×10 20 cm -3 .

[0178] S240: Form a first passivation and antireflection layer on the first doping structure, and form a second passivation and antireflection layer on the second doping structure.

[0179] S250: Form the first electrode and the second electrode, wherein the first electrode penetrates through the first passivation and antireflection layer and is electrically connected to the first doping structure, and the second electrode penetrates through the second passivation and antireflection layer and is electrically connected to the second doping structure. Exemplarily, a silver-aluminum paste can be printed on the first passivation and antireflection layer by screen printing, and a silver paste can be printed on the second passivation and antireflection layer, and then sintered to obtain the first electrode and the second electrode.

[0180] It should be noted that if it is necessary to fabricate Figure 2 the solar cell shown, in S210, it is also necessary to diffuse and form a third doping structure on one side of the intrinsic region close to the first surface. In S230, it is also necessary to diffuse and form a fourth doping structure on one side of the intrinsic region close to the second surface.

[0181] In one embodiment, taking the Figure 3 solar cell shown as an example, S200 specifically includes the following steps:

[0182] S210: Place the intrinsic semiconductor substrate in a high-temperature diffusion furnace, diffuse a p-type dopant (such as boron) into the intrinsic semiconductor substrate, and then remove the oxide layer (borosilicate glass) and the diffusion layer on the second surface of the intrinsic semiconductor substrate to form the first doping structure. Exemplarily, the diffusion depth can be 0.8 μm, and the doping concentration can be 5×10 18 cm -3 . It can be understood that before S210, it is necessary to fabricate pyramid-shaped textured surfaces on the first surface and the second surface of the intrinsic semiconductor substrate.

[0183] S220: Clean the intrinsic semiconductor substrate.

[0184] S230: Form a first tunneling layer on the second surface of the intrinsic semiconductor substrate.

[0185] S240: Form a second doping structure on the first tunneling layer. Exemplarily, first deposit a polysilicon thin film doped with an n-type dopant on the first tunneling layer, and then anneal the polysilicon thin film to activate the dopant, thereby forming the second doping structure.

[0186] S250: Form a first passivation and antireflection layer on the first doping structure, and form a second passivation and antireflection layer on the second doping structure.

[0187] S260: Form the first electrode and the second electrode, wherein the first electrode penetrates through the first passivation and antireflection layer and is electrically connected to the first doping structure, and the second electrode penetrates through the second passivation and antireflection layer and is electrically connected to the second doping structure. Exemplarily, a silver-aluminum paste can be printed on the first passivation and antireflection layer by screen printing, and a silver paste can be printed on the second passivation and antireflection layer, and then sintered to obtain the first electrode and the second electrode.

[0188] In one embodiment, taking the solar cell shown in Figure 5 as an example, S200 specifically includes the following steps:

[0189] S210: Form a first intrinsic semiconductor layer on the first surface of the intrinsic semiconductor substrate.

[0190] S220: Form a second intrinsic semiconductor layer on the second surface of the intrinsic semiconductor substrate.

[0191] S230: Form a first doping structure on the first intrinsic semiconductor layer.

[0192] S240: Form a second doping structure on the second intrinsic semiconductor layer.

[0193] S250: Form a first transparent conductive layer on the first doping structure.

[0194] S260: Form a second transparent conductive layer on the second doping structure.

[0195] S270: Form a first electrode on the first transparent conductive layer and a second electrode on the second transparent conductive layer. Exemplarily, electrode paste can be printed using a screen printing process, and then cured to obtain the first electrode and the second electrode.

[0196] It should be noted that if it is necessary to fabricate the Figure 8 shown solar cell, then a second tunneling layer needs to be formed on the first surface and a third tunneling layer needs to be formed on the second surface before fabricating the first doping structure and the second doping structure, and then the first doping structure is formed on the second tunneling layer and the second doping structure is formed on the third tunneling layer.

[0197] Fourthly, referring to Figure 10 shown, an embodiment of the present application provides another method for fabricating a solar cell. This fabrication method is used to fabricate the solar cell in the second aspect, and this fabrication method specifically includes the following steps:

[0198] S10: Provide an intrinsic semiconductor substrate, which has a first surface and a second surface arranged oppositely. The intrinsic semiconductor substrate is provided with a first conductive region and a second conductive region arranged along a first direction, and the first direction is perpendicular to the thickness direction of the intrinsic semiconductor substrate.

[0199] S20: Form a first passivation layer on the first surface, and form a first doping structure on the side of the first passivation layer away from the intrinsic semiconductor substrate. The first passivation layer is located in the first conductive region, and the first doping structure has a first doping type.

[0200] S30: Form a second passivation layer on the first surface, and form a second doping structure on a side of the second passivation layer away from the intrinsic semiconductor substrate. The second passivation layer is located in the second conductive region. The second doping structure has a second doping type, and the first doping type and the second doping type are opposite. The first doping structure, the intrinsic semiconductor substrate, and the second doping structure constitute a p-i-n structure.

[0201] In one embodiment, the manufacturing method further includes the following steps:

[0202] S40: Form a first anti-reflection layer on the first surface. The first anti-reflection layer covers the first doping structure and the second doping structure, and form a third passivation layer and a second anti-reflection layer on the second surface. The third passivation layer is located between the intrinsic semiconductor substrate and the second anti-reflection layer.

[0203] S50: Form a first electrode and a second electrode. The first electrode is electrically connected to the first doping structure, and the second electrode is electrically connected to the second doping structure.

[0204] In a fifth aspect, an embodiment of the present application provides a photovoltaic module, including the solar cell according to any one of the first aspect and the second aspect.

[0205] Exemplarily, the photovoltaic module includes a plurality of solar cells. The plurality of solar cells can be connected in series by soldering tapes, so as to collect the electric energy generated by a single solar cell for subsequent transmission. Of course, the solar cells can be arranged at intervals or stacked in a shingled form.

[0206] Further, the photovoltaic module further includes a packaging layer and a cover plate (not shown). The packaging layer is used to cover the surface of the battery string, and the cover plate is used to cover the surface of the packaging layer away from the battery string. The solar cells are electrically connected in a whole-piece or multi-piece form to form a plurality of battery strings, and the plurality of battery strings are electrically connected in series and / or in parallel. Specifically, in some embodiments, the plurality of battery strings can be electrically connected by conductive tapes. The packaging layer covers the surface of the solar cells. Exemplarily, the packaging layer can be an organic packaging film such as an ethylene-vinyl acetate copolymer film, a polyethylene octene co-elastic film, or a polyethylene terephthalate film. The cover plate can be a glass cover plate, a plastic cover plate, or other cover plates with a light-transmitting function.

[0207] The photovoltaic module provided by the embodiment of the present application forms a p-i-n structure by arranging an intrinsic region on an intrinsic semiconductor substrate, and arranging a first doping structure and a second doping structure on the opposite sides of the intrinsic region respectively. Thus, compared with the traditional technology of manufacturing solar cells using p-type or n-type semiconductor substrates, the substrate of the solar cell provided by the embodiment of the present application, due to using an intrinsic semiconductor substrate containing an intrinsic region, does not need to be doped with p-type or n-type dopants during the process of manufacturing the blank of the intrinsic semiconductor substrate (such as a silicon rod). On the one hand, it is beneficial to reduce the complexity of the solar cell manufacturing process. On the other hand, it is more beneficial to the growth of silicon crystals, can reduce the dislocation density in the silicon crystals, increase the pulling speed of the single crystal silicon, and reduce the defect density. Further, after the silicon rod is cut into wafers, there is no resistivity difference in the radial and longitudinal directions of the intrinsic silicon wafers. On the one hand, it is beneficial to improve the electrical consistency of the wafers, thereby improving the conversion efficiency of the solar cell; on the other hand, it is beneficial to improve the utilization rate of the silicon rod, thereby reducing the manufacturing cost of the solar cell.

[0208] In a sixth aspect, the embodiment of the present application provides a photovoltaic system, including the photovoltaic module in the fifth aspect.

[0209] Specifically, the photovoltaic system can be applied in a photovoltaic power station, such as a ground power station, a rooftop power station, a water surface power station, etc., or can also be applied to devices or apparatuses that use solar energy for power generation, such as a user solar power supply, a solar street lamp, a solar vehicle, a solar building, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is to say, the photovoltaic system can be applied in all fields that require solar power generation. Taking a photovoltaic power generation system network as an example, the photovoltaic system can include a photovoltaic array, a busbar trunking unit, and an inverter. The photovoltaic array can be an array combination of multiple photovoltaic modules. For example, multiple photovoltaic modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the busbar trunking unit, and the busbar trunking unit can collect the current generated by the photovoltaic array. After the collected current flows through the inverter and is converted into alternating current required by the commercial power grid, it is connected to the commercial power grid to achieve solar power supply.

[0210] The photovoltaic system provided by the embodiment of the present application forms a p-i-n structure by arranging an intrinsic region on an intrinsic semiconductor substrate and arranging a first doping structure and a second doping structure on the opposite sides of the intrinsic region respectively. Thus, compared with the traditional technology of manufacturing solar cells using p-type or n-type semiconductor substrates, the substrate of the solar cell provided by the embodiment of the present application, due to using an intrinsic semiconductor substrate containing an intrinsic region, does not need to be doped with p-type or n-type dopants during the process of manufacturing the blank of the intrinsic semiconductor substrate (such as a silicon rod). On the one hand, it is beneficial to reduce the complexity of the solar cell manufacturing process. On the other hand, it is more conducive to the growth of silicon crystals, can reduce the dislocation density in the silicon crystals, increase the pulling speed, and reduce the defect density. Further, after cutting the silicon rod into wafers, there is no resistivity difference in both the radial and longitudinal directions of the intrinsic silicon wafers. On the one hand, it is beneficial to improve the electrical consistency of the wafers, thereby improving the conversion efficiency of the solar cells; on the other hand, it is beneficial to improve the utilization rate of the silicon rod, thereby reducing the manufacturing cost of the solar cells.

[0211] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0212] The above-described embodiments merely represent several implementation manners of the present application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A solar cell, characterized in that, Comprising: An intrinsic semiconductor substrate, including an intrinsic region, a first surface, and a second surface, the first surface and the second surface being disposed on opposite sides of the intrinsic semiconductor substrate, and the intrinsic region being disposed between the first surface and the second surface; the intrinsic semiconductor substrate is single-crystalline silicon; A first doping structure, having a first doping type, the first doping structure being disposed on a side of the intrinsic region close to the first surface; And A second doping structure, having a second doping type, the second doping structure being disposed on a side of the intrinsic region close to the second surface; Wherein, the first doping type and the second doping type are opposite, and the first doping structure, the intrinsic region, and the second doping structure form a p-i-n structure; The first doping structure is disposed on a side of the first surface away from the second surface, and the first doping structure is a polysilicon thin film; the second doping structure is disposed on a side of the second surface away from the first surface, and the second doping structure is a polysilicon thin film; The solar cell further includes: A second tunneling layer, disposed on the first surface, and the first doping structure is disposed on a side of the second tunneling layer away from the second surface; and A third tunneling layer, disposed on the second surface, and the second doping structure is disposed on a side of the third tunneling layer away from the first surface; The solar cell further includes a third doping structure, the third doping structure having a second doping type and being disposed on a side of the first doping structure away from the intrinsic region; the third doping structure and the first doping structure form a p-n junction; The solar cell further includes a fourth doping structure, the fourth doping structure having a first doping type and being disposed on a side of the second doping structure away from the intrinsic region; the fourth doping structure and the second doping structure form a p-n junction.

2. The solar cell according to claim 1, wherein, The resistivity of the intrinsic region is greater than 100 Ω·cm; And / or, the doping concentration of the p-type dopant in the intrinsic region is less than or equal to 1.3×10 14 cm -3 , and the doping concentration of the n-type dopant in the intrinsic region is less than or equal to 4.4×10 13 cm -3 .

3. The solar cell according to claim 1, wherein The thickness of the intrinsic semiconductor substrate is between 50 μm and 300 μm.

4. The solar cell according to claim 1, characterized in that, The doping concentration of the first doping structure is between 3×10 18 cm -3 -5×10 20 cm -3 ; and / or, the doping concentration of the second doping structure is between 3×10 18 cm -3 -5×10 20 cm -3 .

5. The solar cell according to claim 1, wherein There is a first dimension between a side of the first doping structure close to the first surface and a side of the first doping structure away from the first surface, and the first dimension is between 5 nm and 5000 nm; And / or, there is a second dimension between a side of the second doping structure close to the first surface and a side of the second doping structure away from the first surface, and the second dimension is between 5 nm and 5000 nm.

6. The solar cell according to claim 1, wherein, The solar cell further includes: A first passivation and antireflection layer, disposed on a side of the first doping structure away from the intrinsic region; A first electrode, disposed on a side of the first doping structure away from the second doping structure, and penetrating through the first passivation and antireflection layer and being electrically connected to the first doping structure; A second passivation and antireflection layer, disposed on a side of the second doping structure away from the intrinsic region; and A second electrode, disposed on a side of the second doping structure away from the first doping structure, and penetrating through the second passivation and antireflection layer and being electrically connected to the second doping structure.

7. A photovoltaic module, characterized in that, Comprising the solar cell according to any one of claims 1-6.

8. A photovoltaic system, characterized in that, Comprising the photovoltaic module according to claim 7.

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