Data writing method, electronic device, and computer-readable storage medium
By using the processor to parse the data file to be parsed and update the check code, the problem of abnormal self-test alarm after remote upgrade of secondary equipment is solved, remote upgrade without manual on-site operation is realized, and the level of automation and intelligence is improved.
Patent Information
- Application Number
- CN202410898411.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-05
- Publication Date
- 2025-10-24
- Estimated Expiration
- 2044-07-05
AI Technical Summary
During the traditional remote upgrade process of secondary equipment, the data in the upgraded device and the non-volatile memory do not match, resulting in abnormal self-test alarms. This requires on-site operation by operation and maintenance personnel, which consumes time and manpower and has a low level of automation and intelligence.
The processor parses the data file to be parsed, temporarily stores the stored data in the non-volatile memory into the volatile memory, inserts the fixed value data into the volatile memory according to the insertion segment positioning information and the check code, and updates the check code. Finally, the stored data and the fixed value data are rewritten in the non-volatile memory to avoid changing the stored data.
It enables remote upgrades without manual on-site intervention, avoids abnormal self-test alarms, improves the automation and intelligence level of secondary equipment operation and maintenance, and saves time and manpower.
Smart Images

Figure CN118981323B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of communication, and particularly relates to a data writing method, an electronic device and a computer readable storage medium. BACKGROUND
[0002] A power system is a complex system composed of primary equipment and secondary equipment. The primary equipment is used to provide power for the power system, and the secondary equipment is used to control, protect, measure and monitor the power system. In order to ensure the safe and stable operation of the power system, the operation and maintenance personnel need to operate and maintain the secondary equipment.
[0003] In the traditional technical solution, part of the operation process of the operation and maintenance of the secondary equipment needs to be completed by the operation and maintenance personnel on site. For example, when remotely upgrading the secondary equipment such as a relay protection device, since the relay protection device after the upgrade increases the fixed value data, the newly added fixed value data does not match the data fixed in the non-volatile memory of the relay protection device, which will cause the relay protection device to produce an alarm exception after self-checking. This alarm exception needs to be eliminated by the operation and maintenance personnel on site. The operation and maintenance personnel on site not only need complex safety measures and processes, but also need to spend a lot of time and manpower to manually check the data. The automation level and the intelligent level of the traditional technical solution for the operation and maintenance of the secondary equipment are not high. SUMMARY
[0004] The embodiments of the present application provide a data writing method, an electronic device and a computer readable storage medium, which can save the time and manpower consumed by the remote upgrade of the control device, simplify the remote upgrade process of the control device, and improve the automation level and the intelligent level of the remote upgrade of the control device.
[0005] In a first aspect, the embodiments of the present application provide a data writing method. The method is applied to a processor, and the processor is configured in a control device. The method comprises the following steps: if it is detected that there is a data file to be parsed, the data file to be parsed is parsed to obtain a parsed data file, the parsed data file comprises fixed value data, insertion segment positioning information of the fixed value data, and fixed value data verification code of the fixed value data; stored data in a first memory is read, and the stored data is temporarily stored in a first address segment in a second memory, the stored data comprises a first verification code, the first verification code is used for verifying the stored data, the stored data is data required for normal operation of the control device, the first memory is a non-volatile memory, and the second memory is a volatile memory; the fixed value data is inserted into the first address segment in the second memory according to the insertion segment positioning information; a second verification code is calculated according to the fixed value data verification code and the stored data, and the first verification code in the second memory is modified into the second verification code, the second verification code is used for verifying the stored data and the fixed value data; the stored data and the fixed value data in the second memory are read, and the stored data and the fixed value data are written into the first memory.
[0006] In some embodiments, the parsed data file further comprises an insertion segment step, the insertion segment positioning information comprises at least one insertion segment sub-positioning information, the fixed value data comprises at least one fixed value sub-data, the insertion segment step is used for representing a bit address interval between any two insertion segment sub-positioning information, and the at least one insertion segment sub-positioning information corresponds to the at least one fixed value sub-data in a one-to-one manner; the fixed value data is inserted into the first address segment in the second memory according to the insertion segment positioning information, which comprises the following steps: at least one insertion address of the at least one fixed value sub-data in the second memory is calculated according to the at least one insertion segment sub-positioning information and the insertion segment step, the at least one fixed value sub-data corresponds to the at least one insertion address in a one-to-one manner, and the at least one insertion address is an address in the first address segment; the first fixed value sub-data is inserted into the first insertion address in the second memory, the first fixed value sub-data is data in the at least one fixed value sub-data, and the first insertion address is an address corresponding to the first fixed value sub-data in the at least one insertion address.
[0007] In some embodiments, the processor is a management processor, and before the parsed data file is parsed, the method further comprises the following steps: a remote operation and maintenance upgrade package is received; the remote operation and maintenance upgrade package is verified to obtain a verification result, the verification result is used for representing whether the data file to be parsed is carried in the remote operation and maintenance upgrade package; and if the verification result indicates that the data file to be parsed is carried in the remote operation and maintenance upgrade package, the data file to be parsed is sent to at least one non-management processor.
[0008] In some embodiments, the check result is further used to represent whether the remote operation upgrade package carries at least one first update application package and whether the remote operation upgrade package carries a second update application package, the at least one first update application corresponds to one of the at least one non-management processor one by one, the at least one non-management processor is used to run the at least one first update application package, and the management processor is used to run the second update application package; if the check result indicates that the remote operation upgrade package carries the to-be-analyzed data file, the to-be-analyzed data file is sent to the at least one non-management processor, including: if the check result indicates that the remote operation upgrade package carries the to-be-analyzed data file, the at least one first update application package, and the second update application package, the to-be-analyzed data file is sent to the at least one non-management processor, and the corresponding first update application package is sent to the first non-management processor, the first non-management processor being any one of the at least one non-management processor.
[0009] In some embodiments, after the corresponding first update application package is sent to the first non-management processor, the second update application is installed based on the second update application package; if installation completion information sent by each of the at least one non-management processor is received, a whole-machine reset instruction is executed, the whole-machine reset instruction is used to restart the control device, and the installation completion information is used to represent that the corresponding first update application has been installed.
[0010] In some embodiments, if it is detected that the to-be-analyzed data file exists, the to-be-analyzed data file is analyzed to obtain an analyzed data file, including: in response to a received power-on signal, it is detected whether the to-be-analyzed data file exists, the power-on signal is used to indicate that the control device has been restarted; if it is detected that the to-be-analyzed data file exists, the to-be-analyzed data file is analyzed to obtain the analyzed data file.
[0011] In some embodiments, after the stored data and the constant value data in the second memory are read and written into the first memory, the analyzed data file is deleted.
[0012] In some embodiments, a file format of the to-be-analyzed data file is a binary format.
[0013] In a second aspect, an embodiment of the present application provides an electronic device, including a processor and a memory, the processor is used to execute a computer program stored in the memory to implement the method in any one of the above-mentioned first aspect.
[0014] In a third aspect, an embodiment of the present application provides a computer readable storage medium, the computer readable storage medium stores a computer program, the computer program is executed by a processor to implement the method in any one of the above-mentioned first aspect.
[0015] In the technical scheme provided by the embodiment of the present application, the processor can parse the to-be-parsed data file to obtain a parsed data file after detecting the to-be-parsed data file, and temporarily store the stored data in the non-volatile memory into the volatile memory. Then, according to the insertion segment positioning information in the parsed data file, the fixed value data in the parsed data file is inserted into the volatile memory, and a second check code is calculated according to the fixed value data and the stored data, and the second check code is updated to the volatile memory. Finally, the stored data and the fixed value data are re-written in the non-volatile memory. The case that the stored data in the non-volatile memory is changed when the fixed value data is written into the non-volatile memory can be avoided. The second check code contains data information corresponding to the fixed value data and the stored data, which can avoid abnormal alarm of the control device when performing board check or board check, thereby realizing remote upgrading of the control device, saving time and manpower consumed by remote upgrading of the control device, simplifying the remote upgrading process of the control device, and improving the automation level and intelligent level of the remote upgrading of the control device. BRIEF DESCRIPTION OF DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0017] Figure 1 is a kind of application scene schematic diagram of the data writing method provided by the embodiment of the present application.
[0018] Figure 2 is a kind of flow schematic diagram of the data writing method provided by the embodiment of the present application.
[0019] Figure 3 is another kind of flow schematic diagram of the data writing method provided by the embodiment of the present application.
[0020] Figure 4 is a kind of non-volatile memory schematic diagram of the data writing method provided by the embodiment of the present application.
[0021] Figure 5 is a kind of volatile memory schematic diagram of the data writing method provided by the embodiment of the present application.
[0022] Figure 6 is a kind of data writing device schematic diagram provided by the embodiment of the present application.
[0023] Figure 7 is a kind of schematic diagram of electronic equipment provided by the embodiment of the present application. DETAILED DESCRIPTION
[0024] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known methods, devices, circuits, and
[0025] It will be understood that the terms "comprises" and / or "comprising," when used in this specification, include the presence of one or more features, integers, steps, operations, elements, and / or components but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0026] It will be understood that the term "and / or," when used in the specification and in the following claims, refers to one and / or a combination of the associated listed items.
[0027] As used in this specification and claims, the terms "if" and "when" can be interpreted to mean "upon determination" or "in response to a determination" or "in response to detecting," depending on the context. Similarly, the phrase "if determined" or "if detected [the described condition or event]" can be interpreted to mean "upon determining" or "in response to determining" or "upon detecting [the described condition or event]" or "in response to detecting [the described condition or event]," depending on the context.
[0028] In addition, the terms "first," "second," "third," etc. as used in the description of the specification and the appended claims are not used to denote or imply relative importance but are used to distinguish one element from another.
[0029] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" or "in a various embodiment" or "in some embodiments" in various places throughout this specification are not necessarily all referring to the same embodiment, unless otherwise specified. The terms "comprise," "comprising," "including," "containing," "have," "having," and "include" and their variations are meant to be open-ended terms that do not limit any of the claim's scope to the components, features, structures, or steps specifically listed in the claims.
[0030] In a power system, secondary equipment can control, protect, measure and monitor the power system to ensure the safe and stable operation of the power system. The secondary equipment can include a relay protection device, an automatic power generation regulating device, an excitation control device, a load control device, a telemetry and remote control device, a data acquisition device, a monitoring system, a communication device, etc. To ensure the safe and stable operation of the power system, an operation and maintenance personnel needs to operate and maintain the secondary equipment.
[0031] In the traditional technical solution, when the operation and maintenance personnel needs to remotely upgrade the secondary equipment, since the device APP (Application, application program) of the secondary equipment after the upgrade does not match the data fixed in the non-volatile memory in the secondary equipment, the secondary equipment can generate a self-check alarm exception. This self-check alarm exception needs to be eliminated by the operation and maintenance personnel on site. The operation and maintenance personnel on site not only needs complex safety measures and processes, but also needs to spend a lot of time and manpower to manually check the data. The automation level and the intelligent level of the operation and maintenance of the secondary equipment in the traditional technical solution are not high.
[0032] Therefore, the embodiments of the present application provide a data writing method, which can avoid the self-check alarm exception of the secondary equipment after the remote upgrade, and improve the automation level and the intelligent level of the operation and maintenance of the secondary equipment.
[0033] The technical solutions of the embodiments of the present application will be described below with reference to the accompanying drawings.
[0034] As shown in Figure 1 Fig. 1 is a schematic diagram of an application scenario of a data writing method provided by the embodiments of the present application. As shown in Figure 1The plurality of processors correspond to a plurality of non-volatile memories (a first non-volatile memory, a second non-volatile memory, a third non-volatile memory and a fourth non-volatile memory). The plurality of processors are connected with the corresponding non-volatile memories respectively, can read instructions and data from the corresponding non-volatile memories, and perform operation and processing on the data. The plurality of processors are connected with the volatile memories respectively, for reading data in the non-volatile memories and temporarily storing to the volatile memories. The plurality of processors include an MCPU (Management CPU), a PCPU (Protection CPU), a BCPU (Blocking CPU) and an SCOM (Communication Module). The MCPU is a management mainboard with an operating system, used for managing and coordinating information of each subboard, and performing device interface display and external communication interaction. The PCPU is a core protection CPU in the relay protection device, is a subboard without an operating system, and can complete execution of a relay protection logic segment. The BCPU is a core blocking CPU in the relay protection device, is a subboard without an operating system, is a double-redundant PCPU, and is used for completing execution of the relay protection logic segment. The SCOM is a subboard without an operating system, used for high-speed real-time bus communication between internal subboards of the device, and interacting core data of the relay protection device.
[0035] The data writing method provided by the embodiment of the application can be applied to a processor, and the processor is configured in a control device. The control device can be a secondary device in a power system, for example, a relay protection device, an automatic generation regulation device, an excitation control device, a load control device, a telemetry and remote control device, a data acquisition device, a monitoring system, a communication device and the like. The data writing method provided by the embodiment of the application is exemplarily described taking the relay protection device as an example. It can be understood that the data writing method provided by the embodiment of the application can also be used in other devices which need to write data.
[0036] In the embodiment of the application, an operation and maintenance personnel can determine the required function or the required modified fixed value of the relay protection device by analyzing the actual situation of a substation in a power system, develop corresponding software, and generate a remote operation and maintenance upgrade package to ensure the correctness and reliability of the software function. The remote operation and maintenance upgrade package is transmitted to the relay protection device through a power grid dispatching master station to realize remote upgrade of the relay protection device without manual on-site intervention.
[0037] The data writing method provided by the embodiment of the application will be exemplarily described below in combination with the method flow in Figures 2 to 5
[0038] As shown in FIG. 1, the data writing method provided by the embodiment of the application includes the following steps. Figure 2 As shown, it is a flow diagram of a data writing method provided by an embodiment of the application. After receiving the remote operation and maintenance upgrade package sent by the power grid dispatching master station, the relay protection device performs the following steps:
[0039] Step S201: receiving the remote operation and maintenance upgrade package.
[0040] In the embodiment of the application, the power grid dispatching master station can send the remote operation and maintenance upgrade package to the management processor of the relay protection device, and the management processor can be a mainboard with an operating system. For example, the management processor can be an MCPU.
[0041] The remote operation and maintenance upgrade package can include a to-be-parsed data file and a plurality of update application program packages. The to-be-parsed data file can include the setting value data required for remote upgrade of the relay protection device. The setting value data can be the setting parameters required for the protection action of the relay protection device, including but not limited to the action value, the time setting value, the specific curve, and the logic relationship data. The action value can be the action threshold value of the relay protection device, for example, the action current value of the overcurrent relay. The time setting value can be the action delay time of the relay protection device, for example, the delay time of the overcurrent relay. The specific curve can be the mathematical expression of the action characteristic of the relay protection device, for example, the inverse time-lag characteristic curve of the overcurrent relay. The logic relationship data can be the logic relationship data of the action of the relay protection device, for example, the interlocking relationship data between multiple relays.
[0042] In the embodiment of the application, the file format of the to-be-parsed data file can be a binary format. Since the file format of the binary format can save storage capacity, when the processor receives the to-be-parsed data file, the occupation of the to-be-parsed data file to the memory of the processor can be reduced, thereby saving storage resources and prolonging the use time of the hardware.
[0043] The number of the plurality of update application program packages can be consistent with the number of the processors in the relay protection device. For example, when the relay protection device includes four processors (one mainboard and three slave boards), the remote operation and maintenance upgrade package contains four update application program packages. The four update application program packages correspond to the four processors respectively, and are used for remote operation and maintenance upgrade of the relay protection device.
[0044] Step S202: verifying the remote operation and maintenance upgrade package to obtain a verification result, the verification result being used to represent whether the remote operation and maintenance upgrade package carries the to-be-parsed data file and at least one update application program package.
[0045] In the embodiments of the present application, the at least one update application package can be an update application package corresponding to a management processor in the relay protection device, or an update application package corresponding to a management processor (a mainboard processor with an operating system) and a non-management processor (a subboard processor without an operating system). It can be understood that when the relay protection device only includes one management processor, the remote operation and maintenance upgrade package can only carry one update application package. When the relay protection device includes one management processor and at least one non-management processor, the remote operation and maintenance upgrade package can carry at least one first update application package and a second update application package. The at least one first update application package corresponds to the at least one non-management processor in one-to-one correspondence, the at least one non-management processor is configured to run the at least one first update application package, and the management processor is configured to run the second update application package.
[0046] Step S203: If the verification result indicates that the remote operation and maintenance upgrade package carries the to-be-analyzed data file, the at least one first update application package and the second update application package, the to-be-analyzed data file is sent to the at least one non-management processor, and the corresponding first update application package is sent to the first non-management processor, which is any one of the at least one non-management processor.
[0047] In the embodiments of the present application, after receiving the remote operation and maintenance upgrade package, the management processor can perform integrity verification on the data in the remote operation and maintenance upgrade package, to ensure that the remote operation and maintenance upgrade package at least includes the to-be-analyzed data file. If the remote operation and maintenance upgrade package does not include the to-be-analyzed data file, the management processor no longer executes the subsequent data writing method process.
[0048] The management processor can copy the to-be-analyzed data file to a working directory, so as to run the to-be-analyzed data file. The management processor also sends the to-be-analyzed data file to the working directory corresponding to the at least one non-management processor, so as to run the to-be-analyzed data file by each non-management processor.
[0049] Step S204: Install the second update application based on the second update application package.
[0050] In the embodiments of the present application, after the management processor sends the corresponding update application package to the one or more non-management processors, the management processor installs the second update application according to a preset installation process, and listens to the installation result of the installation of the corresponding first update application package by each non-management processor.
[0051] After receiving the first update application package sent by the management processor, the one or more non-management processors install the first update application according to a preset installation process.
[0052] Step S205: If the installation completion information sent by each of the at least one non-management processor is received, a whole machine reset instruction is executed, the whole machine reset instruction is used to restart the control device, and the installation completion information is used to indicate that the corresponding first update application has completed installation.
[0053] In the embodiment of the present application, the management processor can listen to and receive the installation completion information sent by each non-management processor when installing the second update application. If the installation completion information sent by each non-management processor is received, and when the second update application has been installed, the whole machine reset instruction is executed to restart the relay protection device.
[0054] The management processor restarts the relay protection device, so that the code in each processor is re-run, i.e., the device is restored to the initial state, so as to write the setting value data in the data file to be parsed. After the management processor restarts the relay protection device, if each processor (including the management processor and the non-management processor) determines that the current relay protection device has been powered on, it is detected whether the data file to be parsed exists in the working directory.
[0055] In the embodiment of the present application, each processor in the relay protection device can determine that the current relay protection device has been powered on through one or more of the power management circuit, the reset circuit, the watchdog circuit, the external signal and the internal clock. For the method of learning through the power management circuit, the power management circuit of the relay protection device can send a power-on signal to each processor when the relay protection device starts or is powered on, and the power-on signal is used to indicate that the relay protection device has been restarted. The power-on signal can be an interrupt signal, which is used to trigger each processor to execute the corresponding start-up code. For the method of learning through the watchdog circuit, the reset circuit of the relay protection device can reset each processor to a known state when the relay protection device starts or is powered on, so that each processor executes the pre-defined start-up code. For the method of learning through the watchdog circuit, the watchdog circuit of the relay protection device periodically sends a signal to each processor, and if each processor does not respond to the signal within a preset time, the reset circuit will be triggered to reset each processor, which can prevent each processor from falling into a dead loop or being unable to run normally when starting or being powered on. For the method of learning through the external signal, the relay protection device can notify each processor that the current device has started or been powered on through an external signal, for example, through some buttons or switches to trigger the start-up process. For the method of learning through the internal clock, the relay protection device can use the internal clock to time the start-up of each processor. The method of learning by each processor in the relay protection device that the current relay protection device has been powered on is not limited in the embodiment of the present application.
[0056] In the embodiment of the present application, if the processor determines that the current relay protection device has been powered on, it is detected whether there is a to-be-resolved data file in the working directory. The corresponding data in the to-be-resolved data file is written into the non-volatile memory, so as to realize the remote automatic upgrade processing of the relay protection device. On the basis of not needing human on-site operation, it is avoided that the self-checking alarm exception is generated after the remote upgrade of the secondary equipment, and the automation level and the intelligent level of the operation and maintenance of the secondary equipment are improved.
[0057] As shown in Figure 3 , another flowchart of a data writing method provided by the embodiment of the present application. If the processor (including the management processor and the non-management processor) detects that there is a to-be-resolved data file in the working directory, the data is written through the following steps:
[0058] Step S301: If it is detected that there is a to-be-resolved data file, the to-be-resolved data file is resolved to obtain a resolved data file. The resolved data file includes fixed value data, insertion segment positioning information of the fixed value data, and fixed value data check code of the fixed value data.
[0059] In the embodiment of the present application, if the processor (including the management processor and the non-management processor) detects that there is a to-be-resolved data file in the working directory, the to-be-resolved data file is resolved to obtain a resolved data file. In the embodiment of the present application, the resolved data file can include fixed value data, insertion segment positioning information of the fixed value data, and fixed value data check code of the fixed value data. Optionally, the resolved data file can also include an insertion segment step, which is used to represent the bit address interval between any two insertion segment sub-positioning information.
[0060] The insertion segment positioning information can include one or more insertion segment sub-positioning information, and the fixed value data can include one or more fixed value sub-data. The insertion segment sub-positioning information and the fixed value sub-data correspond to each other in one-to-one manner. The insertion segment positioning information can be used to represent the insertion position of one or more fixed value sub-data in the non-volatile memory, and the insertion segment step can be used to represent the distance between two insertion positions.
[0061] For example, as shown in Figure 4 , a non-volatile memory diagram of a data writing method provided by the embodiment of the present application. It includes four non-volatile memories (first non-volatile memory, second non-volatile memory, third non-volatile memory and fourth non-volatile memory), which are connected with MCPU, PCPU, BCPU and SCOM through internal buses. As shown in Figure 4 , the insertion segment positioning information of the fixed value data is used to represent the positions of the plurality of "insertion segment" arrows in the non-volatile memory. The insertion segment step is used to represent the bit address interval between any two "insertion segment" arrows.
[0062] For example, for parsing the fixed value data contained in the data file, if the voltage of the line protection device is 220 kV, the current running fixed value area information of the field device is 01, the fixed value code is 100 (i.e. index, i.e. the serial number of the fixed value data is 100), the positive code value is 0x000000AA, and the inverse code value is 0xFFFFFF55, the content of the fixed value data can be: 00007D805501011F03E802D07CC028600064000000AAFFFFFF55. The inverse code value is used to check the reading result.
[0063] Step S302: reading the stored data in the first memory and temporarily storing the stored data in the first memory segment in the second memory, the stored data including the first check code, the first check code being used to verify the stored data, the stored data being the data required for the normal operation of the control device, the first memory being a non-volatile memory, and the second memory being a volatile memory.
[0064] For example, referring to Figure 1 , the volatile memory can be a memory, and the plurality of processors can be connected with the memory and temporarily store data through the memory.
[0065] In the embodiment of the application, to avoid changing the data (stored data) fixed in the non-volatile memory in the process of writing the fixed value data, the processor can first temporarily store the data fixed in the non-volatile memory in the memory (second memory). The data fixed in the non-volatile memory of the relay protection device can include: device parameters, fixed value data, protection logic, event record and self-check data. The non-volatile memory is used to ensure that the fixed data will not be lost even after the device is powered off, so as to ensure the normal operation and maintenance of the relay protection device.
[0066] For example, referring to Figure 4 , the stored data can be the data in each rectangular box of the first non-volatile memory, the second non-volatile memory, the third non-volatile memory and the fourth non-volatile memory, including: Set_Sys (system fixed value), Set (protection fixed value) (a plurality of protection fixed value areas corresponding to the first non-volatile memory of the MCPU), Parameter (device parameters), SoftSet (soft press plate), TrigCfg (trip configuration), TLVPara (TLV parameters), SetCrc (fixed value crc), ParameterCrc (device parameter crc), SoftSetCrc (soft press plate crc), TrigCfgCrc (trip configuration crc), TLVParaCrc (TLV parameter crc) and Others (other settings).
[0067] In the embodiment, the processor reads the stored data in the first memory, and stores the stored data in the second memory, and the data arrangement order of the stored data in the second memory is the same as that in the first memory.
[0068] For example, as shown in Figure 5 , a schematic diagram of a volatile memory provided by a data writing method in the embodiment is shown. As shown in Figure 5 , the processor stores the stored data in the first non-volatile memory in the second memory. Figure 4 , the data arrangement order of the stored data in the second memory is the same as that in the first non-volatile memory.
[0069] Step S303: inserting the constant data into the first address segment in the second memory according to the insertion segment positioning information.
[0070] In the embodiment, the processor can calculate at least one insertion address of at least one constant sub-data in the second memory according to at least one insertion segment sub-positioning information and an insertion segment step, the at least one constant sub-data corresponds to the at least one insertion address one by one, and the at least one insertion address is an address in the first address segment. The processor inserts a first constant sub-data into a first insertion address in the second memory, the first constant sub-data is data in the at least one constant sub-data, and the first insertion address is an address corresponding to the first constant sub-data in the at least one insertion address.
[0071] Since the processor directly writes the constant data into the memory, the data (stored data) in the memory is changed. In the technical solution provided by the embodiment, when the processor inserts the first constant sub-data into the first insertion address in the second memory, the constant sub-data can be inserted by copying data. For example, as shown in Figure 5 , after determining the first insertion address in the plurality of insertion addresses, the processor can copy the data before the first insertion address in the stored data to the free bit address in the second memory, and then insert the first constant sub-data into the position of the first insertion address. As shown in Figure 5 , the processor can copy the data after the first insertion address and before the second insertion address to the second memory, and then insert the second constant sub-data into the position of the second insertion address, and so on until all the constant sub-data are inserted. As shown in Figure 5 , the constant sub-data and the stored data are alternately stored in the second memory.
[0072] Step S304: Calculate a second check code based on the fixed value data check code and the stored data, and modify the first check code in the second memory into the second check code, where the second check code is used to verify the stored data and the fixed value data.
[0073] In an embodiment of the present application, in order to ensure the correctness and reliability during operation, the relay protection device can perform local board verification and inter-board verification after remote upgrade processing. If the data in the update verification code is consistent with the data in the relay protection device firmware (including non-volatile memory), the relay protection device can determine that the data in the firmware has not been illegally tampered with or damaged. If the data in the update verification code is inconsistent with the data in the relay protection device firmware, the relay protection device can determine that there may be a problem with the data in the firmware. The relay protection device will generate an abnormal alarm. The processor of the relay protection device calculates the update verification code through the fixed value data verification code and the stored data, which can ensure that the update verification code is consistent with the data in the relay protection device firmware, avoiding abnormal alarms in the relay protection device. This ensures the normal operation of the relay protection device.
[0074] For example, see Figure 5 In (a), after the processor calculates the second check code from the fixed value data check code and the stored data, it can modify the first check code of the bit address indicated by the "modify" arrow in the second memory to the second check code.
[0075] Step S305: Read the stored data and the fixed value data in the second memory, and write the stored data and the fixed value data into the first memory.
[0076] After the processor modifies the first check code in the second memory into the second check code, it can rewrite the stored data and fixed value data temporarily stored in the second memory into the first memory to ensure the normal operation of the relay protection device. Figure 5 As shown, the stored data and the fixed value data in the second memory are alternately stored in the second memory. After the stored data and the fixed value data in the second memory are rewritten into the first memory, the arrangement order of the stored data and the fixed value data in the first memory is the same as the arrangement order in the second memory.
[0077] In an embodiment of the present application, after the processor rewrites the stored data and constant value data alternately stored in the second memory into the first memory, it can delete the parsed data file to avoid the relay protection device repeatedly updating and reading the parsed data file, thereby causing a control device operation failure.
[0078] In the technical scheme provided by the embodiment, the processor can parse the to-be-parsed data file to obtain a parsed data file after detecting the to-be-parsed data file, and temporarily store the stored data in the nonvolatile memory into the volatile memory. Then, according to the insertion segment positioning information in the parsed data file, the fixed value data in the parsed data file is inserted into the volatile memory, and a second check code is calculated according to the fixed value data and the stored data, and the second check code is updated to the volatile memory. Finally, the stored data and the fixed value data are re-written in the nonvolatile memory. The situation that the stored data in the nonvolatile memory is changed when the fixed value data is written into the nonvolatile memory can be avoided. The second check code contains data information corresponding to the fixed value data and the stored data, which can avoid abnormal alarm of the control device when performing board check or board check, thereby realizing remote upgrading of the control device, saving time and manpower consumed by remote upgrading of the control device, simplifying the remote upgrading process of the control device, and improving the automation level and intelligent level of the remote upgrading of the control device.
[0079] It should be understood that, without logical conflicts, each of the above embodiments can be combined with each other to adapt to actual application requirements. The specific embodiments or implementation schemes obtained by the combination still belong to the protection scope of the present application.
[0080] Corresponding to the data writing method in the above embodiment, the embodiment of the present application provides a data writing device 60, which can be realized by software, hardware or a combination of the two to become part or all of a computer device, for executing the steps in the data writing method in the above embodiment.
[0081] Figure 6 A structure diagram of a data writing device provided by the embodiment of the present application is shown, and only parts related to the embodiment of the present application are shown for ease of illustration.
[0082] Reference Figure 6 The data writing device 60 includes a parsing module 610, a reading module 620, a first writing module 630, an updating module 640, and a second writing module 650.
[0083] The parsing module 610 is configured to, when detecting that there is a to-be-parsed data file, parse the to-be-parsed data file to obtain a parsed data file, the parsed data file containing fixed value data, insertion segment positioning information of the fixed value data, and a fixed value data check code of the fixed value data.
[0084] The reading module 620 is configured to read the stored data in the first memory and temporarily store the stored data in the first address segment in the second memory, the stored data including the first check code, the first check code being used for verifying the stored data, the stored data being data required for normal operation of the control device, the first memory being a non-volatile memory, and the second memory being a volatile memory.
[0085] The first writing module 630 is configured to insert the constant value data into the first address segment in the second memory according to the insertion segment positioning information.
[0086] The updating module 640 is configured to calculate a second check code according to the constant value data check code and the stored data, and modify the first check code in the second memory to the second check code, the second check code being used for verifying the stored data and the constant value data.
[0087] The second writing module 650 is configured to read the stored data and the constant value data in the second memory and write the stored data and the constant value data into the first memory.
[0088] In some embodiments, the parsing of the data file further includes an insertion segment step length, the insertion segment positioning information includes at least one insertion segment sub-positioning information, the constant value data includes at least one constant value sub-data, the insertion segment step length is used to represent the interval of bit addresses between any two insertion segment sub-positioning information, and the at least one insertion segment sub-positioning information corresponds to the at least one constant value sub-data in a one-to-one manner; the first writing module 630 is further configured to calculate at least one insertion address of the at least one constant value sub-data in the second memory according to the at least one insertion segment sub-positioning information and the insertion segment step length, the at least one constant value sub-data corresponding to the at least one insertion address in a one-to-one manner, and the at least one insertion address being an address in the first address segment; and insert a first constant value sub-data into a first insertion address in the second memory, the first constant value sub-data being data in the at least one constant value sub-data, and the first insertion address being an address corresponding to the first constant value sub-data in the at least one insertion address.
[0089] In some embodiments, the processor is a management processor, and the parsing module 610 is further configured to receive a remote operation and maintenance upgrade package, perform verification on the remote operation and maintenance upgrade package to obtain a verification result, and send the data file to be parsed to the at least one non-management processor if the verification result indicates that the data file to be parsed is carried in the remote operation and maintenance upgrade package.
[0090] In some embodiments, the verification result is further used to represent whether the remote operation upgrade package carries the at least one first update application package and whether the remote operation upgrade package carries the second update application package, the at least one first update application corresponds to the at least one non-management processor one by one, the at least one non-management processor is used to run the at least one first update application package, and the management processor is used to run the second update application package; the parsing module 610 is further used to: if the verification result indicates that the remote operation upgrade package carries the to-be-parsed data file, the at least one first update application package and the second update application package, the to-be-parsed data file is sent to the at least one non-management processor, and the corresponding first update application package is sent to the first non-management processor, the first non-management processor being any one of the at least one non-management processor.
[0091] In some embodiments, the parsing module 610 is further used to: install the second update application based on the second update application package; and if installation completion information sent by each non-management processor of the at least one non-management processor is received, execute a whole-machine reset instruction, the whole-machine reset instruction being used to restart the control device, and the installation completion information being used to represent that the corresponding first update application has completed installation.
[0092] In some embodiments, the parsing module 610 is further used to: in response to a received power-on signal, detect whether the to-be-parsed data file exists, the power-on signal being used to indicate that the control device has been restarted; and if it is detected that the to-be-parsed data file exists, parse the to-be-parsed data file to obtain the parsed data file.
[0093] In some embodiments, the second writing module 650 is further used to: delete the parsed data file.
[0094] In some embodiments, a file format of the to-be-parsed data file is a binary format.
[0095] It should be noted that the information interaction and execution process between the above devices / modules are based on the same concept as the method embodiments, and the specific functions and technical effects thereof can be referred to the method embodiments, which will not be described here.
[0096] It should be understood that the size of the serial number of each step in the above embodiments does not mean the execution order, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0097] Based on the same inventive concept, the embodiments of the present application also provide an electronic device.
[0098] Figure 7 is a structural schematic diagram of an electronic device provided by the embodiments of the present application. As shown inFigure 7 As shown, the electronic device 70 of this embodiment includes: at least one processor 710 ( Figure 7 Only one is shown), memory 720, and communication module 740, memory 720 stores computer program 730 that may be run on processor 710. When processor 710 executes computer program 730, steps in the above data writing method embodiment are implemented, such as Figure 3 Alternatively, when the processor 710 executes the computer program 730, the functions of the modules / units in the above-mentioned device embodiments are realized, for example, Figure 6 The functions of the parsing module 610 to the second writing module 650 are shown, and the communication module 740 can be a separate communication unit for communicating with an external server or terminal device.
[0099] The electronic device 70 may include, but is not limited to: a processor 710 and a memory 720. Those skilled in the art will appreciate that Figure 7 It is merely an example of the electronic device 70 and does not constitute a limitation of the electronic device 70. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the electronic device 70 may also include an input sending device, a network access device, a bus, etc.
[0100] The processor 710 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.
[0101] The memory 720 may, in some embodiments, be an internal storage unit of the electronic device 70, such as a hard disk or a memory of the electronic device 70. The memory 720 may, in some embodiments, also be an external storage device of the electronic device 70, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, or the like. The memory 720 may, in some embodiments, include both an internal storage unit and an external storage device of the electronic device 70. The memory 720 is used to store an operating system, an application program, a boot loader, data, and other programs, such as program codes of the computer program 730. The memory 720 may, in some embodiments, also be used to temporarily store data that has been transmitted or is to be transmitted.
[0102] In addition, it can be clearly understood by those skilled in the art that, for the convenience and brevity of description, only the division of the above functional units and modules is taken as an example for description, and in actual application, the above functions can be completed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to complete all or part of the functions described above. The functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically independently, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software functional unit.
[0103] The embodiment of the present application provides a computer readable storage medium, and the computer readable storage medium stores a computer program. When the computer program runs on an electronic device, the electronic device executes steps in each method embodiment.
[0104] The embodiment of the present application provides a chip, and the chip includes a processor and a memory. The memory stores a computer program. When the computer program is executed by the processor, steps in each method embodiment are implemented.
[0105] The embodiment of the present application provides a computer program product, and when the computer program product runs on an electronic device, the electronic device executes steps in each method embodiment.
[0106] It should be appreciated that a processor as referred to herein can be a Central Processing Unit (CPU), a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or the like. The general purpose processor can be a microprocessor or the processor can be any conventional processor.
[0107] It should also be appreciated that a memory as referred to herein can be a volatile or non-volatile memory, or can include both volatile and non-volatile memory. Non-volatile memory can be Read-only Memory (ROM), Programmable ROM (PROM), Erasable PROM (EPROM), Electrically EPROM (EEPROM), or flash memory. Volatile memory can be Random access Memory (RAM), which is used as external cache. By way of example, and not limitation, many forms of RAM are available, for example, Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DR RAM).
[0108] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of each functional unit and module is exemplified, and in actual application, the above-mentioned functions can be completed by different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be realized in the form of hardware or software function unit. In addition, the specific name of each functional unit and module is only for the convenience of mutual distinction, and does not limit the protection scope of the present application. The specific working process of the unit and module in the above system can refer to the corresponding process in the foregoing method embodiment, which will not be described here.
[0109] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described or recorded in detail in a certain embodiment can be referred to the related description of other embodiments.
[0110] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware or a combination of computer software and electronic hardware. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.
[0111] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the system embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner. For example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, device or unit, and can be electrical, mechanical or other forms.
[0112] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.
[0113] In addition, each of the function units in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software function unit.
[0114] The integrated unit, if realized in the form of a software function unit and sold or used as an independent product, can be stored in a computer readable storage medium. Based on such understanding, all or part of the processes in the above-mentioned embodiment methods can be completed by a computer program instructing related hardware, and the computer program can be stored in a computer readable storage medium. When the processor executes the computer program, the steps of each method embodiment described above can be implemented. The computer program includes computer program code, which can be in the form of source code, object code, executable file or some intermediate form. The computer readable medium at least includes any entity or device capable of carrying the computer program code to the large screen device, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium. For example, U disk, mobile hard disk, magnetic disk or optical disk, etc. In some jurisdictions, according to legislation and patent practice, the computer readable medium can not be electrical carrier signal and telecommunication signal.
[0115] Finally, it should be noted that: the above is only a specific embodiment of the present application, but the protection scope of the present application is not limited to this, any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.
Claims
1. A data write method, characterized by, The method is applied to a processor configured in a control device, and the method comprises: If it is detected that there is a data file to be parsed, the data file to be parsed is parsed to obtain a parsed data file, wherein the parsed data file comprises fixed value data, insertion segment positioning information of the fixed value data, and fixed value data check code of the fixed value data; The stored data in a first memory is read, and the stored data is temporarily stored in a first address segment in a second memory, wherein the stored data comprises a first check code, the first check code is used for verifying the stored data, the stored data is data required for normal operation of the control device, the first memory is a non-volatile memory, and the second memory is a volatile memory; According to the insertion segment positioning information, the fixed value data is inserted into the first address segment in the second memory; According to the fixed value data check code and the stored data, a second check code is calculated, and the first check code in the second memory is modified as the second check code, wherein the second check code is used for verifying the stored data and the fixed value data; The stored data and the fixed value data in the second memory are read, and the stored data and the fixed value data are written into the first memory.
2. The data write method of claim 1, wherein, The parsed data file further comprises an insertion segment step, the insertion segment positioning information comprises at least one insertion segment sub-positioning information, the fixed value data comprises at least one fixed value sub-data, and the insertion segment step is used for representing a bit address interval between any two insertion segment sub-positioning information, the at least one insertion segment sub-positioning information corresponds to the at least one fixed value sub-data in a one-to-one manner; According to the insertion segment positioning information, the fixed value data is inserted into the first address segment in the second memory, comprising: According to the at least one insertion segment sub-positioning information and the insertion segment step, at least one insertion address of the at least one fixed value sub-data in the second memory is calculated, wherein the at least one fixed value sub-data corresponds to the at least one insertion address in a one-to-one manner, and the at least one insertion address is an address in the first address segment; A first fixed value sub-data is inserted into a first insertion address in the second memory, wherein the first fixed value sub-data is data in the at least one fixed value sub-data, and the first insertion address is an address corresponding to the first fixed value sub-data in the at least one insertion address.
3. The data write method of claim 1, wherein, The processor is a management processor, and before the data file to be parsed is parsed, the method further comprises: A remote operation and maintenance upgrade package is received; The remote operation and maintenance upgrade package is checked to obtain a check result, wherein the check result is used for representing whether the data file to be parsed is carried in the remote operation and maintenance upgrade package; If the check result indicates that the data file to be parsed is carried in the remote operation and maintenance upgrade package, the data file to be parsed is sent to at least one non-management processor.
4. The data write method of claim 3, wherein, The check result is also used to represent whether the remote operation and maintenance upgrade package carries at least one first update application package and whether the remote operation and maintenance upgrade package carries a second update application package, the at least one first update application corresponds to the at least one non-management processor one by one, the at least one non-management processor is used to run the at least one first update application package, and the management processor is used to run the second update application package. If the check result indicates that the remote operation and maintenance upgrade package carries the to-be-resolved data file, the to-be-resolved data file is sent to the at least one non-management processor, and the method further includes: If the check result indicates that the remote operation and maintenance upgrade package carries the to-be-resolved data file, the at least one first update application package, and the second update application package, the to-be-resolved data file is sent to the at least one non-management processor, and a corresponding first update application package is sent to a first non-management processor, the first non-management processor being any one of the at least one non-management processor.
5. The data write method of claim 4, wherein, After the corresponding first update application package is sent to the first non-management processor, the method further includes: The second update application is installed based on the second update application package. If installation completion information sent by each non-management processor in the at least one non-management processor is received, a whole-machine reset instruction is executed, the whole-machine reset instruction being used to restart the control device, and the installation completion information being used to represent that the corresponding first update application has completed installation.
6. The data write method of claim 1, wherein, If it is detected that the to-be-resolved data file exists, the to-be-resolved data file is resolved to obtain a resolved data file, and the method further includes: In response to a received power-on signal, it is detected whether the to-be-resolved data file exists, the power-on signal being used to indicate that the control device has been restarted. If it is detected that the to-be-resolved data file exists, the to-be-resolved data file is resolved to obtain the resolved data file.
7. The data write method of claim 1, wherein, After the stored data and the fixed-value data in the second memory are read and the stored data and the fixed-value data are written into the first memory, the method further includes: The resolved data file is deleted.
8. The data writing method according to any one of claims 1 to 7, wherein, The file format of the to-be-resolved data file is a binary format.
9. An electronic device, comprising: The computer program is executed by the processor to implement the method in any one of claims 1-8.
10. A computer-readable storage medium storing a computer program, the computer program comprising instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 9. The computer program is executed by the processor to implement the method in any one of claims 1-8.
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