Scheduling method for hybrid processing path of wafer

Abstract

The present invention discloses a scheduling method for a hybrid processing path of a wafer, in the field of semiconductor chip manufacturing technology, comprising the following steps: constructing a ROPN model; establishing a constraint condition for deadlock processing of a main manipulator, using the ROPN model and establishing a process production area scheduling algorithm according to the constraint condition for deadlock processing of the main manipulator; establishing a constraint condition for deadlock processing of a pick-and-place manipulator, using the ROPN model and establishing a feeding strategy according to the constraint condition for deadlock processing of the pick-and-place manipulator; after determining the wafer flow type of the wafer, using the ROPN model and establishing a wafer dispatching strategy according to the constraint condition for deadlock processing of the pick-and-place manipulator. The scheduling method for the hybrid processing path of the wafer solves the problem that the existing scheduling strategy is difficult to guarantee the system's production capacity and the quality of wafer products.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chip manufacturing, and in particular to a scheduling method for a hybrid processing path of a wafer. Background Art

[0002] Wafer is the core material for chip manufacturing and plays a vital role. Wafer is a silicon chip material named for its unique round appearance. It is the basis of semiconductor chip production and carries the key links of chip manufacturing. Wafer manufacturing is the most complex and important link in the entire production process. Unprocessed wafers must go through polishing, thin film deposition, multi-pass lithography, etching, and ion implantation, etc., so that the wafer forms a logic circuit layer with several super computing capabilities. When discussing chip manufacturing, wafer manufacturing is an indispensable link.

[0003] The essence of semiconductor chip manufacturing is the manufacturing of wafers. The complexity of the wafer flow determines the difficulty of the wafer in the manufacturing process. The wafer manufacturing system (SWFS) is classified as a third type of manufacturing system in the manufacturing field, different from the flow shop and the job shop. Kumar has conducted an in-depth study of the unique properties of SWFS and pointed out the complexity it faces in optimizing scheduling.

[0004] At the beginning of system operation, wafers are put into the system according to the established feeding plan to ensure that the capacity limit of the storage position is not exceeded. During this process, the pick-and-place robot R1 and the pick-and-place robot R2 follow the preset dispatching strategy and are responsible for transporting the wafers in the storage position without causing system deadlock. At the same time, the main robot R3 ensures the smooth progress of the wafer processing flow through scheduling, and meets various constraints, effectively preventing deadlock during the processing process. At the same time, the action of the main robot R3 will be affected by the dispatching strategy. The control of the pick-and-place robot R1, the pick-and-place robot R2 and the main robot R3 needs to cooperate with each other to ensure the coordination of the overall operation. In addition, under the mixed processing path, the wafer production process and its complexity are mainly reflected in two core aspects: one is the diversity of wafer flow patterns, and the other is that multiple different types of wafer flows are mixed together for processing. As a result, it is difficult to avoid deadlock and various constraints when controlling the pick-and-place robot R1, the pick-and-place robot R2 and the main robot R3, resulting in low system production capacity and wafer product quality. Summary of the invention

[0005] In order to overcome the defects of the prior art, the present invention provides a scheduling method for a hybrid processing path of a wafer to solve the above-mentioned problems.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a scheduling method for a hybrid processing path of a wafer, comprising the following steps:

[0007] S0: Construct the ROPN model using the inspection station, storage location, rotating station, merging station, pick-and-place robot, pick-and-place robot, processing station, main robot, auxiliary robot, and cleaning station;

[0008] S1: Establish the constraint conditions for the deadlock processing of the main robot, and use the ROPN model and the process production area scheduling algorithm for the mixed processing path of the main robot according to the constraint conditions for the deadlock processing of the main robot;

[0009] S2: Establish the constraint conditions for deadlock processing of the pick-and-place robot, and use the ROPN model and the feeding strategy for the hybrid processing path of the pick-and-place robot according to the constraint conditions for deadlock processing of the pick-and-place robot;

[0010] S3: After determining the wafer flow type of the wafer, the ROPN model is used to establish a wafer dispatching strategy for the hybrid processing path of the pick-and-place robot according to the constraints of the pick-and-place robot deadlock processing.

[0011] The beneficial effects of the present invention are as follows: in the scheduling method of the mixed processing path of the wafer, the constraint conditions of the deadlock processing of the main robot are used to plan the process production area scheduling algorithm for the mixed processing path of the main robot, and the constraint conditions of the deadlock processing of the pick-and-place robot are used to plan the feeding strategy for the mixed processing path of the pick-and-place robot. Under the mixed processing path, the operation requirements for wafer merging are more stringent than those for a single path. At the same time, the control of wafer feeding needs to be differentiated according to the product type. Therefore, the wafer flow type judgment of the wafer is introduced. According to the wafer flow type of the wafer, the constraint conditions of the deadlock processing of the pick-and-place robot are used to plan the wafer feeding strategy for the pick-and-place robot, which can ensure that the control of the pick-and-place robot, the pick-and-place robot and the main robot need to cooperate with each other, so as to coordinate the overall operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 A workshop layout for multi-agent chip manufacturing;

[0013] Figure 2 Schematic diagram of three wafer flow modes;

[0014] Figure 3 A flowchart of a method for scheduling a hybrid processing path of a wafer in one embodiment of the present invention;

[0015] Figure 4 A structural diagram of a ROPN model in one embodiment of the present invention;

[0016] Figure 5 A solution process of a process production area scheduling algorithm for a mixed processing path in one embodiment of the present invention;

[0017] Figure 6 The present invention is a flow chart for solving the feeding strategy of a mixed processing path in one embodiment of the present invention. DETAILED DESCRIPTION

[0018] The specific embodiments of the present invention are further described below in conjunction with the accompanying drawings. It should be noted that the description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0019] like Figure 1 As shown in the figure, the production layout of wafer manufacturing can be divided into two areas, namely the material (wafer) merging area and the process production area. The material merging area has two main responsibilities, one is to control the flow of wafers in this area, and the other is to merge two wafers with the same wafer flow mode into a combined material; while the process production area is responsible for wafer processing according to the requirements of the wafer flow.

[0020] According to the above layout diagram, the functions of each module in the workshop are as follows:

[0021] The entrance station is the entrance for wafers to enter the system; the exit station is the exit for wafers to leave the system; O1 is the inspection station responsible for inspecting the wafers to be processed; O2 is the inspection station responsible for inspecting the processed wafers; the storage position is a module for storing unfinished wafers and finished wafers, with limited capacity; the rotating table is a module for rotating wafers, rotating the wafers to a reasonable angle; the merging station merges two wafers into a group of materials; the pick-and-place robot R1 is responsible for picking up and placing wafers, and can interact with O1, the storage position, the rotating table, and the pick-and-place robot R2; the pick-and-place robot R2 is responsible for picking up and placing wafers, and can interact with the rotating table, the merging station, and the pick-and-place robot R1; it is adjacent to the processing station P i-1 and P i , where i = 2, 4, ..., 2N, N∈N * , responsible for processing materials, a total of N units, with a capacity of 2 wafers, and a residence time requirement, that is, the materials need to be taken out within a specified time after completion, N * is a positive integer. The adjacent processing stations can be regarded as a processing unit. The order in which the materials pass must be the smaller numbered ones first and then the larger numbered ones. There will not be a process path that only passes through one of the adjacent processing stations. For example, the adjacent processing stations P1 and P2 can be regarded as a processing unit; the non-adjacent processing station P N+j, where j = 1, 2, ..., D, D ∈ N * , a module responsible for processing materials, with a total of D units and a capacity of 2 wafers. There is a residence time requirement, that is, the materials need to be taken out within the specified time after completion, and N is the upper limit value of the adjacent processing station; the main robot R3, the "main robot" of the processing area, is responsible for taking and placing materials, and can interact with the merging station, storage position, processing station, and cleaning station. The material transportation between different processing units is the responsibility of the only main robot R3; the sub-robot r, the "sub-robot" of the processing area, is responsible for the movement of materials between adjacent processing stations, with a capacity of 2 materials. Taking the sub-robot r1 as an example, when the material is completed at the processing station P1, the sub-robot r1 moves the material to the processing station P2; the cleaning station is responsible for cleaning the module of the main robot R3. When the main robot R3 enters two designated processing stations before and after, it needs to go to the cleaning station for cleaning before entering the next processing station.

[0022] At the initial stage of the production process, the wafers must first pass through the merging station. After the wafers to be processed enter the system, they are inspected at O1. Only qualified wafers can be taken out by the pick-and-place robot R1 and placed in the storage position, waiting for subsequent operation instructions. After receiving the start command, the pick-and-place robot R1 will take out two wafers of the same type of wafer flow and two unfinished wafers from the storage position and send them to the turntable in turn. The turntable rotates to a specified angle, and the pick-and-place robot R1 will then place the wafers and wafers in the merging station in turn to merge them into a combined material for subsequent processing.

[0023] Subsequently, the robot r sends the combined material to the corresponding processing station for processing according to its processing path. When the material completes the entire process flow, the auxiliary robot r will send the completed wafer back to the merging station, where the wafer is disassembled into two completed wafers and wafers. The two wafers are returned along the original route by the pick-and-place robot R2 and the turntable, and then the pick-and-place robot R2 puts them back to the storage position from the turntable. Finally, the pick-and-place robot R2 receives a recovery command and moves the completed wafer from the storage position to O2, and the wafer finally leaves the system.

[0024] The core link of semiconductor chip manufacturing lies in the production of wafers. The processing path of wafers is also called wafer flow pattern, also known as wafer flow. Wafer flow is usually divided into four modes: serial, parallel, re-entrant and hybrid. Figure 2 The wafer flow without reentry can be symbolically described as (m1, m2, ..., m n ), where n represents the number of process steps that the wafer needs to complete, i represents the i-th process step, and m i It means that there are m steps in the i-th process (1≤i≤n). i parallel processing stations. When m1=m2=…=m n =1, the wafer flow is in serial mode. The wafer flow is in parallel mode. Additionally, a reentrant wafer flow can generally be expressed as {m1,..., [(m i ) b ,..., m e ,..(m j ,..., m g ) k ,..., m n}, where 1 < i < e < j ≤ g < n. Among them, if reentry occurs at a certain step, [(m i ) b ,...m e means that after the wafer completes the e-th step, the wafer will be moved by the manipulator to the processing module of the i-th step for b times of repeated processing, and then the processing of the e + 1-th step will be carried out. If certain consecutive steps are repeated, (m j ,..., m g ) k represents that after the wafer is completed at the (j - 1)-th step, the wafer will be repeatedly processed k times from the j-th step to the g-th step. After the repeated processing is completed, the manipulator will move the wafer to the (g + 1)-th step, and then the wafer will continue to be processed step by step.

[0025] The existing reentrant wafer flow mode is as follows: [(m1, m2),..., (m i-1 , m i ) k ,...,(m N-1 , m N ),..., m N+j ,..., m N+g ,..., m N+M , where i = 2, 4,..., 2n, n ∈ N * , j = 1, 2,..., m, m ∈ N * , 1 ≤ i < N, 1 ≤ j ≤ g < M, that is, the wafer has N + M processing steps. There are N adjacent processing stations P i , M non-adjacent processing stations P N+j , and the reentry times b and k values are determined by the wafer processing technology.

[0026] As a unique type of third-class manufacturing system, the semiconductor wafer fabrication system (SWFS) mainly has the following characteristics:

[0027] (1) Complex manufacturing process: The wafer production process and its complexity are mainly reflected in two core aspects: one is the diversity of wafer flow patterns, and the other is the mixing of multiple different types of wafer flows for processing.

[0028] (2) Reentrant processing: Semiconductor wafers are hierarchical structures. The processing methods between layers are similar in basic principles. Each layer will be processed in several designated areas, and the processing between layers is only adjusted in terms of processing accuracy or processing environment. At the same time, the processing equipment is expensive and it is impossible for companies to purchase it in large quantities. Therefore, the same equipment can be used to process different types of products with similar structures, thus creating a "reentrant" processing method. The reentrant property is the most essential feature of wafer manufacturing processing, which is an important feature that distinguishes it from other production systems. When products of multiple wafer flows are mixed for production, different types of wafers will compete for the same equipment resources. In addition, even for the same type of wafers, multiple process steps may be performed on the same equipment, which may lead to resource competition due to the similarity of the process.

[0029] (3) Strict residence time constraint: The residence time refers to the time it takes for the wafer to leave the processing station after the processing module completes the current processing. During wafer processing, the wafer must leave the processing module within a certain time range. For example, the low pressure chemical vapor deposition (LPCVD) process requires that the wafer must be unloaded from the processing module after completion within a very short time, otherwise the wafer will be damaged or even scrapped.

[0030] (4) Deadlock: In the wafer manufacturing process, system deadlock needs to be taken seriously. When resources such as buffers between reentering processing equipment and adjacent equipment are competed for by wafers, if there is no efficient scheduling and control, deadlock may occur in the allocation of limited resources. Once deadlock occurs, the operation of the system will be permanently restricted.

[0031] (5) Uncertain production conditions: There are many uncertain factors in wafer production, such as equipment failure and maintenance, changes in customer orders, fluctuations in processing time, automatic equipment cleaning, new product trials, temporary process changes, rework, and changes in customer demand, etc. These factors have caused wafer processing to be in an unstable production environment, affecting the normal operation of the system.

[0032] The implementation of the solution of the present invention is described based on the following premises:

[0033] 1) The capacity of one storage position is 1 wafer, one position can only store one wafer, and one wafer can only occupy one position; 2) The capacity of the rotating table is 1 wafer; 3) The capacity of the merging station is 2 wafers; 4) Robot R3 can operate one combined material, i.e. two wafers, at a time, and other robots can only operate one wafer at a time; 5) Each processing station can only process one combined material at a time, and one combined material can only be processed by one processing station; 6) None of the above equipment resources will fail; 7) The cleaning time of robot R3 is much less than the range of the residence time constraint; 8) Each robot will have a corresponding rotation time when operating, but the rotation time is relatively short, much shorter than the processing time of the equipment; 9) The distance between each processing station is a constant and will not exceed the movement range of the robot.

[0034] The ROPN model has elements such as transition, place, token and directed arc, which form a directed graph. Transition is represented by a rectangle “▍”, place is represented by a circle “○”, token is represented by “●”, directed arc is represented by A ROPN model can be defined by a six-tuple, represented by: Σ = (P, T, I, O, M, K), where: (1) The finite set of places is: P = {p1, p2, ..., p n}, n>0; (2) The finite set of transitions is: T = {t1, t2, ..., t m}, m>0; (3) I: Directed arc from transition to place; (4) O: Directed arc from place to transition; (5) M: Token number identifier of place, M0 is the initial identifier of the system, for example, M(p i ) = f, that is, place p i There are f tokens in it; (6) K:K(p i ) represents the library place p i The maximum number of tokens that can be accommodated.

[0035] In the ROPN model established in this paper, the process production area is firstly targeted, which is adjacent to the processing station P i-1 and P i , not adjacent to processing station P N+j , main robot R3, auxiliary robot r i-1 and cleaning station P w All belong to the library, among which K(Pi )=K(P i-1 )=m i , K(P N+j )=m N+j , K(R3)=K(r i-1 )=2; When there are two tokens in the library, it means that the robot is currently in an available state. The token can be understood as whether there is a wafer in the robot. When there is a token, it means that the robot is empty and can process wafers. When there is no token, it proves that the robot is processing wafers. The number of tokens represents the number of wafers that the robot can process in this processing. Cleaning station P w , because the wafer will not enter the cleaning station, only the main robot R3 will be cleaned here, so let K(P w )=1, that is, cleaning station P w There is only one state change, which is occupied by the main robot or idle (the idle state is generally ignored), K(P w )=1, it indicates that the main robot is performing a cleaning operation.

[0036] like Figure 4 As shown, the transition X0 indicates that the main robot R3 rotates to the merging station (with P h Indicated), using transition X w Indicates that the main robot R3 moves to the cleaning station (with P w Indicated by transition X i-1 Indicates the auxiliary robot r i-1 Move to process step i-1, transition X i and Transition X N+j Respectively represent the main robot R3 rotates to process step i and process step N+j. Use library W0 to represent the merge station P h The waiting time of the main robot R3 before unloading the wafer is expressed as W w Indicates that the main robot R3 has arrived at the cleaning station P w Waiting time before, using library W i-1 Indicates the auxiliary robot r before unloading the wafer from process step i-1 i-1 The waiting time of the library W i and W N+j represents the waiting time of the main robot R3 before unloading the wafer from the process step i and from the process step N+j. The transition U0 represents the waiting time of the main robot R3 from the merging station P h Unload the wafer using Transition U w Indicates that the main robot R3 enters the cleaning station P w Cleaning, using the U i-1 Indicates the auxiliary manipulator r i-1 Unload the wafer from process step i-1 and use transition U i and ChangeN+j Respectively represent the auxiliary manipulator r i-1 Unload wafers from step i and step N+j. Use library q0 to represent the main robot R3 from the merge station P. h The waiting time before moving to process step i is calculated using the library Q i-1 Indicates the auxiliary manipulator r i-1 The waiting time before moving from process step i-1 to process step i is expressed as Q i and Q N+j They represent the waiting time before the main robot R3 moves from process step i to process step i+1 and from process step N+j to process step N+j+1. 0(i-1) Indicates that the main robot R3 is from the merging station P h Move to process step i and use transition t (i-1)i Indicates the auxiliary manipulator r i-1 Move from process step i-1 to process step i, using transition t in Indicates that the main robot R3 moves from process step i to process step n, using transition t N(N+j) Indicates that the main robot R3 moves from process step N to process step N+j, using transition t (N+j)(N+m) Indicates that the main robot R3 moves from process step N+j to process step N+m, using transition t (N+M)0 Indicates that the main robot R3 moves from process step N+M to the merging station P h In case of reentry, use transition t N(N-1) Indicates that the main robot R3 moves from process step N to process step N-1, which can be extended to transition t ni , Figure 4 The dotted arcs are connected in the figure. Place Z0 represents the main robot R3 to the merging station P. h Waiting time before loading wafer in Z i Indicates the auxiliary manipulator r i Waiting time before loading a wafer into process step i, place Z i-1 and Z N+j The transition L0 represents the waiting time before the main robot R3 loads the wafer into the process step i-1 and the process step N+j. h Loading wafer, transition L w Indicates that the main robot R3 has been cleaned and the transition is L i Indicates the auxiliary manipulator manipulator r i Loading wafer into process step i, transition L i-1 and changes N+j The main robot R3 loads wafers into process step i-1 and step N+j respectively. The dotted line represents the possible re-entry.

[0037] For the material merging area, the places R1 and R2 represent the pick-and-place robot R1 and the pick-and-place robot R2 respectively, K(R1)=K(R2)=1, and when there is a token in the place, it means that the robot is currently available. The parameter symbols and meanings of the remaining transitions and places are as follows:

[0038]

[0039]

[0040] The scheduling of wafer processing in the process production area mainly relies on the main robot R3 as a carrier, so the construction of the scheduling algorithm is closely related to the control of the main robot R3. The auxiliary robot only serves as a material handling tool between adjacent workstations, and the order in which materials pass through adjacent workstations must be first through the smaller number and then through the larger number, that is, it will only be sent from workstation to workstation, and will not pass through only one of the adjacent processing stations. Therefore, the auxiliary robot only serves as a handling tool and has little relevance to the scheduling of the overall area. Therefore, the focus is on the control of the main robot R3.

[0041] like Figure 3 As shown, a scheduling method for a hybrid processing path of a wafer includes the following steps:

[0042] S0: Construct the ROPN model using the inspection station, storage position, rotation station, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot r and cleaning station;

[0043] S1: Establish the constraint conditions for the deadlock processing of the main robot, and use the ROPN model and the process production area scheduling algorithm for the mixed processing path of the main robot according to the constraint conditions for the deadlock processing of the main robot;

[0044] S2: Establish the constraint conditions for deadlock processing of the pick-and-place robot, and use the ROPN model and the feeding strategy for the hybrid processing path of the pick-and-place robot according to the constraint conditions for deadlock processing of the pick-and-place robot;

[0045] S3: After determining the wafer flow type of the wafer, the ROPN model is used to establish a wafer dispatching strategy for the hybrid processing path of the pick-and-place robot according to the constraints of the pick-and-place robot deadlock processing.

[0046] In the scheduling method of the mixed processing path of the wafer, the constraint conditions of the deadlock processing of the main robot are used to plan the process production area scheduling algorithm for the mixed processing path of the main robot, and the constraint conditions of the deadlock processing of the pick-and-place robot are used to plan the feeding strategy for the mixed processing path of the pick-and-place robot. Under the mixed processing path, the operation requirements for wafer merging are more stringent than those for a single path. At the same time, the control of wafer feeding needs to be differentiated according to the product type. Therefore, the wafer flow type judgment of the wafer is introduced. According to the wafer flow type of the wafer, the constraint conditions of the deadlock processing of the pick-and-place robot are used to plan the wafer feeding strategy for the pick-and-place robot, which can ensure that the control of the pick-and-place robot R1, the pick-and-place robot R2 and the main robot R3 needs to cooperate with each other so as to coordinate the overall operation.

[0047] Deadlock handling constraints for the main manipulator R3:

[0048] System deadlock is caused by many factors, which has a negative impact on the overall system operation. Therefore, solving the deadlock problem becomes the primary task of scheduling. During the wafer processing, the transfer of wafers between processing stations depends on the handling of the robot. Especially for the main robot R3, this dependence may lead to competition for the main robot R3 resources, thereby increasing the risk of system deadlock. Figure 4 In the example, since there is more than one output transition in place R3 (i.e., main manipulator R3), when M(R3)=2, i.e., there are 2 tokens in place R3, the choice of which output transition to trigger depends on the scheduling strategy. In order to effectively solve the deadlock problem, the following constraints are established:

[0049] For non-adjacent processing stations, j = 1, 2, ..., D, D∈N * , total D, establish:

[0050] Condition 1-1: In the system identifier M(P N+j+1 )=m N+j+1 -1, change X N+j Set to a triggerable state; where M() represents the number of tokens in the library, P N+j+1 represents the N+j+1th non-adjacent processing station, m N+j+1 represents the number of parallel processing stations in the N+j+1th process step, and the transition X N+j Indicates that the main robot R3 rotates to process step N+j;

[0051] Condition 1-2: In the system identifier M(P N+j )=m N+j And M(P h )=2,M(P t )=M(R2)=1, the transition X N+M Set to triggerable state; where PN+j represents the N+jth non-adjacent processing station, m N+j represents the number of parallel processing stations in the N+jth process step, P h represents the merge station, P t Indicates the rotating table, represents the pick-and-place robot R2, X N+D Indicates that the main robot R3 rotates to process step N+D;

[0052] For adjacent processing stations, i = 2, 4, ..., 2n, n∈N * , the total number is N, which is divided into two cases, the first one is for non-reentrant wafer flow, and the second one is for reentrant wafer flow;

[0053] Under non-reentrant wafer flow, establish:

[0054] Condition 2-1: When 2≤i≤N-2, and when the system identifier M(P i+1 )=m i+1 -1 or M(P i+2 )=m i+2 -1 or M(r i+1 )=1, the transition X i Set to triggerable state; where P i+1 represents the i+1th adjacent processing station, m i+1 represents the number of parallel processing stations in the i+1th process step, m i+2 represents the number of parallel processing stations in the i+2th process step, r i+1 Indicates the i+1th auxiliary manipulator, transition X i Indicates that the main robot R3 rotates to process step i;

[0055] Condition 2-2: When the system identifier M(P1) = m1-1 or M(P2) = m2-1 or M(r1) = 1, the transition X0 is set to a triggerable state; wherein P1 represents the first adjacent processing station, m1 represents the number of parallel processing stations of the first process step, P2 represents the second adjacent processing station, m2 represents the number of parallel processing stations of the second process step, r1 represents the first auxiliary manipulator, and the transition X0 represents the main manipulator R3 rotating to the merging station;

[0056] Condition 2-3: When the system identifies M(P i )=m i When, change X N Set to triggerable state; where P i represents the i-th adjacent processing station, m i represents the number of parallel processing stations in the i-th process step, and the transition X N Indicates that the main robot R3 rotates to process step N;

[0057] Under the reentrant wafer flow, establish:

[0058] Condition 2-4: When 1 ≤ q < k and when the system identifier M(P i-1 ) = m i-1 -1 or M(r i-1 ) = 1, the transitions t i(i-1) and the transition X i are both set to the triggerable state; where P i-1 represents the (i - 1)-th adjacent processing station, m i-1 represents the number of parallel processing stations in the (i - 1)-th process step, r i-1 represents the (i - 1)-th sub-manipulator, the transition t i(i-1) represents the main manipulator R3 moving from process step i to process step i - 1, and the transition X i represents the main manipulator R3 rotating to process step i;

[0059] Condition 2-5: When 2 ≤ i ≤ N - 2 and when the system identifier M(P i+1 ) = m i+1 -1 or M(P i+2 ) = m i+2 -1 or M(r i+1 ) = 1, the transitions t (i-2)(i-1) and the transition X i-2 are set to the triggerable state; where the transition t (i-2)(i-1) represents the main manipulator R3 moving from process step i - 2 to process step i - 1, and the transition X i-2 represents the main manipulator R3 rotating to process step i - 2;

[0060] Condition 2-6: When q = k, the transitions t i(i+1) and the transition X i are set to the triggerable state; where the transition t i(i+1) represents the main manipulator R3 moving from process step i to process step i + 1, and the transition X i represents the main manipulator R3 rotating to process step i.

[0061] Among them, the reentrant wafer flow is represented by (m i-1 , m i ), k is the reentry value, and 2 ≤ i ≤ N - 2; W a (q) represents the a-th wafer entering the system and completing the last processing step m i of the reentry process, and represents that the wafer has completed q reentries.

[0062] Construction of the process production area scheduling algorithm for the hybrid processing path:

[0063] ​​Taking into account the possibility of exceeding the residence time requirement in the mixed wafer flow production process and the large number of wafers that the robot can choose to handle, a process area scheduling algorithm for mixed processing paths (PASAMF) is proposed. Based on M(R3)=2, the production of wafers is scheduled.

[0064] The meanings of the parameter symbols in the process production area scheduling algorithm of the mixed processing path are as follows:

[0065]

[0066] like Figure 5 As shown in the figure, the process production area scheduling algorithm of the mixed processing path includes the following steps:

[0067] S11: Initialize each parameter, set e=1, d=1, if B or C has no recorded value, set B=C=0;

[0068] Where e is the index standard of the wafer sequence, which starts from the initial value 1, that is, the search is established from the first wafer; d is the index standard of the wafer sequence to be transported, which starts from the initial value 1 and the search is established from the first wafer of the wafer set Q; B is the station number when the robot R3 grabs the wafer at the station; C is the station number when the main robot R3 places the wafer at the station; the station includes the merging station, the processing station and the cleaning station;

[0069] S12: When the wafer At Platform P i or Platform P N+j When finished, record the wafer completion time Platform P i As it is close to the processing station, platform P N+j Not adjacent to a processing station;

[0070] S13: Make the wafer complete on time Arrange in ascending order to obtain the wafer sequence S to be transported W ;

[0071] S14: Get wafer sequence S W In position S e Wafer; S e Indicates that in the wafer sequence S W The e-th wafer in ;

[0072] S15: The robot arm R3 locks the wafer and records the station number B when grabbing the wafer.

[0073] S16: judging whether the main manipulator R3 needs to be cleaned according to the value changes of the station number B and the station number C; the station number B and the station number C are the stations corresponding to the grabbing and placing operations respectively. When the system is initialized, it will be set how many process steps the main manipulator R3 needs to be cleaned after the task is grabbed;

[0074] S17: If cleaning is required, jump to step S19; if cleaning is not required, jump to step S18;

[0075] S18: The time V required for cleaning CB =0;

[0076] S19: Record the time required for cleaning V CB ;

[0077] S110: Calculate the remaining idle time in For the ath wafer W at station P i or Platform P N+j The completion time, For the ath wafer W at station P i or Platform P N+j Processing time, Y CB is the time for robot R3 to move from the previous task workstation to the cleaning station, Y BC is the time for robot R3 to move from the cleaning station to the target station, V CB The time for robot R3 to be cleaned at the cleaning station;

[0078] S111: Determine remaining idle time Is it less than the maximum residence time R allowed by the station? I ;

[0079] S112: If yes, jump to step S113; if no, jump to step S114;

[0080] S113: Waiting for the next wafer Arrive and get on platform P i or Platform P N+j Completed;

[0081] S114: During the waiting process, determine the remaining idle time Is it greater than or equal to the maximum allowed dwell time R of the station? I ;

[0082] S115: If yes, jump to step S116; if no, set e=e+1 and jump to step S12;

[0083] S116: Allow the wafer to be idle for the remaining time Arrange in ascending order to obtain the wafer sequence S to be transported Q ;

[0084] S117: Get wafer sequence S Q In position S d Wafer; S d Indicates that in the wafer sequence S Q The d-th wafer in;

[0085] S118: Determine if it is in S d Whether the wafer at the location meets the constraints of deadlock processing;

[0086] S119: If yes, jump to step S120; if no, set d=d+1 and jump to step S117;

[0087] S120: Robot R3 is in S d The wafer at the position is placed on the station for the next processing step, and the robot R3 unlocks the wafer;

[0088] S121: Update the station number C for placing the wafer this time. e Position and S d The wafer information of the position is deleted, S e Wafer information and S d The wafer information at the following positions is moved up one position, for example, position S e+1 Rise to S e , S d+1 Rise to S d .

[0089] Deadlock constraints for pick-and-place robot R1 and pick-and-place robot R2:

[0090] Condition 3-1: M(R1) = 1 and M(P s )≠0, the transition X c Set to a triggerable state; the transition X c It indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection table O1 responsible for inspecting the wafers to be processed; it indicates that if the pick-and-place robot R1 is in an available state and there is an available position in the storage bit, the pick-and-place robot R1 can rotate unloaded to the inspection table O1 to prepare for the handling operation;

[0091] Condition 3-2: M(R1) = 1, M(R2) = 1, M(P s )≠S、M(P t )=1 and M(P h )<2, transition X s Set to a triggerable state; the transition X sIndicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load; indicates that if the pick-and-place robot R1 is in an available state, the pick-and-place robot R2 is in an available state, there are wafers in the storage position, the rotating table is available, and there are less than 2 materials in the merging station, the pick-and-place robot R1 can rotate to the storage position without load to prepare for the handling operation;

[0092] Condition 3-3: M(R1)=1 and M(P s )≠S, transition X s 'Set to a triggerable state; where transition X s 'Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the storage position without load; indicates that if the pick-and-place robot R1 is in an available state and there is a wafer in the storage position, the pick-and-place robot R1 can rotate to the storage position without load to prepare for the handling operation;

[0093] Condition 3-4: M(R1)=1, M(P s )≠0, transition X t *Set to a triggerable state; where transition X t *Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the rotating table without load; indicates that if the pick-and-place robot R1 is in an available state and there is an available position in the storage bit, the pick-and-place robot R1 can rotate to the rotating table without load to prepare for the handling operation;

[0094] Condition 3-5: M(R2)=1, M(P h )<2, change X t Set to a triggerable state; the transition X t Indicates that for unfinished wafers, the pick-and-place robot R2 rotates to the rotating table without load; indicates that if the pick-and-place robot R2 is in an available state and there are less than 2 materials in the merging station, the pick-and-place robot R2 can rotate to the rotating table without load to prepare for the handling operation;

[0095] Condition 3-6: M(R2)=1, M(P t )=1,M(P s )≠0, transition X h *Set to a triggerable state; where transition X h *Indicates that for the finished wafers, the pick-and-place robot R2 rotates to the merging station without load; indicates that if the pick-and-place robot R2 is in an available state, the state of the rotating table is available, and there is an available position in the storage position, the pick-and-place robot R2 can rotate to the merging station without load to prepare for the handling operation;

[0096] Where P s Represents a storage bit, which is used to store wafers. S represents the maximum capacity of the storage bit. P t represents the rotating stage, P h Indicates a merge station.

[0097] By controlling the conditions for the deadlock processing of the pick-and-place robot R1 and the pick-and-place robot R2, the deadlock problem caused by the chaos of the pick-and-place robot R1 and the pick-and-place robot R2 in the material merging area can be effectively solved. However, considering the existence of NSP, there is an inevitable conflict between the output of wafers in the processing area and the input of wafers in the merging area. To this end, combined with the traffic control mode, a state control mechanism similar to a "traffic light" is implemented for NSP. When there are wafers in the last sequence in the processing area, the Entrance is in a red light state and the Exit is in a green light state, that is, the finished wafers can be output, but the unprocessed wafers cannot be input. They will wait in the storage position. When the finished wafers are taken out, the states of Entrance and Exit can be interchanged, and the conflict of wafers can be eliminated in this way. Specifically, when there are wafers in the last process step in the processing area, the Entrance is set to red light status and the Exit is set to green light status, which means that the finished wafers can be exported, but the unprocessed wafers need to wait in the storage position and cannot be imported. When the finished wafers are taken away, the status of Entrance and Exit will be swapped, and the unprocessed wafers can be imported.

[0098] This solution controls the WIP value of each wafer flow in the wafer production line to ensure that the WIP value of each product is maintained within the preset standard, while ensuring the moderate stability of the total WIP of all products in the production line, thereby controlling the wafer feeding. Based on this, this solution proposes a feeding strategy based on the number of work-in-process in the fixed process production area for each product (Mix Wafer Constant Process Area Work-in-Process, referred to as MWCONWIP). In the feeding strategy based on the number of work-in-process in the fixed process production area for each product, the number of work-in-process represents the number of workpieces being processed, and the system's expected level of work-in-process is calculated according to the little law. As the WIP level value set by the system, its formula is: Where V i represents the output rate of product i, D i Represents the processing time of product i and sets a specific WIP value for each of the n wafer flow products Through calculation, a reference is provided for setting the appropriate number of WIP in the processing area. When formulating the feeding plan, in addition to the above calculation results, the storage capacity limit of the wafer merging area will also be considered, and the production efficiency and storage capacity will be comprehensively considered; Figure 6 As shown, the steps of the feeding strategy of the mixed processing path are as follows:

[0099] S21: Initialize the arriving wafer set Q, and in To calculate the expected WIP level value of the system according to the little law, Calculate the expected WIP level value of the system for the wafer with wafer flow mode j according to the little law, let b = 1, j = 0, b is the serial number of the wafer set Q, indicating the b-th wafer of the wafer set Q, j is the serial number of the wafer flow mode, indicating the j-th wafer flow mode, b = 1, j = 0 means that the first wafer with wafer flow mode j = 0 arrives at the entrance station;

[0100] S22: List the wafers one by one into the wafer set Q according to the order of their arrival time;

[0101] S23: Determine whether the conditions M(R1)=1 and M(P s )≠0; R1 is the pick-and-place robot R1, P s is the storage bit;

[0102] S24: does not meet the condition. Meets the condition M(R1) = 1 and M(P s )≠0, jump to step S22; meet the conditions M(R1)=1 and M(P s )≠0, jump to step S25;

[0103] S25: let j=j+1;

[0104] S26: Determine the current WIP value of the wafer with wafer flow mode j j Is it less than

[0105] S27: If yes, jump to step S210; if no, jump to step S28;

[0106] S28: Determine whether j is greater than z-1; wherein z represents the number of wafer flow modes, and z can be understood as the number of types of wafer bodies in different processing paths;

[0107] S29: If yes, jump to step S22; if no, jump to step S25;

[0108] S210: Wafer Placed into the system, placed wafers Remove from wafer set Q, update wafer set Q.

[0109] In the dispatch strategy under the mixed processing path, since wafers of the same type need to be merged, there are products with multiple wafer flow types under the mixed processing path. Therefore, in addition to verifying whether the number of wafers meets the merging requirements, the wafer flow type of the wafer must also be judged. The following steps are the wafer flow type judgment steps:

[0110] S301: Initialize i=1, j=i+1; wherein i and j both represent the index of the wafer sequence Q. Since there is a merge operation in the hybrid processing path, only two wafers of the same type can be merged. Therefore, the index i and the index j are set to determine whether there are two wafers of the same type in the wafers to be transported in the storage position;

[0111] S302: Wafer W f According to the storage position P s The time is arranged in ascending order to obtain a sequence SEQ, where there are X wafers in the sequence SEQ, and wafer W f Unprocessed wafers for type wafer flow;

[0112] S303: Determine whether the SEQ i Location of wafer and in SEQ j Position of wafer Whether the wafer flow types of the two are consistent;

[0113] S304: If yes, go to step S309; ​​if no, go to step S305;

[0114] S305: Determine whether j is equal to N;

[0115] S306: If yes, jump to step S307; if no, calculate j=j+1 and jump to step S303;

[0116] S307: Determine whether i is less than N-1;

[0117] S308: If yes, then calculate i=i+1 and go to step S303; if no, the wafer and wafer It will not be used as a wafer to be transported, and the judgment is NO this time.

[0118] S309: Wafer and wafer As the wafer to be transported, this time the judgment is YES.

[0119] On this basis, a Mix Flow Prioritized Strategy for Finished Wafers (MFPSFW) and a Mix Flow Prioritized Strategy for Unfinished Wafers (MFPSUW) were proposed under the mixed processing path.

[0120] The construction of the wafer dispatching strategy for the hybrid processing path focuses on the control of the pick-and-place robot R1 and the pick-and-place robot R2. As components of the shared channel (NSP), the two robots have a decisive influence on the smoothness of the channel. Specifically, the pick-and-place robot R1 can trigger Figure 4 Medium Change X c 、ChangeX s 、ChangeX s ' and changes X t ', and the pick-and-place robot R2 can trigger Figure 4 Medium Change X t and Transition X h '. Based on M(R1)=M(R2)=1, that is, there is 1 token in R1 and 1 token in R2, for the control of the two manipulators, it is necessary to focus on solving the potential deadlock problem caused by the shared channel (NSP) and reasonably handle the triggering timing of each transition to ensure the progress of the production process.

[0121] Through observation, it is found that during the actual execution of the algorithm, when there is a wafer in the last process step in the processing area, immediately starting the channel state transition may cause the wafer that should have enough time to enter the processing area to be unable to be smoothly added and processed. Therefore, the timing of the state transition can be studied together with the processing time of the last sequence of the wafer. In the present invention, three different strategies are used to solve the above problems. The first strategy is the Prioritized Strategy for Finished Wafers (PSFW for short), the second strategy is the Prioritized Strategy for Unprocessed Wafers (PSUW for short), and the third strategy is the Randomization Strategy (RS for short).

[0122] Set the wafer to enter the last sequence at time 0 and the waiting time to t w , Red is set to 1 until the finished wafer is sent to P s(storage bit), the rest of the time Red is set to 0. Waiting time before state transition t w The calculation formula is: The following table shows the parameter symbols and meanings of the dispatch strategy:

[0123]

[0124] The strategy of finishing wafer first is based on M(R1)=1 and M(P s )<S, the scheduling of the wafer merging area is realized by controlling the robot R1, wherein, for the wafers in P s The strategy follows the priority principle of processing the finished wafers in the storage location first, and then consider putting the wafers to be processed into the processing area. The steps of the strategy of finishing wafer priority are as follows:

[0125] S311: Determine M(P t ) is 0, if so (indicating that there is a wafer on the rotating table), step S312 is executed, if not (indicating that there is no wafer on the rotating table), step S314 is executed; wherein P t A rotating table;

[0126] S312: Determine if P t Whether the wafer (turntable) is completed and has not been P h (Merge station), if yes, execute step S313, if no, execute step S3112;

[0127] S313: Trigger transition X t *; among which the transition X t *Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the rotating table without load;

[0128] S314: Determine whether there is a wafer inspection completed at the inspection station O1, if yes, execute step S315, if not, execute step S316;

[0129] S315: Trigger transition X c ; Among them, the transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection station O1 responsible for inspecting the wafers to be processed;

[0130] S316: Determine M(P s ) is not equal to S L If yes, then execute step S317, if no, then execute step S3112; where P s For storage location; S L Indicates the last processing step of the workpiece;

[0131] S317: Determine P sIs there a completed wafer W in the storage location? f ', if yes, execute step S318, if no, execute step S319;

[0132] S318: Trigger transition X s '; Among them, the transition X s 'Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the storage position without load;

[0133] S319: Determine whether Red is 1, if so, execute step S3112, if not, execute step S3110;

[0134] S3110: Determine P through the wafer flow type determination step s Whether there are two wafers to be transported in (storage position), if so, the two wafers to be transported are regarded as two unprocessed wafers W f Execute step S3111, if not, execute step S3112;

[0135] S3111: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f Take out; among them change X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load;

[0136] S3112: The pick-and-place robot R1 does not operate.

[0137] The strategy of unprocessed wafer priority is based on M(R1)=1 and M(P s )<S, for those in P s (storage bit) wafers, take priority processing P s The wafers to be processed in the (storage position) are put into the processing area, and then the priority principle of the completed wafers is considered. The steps of the strategy of giving priority to unprocessed wafers are as follows:

[0138] S321: Determine M(P t ) is 0, if so (indicating that there is a wafer on the rotating table), step S322 is executed, if not (indicating that there is no wafer on the rotating table), step S324 is executed; wherein P t A rotating table;

[0139] S322: Determine if P t Wafer W on the rotating table f Whether it is completed and has not been P h (Merge station), if yes, execute step S323, if not, execute step S3212.

[0140] S323: Trigger transition Xt *; among which the transition X t *Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the rotating table without load;

[0141] S324: Determine whether there is a wafer inspection completed at the inspection station O1, if yes, execute step S325, if not, execute step S326;

[0142] S325: Trigger transition X c ; Among them, the transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection station O1 responsible for inspecting the wafers to be processed;

[0143] S326: Determine M(P s ) is not equal to S L If yes, then execute step S327, if no, execute step S322; wherein P s S is the storage bit; L Indicates the last processing step of the workpiece;

[0144] S327: Determine P through the wafer flow type determination step s Whether there are two wafers to be transported in (storage position), if so, the two wafers to be transported are regarded as two unprocessed wafers W f Execute step S328, if not, execute step S329;

[0145] S328: Determine whether Red is 1, if so, execute step S3212, if not, execute step S329;

[0146] S329: Determine P s Is there any unprocessed wafer W in (storage location) f If yes, execute step S3210, if no, execute step S3211;

[0147] S3210: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f Take out; among them change X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load;

[0148] S3211: Trigger transition X s '; Among them, the transition X s 'Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the storage position without load;

[0149] S3212: The pick-and-place robot R1 does not operate.

[0150] In the present invention, a combined heuristic algorithm is constructed by combining two wafer dispatching strategies (finished wafer priority strategy and unprocessed wafer priority strategy) with a process production area scheduling algorithm of a mixed processing path and a feeding strategy of a mixed processing path.

[0151] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions and variations of these embodiments are made without departing from the principles and spirit of the present invention, and still fall within the scope of protection of the present invention.

Claims

1. A method for scheduling a hybrid processing path of a wafer, characterized in that: The following steps are involved: S0: Construct the ROPN model using the inspection station, storage position, rotation station, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot r and cleaning station; S1: Establish the constraint conditions for the deadlock processing of the main robot, and use the ROPN model and the process production area scheduling algorithm for the mixed processing path of the main robot according to the constraint conditions for the deadlock processing of the main robot; S2: Establish the constraint conditions for deadlock processing of the pick-and-place robot, and use the ROPN model and the feeding strategy for the hybrid processing path of the pick-and-place robot according to the constraint conditions for deadlock processing of the pick-and-place robot; S3: After determining the wafer flow type of the wafer, a wafer dispatching strategy for a hybrid processing path of the pick-and-place robot is established using the ROPN model and according to the constraints of the pick-and-place robot deadlock processing; In the step S0, a directed graph of the ROPN model is constructed using places, transitions, directed arcs from transitions to places, directed arcs from places to transitions, token quantity identifiers of places, and the maximum number of tokens that can be accommodated by the places; Among them, the inspection station, storage position, rotating table, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot r, cleaning station and the waiting time before each robot action all belong to the library P in the ROPN model, and are transformed into the execution actions of the inspection station, storage position, rotating table, merging station, pick-and-place robot R1, pick-and-place robot R2, processing station, main robot R3, auxiliary robot r and cleaning station; The relationship between the processing stations is divided into adjacent processing stations P i-1 and P i The relationship between the non-adjacent processing station P N+j The relationship between i=2, 4, ..., 2N, N∈N * , a total of N adjacent processing stations, j = 1, 2, ..., D, D ∈ N * , a total of D non-adjacent processing stations; In step S1, the constraints for the main manipulator deadlock processing include: For non-adjacent processing stations P N+j ,j=1,2,...,D,D∈N * , total D, establish: Condition 1-1: In M(P N+j+1 )=m N+j+1 -1, change X N+j Set to a triggerable state; where M() represents the number of tokens in the library, P N+j+1 represents the N+j+1th non-adjacent processing station, m N+j+1 represents the number of parallel processing stations in the N+j+1th process step, and the transition X N+j Indicates that the main robot R3 rotates to process step N+j; Condition 1-2: In M(P N+j )=m N+j And M(P h )=2,M(P t )=M(R2)=1, the transition X N+M Set to triggerable state; where P N+j represents the N+jth non-adjacent processing station, m N+j represents the number of parallel processing stations in the N+jth process step, P h represents the merge station, P t Indicates the rotating table, represents the pick-and-place robot R2, X N+D Indicates that the main robot R3 rotates to process step N+D; For the adjacent processing station P i-1 and P i , i=2, 4,..., 2N, N∈N * , the total number is N, under non-reentrant wafer flow, establish: Condition 2-1: When 2≤i≤N-2, and when M(P i+1 )=m i+1 -1 or M(P i+2 )=m i+2 -1 or M(r i+1 )=1, the transition X i Set to triggerable state; where P i+1 represents the i+1th adjacent processing station, m i+1 represents the number of parallel processing stations in the i+1th process step, m i+2 represents the number of parallel processing stations in the i+2th process step, r i+1 Indicates the i+1th auxiliary manipulator, transition X i Indicates that the main robot R3 rotates to process step i; Condition 2-2: When M(P1) = m1-1 or M(P2) = m2-1 or M(r1) = 1, transition X0 is set to a triggerable state; wherein P1 represents the first adjacent processing station, m1 represents the number of parallel processing stations of the first process step, P2 represents the second adjacent processing station, m2 represents the number of parallel processing stations of the second process step, r1 represents the first auxiliary manipulator, and transition X0 represents the main manipulator R3 rotating to the merging station; Condition 2-3: When M(P i )=m i When, change X N Set to triggerable state; where P i represents the i-th adjacent processing station, m i represents the number of parallel processing stations in the i-th process step, and the transition X N Indicates that the main robot R3 rotates to process step N; Re-entry wafer flow (m i-1 ,m i ) k Indicates that k is a reentrant value and 2≤i≤N-2; use W a (q) indicates the ath wafer entering the system and completing the last processing step m of the reentry process i , and represents that the wafer has completed q reentry times. Under the reentry wafer flow, establish: Condition 2-4: When 1 ≤ q < k and when M(P i-1 ) = m i-1 -1 or M(r i-1 ) = 1, the transitions t i(i-1) and the transition X i are both set to the triggerable state; where P i-1 represents the (i - 1)-th adjacent processing station, m i-1 represents the number of parallel processing stations in the (i - 1)-th process step, r i-1 represents the (i - 1)-th sub-manipulator, the transition t i(i-1) represents the main manipulator R3 moving from process step i to process step i - 1, and the transition X i represents the main manipulator R3 rotating to process step i; Condition 2-5: When 2≤i≤N-2, and when the system identifier M(P i+1 )=m i+1 -1 or M(P i+2 )=m i+2 -1 or M(r i+1 )=1, the transition t (i-2)(i-1) And Transition X i-2 Set to a triggerable state; the transition t (i-2)(i-1) Indicates that the main robot R3 moves from process step i-2 to process step i-1, and transition X i-2 Indicates that the main robot R3 rotates to process step i-2; Condition 2-6: When q = k, transition t i(i+1) And Transition X i Set to a triggerable state; the transition t i(i+1) Indicates that the main robot R3 moves from process step i to process step i+1, and the transition X i Indicates that the main robot R3 rotates to process step i.

2. The method for scheduling a hybrid processing path of a wafer according to claim 1, characterized in that: In step S1, the process production area scheduling algorithm for the hybrid processing path of the main robot includes the following sub-steps: S11: Initialize each parameter, set e=1, d=1, if B or C has no recorded value, set B=C=0; Where e is the index standard of the wafer sequence, which starts from the initial value 1, that is, the search is established from the first wafer; d is the index standard of the wafer sequence to be transported, which starts from the initial value 1 and the search is established from the first wafer of the wafer set Q; B is the station number when the robot R3 grabs the wafer at the station; C is the station number when the main robot R3 places the wafer at the station; the station includes the merging station, the processing station and the cleaning station; S12: When wafer W I a At Platform P i or Platform P N+j When finished, record the wafer completion time Platform P i As it is close to the processing station, platform P N+j Not adjacent to a processing station; S13: Make the wafer complete on time Arrange in ascending order to obtain the wafer sequence S to be transported W ; S14: Get wafer sequence S W In position S e Wafer; S e Indicates that in the wafer sequence S W The e-th wafer in ; S15: Robot R3 locks the wafer and records the station number B when grabbing the wafer; S16: judging whether the main robot R3 needs to be cleaned according to the value changes of the station number B and the station number C; S17: If cleaning is required, jump to step S19; if cleaning is not required, jump to step S18; S18: The time V required for cleaning CB =0; S19: Record the time required for cleaning V CB ; S110: Calculate the remaining idle time in For the ath wafer W at station P i or Platform P N+j The completion time, For the ath wafer W at station P i or Platform P N+j Processing time, Y CB is the time for robot R3 to move from the previous task workstation to the cleaning station, Y BC is the time for robot R3 to move from the cleaning station to the target station, V CB The time for robot R3 to be cleaned at the cleaning station; S111: Determine remaining idle time Is it less than the maximum residence time R allowed by the station? I ; S112: If yes, jump to step S113; if no, jump to step S114; S113: Waiting for the next wafer Arrive and get on platform P i or Platform P N+j Completed; S114: During the waiting process, determine the remaining idle time Is it greater than or equal to the maximum allowed dwell time R of the station? I ; S115: If yes, jump to step S116; if no, set e=e+1 and jump to step S12; S116: Allow the wafer to be idle for the remaining time Arrange in ascending order to obtain the wafer sequence S to be transported Q ; S117: Get wafer sequence S Q In position S d Wafer; S d Indicates that in the wafer sequence S Q The d-th wafer in; S118: Determine if it is in S d Whether the wafer at the location meets the constraints of deadlock processing; S119: If yes, jump to step S120; if no, set d=d+1 and jump to step S117; S120: Robot R3 is in S d The wafer at the position is placed on the station for the next processing step, and the robot R3 unlocks the wafer; S121: Update the station number C for placing the wafer this time. e Position and S d The wafer information of the position is deleted, S e Wafer information and S d The wafer information at the later position is moved up one position.

3. The method for scheduling a hybrid processing path of a wafer according to claim 2, characterized in that: In step S2, for the pick-and-place robot R1 and the pick-and-place robot R2, the constraint conditions for the pick-and-place robot deadlock processing include: Condition 3-1: M(R1) = 1 and M(P s )≠0, the transition X c Set to a triggerable state; the transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection station O1 responsible for inspecting the wafers to be processed; Condition 3-2: M(R1) = 1, M(R2) = 1, M(P s )≠S、M(P t )=1 and M(P h )<2, transition X s Set to a triggerable state; the transition X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load; Condition 3-3: M(R1)=1 and M(P s )≠S, transition X s 'Set to a triggerable state; where transition X s 'Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the storage position without load; Condition 3-4: M(R1)=1, M(P s )≠0, transition X t *Set to a triggerable state; where transition X t *Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the rotating table without load; Condition 3-5: M(R2)=1, M(P h )<2, change X t Set to a triggerable state; the transition X t Indicates that for unfinished wafers, the pick-and-place robot R2 rotates to the rotating table without load; Condition 3-6: M(R2)=1, M(P t )=1,M(P s )≠0, transition X h *Set to a triggerable state; where transition X h *Indicates that for the finished wafers, the pick-and-place robot R2 rotates to the merging station without load; Where P s Represents the storage bit, S represents the maximum capacity of the storage bit, P t represents the rotating stage, P h Indicates a merge station.

4. The method for scheduling a hybrid processing path of a wafer according to claim 3, characterized in that: In step S2, the feeding strategy for the mixed processing path of the pick-and-place robot includes the following sub-steps: S21: Initialize the arriving wafer set Q, and in To calculate the expected WIP level value of the system according to the little law, Calculate the expected WIP level value of the system for the wafer with wafer flow mode j according to the little law, let b = 1, j = 0, b is the serial number of the wafer set Q, indicating the b-th wafer of the wafer set Q, j is the serial number of the wafer flow mode, indicating the j-th wafer flow mode, b = 1, j = 0 means that the first wafer with wafer flow mode j = 0 arrives at the entrance station; S22: List the wafers one by one into the wafer set Q according to the order of their arrival time; S23: Determine whether the conditions M(R1)=1 and M(P s )≠0; R1 is the pick-and-place robot R1, P s is the storage bit; S24: does not meet the condition. Meets the condition M(R1) = 1 and M(P s )≠0, jump to step S22; meet the conditions M(R1)=1 and M(P s )≠0, jump to step S25; S25: let j=j+1; S26: Determine the current WIP value of the wafer with wafer flow mode j j Is it less than S27: If yes, jump to step S210; if no, jump to step S28; S28: Determine whether j is greater than z-1; wherein z represents the number of wafer flow modes; S29: If yes, jump to step S22; if no, jump to step S25; S210: Wafer Placed into the system, placed wafers Remove from wafer set Q, update wafer set Q.

5. The method for scheduling a hybrid processing path of a wafer according to claim 4, characterized in that: In step S3, determining the wafer flow type of the wafer includes the following sub-steps: S301: Initialize i=1, j=i+1; wherein i and j both represent the index of wafer sequence Q; S302: Wafer W f According to the storage position P s The time is arranged in ascending order to obtain a sequence SEQ, where there are X wafers in the sequence SEQ, and wafer W f Unprocessed wafers for type wafer flow; S303: Determine whether the SEQ i Position of wafer and in SEQ j Position of wafer Whether the wafer flow types of the two are consistent; S304: If yes, go to step S309; ​​if no, go to step S305; S305: Determine whether j is equal to N; S306: If yes, jump to step S307; If not, then calculate j=j+1 and go to step S303; S307: Determine whether i is less than N-1; S308: If yes, then calculate i=i+1 and go to step S303; if no, the wafer and wafer It will not be used as a wafer to be transported, and this judgment is NO; S309: Wafer and wafer As the wafer to be transported, this time the judgment is YES.

6. The method for scheduling a hybrid processing path of a wafer according to claim 5, characterized in that: In step S3, the wafer dispatching strategy for the hybrid processing path of the pick-and-place robot includes a finished wafer priority strategy, and the finished wafer priority strategy includes the following sub-steps: S311: Determine M(P t ) is 0, if yes, execute step S312, if no, execute step S314; wherein P t A rotating table; S312: Determine whether the rotating stage P t Whether the wafer is completed and has not passed the merge station P h If yes, execute step S313, if no, execute step S3112; S313: Trigger transition X t *; where the transition X t *Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the rotating table without load; S314: Determine whether there is a wafer inspection completed at the inspection station O1, if yes, execute step S315, if not, execute step S316; S315: Trigger transition X c ; Among them, the transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection station O1 responsible for inspecting the wafers to be processed; S316: Determine M(P s ) is not equal to S L If yes, then execute step S317, if no, then execute step S3112; where P s For storage location; S L Indicates the last processing step of the workpiece; S317: Determine storage position P s Is there a completed wafer W? f ', if yes, execute step S318, if no, execute step S319; S318: Trigger transition X s '; Among them, the transition X s 'Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the storage position without load; S319: Determine whether Red is 1, if so, execute step S3112, if not, execute step S3110; S3110: Determine the storage position P through the wafer flow type determination step s Whether there are two wafers to be transported, if so, the two wafers to be transported are regarded as two unprocessed wafers W f Execute step S3111, if not, execute step S3112; S3111: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f Take out; among them change X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load; S3112: The pick-and-place robot R1 does not operate.

7. The method for scheduling a hybrid processing path of a wafer according to claim 6, characterized in that: In the step S3, the wafer dispatching strategy for the hybrid processing path of the pick-and-place robot includes a strategy of giving priority to unprocessed wafers, and the strategy of giving priority to unprocessed wafers includes the following sub-steps: S321: Determine M(P t ) is 0, if yes, execute step S322, if no, execute step S324; wherein P t A rotating table; S322: Determine whether the rotating stage P t Wafer W f Whether it is completed and has not passed the merging station P h If yes, execute step S323, if no, execute step S3212; S323: Trigger transition X t *; where the transition X t *Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the rotating table without load; S324: Determine whether there is a wafer inspection completed at the inspection station O1, if yes, execute step S325, if not, execute step S326; S325: Trigger transition X c ; Among them, the transition X c Indicates that for unfinished wafers, the pick-and-place robot R1 rotates unloaded to the inspection station O1 responsible for inspecting the wafers to be processed; S326: Determine M(P s ) is not equal to S L If yes, then execute step S327, if no, execute step S322; wherein P s S is the storage bit; L Indicates the last processing step of the workpiece; S327: Determine the storage position P through the wafer flow type determination step s Whether there are two wafers to be transported, if so, the two wafers to be transported are regarded as two unprocessed wafers W f Execute step S328, if not, execute step S329; S328: Determine whether Red is 1, if so, execute step S3212, if not, execute step S329; S329: Determine storage position P s Is there any unprocessed wafer W? f If yes, execute step S3210, if no, execute step S3211; S3210: Trigger two transitions X consecutively s , two unprocessed wafers of the same type W f Take out; among them change X s Indicates that for unfinished wafers, the pick-and-place robot R1 and the pick-and-place robot R2 rotate to the storage position without load; S3211: Trigger transition X s '; Among them, the transition X s 'Indicates that for the finished wafer, the pick-and-place robot R1 rotates to the storage position without load; S3212: The pick-and-place robot R1 does not operate.

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