Back-illuminated image sensor and preparation method thereof, and electronic device

Abstract

The present application relates to a back-illuminated image sensor and a method for preparing the same, and an electronic device, comprising: a substrate, a grid, and a photodiode and a stacked trench isolation structure located on a first surface of the substrate and arranged alternately along a first direction parallel to the first surface and extending toward the substrate; the substrate includes a plurality of isolation structures extending into the substrate via the first surface and arranged at intervals along the first direction; the isolation structure is in contact with and connected to the stacked trench isolation structure arranged one-to-one directly above it; the grid is located directly above the stacked trench isolation structure arranged one-to-one; the photodiode includes an isolation layer, a SiAs layer, an intermediate photosensitive layer, and a SiP cap layer stacked in sequence in a direction away from the substrate; the intermediate photosensitive layer includes a SiP layer and a SiSb layer arranged alternately along the first direction. It can avoid unnecessary damage caused by IMP in the process of preparing photodiodes, reduce dark current, and improve quantum efficiency.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a back-illuminated image sensor, a preparation method thereof, and an electronic device. Background Art

[0002] Image sensors are photoelectric conversion devices widely used in consumer electronics, security monitoring, automotive electronics, machine vision and many other fields. According to the placement of metal lines and light receiving layers, they are divided into front-illuminated and back-illuminated types. Among them, back-illuminated (BSI) image sensors have the advantages of higher sensitivity, better wiring layout and high-speed recording, and are often used in fields that require higher pixel performance of image sensors.

[0003] However, in today's deep submicron technology, the traditional BSI front-end process requires high-energy ion implantation (IMP) to prepare the diode structure to form the photosensitive area, which may cause damage to the substrate surface. Uneven ion implantation can also cause signal crosstalk between different pixels, thus hindering the further development of BSI image sensor performance and large-scale production in the market. Summary of the invention

[0004] Based on this, it is necessary to provide a back-illuminated image sensor and a preparation method and electronic device thereof to address the technical problems in the prior art, which can at least avoid unnecessary damage to the back-illuminated image sensor caused by IMP during the preparation of the photodiode.

[0005] In the first aspect, the present application provides a back-illuminated image sensor, comprising: a substrate, a grid, and a photodiode and a stacked trench isolation structure located on a first surface of the substrate and alternately arranged along a first direction parallel to the first surface and extending toward the substrate; the substrate comprises a plurality of isolation structures extending into the substrate via the first surface and arranged at intervals along the first direction; the isolation structure is in contact and connected with the stacked trench isolation structure arranged one-to-one directly above it; the grid is located directly above the stacked trench isolation structure arranged one-to-one; the photodiode comprises an isolation layer, a SiAs layer, an intermediate photosensitive layer, and a SiP cap layer stacked in sequence along a direction away from the substrate; the intermediate photosensitive layer comprises a SiP layer and a SiSb layer arranged alternately along the first direction.

[0006] The back-illuminated image sensor in the above-mentioned embodiment adopts a photodiode structure obtained by a multiple growth method, which can avoid unnecessary damage to the inside of the substrate caused by high-energy ion implantation, reduce the generation of defects in the pixel area, thereby reducing dark current, and achieving the purpose of improving the imaging clarity of the image sensor; by forming a plurality of stacked trench isolation structures arranged at intervals in the photosensitive area, adjacent stacked trench isolation structures, grids and isolation structures in the substrate together form an effective physical isolation barrier, which effectively avoids the mutual penetration of photogenerated carriers in adjacent pixel areas, and at the same time reduces the probability of light diffusion to adjacent pixels, thereby suppressing the adverse effects of crosstalk on image clarity.

[0007] In addition, a photodiode structure in which photosensitive layers doped with different VA groups are stacked in sequence and / or arranged alternately will generate an electrical conductivity gradient inside after light excitation. This difference is used to optimize the transmission path of photogenerated carriers in the N region, reduce the recombination rate during the migration process, and improve the overall quantum efficiency of the photodiode based on this structure.

[0008] In some embodiments, the stacked trench isolation structure includes a first trench isolation structure, a second trench isolation structure, and a third trench isolation structure stacked in sequence along a direction away from the substrate; the first trench isolation structure is located between isolation layers adjacent to each other along the first direction, and between SiAs layers adjacent to each other along the first direction; the second trench isolation structure is located between SiP layers adjacent to each other along the first direction; and the third trench isolation structure is located between SiP cap layers adjacent to each other along the first direction.

[0009] In some embodiments, the first trench isolation structure, the SiAS layer, and the isolation layer are prepared simultaneously in the same process step.

[0010] In some embodiments, the second trench isolation structure and the SiP layer are prepared simultaneously in the same process step.

[0011] In some embodiments, the third trench isolation structure and the SiP capping layer are prepared simultaneously in the same process step.

[0012] In some embodiments, a bottom surface of the second trench isolation structure is located inside a top surface of the first trench isolation structure; and a bottom surface of the third trench isolation structure is located inside a top surface of the second trench isolation structure.

[0013] In some embodiments, a size of the SiP layer along the first direction gradually decreases in a direction away from the substrate; and a size of the SiSb layer along the first direction gradually increases in a direction away from the substrate.

[0014] In some embodiments, the top surface of the intermediate photosensitive layer is located within the bottom surface of the SiP cap layer.

[0015] In some embodiments, a dimension of the SiP capping layer along the first direction gradually decreases along a direction away from the substrate.

[0016] In some embodiments, the dielectric constant of the third trench isolation structure is greater than the dielectric constant of the first trench isolation structure; and the dielectric constant of the third trench isolation structure is greater than the dielectric constant of the second trench isolation structure.

[0017] In a second aspect, the present application further provides an electronic device, comprising a back-illuminated image sensor in any one of the embodiments of the present application.

[0018] In a third aspect, the present application further provides a method for preparing a back-illuminated image sensor, comprising: providing a substrate, wherein the substrate comprises a plurality of isolation structures extending into the substrate through a first surface of the substrate and arranged at intervals along a first direction; the first direction is parallel to the first surface;

[0019] A photodiode and a stacked trench isolation structure are formed on the first surface of the substrate, which are alternately arranged along the first direction and extend toward the substrate, wherein the photodiode comprises an isolation layer, a SiAs layer, an intermediate photosensitive layer, and a SiP cap layer which are sequentially stacked in a direction away from the substrate; the intermediate photosensitive layer comprises a SiP layer and a SiSb layer alternately arranged along the first direction;

[0020] A one-to-one grid is formed directly above the stacked trench isolation structure.

[0021] By constructing a stacked trench isolation structure arranged at intervals in the photosensitive area, the adjacent stacked trench isolation structures, the grid and the isolation structure in the substrate form a strict physical isolation barrier, which effectively prevents the mutual penetration of photogenerated carriers between adjacent pixel areas. At the same time, this structure effectively suppresses the negative impact of the crosstalk effect on image clarity by reducing the probability of light diffusion to adjacent pixels, providing a guarantee for obtaining high-quality images.

[0022] In some embodiments, the stacked trench isolation structure includes a first trench isolation structure, a second trench isolation structure, and a third trench isolation structure stacked in sequence along a direction away from the substrate; the first trench isolation structure is located between isolation layers adjacent to each other along the first direction, and between SiAs layers adjacent to each other along the first direction; the second trench isolation structure is located between SiP layers adjacent to each other along the first direction; and the third trench isolation structure is located between SiP cap layers adjacent to each other along the first direction; the isolation structure is in contact and connected with the stacked trench isolation structure arranged one-to-one directly above it.

[0023] In some embodiments, the third trench isolation structure covers the SiP capping layer.

[0024] The back-illuminated image sensor and its preparation method, and the electronic device in the embodiments of the present application have the following unexpected technical effects:

[0025] The photodiode structure prepared using a multi-layer growth process fundamentally avoids the irreversible damage to the substrate caused by high-energy ion implantation. The stable interface structure suppresses the generation of defects in the pixel area, thereby effectively reducing the dark current, laying a solid foundation for improving the imaging clarity of the image sensor.

[0026] By constructing stacked trench isolation structures arranged at intervals in the photosensitive area, the adjacent stacked trench isolation structures, the grid and the isolation structure in the substrate form a strict physical isolation barrier, which effectively prevents the mutual penetration of photogenerated carriers between adjacent pixel areas. At the same time, this structure effectively suppresses the negative impact of the crosstalk effect on image clarity by reducing the probability of light diffusion to adjacent pixels, while providing a guarantee for obtaining high-quality images, increasing the amount of light entering the photodiode structure, increasing the amount of light entering the photosensitive area, increasing the electron concentration in the photosensitive area, and improving the photosensitivity of the BSI image sensor.

[0027] In addition, the photodiode structure in which photosensitive layers doped with different VA group elements are stacked and / or arranged alternately will generate a conductivity gradient inside after light excitation. This gradient is used to construct an electron transmission path in the photodiode, optimize the migration path of photogenerated carriers in the N region, and significantly reduce their recombination rate, thereby improving the quantum efficiency of the photodiode based on this structure, laying a solid foundation for improving the photosensitivity of image sensors.

[0028] In summary, the technical solution combining multi-layer deposition, stacked trench isolation structure and conductivity gradient optimization provides a new technical approach for the development of image sensors with excellent imaging capabilities, which is of great significance for promoting the advancement and widespread application of back-illuminated image sensors. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0030] Figure 1 is a flow chart of a method for preparing a back-illuminated image sensor provided in an embodiment;

[0031] Figure 2a is a schematic cross-sectional view of a structure obtained after forming an isolation material layer in step S202 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0032] Figure 2b is a schematic cross-sectional view of a structure obtained after the substrate is thinned in step S204 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0033] Figure 3 It is a schematic cross-sectional view of a structure obtained after a SiAs material layer is formed in step S4022 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0034] Figure 4 is a schematic cross-sectional view of a structure obtained after forming a first trench isolation structure in step S4024 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0035] Figure 5 It is a schematic cross-sectional view of a structure obtained after forming a SiP material layer in step S4042 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0036] Figure 6 It is a schematic cross-sectional view of a structure obtained after etching the SiP material layer in step S4044 in the method for preparing a back-illuminated image sensor provided in an embodiment;

[0037] Figure 7 is a schematic cross-sectional view of a structure obtained after forming a second trench isolation structure in step S4044 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0038] Figure 8 is a schematic cross-sectional view of a structure obtained after a SiSb layer is formed in step S4046 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0039] Fig. 9 is a schematic cross-sectional view of a structure obtained after forming an isolation trench in step S4064 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0040] Fig.10 is a schematic cross-sectional view of a structure obtained after forming a third isolation trench structure in step S4066 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0041] Fig.11 It is a schematic cross-sectional view of a structure obtained after a grid material layer is formed in step S60 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0042] Fig.12 is a schematic cross-sectional view of a structure obtained after a grid is formed in step S60 in a method for preparing a back-illuminated image sensor provided in an embodiment;

[0043] Fig.13 It is a schematic cross-sectional view of a structure obtained after adding a filter in the method for preparing a back-illuminated image sensor provided in an embodiment.

[0044] Description of reference numerals:

[0045] 10', initial substrate; 10, substrate; 11, etch stop layer; 12, interlayer dielectric layer; 131, isolation material layer; 13, isolation layer; 141, SiAs material layer; 14, SiAs layer; 15, SiP material layer; 16a, SiP layer; 16b, SiSb layer; 16, intermediate photosensitive layer; 171, cap layer SiP material layer; 172, isolation groove; 17, SiP cap layer; 20, isolation structure; 30, stacked trench isolation structure; 31, first trench isolation structure; 32, second trench isolation structure; 321, spacing trench; 33, third trench isolation structure; 40, grid; 41, first grid material layer; 42, second grid material layer; 50, grid groove; 60, filter. DETAILED DESCRIPTION

[0046] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0048] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. On the contrary, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, doping types and / or parts, these elements, components, regions, layers, doping types and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, doping type or part from another element, component, region, layer, doping type or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, doping type or portion discussed below may be represented as a second element, component, region, layer or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0049] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0050] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that when the terms "consisting of" and / or "comprising" are used in this specification, the presence of the features, integers, steps, operations, elements and / or parts can be determined, but the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups is not excluded. At the same time, when used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0051] Embodiments of the invention are described herein with reference to cross-sectional views which are schematic diagrams of ideal embodiments (and intermediate structures) of the present application, so that variations in the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the present application should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For example, an implanted region shown as a rectangle typically has rounded or curved features and / or an implant concentration gradient at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation is performed. Therefore, the regions shown in the figures are schematic in nature, their shapes do not represent the actual shape of the region of the device, and do not limit the scope of the present application.

[0052] In an embodiment of the present application, the substrate may include a first surface located on the front side, and a back side opposite to the front side, i.e., a second surface. Ignoring the flatness of the first surface and the second surface, a first direction parallel to the first surface is defined, and the direction toward the substrate includes a second direction perpendicular to the first surface of the substrate. A first direction and a third direction that intersect each other (e.g., are perpendicular to each other) are defined in the top and bottom surface directions of the substrate (i.e., the plane where the substrate is located). For example, the arrangement direction of the target isolation structure is the first direction, and the plane where the substrate is located can be determined based on the first direction and the third direction. Among them, the first direction, the second direction, and the third direction can be perpendicular to each other in pairs. In an embodiment of the present application, the first direction is defined as the Y-axis direction, the second direction is defined as the Z-axis direction, and the third direction is defined as the X-axis direction.

[0053] See also Figure 1 In some embodiments, a method for preparing a back-illuminated image sensor is provided, comprising: steps S20 to S60.

[0054] Step S20: providing a substrate, wherein the substrate includes a plurality of isolation structures extending into the substrate through a first surface of the substrate and arranged at intervals along a first direction; the first direction is parallel to the first surface.

[0055] For example, the substrate can be made of semiconductor material, insulating material, conductor material or any combination thereof. For example, the substrate can be a silicon (Si) substrate, a silicon germanium (SiGe) substrate, a silicon germanium carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate or other III / V semiconductor substrates or II / VI semiconductor substrates. Alternatively, for example, the substrate can be a layered substrate including Si / SiGe, Si / SiC, silicon on insulator (SOI) or silicon germanium on insulator. Therefore, the type and thickness of the substrate should not limit the scope of protection of the present disclosure.

[0056] Among them, the isolation structure is used to isolate electrons and light energy, and the cross-sectional shape of the isolation structure along the OY direction may include a regular trapezoid, an inverted trapezoid, a rectangle, etc., or may also be a combination of regular trapezoids, inverted trapezoids, rectangles, etc. In the embodiment of the present application, the isolation structure only needs to be able to isolate electrons and light energy. In addition, the present embodiment does not specifically limit the distance between adjacent isolation structures, and can be set according to actual needs.

[0057] Step S40: forming photodiodes and stacked trench isolation structures alternately arranged along a first direction and extending toward the substrate on the first surface of the substrate, the photodiodes comprising an isolation layer, a SiAs layer, an intermediate photosensitive layer, and a SiP cap layer stacked in sequence along a direction away from the substrate; the intermediate photosensitive layer comprises a SiP layer and a SiSb layer alternately arranged along the first direction.

[0058] For example, the stacked trench isolation structure can be formed by etching processes such as photolithography and dry etching. The photosensitive layer of the photodiode stack can be formed by epitaxial processes such as liquid phase epitaxy (LPE), vapor phase epitaxy (VPE), and molecular beam epitaxy (MBE). In other embodiments, the process can be selected according to actual needs.

[0059] Among them, a stacked trench isolation structure is included between adjacent photodiodes along the OY direction. The stacked trench isolation structure is used to isolate light energy, ions, electrons, etc., which can effectively prevent the free electrons of pixels from penetrating into adjacent pixels; it can effectively prevent the diffusion of light to adjacent pixels, suppressing the adverse effects of crosstalk on image clarity; and, through light excitation, the conductivity difference generated by the photosensitive layers of different VA groups doped in sequence stacked and / or alternately arranged naturally forms an electron transmission path in the photodiode based on this structure, reducing the recombination rate during the migration process, and overall improving the quantum efficiency of the photodiode based on this structure.

[0060] Step S60: forming a one-to-one grid directly above the stacked trench isolation structure.

[0061] The grid material can be arranged by deposition; the grid can be a multi-layer stacked structure, and the thickness of each layer in the grid can be adjusted as needed without limitation.

[0062] The grid can be used to isolate light energy. It isolates adjacent pixels from each other, effectively preventing light from entering adjacent pixels and causing crosstalk, thus improving the imaging quality of the image sensor. In addition, the grid also focuses light to the photosensitive area, increasing the amount of light entering the photosensitive area, increasing the electron concentration in the photosensitive area, and improving the photosensitivity of the BSI image sensor.

[0063] The structure of the back-illuminated image sensor obtained after steps S20-S60 can be referred to in Fig.12 Of course, in order to facilitate the understanding of this application, Fig.12 An example of a back-illuminated image sensor prepared by the back-illuminated image sensor preparation method of the present application is given. There may be other suitable examples of back-illuminated image sensors prepared by the back-illuminated image sensor preparation method of the present application, and the present application does not limit them here.

[0064] In the above embodiment, the photodiode structure prepared by the multi-layer growth process fundamentally avoids the irreversible damage to the substrate caused by high-energy ion implantation, forms a more stable interface structure, suppresses the generation of defects in the pixel area, and effectively reduces the dark current, laying a solid foundation for improving the imaging clarity of the image sensor. The stacked trench isolation structure arranged at intervals is constructed in the photosensitive area, and the strict physical isolation barrier formed by the adjacent stacked trench isolation structure, the grid and the isolation structure in the substrate are cleverly utilized to effectively prevent the mutual penetration of photogenerated carriers between adjacent pixel areas. At the same time, the structure successfully suppresses the negative impact of the crosstalk effect on image clarity by reducing the probability of light diffusion to adjacent pixels, providing a guarantee for obtaining high-quality images.

[0065] In addition, the photodiode structure in which the photosensitive layers doped with different VA group elements are stacked and / or arranged alternately will generate a conductivity gradient inside after light excitation. This gradient is used to construct an electron transmission path in the photodiode, optimize the migration path of the photogenerated carriers in the N region, and significantly reduce its recombination rate, thereby improving the quantum efficiency of the photodiode based on this structure.

[0066] In summary, by combining the new photodiode structure and the stacked trench isolation structure, the damage to the device itself caused by high-energy ion implantation is effectively avoided, the dark current caused by defects is reduced, and the imaging clarity and photoelectric performance are improved, which is of great significance for promoting the advancement and widespread application of back-illuminated image sensors.

[0067] See also Figure 2a-2b In some embodiments, step S20 includes steps S202 to S204.

[0068] Step S202 : forming an isolation material layer 131 on a surface 20 a of the trench isolation structure 20 in the substrate away from the interlayer dielectric layer 12 .

[0069] For example, see Figure 2a The isolation material layer 131 may be formed in the initial substrate 10' by ion implantation, and the implanted ions may be boron ions.

[0070] For example, the isolation structure 20 can be prepared by combining an etching process and a deposition process in the front end of line (FEOL). The material of the isolation structure 20 may include but is not limited to silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (Si2N2O), etc. or a combination thereof.

[0071] The front-end process also includes forming an etch stop layer 11 covering the isolation structure 20 on the initial substrate 10', and then forming an interlayer dielectric layer 12 covering the etch stop layer 11. After forming the etch stop layer 11, metal can be deposited to form a partial connection structure, and on this basis, an interlayer dielectric layer 12 is formed. The interlayer dielectric layer 12 can be a low-dielectric material layer. In addition, a metal interconnect structure can also be formed on the interlayer dielectric layer 12 as a metal connection part of the device.

[0072] Of course, this embodiment only shows one of the methods, as long as the metal interconnection structure can be reasonably formed, and the thickness of the etch stop layer 11 and the interlayer dielectric layer 12 is not limited, and can be adjusted according to specific process requirements.

[0073] Step S204 : thinning the initial substrate 10 ′ located on the side of the isolation structure 20 away from the interlayer dielectric layer 12 to expose the isolation material layer 131 .

[0074] For example, see Figure 2b At least one of a dry etching process, a wet etching process, a chemical mechanical polishing process and a push-up process can be used to thin the initial substrate 10 ′ located on the side of the isolation structure 20 away from the interlayer dielectric layer 12 to expose the isolation material layer 131 .

[0075] For example, the push-on process flattens the upper surface of the substrate to optimize the performance and reliability of the device. Dry etching includes at least one of reactive ion etching (RIE), inductively coupled plasma etching (ICP) or high concentration plasma etching (HDP). The etching solution of the wet etching process can be a mixed solution of hydrofluoric acid and hydrogen peroxide. The three processes have their own advantages and disadvantages, and the specific selection should be made according to different processing objects, requirements and actual conditions.

[0076] In this embodiment, the thinning process removes substrate damage that may be caused during ion implantation, avoids the occurrence of excessive dark current due to defects in the substrate, and also prevents high-energy ions from entering the stacked trench isolation structure and causing crosstalk effects.

[0077] See also Figure 3-Figure 10 In some embodiments, step S40 includes: step S402-step S406.

[0078] Step S402 : preparing the first trench isolation structure 31 , the SiAs layer 14 , and the isolation layer 13 on the isolation material layer 131 simultaneously in the same process step.

[0079] See also Figure 3-Figure 4 In some embodiments, step S402 also includes: step S4022-step S4024.

[0080] Step S4022 : forming a SiAs material layer 141 on the isolation material layer 131 .

[0081] For example, see Figure 3 , the SiAs material layer 141 can be formed by epitaxial process. The epitaxial process can avoid the problems of crystal structure damage, temperature rise and electric field effect caused by ion implantation. In addition, the photodiode prepared by the epitaxial process has low defect density, long carrier lifetime, excellent interface quality between the formed N region and the P region, few defects, and low carrier recombination rate, which is conducive to improving the conversion efficiency and stability of the photodiode.

[0082] Step S4024 : forming first trench isolation structures 31 arranged in a first direction in the SiAs material layer 141 , the remaining SiAs material layer 141 is used to form the SiAs layer 14 , and the remaining isolation material layer 131 is used to form the isolation layer 13 .

[0083] For example, see Figure 4 The first trench isolation structure 31 can be manufactured by combining photolithography, dry etching and deposition processes.

[0084] The material of the first trench isolation structure 31 may include an oxide. For example, in the present embodiment, a liquid dielectric formed by mixing a solvent with a silicon dioxide dielectric is applied into the trench for forming the first trench isolation structure 31 by spin coating to form the first trench isolation structure 31 whose top surface is not lower than the top surface of the SiAs layer 14. The flowing liquid material has good filling performance, which can avoid the problem that the pore corners are easily closed prematurely and void defects are generated inside during traditional precipitation methods, and helps to form a trench isolation structure with uniform filling and no voids, so as to ensure the isolation effect between pixels and avoid signal crosstalk.

[0085] Step S404 : preparing the second trench isolation structure 32 and the SiP layer 16 a on the first trench isolation structure 31 and the SiAs layer 14 simultaneously in the same process step.

[0086] See also Figure 4-Figure 6 In some embodiments, step S404 also includes: step S4042-step S4046.

[0087] Step S4042 : forming a SiP material layer 15 on the first trench isolation structure 31 and the SiAs layer 14 .

[0088] For example, see Figure 5 Similarly, an epitaxial process is used to form a SiP material layer 15 covering the first trench isolation structure 31 and the top surface of the SiAs layer 14 .

[0089] Step S4044: forming second trench isolation structures 32 arranged at intervals along the first direction in the SiP material layer 15, and the remaining SiP material layer 15 is used to form the SiP layer 16a.

[0090] For example, see Figure 6 Similarly, a combination of photolithography and dry etching can be used to form a plurality of spacing grooves 321 spaced apart along the OY direction in the SiP material layer 15 .

[0091] For example, see Figure 7In the present embodiment, a second trench isolation structure 32 is formed by a filling process consistent with that in step S402; wherein the second trench isolation structure 32 is in contact with the first trench isolation structure 31 in a one-to-one arrangement, that is, the center lines of the second trench isolation structure 32 and the first trench isolation structure 31 in the depth direction are located on the same straight line.

[0092] Step S4046 : Fill the remaining spacing grooves 321 in the SiP layer 16 a to form a SiSb layer 16 b . The SiP layer 16 a and the SiSb layer 16 b are used to jointly constitute the intermediate photosensitive layer 16 .

[0093] For example, see Figure 8 The middle photosensitive layer 16 includes SiP layers 16a and SiSb layers 16b arranged alternately along the first direction. For semiconductors containing impurities, light excitation ionizes the carriers (electrons or holes) bound to the impurity energy level and transitions them to the conduction band or valence band, thereby increasing the carrier concentration of the corresponding energy band and changing its conductivity. For donor energy levels, the closer to the bottom of the conduction band, the easier it is to ionize.

[0094] For example, in this embodiment, the ionization energy of the impurity energy levels of SiSb, SiP, and SiAs increases in sequence, so the conductivity of SiSb, SiP, and SiAs decreases in sequence after light excitation, and a conductivity gradient is generated inside them. This gradient is used to construct an electron transmission path in the photodiode, quickly transfer the photogenerated carriers, optimize the migration path of the photogenerated carriers in the N region, and reduce their recombination rate, thereby improving the quantum efficiency of the photodiode based on this structure, laying a solid foundation for improving the photosensitivity of the image sensor.

[0095] Step S406 : preparing a third trench isolation structure 33 and a SiP cap layer 17 on the middle photosensitive layer 16 in the same process step.

[0096] See also Figure 9-10 In some embodiments, step S406 also includes: step S4062-step S4066.

[0097] Step S4062: forming a cap layer SiP material layer 171 on the middle photosensitive layer 16;

[0098] Step S4064 : forming a plurality of isolation trenches 172 arranged at intervals along the OY direction in the capping SiP material layer 171 .

[0099] For example, see Figure 9-10In this embodiment, step S4062-step S4064 is consistent with the previous step S4042-step S4044, that is, step S4042-step S4044 is repeated to etch the epitaxially grown capping SiP material layer 171, and the remaining capping SiP material layer 171 is used to form the SiP capping layer 17, and the SiP capping layer 17 and the isolation grooves 172 are alternately spaced along the OY direction.

[0100] It should be noted that in the embodiments of the present application, there is no restriction on the doping concentration of the SiP material layer in different steps, and it can be set according to actual needs.

[0101] Step S4066 : depositing a high-k dielectric constant material on the outer surface of the SiP cap layer 17 and in the isolation trench 172 .

[0102] For example, see Fig.10 , the dielectric constant of the high-k dielectric constant material is greater than the dielectric constant of the first trench isolation structure 31, and the dielectric constant of the high-k dielectric constant material is also greater than the dielectric constant of the second trench isolation structure 32. The high-k dielectric constant material located in the isolation trench 172 is used to form the third trench isolation structure 33, and the top surface of the third trench isolation structure 33 is not lower than the top surface of the SiP cap layer 17. The material of the third trench isolation structure 33 may include, but is not limited to, one or more of aluminum oxide (Al2O3), hafnium oxide (HfO2), hafnium oxynitride (HfON), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), titanium oxide (TiO2) or strontium titanium oxide (SrTiO3).

[0103] For example, please refer to Fig.10 The third trench isolation structure 33 is obtained by deposition, and the deposition process may include but is not limited to one or more of a chemical vapor deposition process (Chemical Vapor Deposition, CVD), an atomic layer deposition process (Atomic Layer Deposition, ALD), a high density plasma deposition (High Density Plasma, HDP) process, a plasma enhanced deposition process and a spin-on dielectric layer (Spin-on Dielectric, SOD) process.

[0104] For example, please refer to Fig.10The first trench isolation structure 31, the second trench isolation structure 32 and the third trench isolation structure 33 together constitute a stacked trench isolation structure 30, which is arranged one-to-one and contact-connected with the isolation structure 20, and the tight physical isolation barrier formed in cooperation effectively prevents the mutual penetration of photogenerated carriers between adjacent pixel regions. At the same time, by reducing the probability of light diffusion to adjacent pixels, the structure successfully suppresses the negative impact of the crosstalk effect on image clarity, providing a guarantee for obtaining high-quality images.

[0105] For example, please refer to Fig.10 , the distance between the symmetry axes of two adjacent stacked trench isolation structures 30 is 500 nanometers to 700 nanometers, such as 500 nanometers, 550 nanometers, 600 nanometers, 650 nanometers or 700 nanometers, etc. In the above example, the larger the interval between two adjacent stacked trench isolation structures 30, the larger the photosensitive area of ​​the BSI image sensor, that is, the better the photosensitivity of the BSI image sensor, but too large an interval will result in too large pixels and reduced resolution. Therefore, by setting the distance between the symmetry axes of two adjacent stacked trench isolation structures 30 to 500 nanometers to 700 nanometers, the photosensitivity of the BSI image sensor is improved while ensuring the resolution.

[0106] See also Figure 11-Figure 12 In some embodiments, step S60 includes: forming a one-to-one grid 40 directly above the stacked trench isolation structure 30 .

[0107] For example, see Fig.11 A first grid material layer 41 and a second grid material layer 42 are obtained by deposition, wherein the material of the first grid material layer may include but is not limited to metal materials such as cobalt (Co), nickel (Ni), titanium (Ti), and aluminum (Al), and the material of the second grid material layer 42 may include titanium nitride (TiN).

[0108] For example, the thickness of the first grid material layer 41 includes but is not limited to 150 nanometers to 200 nanometers, for example, 150 nanometers, 160 nanometers, 170 nanometers, 180 nanometers, 190 nanometers or 200 nanometers, etc. The thickness of the second grid material layer 42 includes but is not limited to 30 nanometers to 50 nanometers, for example, 30 nanometers, 35 nanometers, 40 nanometers, 45 nanometers or 50 nanometers, etc.

[0109] For example, see Fig.12After forming the first grid material layer 41 and the second grid material layer 42, a plurality of grid grooves 50 are formed along the OZ direction, penetrating the second grid material layer 42 and the first grid material layer 41. The plurality of grid grooves 50 are arranged at intervals along the OY direction to form a one-to-one grid 40 directly above the stacked trench isolation structure 30. Specifically, a patterned photoresist layer can be used as a mask, or the position of the grid 40 can be defined by a mask plate, and then any etching method can be used to form the grid 40. At this time, the third trench isolation structure 33 can not only be used to isolate light energy, but also protect the SiP cap layer 17 to prevent the SiP cap layer 17 from suffering unnecessary etching damage during the process of etching to form the grid grooves 50.

[0110] By combining the stacked trench isolation structure with the grid, crosstalk between light and electrons between pixels can be effectively avoided, thereby improving the display quality of the BSI image sensor.

[0111] See also Fig.13 In some embodiments, after step S60 , the method further includes: forming a filter 60 in the grid groove 50 .

[0112] For example, see Fig.13 , the colors of the filter 60 include but are not limited to red, yellow and blue, and three different color filters are arranged adjacent to form a pixel group. The color filter maintains high transmittance in a specific band. For example, the red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves. In addition, the top of the filter is in a rounded arc shape, which is conducive to the convergence of light. Other microlens structures can also be used to meet the focusing requirements, and this application does not make specific restrictions.

[0113] In some embodiments, an electronic device is provided, comprising the back-illuminated image sensor in any one of the embodiments of the present application.

[0114] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of the steps, and the steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0115] See also Fig.13In some embodiments, a back-illuminated image sensor is provided, comprising: a substrate 10, a grid 40, and a photodiode and a stacked trench isolation structure 30 located on a first surface of the substrate 10 and alternately arranged along a first direction parallel to the first surface and extending toward the substrate 10; the substrate 10 comprises a plurality of isolation structures 20 extending into the substrate 10 via the first surface and arranged at intervals along the first direction; the isolation structure 20 is in contact with and connected to the stacked trench isolation structure 30 arranged one-to-one directly above it; the grid 40 is located directly above the stacked trench isolation structure 30 arranged one-to-one; the photodiode comprises an isolation layer 13, a SiAs layer 14, an intermediate photosensitive layer 16, and a SiP cap layer 17 stacked in sequence in a direction away from the substrate 10; the intermediate photosensitive layer 16 comprises a SiP layer 16a and a SiSb layer 16b alternately arranged along the first direction.

[0116] The multi-layer growth process avoids the irreversible damage to the substrate caused by high-energy ion implantation, and the stable interface structure inhibits the generation of defects in the pixel area, thereby effectively reducing the dark current; the stacked trench isolation structure arranged at intervals is constructed in the photosensitive area, so that the adjacent stacked trench isolation structure and the isolation structure in the substrate form a strict physical isolation barrier, which effectively prevents the mutual penetration of photogenerated carriers between adjacent pixel areas. At the same time, the structure successfully suppresses the negative impact of the crosstalk effect on image clarity by reducing the probability of light diffusion to adjacent pixels, providing a guarantee for obtaining high-quality images; the photodiode structure of the photosensitive layer doped with different VA group elements stacked and / or alternately arranged in the photodiode structure generates a conductivity gradient after light excitation. The gradient is used to construct an electron transmission path in the photodiode, optimize the migration path of the photogenerated carriers in the N region, and significantly reduce its recombination rate, thereby improving the quantum efficiency of the photodiode based on the structure, laying a solid foundation for improving the photosensitivity of the image sensor.

[0117] Please continue to Fig.13 In some embodiments, the stacked trench isolation structure 30 includes a first trench isolation structure 31, a second trench isolation structure 32, and a third trench isolation structure 33 which are sequentially stacked in a direction away from the substrate 10; the first trench isolation structure 31 is located between the isolation layers 13 adjacent to each other in the first direction, and between the SiAs layers 14 adjacent to each other in the first direction; the second trench isolation structure 32 is located between the SiP layers 16a adjacent to each other in the first direction; and the third trench isolation structure is located between the SiP capping layers 17 adjacent to each other in the first direction. By arranging photodiodes between adjacent stacked trench isolation structures 30, the stacked trench isolation structure 30 is used to avoid signal crosstalk between adjacent photodiodes.

[0118] Please continue reading Fig.13In some embodiments, the first trench isolation structure, the SiAS layer, and the isolation layer are prepared simultaneously in the same process step.

[0119] In some embodiments, the second trench isolation structure and the SiP layer are prepared simultaneously in the same process step.

[0120] In some embodiments, the third trench isolation structure and the SiP capping layer are prepared in the same process step at the same time. The simultaneous preparation of the photodiode and the stacked trench isolation structure can effectively ensure the isolation effect.

[0121] Please continue reading Fig.13 In some embodiments, the bottom surface of the second trench isolation structure 32 is located inside the top surface of the first trench isolation structure 31; and the bottom surface of the third trench isolation structure 33 is located inside the top surface of the second trench isolation structure 32. A self-aligned process can be used to reduce the process cost and complexity of the preparation, while avoiding unnecessary damage to the photosensitive layer formed in the previous step due to etching the trench during the preparation of the second trench isolation structure 32 and the third trench isolation structure 33.

[0122] Please continue reading Fig.13 In some embodiments, the size of the SiP layer 16a along the first direction gradually decreases in the direction away from the substrate; and the size of the SiSb layer 16b along the first direction gradually increases in the direction away from the substrate 10. Compared with the photosensitive area with the same width, the intermediate photosensitive layer 16 composed of the SiP layer 16a and the SiSb layer 16b whose sizes in the first direction vary in the direction away from the substrate 10 has a larger photosensitive area and better photoelectric performance.

[0123] Please continue reading Fig.13 In some embodiments, the top surface of the intermediate photosensitive layer 16 is located within the bottom surface of the SiP cap layer 17; and / or the size of the SiP cap layer 17 along the first direction gradually decreases in the direction away from the substrate 10. The size of the third trench isolation structure 33 along the first direction is associated with the SiP cap layer 17. The gradual decrease in the corresponding size of the SiP cap layer 17 means that the corresponding size of the third trench isolation structure 33 gradually increases. The thicker the trench isolation structure is near the light entrance window, the stronger its ability to isolate light energy.

[0124] Please continue reading Fig.13In some embodiments, the dielectric constant of the third trench isolation structure is greater than the dielectric constant of the first trench isolation structure; the dielectric constant of the third trench isolation structure is greater than the dielectric constant of the second trench isolation structure. The material of the third trench isolation structure 33 may include, but is not limited to, a material with a high-k dielectric constant, such as one or more of aluminum oxide (Al2O3), hafnium oxide (HfO2), hafnium oxynitride (HfON), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), titanium oxide (TiO2), or strontium titanium oxide (SrTiO3).

[0125] The back-illuminated image sensor and its preparation method, and the electronic device in the embodiments of the present application have the following unexpected technical effects:

[0126] The photodiode structure prepared using a multi-layer growth process fundamentally avoids the irreversible damage to the substrate caused by high-energy ion implantation. The stable interface structure suppresses the generation of defects in the pixel area, thereby effectively reducing the dark current, laying a solid foundation for improving the imaging clarity of the image sensor.

[0127] By constructing a stacked trench isolation structure arranged at intervals in the photosensitive area, the adjacent stacked trench isolation structures, the grid and the isolation structure in the substrate cooperate to form a strict physical isolation barrier, which effectively prevents the mutual penetration of photogenerated carriers between adjacent pixel areas. At the same time, this structure successfully suppresses the negative impact of the crosstalk effect on image clarity by reducing the probability of light diffusion to adjacent pixels, while providing a guarantee for obtaining high-quality images, increasing the amount of light entering the photodiode structure, increasing the amount of light entering the photosensitive area, increasing the electron concentration in the photosensitive area, and improving the photosensitivity of the BSI image sensor.

[0128] In addition, the photodiode structure in which photosensitive layers doped with different VA group elements are stacked and / or arranged alternately will generate a conductivity gradient inside after light excitation. This gradient is used to construct an electron transmission path in the photodiode, optimize the migration path of photogenerated carriers in the N region, and significantly reduce their recombination rate, thereby improving the quantum efficiency of the photodiode based on this structure, laying a solid foundation for improving the photosensitivity of image sensors.

[0129] In summary, the strategy of combining multilayer deposition, stacked trench isolation structure and conductivity gradient optimization provides a new technical approach for the development of image sensors with excellent imaging capabilities, which is of great significance for promoting the advancement and widespread application of back-illuminated image sensors.

[0130] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0131] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A back-illuminated image sensor, characterized in that: include: A substrate, a grid, and a photodiode and a stacked trench isolation structure located on a first surface of the substrate and alternately arranged along a first direction parallel to the first surface and extending toward the substrate; The substrate includes a plurality of isolation structures extending into the substrate through the first surface and arranged at intervals along the first direction; the isolation structures are in contact and connected with the stacked trench isolation structures arranged one-to-one directly above the isolation structures; The grid is located directly above the stacked trench isolation structures arranged one by one; The photodiode comprises an isolation layer, a SiAs layer, an intermediate photosensitive layer, and a SiP cap layer which are sequentially stacked in a direction away from the substrate; The intermediate photosensitive layer includes SiP layers and SiSb layers alternately arranged along the first direction.

2. The back-illuminated image sensor according to claim 1, characterized in that: The stacked trench isolation structure comprises a first trench isolation structure, a second trench isolation structure, and a third trench isolation structure which are sequentially stacked in a direction away from the substrate; The first trench isolation structure is located between the isolation layers adjacent to each other along the first direction, and between the SiAs layers adjacent to each other along the first direction; The second trench isolation structure is located between the SiP layers adjacent to each other along the first direction; as well as The third trench isolation structure is located between the SiP capping layers adjacent to each other along the first direction.

3. The back-illuminated image sensor according to claim 2, characterized in that: Includes at least one of the following features: The first trench isolation structure, the SiAs layer, and the isolation layer are prepared at the same time in the same process step; The second trench isolation structure and the SiP layer are prepared at the same time in the same process step; The third trench isolation structure and the SiP capping layer are prepared at the same time in the same process steps.

4. The back-illuminated image sensor according to claim 2, characterized in that: A bottom surface of the second trench isolation structure is located within a top surface of the first trench isolation structure; and A bottom surface of the third trench isolation structure is located within a top surface of the second trench isolation structure.

5. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: The dimension of the SiP layer along the first direction gradually decreases in a direction away from the substrate; and The dimension of the SiSb layer along the first direction gradually increases in a direction away from the substrate.

6. The back-illuminated image sensor according to any one of claims 1 to 4, characterized in that: The top surface of the intermediate photosensitive layer is located within the bottom surface of the SiP cover layer; and / or The dimension of the SiP capping layer along the first direction gradually decreases in a direction away from the substrate.

7. The back-illuminated image sensor according to any one of claims 2 to 4, characterized in that: The dielectric constant of the third trench isolation structure is greater than the dielectric constant of the first trench isolation structure; The dielectric constant of the third trench isolation structure is greater than the dielectric constant of the second trench isolation structure.

8. An electronic device, characterized in that: include: The back-illuminated image sensor according to any one of claims 1 to 7.

9. A method for preparing a back-illuminated image sensor, characterized in that: include: Providing a substrate, wherein the substrate includes a plurality of isolation structures extending into the substrate through a first surface of the substrate and arranged at intervals along a first direction; The first direction is parallel to the first surface; A photodiode and a stacked trench isolation structure are formed on the first surface of the substrate, which are alternately arranged along the first direction and extend toward the substrate, wherein the photodiode comprises an isolation layer, a SiAs layer, an intermediate photosensitive layer, and a SiP cap layer which are sequentially stacked in a direction away from the substrate; the intermediate photosensitive layer comprises a SiP layer and a SiSb layer alternately arranged along the first direction; A one-to-one grid is formed directly above the stacked trench isolation structure.

10. The method for preparing a back-illuminated image sensor according to claim 9, characterized in that: The stacked trench isolation structure comprises a first trench isolation structure, a second trench isolation structure, and a third trench isolation structure which are sequentially stacked in a direction away from the substrate; The first trench isolation structure is located between isolation layers adjacent to each other along the first direction, and between SiAs layers adjacent to each other along the first direction; The second trench isolation structure is located between SiP layers adjacent to each other along the first direction; as well as The third trench isolation structure is located between SiP cap layers adjacent to each other along the first direction; The isolation structure is in contact with and connected to the stacked trench isolation structure disposed one-to-one directly above it.

Images