MEMS Pressure Sensor and Its Preparation Method

Abstract

This application relates to a MEMS pressure sensor and a preparation method thereof in the field of MEMS micromachining technology. The MEMS pressure sensor includes a substrate, a silicon wafer cup-shaped structure layer, a first insulating layer, a buffer layer, a first protective layer, a metal layer, a second insulating layer, and a second protective layer. The MEMS pressure sensor of this application has the advantages of high sensitivity, fast response time, and strong device stability, and is suitable for use in scenarios of pressure sensors with high-performance requirements.

Description

Technical Field

[0001] The present application relates to the field of MEMS micromachining technology, and in particular to a MEMS pressure sensor and a preparation method thereof. Background Art

[0002] In China, the MEMS pressure sensor industry has experienced rapid development and is widely used in the fields of automobiles, industrial automation, consumer electronics, medical equipment, etc. MEMS pressure sensors are divided into silicon piezoresistive pressure sensors and silicon capacitive pressure sensors, etc. Among them, the MEMS silicon piezoresistive pressure sensor is made using the piezoresistive effect of single-crystal silicon. It uses a circular stress cup silicon film inner wall fixed around the periphery, and directly engraves four high-precision semiconductor strain gauges on its surface where the stress is maximum to form a Wheatstone measuring bridge, which serves as a force-to-electricity conversion measurement circuit to directly convert pressure into electrical quantity to achieve pressure measurement. However, the current MEMS silicon piezoresistive pressure sensor has the problem of high stress, especially the stress problem between the insulating layer and the protective layer above the ion implantation layer, which reduces the stability of the membrane structure of the MEMS silicon piezoresistive pressure sensor, making the performance and reliability of the device worse, affecting the measurement sensitivity and response characteristics, and thus resulting in a reduction in the service life of the MEMS silicon piezoresistive pressure sensor. Summary of the invention

[0003] In view of the problems existing in the background technology, the present application provides a MEMS pressure sensor and a preparation method thereof, which can significantly improve the performance, stability and reliability of the MEMS pressure sensor.

[0004] According to one aspect of the present invention, a MEMS pressure sensor is provided, comprising: a substrate; a silicon wafer cup-shaped structure layer, the silicon wafer cup-shaped structure layer covers the upper surface of the substrate, the silicon wafer cup-shaped structure layer forms a stress cavity toward the substrate side, and the surface layer on the side away from the substrate forms an ion implantation block doping layer; a first insulating layer, the first insulating layer covers the silicon wafer cup-shaped structure layer and the ion implantation block doping layer, the first insulating layer is provided with a first through hole that exposes a portion of the upper surface of the ion implantation block doping layer; a buffer layer, the buffer layer covers the first insulating layer, the buffer layer is provided with a second through hole communicating with the first through hole; a first protective layer, the first protective layer covers the buffer layer, the first protective layer is provided with a third through hole communicating with the second through hole; a metal layer, the metal layer covers the first protective layer and fills the first through hole, the second through hole and the third through hole; a second insulating layer, the second insulating layer covers the metal layer, the second insulating layer is provided with a fourth through hole that exposes a portion of the upper surface of the metal layer; a second protective layer, the second protective layer covers the second insulating layer, the second protective layer is provided with a fifth through hole communicating with the fourth through hole.

[0005] In some embodiments of the present invention, the first insulating layer is selected from SiO2 insulating layers, the first protective layer is selected from SiN protective layers, and the buffer layer is selected from Al2O3 buffer layers.

[0006] In some embodiments of the present invention, the thicknesses of the first insulating layer and the first protective layer are independently 1000 Å - 1500 Å, and the thickness of the buffer layer is 1000 Å - 2000 Å.

[0007] In some embodiments of the present invention, a phosphorus-doped polysilicon layer is provided between the first protective layer and the second insulating layer. The phosphorus-doped polysilicon layer covers a part of the surface of the first protective layer and a part of the surface of the phosphorus-doped polysilicon layer is exposed in the fourth through hole.

[0008] In some embodiments of the present invention, the thickness of the phosphorus-doped polysilicon layer is 1500 Å - 2000 Å.

[0009] According to another aspect of the present invention, there is provided a method for manufacturing the above-mentioned MEMS pressure sensor, including the following steps:

[0010] Provide a silicon wafer and a substrate, and perform corresponding ion implantation of N+, corresponding ion implantation of P+, and corresponding ion implantation of P- on the surface of the silicon wafer to form an ion implantation block doping layer;

[0011] After the ion implantation is completed, a first insulating layer, a buffer layer, and a first protective layer are sequentially grown on one side of the ion implantation block doping layer of the silicon wafer;

[0012] Then perform photolithographic patterning, and etch the first protective layer, the buffer layer, and the first insulating layer to obtain connected third through holes, second through holes, and first through holes;

[0013] After that, grow a metal layer on the first protective layer and fill the third through holes, the second through holes, and the first through holes;

[0014] After the growth of the metal layer is completed, perform photolithographic patterning, etch the circuit diagram of the metal layer, and then sequentially grow a second insulating layer and a second protective layer on the metal layer;

[0015] Then perform photolithographic patterning, and etch the second protective layer and the second insulating layer to obtain connected fifth through holes and fourth through holes;

[0016] After the structural layer on the front side of the silicon wafer is manufactured, etch the back side of the silicon wafer to form a stress cavity;

[0017] Bond the side of the silicon wafer with the stress cavity to the substrate.

[0018] In some embodiments of the present invention, after the growth of the first protective layer is completed, a phosphorus-doped polysilicon layer is first grown. After the growth of the phosphorus-doped polysilicon layer is completed, it is lithographically imaged and etched to serve as a structural support layer under the pad. Then, the first protective layer, the buffer layer, and the first insulating layer are lithographically imaged and etched again.

[0019] In some embodiments of the present invention, the substrate is selected from glass, and the silicon wafer is anodically bonded to the substrate.

[0020] In some embodiments of the present invention, etching the first protective layer, the buffer layer, and the first insulating layer results in communicating third vias, second vias, and first vias with a minimum CD of 10 ± 2 μm.

[0021] In some embodiments of the present invention, the corresponding ion implantation is N+, the implanted Phos dose is 4e15 cm -2 , the energy is 80 keV, the tilt angle is 5°, and the implantation junction depth is 30 - 50 μm; the corresponding ion implantation is P+, the implanted Boron dose is 1e16 cm -2 , the energy is 60 keV, the tilt angle is 5°, and the implantation junction depth is 20 - 30 μm; the corresponding ion implantation is P-, the implanted Boron dose is 2e14 cm -2 , the energy is 40 keV, the tilt angle is 5°, and the implantation junction depth is 10 - 20 μm.

[0022] In the present invention, by inserting an Al2O3 buffer layer between the SiO2 insulating layer and the SiN protective layer above the ion implantation layer, the following effects are achieved: ① reducing interface defects: the smooth surface of the Al2O3 layer can improve the interface quality between SiN and SiO2, reduce the roughness and defects at the interface, and thus reduce the interface stress concentration; ② enhancing adhesion: Al2O3 has excellent adhesion, which helps to enhance the adhesion strength between SiN and SiO2, thereby reducing the risk of interface failure; ③ mechanical transition layer: although the thermal expansion coefficient of Al2O3 is relatively high, its elastic modulus is between that of SiN and SiO2, making it a mechanical transition layer that can relieve the stress difference between the two; ④ thermal stress relief: although the thermal expansion coefficient of Al2O3 is relatively high, in the multi-layer structure, the presence of the Al2O3 layer can help disperse and redistribute the thermal stress. Although it cannot completely eliminate the stress, it can reduce the direct impact on the SiN and SiO2 interface and greatly reduce the stress.

[0023] As a result, due to the reduced stress, (1) the stability of the film structure is enhanced: reducing the stress between the SiO2 and SiN layers can lower the stress concentration between the layers, thereby reducing the risk of film rupture or damage caused by stress concentration and ensuring long-term stable device operation; (2) the performance and reliability of the device are improved: the stable film structure makes the performance of the device more reliable under different environmental conditions, which is particularly important for pressure sensors that need to provide accurate and consistent outputs under various operating conditions; (3) the sensitivity and response characteristics of the sensor are improved: reducing the interlayer stress can improve the response characteristics of the sensor, which is suitable for applications that require fast response and high sensitivity; (4) the service life of the device is increased: the stable film structure can extend the service life of the device, reduce the frequency of maintenance and replacement, and lower the overall operating cost.

[0024] Therefore, by introducing an Al2O3 layer between the SiO2 and SiN layers to reduce stress, the present invention significantly improves the performance, stability, and reliability of the MEMS pressure sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of illustrating the preferred embodiments and are not considered to be a limitation of the present application. Moreover, throughout the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0026] Figure 1 is a schematic diagram of the overall structure of the MEMS pressure sensor of the present invention;

[0027] Figures 2 - 9 shows a schematic diagram of the structure obtained by some steps in the preparation method provided in Embodiment 1 of the present invention.

[0028] The reference numerals in the drawings are represented as follows: 1, substrate; 2, silicon wafer; 3, N+ implantation; 4, P+ implantation; 5, P- implantation; 61, first insulating layer; 62, second insulating layer; 7, metal layer; 81, first protective layer; 82, second protective layer; 9, phosphorus-doped polysilicon layer; 10, buffer layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0029] It should be clear that the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative efforts belong to the scope of protection of the present application.

[0030] When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.

[0031] In the description of the present application, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances. In addition, in the description of the present application, unless otherwise specified, "multiple" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship.

[0032] The present application embodiment discloses a MEMS pressure sensor. Figure 1 As shown, the MEMS pressure sensor includes a substrate 1 , a cup-shaped structure layer of a silicon wafer 2 , a first insulating layer 61 , a buffer layer 10 , a first protective layer 81 , a metal layer 7 , a second insulating layer 62 and a second protective layer 82 .

[0033] The cup-shaped structure layer of the silicon wafer 2 covers the upper surface of the substrate 1 , the cup-shaped structure layer of the silicon wafer 2 forms a stress cavity on the side facing the substrate 1 , and the surface layer on the side away from the substrate 1 forms an ion implantation block doping layer.

[0034] The first insulating layer 61 covers the cup-shaped structure layer and the ion implantation block doping layer of the silicon wafer 2, and the first insulating layer 61 is provided with a first through hole that exposes part of the upper surface of the ion implantation block doping layer; the buffer layer 10 covers the first insulating layer 61, and the buffer layer 10 is provided with a second through hole communicating with the first through hole; the first protective layer 81 covers the buffer layer 10, and the first protective layer 81 is provided with a third through hole communicating with the second through hole.

[0035] The metal layer 7 covers the first protection layer 81 and fills the first through hole, the second through hole and the third through hole.

[0036] The second insulating layer 62 covers the metal layer 7 and is provided with a fourth through hole exposing part of the upper surface of the metal layer 7; the second protective layer 82 covers the second insulating layer 62 and is provided with a fifth through hole communicating with the fourth through hole.

[0037] By using the MEMS pressure sensor in this technical solution, a buffer layer 10 is inserted between the first insulating layer 61 and the first protective layer 81 above the ion implantation block doping layer to reduce stress. After the stress is reduced, the stability of the film layer structure can be enhanced, the performance and reliability of the device can be improved, the sensitivity and response characteristics of the sensor can be improved, and the service life of the device can be increased. As a result, the performance, stability, and reliability of the MEMS pressure sensor are significantly improved.

[0038] In some embodiments of the present invention, the first insulating layer 61 is selected from the SIO2 insulating layer, the first protective layer 81 is selected from the SIN protective layer, and the buffer layer 10 is selected from the Al2O3 buffer layer 10.

[0039] By inserting the Al2O3 buffer layer 10 between the SIO2 insulating layer and the SIN protective layer, on the one hand, the interface defects can be reduced: the smooth surface of the Al2O3 layer can improve the interface quality between SiN and SiO2, reduce the roughness and defects at the interface, and thus reduce the interface stress concentration; on the other hand, the adhesion can be improved: Al2O3 has excellent adhesion, which helps to enhance the adhesion strength between SiN and SiO2, thereby reducing the risk of interface failure; on the third hand, it can serve as a mechanical transition layer: although the thermal expansion coefficient of Al2O3 is relatively high, its elastic modulus is between SiN and SiO2, making it a mechanical transition layer that can relieve the stress difference between the two; on the fourth hand, it can play a role in relieving thermal stress: although the thermal expansion coefficient of Al2O3 is relatively high, in the multi-layer structure, the presence of the Al2O3 layer can help disperse and redistribute the thermal stress, although not completely eliminate it, but can reduce the direct impact on the SiN and SiO2 interface; thus better enhancing the stability of the film layer structure, improving the performance and reliability of the device, improving the sensitivity and response characteristics of the sensor, and increasing the service life of the device.

[0040] In some embodiments of the present invention, the thicknesses of the first insulating layer 61 and the first protective layer 81 are independently 1000A - 1500A, and the thickness of the buffer layer 10 is 1000A - 2000A.

[0041] By setting the thickness of the first insulating layer 61 to be 1000A - 1500A, the thickness of the buffer layer 10 to be 1000A - 2000A, and the thickness of the first protective layer 81 to be 1000A - 1500A, the control of stress can be further improved.

[0042] It should be noted that the thicknesses of the first insulating layer 61, the buffer layer 10, and the first protective layer 81 are not particularly limited, and those skilled in the art can make reasonable selections according to actual needs. As some specific examples, the thickness of the first insulating layer 61 can be 1000 Å, 1100 Å, 1200 Å, 1300 Å, 1400 Å, 1500 Å, etc.; the thickness of the first protective layer 81 can be 1000 Å, 1100 Å, 1200 Å, 1300 Å, 1400 Å, 1500 Å, etc.; the thickness of the buffer layer 10 can be 1000 Å, 1100 Å, 1200 Å, 1300 Å, 1400 Å, 1500 Å, 1600 Å, 1700 Å, 1800 Å, 1900 Å, 2000 Å, etc.

[0043] In some embodiments of the present invention, as Figure 1 shown, a phosphorus-doped polysilicon layer 9 is provided between the first protective layer 81 and the second insulating layer 62. The phosphorus-doped polysilicon layer 9 covers a part of the surface of the first protective layer 81 and a part of the surface of the phosphorus-doped polysilicon layer 9 is exposed in the fourth through hole.

[0044] It should be understood that while the metal layer 7 covers the first protective layer 81 and fills the first through hole, the second through hole, and the third through hole, the metal layer 7 also contacts the phosphorus-doped polysilicon layer 9, and the phosphorus-doped polysilicon layer 9 can serve as a support layer under the pad.

[0045] Furthermore, the thickness of the phosphorus-doped polysilicon layer 9 is 1500 Å - 2000 Å.

[0046] It should be noted that the thickness of the phosphorus-doped polysilicon layer 9 is not particularly limited, and those skilled in the art can make reasonable selections according to actual needs. As some specific examples, the thickness of the phosphorus-doped polysilicon layer 9 can be 1500 Å, 1600 Å, 1700 Å, 1800 Å, 1900 Å, 2000 Å, etc.

[0047] In some embodiments of the present invention, the size of the stress cavity can be 800 μm * 400 μm.

[0048] It should be noted that the size of the stress cavity is not particularly limited, and those skilled in the art can make reasonable selections according to actual needs. As some specific examples, the size of the stress cavity can also be 750 μm * 350 μm, 750 μm * 400 μm, 750 μm * 450 μm, 800 μm * 350 μm, 800 μm * 450 μm, 850 μm * 350 μm, 850 μm * 400 μm, 850 μm * 450 μm, etc.

[0049] In some embodiments of the present invention, the thickness of the metal layer 7 can be 10000 Å - 15000 Å.

[0050] It should be noted that the thickness of the metal layer 7 is not particularly limited, and those skilled in the art can make a reasonable selection according to actual needs. As some specific examples, the thickness of the metal layer 7 can be 10000 Å, 11000 Å, 12000 Å, 13000 Å, 14000 Å, 15000 Å, etc.

[0051] In some embodiments of the present invention, the thickness of the second insulating layer 62 is 1000 Å - 1500 Å.

[0052] It should be noted that the thickness of the second insulating layer 62 is not particularly limited, and those skilled in the art can make a reasonable selection according to actual needs. As some specific examples, the thickness of the second insulating layer 62 can be 1000 Å, 1100 Å, 1200 Å, 1300 Å, 1400 Å, 1500 Å, etc.

[0053] Furthermore, the second insulating layer 62 can be selected from the SiO2 insulating layer.

[0054] In some embodiments of the present invention, the thickness of the second protective layer 82 is 1000 Å - 1500 Å.

[0055] It should be noted that the thickness of the second protective layer 82 is not particularly limited, and those skilled in the art can make a reasonable selection according to actual needs. As some specific examples, the thickness of the second protective layer 82 can be 1000 Å, 1100 Å, 1200 Å, 1300 Å, 1400 Å, 1500 Å, etc.

[0056] Furthermore, the second protective layer 82 can be selected from the SiN protective layer.

[0057] In some embodiments of the present invention, the substrate 1 can be selected from glass, the glass is double-sided polished, and the glass thickness is 1000 ± 30 μm.

[0058] In some embodiments of the present invention, as Figure 1 shown, the ion implantation block doping layer includes N+ implantation, P+ implantation, and P- implantation 5.

[0059] This embodiment also provides a method for manufacturing the above-mentioned MEMS pressure sensor, and the manufacturing method includes the following steps:

[0060] 1) First, provide a silicon wafer 2 and a substrate 1, and form an ion implantation block doping layer by corresponding ion implantation of N+, corresponding ion implantation of P+, and corresponding ion implantation of P- on the surface of the silicon wafer 2.

[0061] Furthermore, the surface layer of the silicon wafer 2 is subjected to corresponding ion implantation of N+, and the implantation dose of Phos (phosphorus) is 4e15 cm -2, with an energy of 80 keV, an inclination angle of 5°, and an implantation junction depth of 30 - 50 μm; corresponding to ion implantation of P+, the implantation dose of Boron is 1e16 cm -2 , with an energy of 60 keV, an inclination angle of 5°, and an implantation junction depth of 20 - 30 μm; corresponding to ion implantation of P-, the implantation dose of Boron is 2e14 cm -2 , with an energy of 40 keV, an inclination angle of 5°, and an implantation junction depth of 10 - 20 μm.

[0062] 2) After ion implantation is completed, a first insulating layer 61, a buffer layer 10, and a first protective layer 81 are sequentially grown on the doped layer side of the ion implantation block of the silicon wafer 2.

[0063] 3) Next, a phosphorus-doped polysilicon layer 9 is grown on the first protective layer 81. After the growth of the phosphorus-doped polysilicon layer 9 is completed, the phosphorus-doped polysilicon layer 9 is lithographically imaged and etched to serve as a structural support layer under the pad.

[0064] Furthermore, the minimum CD (feature size) after etching the phosphorus-doped polysilicon layer 9 is 50 ± 5 μm.

[0065] 4) Then, the first protective layer 81, the buffer layer 10, and the first insulating layer 61 are lithographically imaged and etched. A third through-hole is formed corresponding to the first protective layer 81, a second through-hole is formed corresponding to the buffer layer 10, and a first through-hole is formed corresponding to the first insulating layer 61. The third through-hole, the second through-hole, and the first through-hole are interconnected, that is, a VIA opening is left after etching to provide a metal electrical connection channel.

[0066] Furthermore, the minimum CD after etching the first protective layer 81, the buffer layer 10, and the first insulating layer 61 is 10 ± 2 μm.

[0067] 5) After that, a metal layer 7 is grown on the first protective layer 81 and fills the third through-hole, the second through-hole, and the first through-hole, that is, fills the VIA channel. After the growth of the metal layer 7 is completed, the circuit pattern of the metal layer 7 is lithographically patterned and etched.

[0068] Furthermore, the minimum CD after etching the metal layer 7 is 30 ± 5 μm.

[0069] 6) Then, a second insulating layer 62 and a second protective layer 82 are sequentially grown on the metal layer 7. Then, the second protective layer 82 and the second insulating layer 62 are lithographically imaged and etched to obtain a connected fifth through-hole and fourth through-hole, that is, a pad opening is left after etching.

[0070] Furthermore, the minimum CD after etching the second insulating layer 62 and the second protective layer 82 is 80 μm ± 2 μm.

[0071] 7) After the above-mentioned structural layers on the front side of the silicon wafer 2 are manufactured, the back side of the silicon wafer 2 is etched to form a stress cavity, and the side of the silicon wafer 2 with the stress cavity is fixed by anodic bonding with the substrate 1 glass, obtaining a MEMS pressure sensor.

[0072] Next, the preparation method of the above-mentioned MEMS pressure sensor in the present application will be further described in conjunction with specific embodiments.

[0073] Embodiment 1:

[0074] (1) N+ ions are implanted corresponding to the surface of the silicon wafer, with a Phos dose of 5e15 cm -2 , an energy of 80 keV, an inclination angle of 7°, and an implantation junction depth of 30 - 50 μm; P+ ions are implanted correspondingly, with a Boron dose of 1e16 cm -2 , an energy of 60 keV, an inclination angle of 7°, and an implantation junction depth of 20 - 30 μm; P- ions are implanted correspondingly, with a Boron dose of 3e14 cm -2 , an energy of 40 keV, an inclination angle of 7°, and an implantation junction depth of 10 - 20 μm, forming an ion implantation block doping layer, and the result is as Figure 2 shown.

[0075] (2) After the ion implantation is completed, O2 is introduced into the furnace tube, and the temperature is adjusted to 1000°C - 1200°C to grow a SiO2 insulating layer with a thickness of 1000A - 1500A as the first insulating layer.

[0076] (3) After the growth of the SiO2 insulating layer is completed, a magnetron sputtering process is used, O2 is introduced, the sputtering power of the Al target is 100 - 500 W, the gas pressure range is 1 - 10 mTorr, the deposition temperature is 100 - 200°C, and an Al2O3 buffer layer is sputtered as the buffer layer, with a thickness of 1000 - 2000A.

[0077] (4) After the sputtering of the Al2O3 buffer layer is completed, SIH2Cl2 and NH3 are introduced into the furnace tube, the temperature is adjusted to 600°C - 800°C, and a SiN protective layer with a thickness of 1000 - 1500A is grown as the first protective layer and also the stress control layer, with a stress requirement of <1000 MPa and a growth pressure range of 20 pa - 30 pa, and the result is as Figure 3 shown.

[0078] (5) After the growth of the SiN stress control layer is completed, SiH4 and PH3 are introduced into the furnace tube, the temperature is adjusted to 580°C - 650°C, and a phosphorus-doped Dpoly insulating layer (phosphorus-doped polysilicon layer) with a thickness of 1500 - 2000A is grown.

[0079] After the growth of the phosphorus-doped Dpoly insulating layer is completed, it is lithographically patterned, and dry etching of Dpoly is carried out using CL2 and HBR gases. After etching, the minimum CD is 50 ± 5 μm, which serves as the structural support layer under the pad. The results are as Figure 4 shown.

[0080] (7)After the etching of the phosphorus-doped Dpoly insulating layer is completed, it is lithographically patterned, and dry etching of the SiN protective layer, Al2O3 buffer layer, and SiO2 insulating layer is carried out using CL2, BCL3, and CF4 respectively. After etching, a VIA opening is left, with a minimum CD of 10 ± 2 μm, providing a metal electrical connection channel. The results are as Figure 5 shown.

[0081] (8)After the etching of the metal electrical connection channel is completed, an Al conductive layer is grown using magnetron sputtering technology. The sputtering power is 100 - 500 W, the deposition rate is 1 - 10 Å / s, the gas pressure is 2 - 10 mTorr, and the sputtering thickness is 10000A - 15000A to fill the VIA channel.

[0082] (9)After the growth of the Al conductive layer is completed, it is lithographically patterned, and a circuit diagram of the Al conductive layer is etched using CL2. After etching, the minimum CD is 30 ± 2 μm. The results are as Figure 6 shown.

[0083] (10)After the etching of the Al conductive layer is completed, the furnace tube temperature is adjusted to 300 °C, and O2 is introduced to grow a SiO2 insulating layer with a thickness of 1000 - 1500A as the second insulating layer.

[0084] (11)After the growth of the SiO2 insulating layer is completed, the furnace tube temperature is adjusted to 300 °C, and a SiN protective layer with a thickness of 1000 - 1500A is grown as the second protective layer. The results are as Figure 7 shown.

[0085] (12)After the SiN protective layer is completed, it is lithographically patterned, and dry etching of the SiN protective layer and SiO2 insulating layer is carried out using CL2 and CF4 respectively. After etching, the Al pad opening is opened, with a minimum CD of 80 ± 5 μm. The results are as Figure 8 shown.

[0086] (13)After the fabrication of the silicon-based front-side structural layer is completed, wet etching of the back side of the silicon wafer using KOH is carried out to form a cup-shaped structure of the silicon wafer as a stress cavity; the Si etching depth is 400 μm and the width is 800 μm. The results are as Figure 9 shown.

[0087] (14)Finally, an anodic bonding is carried out between the silicon wafer cup-shaped structure layer with the top growth layer and the bonding glass with a thickness of 1000 ± 30 μm to complete the preparation of the wafer structure, that is, the final results are as Figure 1 shown.

[0088] As described above, it is only the preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A MEMS pressure sensor, characterized in that: include: substrate; A silicon wafer cup-shaped structure layer, wherein the silicon wafer cup-shaped structure layer covers the upper surface of the substrate, the silicon wafer cup-shaped structure layer forms a stress cavity on the side facing the substrate, and the surface layer on the side facing away from the substrate forms an ion implantation block doping layer; A first insulating layer, the first insulating layer covers the silicon wafer cup-shaped structure layer and the ion implantation block doping layer, and the first insulating layer is provided with a first through hole exposing a portion of the upper surface of the ion implantation block doping layer; a buffer layer, the buffer layer covering the first insulating layer, the buffer layer being provided with a second through hole communicating with the first through hole; a first protective layer, the first protective layer covering the buffer layer, the first protective layer being provided with a third through hole communicating with the second through hole; a metal layer, wherein the metal layer covers the first protective layer and fills the first through hole, the second through hole and the third through hole; a second insulating layer, the second insulating layer covering the metal layer, the second insulating layer being provided with a fourth through hole exposing a portion of an upper surface of the metal layer; a second protective layer, the second protective layer covering the second insulating layer, the second protective layer being provided with a fifth through hole communicating with the fourth through hole; The first insulating layer and the second insulating layer are both selected from SIO2 insulating layers, the first protective layer and the second protective layer are both selected from SIN protective layers, the thickness of the first insulating layer and the first protective layer are independently 1000A-1500A, the buffer layer is selected from Al2O3 buffer layer, and the thickness of the buffer layer is 1000A-2000A; A phosphorus-doped polysilicon layer is arranged between the first protective layer and the second insulating layer, the phosphorus-doped polysilicon layer covers part of the surface of the first protective layer and part of the surface of the phosphorus-doped polysilicon layer is exposed in the fourth through hole, and the second insulating layer is directly connected to the first protective layer.

2. The MEMS pressure sensor according to claim 1, characterized in that: The thickness of the phosphorus-doped polysilicon layer is 1500A-2000A.

3. A method for preparing a MEMS pressure sensor according to any one of claims 1 to 2, characterized in that: The following steps are involved: Providing a silicon wafer and a substrate, and correspondingly ion-implanting N+, correspondingly ion-implanting P+, and correspondingly ion-implanting P- on the surface of the silicon wafer to form an ion-implanted block doping layer; After the ion implantation is completed, a first insulating layer, a buffer layer and a first protective layer are sequentially grown on one side of the doping layer of the ion implantation block of the silicon wafer; Then, photolithography is performed to pattern the first protection layer, the buffer layer and the first insulating layer to obtain the third through hole, the second through hole and the first through hole that are connected; Then, a metal layer is grown on the first protective layer and fills the third through hole, the second through hole and the first through hole; After the metal layer is grown, it is patterned by photolithography to etch out the circuit pattern of the metal layer, and then a second insulating layer and a second protective layer are grown on the metal layer in sequence; Then, photolithography is performed to pattern the second protection layer and the second insulating layer to obtain a fifth through hole and a fourth through hole that are connected; After the structural layer on the front side of the silicon wafer is manufactured, the back side of the silicon wafer is etched to form a stress cavity; The side of the silicon wafer with the stress cavity is bonded to the substrate.

4. The preparation method according to claim 3, characterized in that: After the growth of the first protective layer is completed, a phosphorus-doped polysilicon layer is first grown. After the growth of the phosphorus-doped polysilicon layer is completed, it is photolithographically patterned and etched to serve as a structural support layer under the pad. Then, the first protective layer, the buffer layer and the first insulating layer are photolithographically patterned and etched.

5. The preparation method according to claim 3, characterized in that: The substrate is selected from glass, and the silicon wafer is anodic bonded to the substrate.

6. The preparation method according to claim 3, characterized in that The first protection layer, the buffer layer and the first insulating layer are etched to obtain the third through hole, the second through hole and the first through hole which are connected, with a minimum CD of 10±2 μm.

7. The preparation method according to claim 3, characterized in that The corresponding ion implantation is N+, and the implantation Phos dose is 4e15 cm -2 , energy 80keV, tilt angle 5°, injection junction depth 30-50μm; the corresponding ion implantation P+, injection Boron dose 1e16 cm -2 , energy 60keV, tilt angle 5°, injection junction depth 20-30μm; the corresponding ion implantation P-, injection Boron dose 2e14 cm -2 , energy 40keV, tilt angle 5°, injection junction depth 10-20μm.

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