A heterogeneous intelligent computing chip RDMA communication method, system, platform and storage medium

Abstract

The application discloses a heterogeneous intelligent computing chip RDMA communication method, system, platform and storage medium, and the communication method comprises the following steps: performing RDMA communication initialization to identify the intelligent computing chip and discover the in-machine interconnection topology; performing RDMA communication data transmission on the to-be-processed data based on the identified intelligent computing chip and the discovered in-machine interconnection topology; performing an RDMA communication exit operation to release the occupied intelligent computing chip resources; and performing an RDMA communication exception detection and processing operation to identify whether a communication exception event occurs and process the identified communication exception event. According to the heterogeneous intelligent computing chip RDMA communication method, the RDMA communication method for heterogeneous intelligent computing chip hybrid communication is adopted, the communication performance can be ensured, and the computing resource utilization rate is improved.

Description

Technical Field

[0001] This invention relates to the field of artificial intelligence technology, and in particular to a heterogeneous intelligent computing chip RDMA communication method, system, heterogeneous intelligent computing chip computing platform and storage medium. Background Technology

[0002] Large-scale model training places higher demands on computing power and GPU memory due to the massive number of parameters. For example, GPT3 requires 2TB of GPU memory for hundreds of billions of parameters, which is insufficient for current single-card GPUs. To shorten training time, distributed training techniques are typically used, splitting the model and data and employing a multi-machine, multi-card approach to reduce training time. However, current intelligent computing chips designed and manufactured by different manufacturers use different chip architectures, software ecosystems, and communication protocols, making them incompatible and unable to interconnect at high speed. This hinders their ability to work together effectively in large-scale model training / inference applications requiring massive computing resources. For instance, the BR100 from Biren Technology, the BI-V100 from Tianshu Zhixin, and the DCU series chips from Hygon Technology are based on general-purpose GPU architectures. However, while the former two are software-compatible with the Nvidia CUDA ecosystem, the Hygon DCU supports the AMD ROCm ecosystem. Unlike these manufacturers, Huawei's NPU910B uses a DSA architecture and its own software stack, which does not support CUDA or the ROCm ecosystem. Huawei's NPU board integrates a high-performance network interface to implement a proprietary communication protocol. Therefore, overcoming the interconnection problem between different intelligent computing chips and realizing hybrid communication between domestic and foreign heterogeneous intelligent computing chips is an important technical challenge with extremely high economic value.

[0003] Currently, many institutions and manufacturers both domestically and internationally have begun to focus on and research the interoperability issues between different intelligent computing chips. However, current mainstream solutions mainly focus on mixed networking training of chips from the same manufacturer / software ecosystem / communication protocol, without considering the problem of mixed communication between heterogeneous intelligent computing chips. How to solve the problem of mixed communication between heterogeneous intelligent computing chips is a technical problem that urgently needs to be solved in this field.

[0004] Existing AI cluster solutions supporting multi-chip hybrid training employ low-speed TCP (Transmission Control Protocol) to address the challenge of cross-protocol communication between heterogeneous chips. However, this solution suffers from poor communication performance and low scalability, leading to suboptimal utilization of computing resources and limited application scenarios. Therefore, it is necessary to propose a high-performance communication method for heterogeneous intelligent computing chips to ensure communication performance and thereby improve computing resource utilization. Summary of the Invention

[0005] To address this, the present invention provides a heterogeneous intelligent computing chip RDMA communication method, system, platform, and storage medium, in an attempt to solve or at least alleviate at least one of the problems mentioned above.

[0006] According to one aspect of the present invention, a heterogeneous intelligent computing chip RDMA communication method is provided, the method comprising:

[0007] Step S100: Perform RDMA communication initialization to identify the intelligent computing chip and discover the internal interconnect topology;

[0008] Step S200: Based on the identified intelligent computing chip and the discovered internal interconnection topology, perform RDMA communication data transmission for the data to be processed;

[0009] Step S300: Perform RDMA communication exit operation to release the occupied intelligent computing chip resources;

[0010] Step S400: Perform RDMA communication anomaly detection and processing operations to identify whether any communication anomaly events have occurred and to process the identified communication anomaly events.

[0011] For example, step S100 includes:

[0012] Step S101: Perform a smart computing chip discovery operation to identify and discover available smart computing chips in the system;

[0013] Step S102: Perform an internal interconnect topology discovery operation to determine the interconnect topology relationship between the discovered intelligent computing chips;

[0014] Step S103: Perform a network interface discovery operation to identify network interfaces that can be used for RDMA communication;

[0015] Step S104: Perform RDMA resource initialization operation;

[0016] Step S105: Perform synchronization operations on RDMA resource information and interconnection information.

[0017] For example, step S101 is implemented by polling PCIe, and includes the following steps:

[0018] Step S1011: Initialize the PCIe polling mechanism to periodically read PCIe device information;

[0019] Step S1012: Perform PCIe polling operation, and read PCIe device information in each polling cycle, wherein the PCIe device information includes a device list and configuration information;

[0020] Step S1013: Analyze the read PCIe device information to determine whether a smart computing chip exists.

[0021] Optionally, step S102 includes:

[0022] Step S1021: Perform a connection relationship detection operation to determine the physical connection method between each intelligent computing chip in the server;

[0023] Step S1022: Construct the internal interconnection topology of the server based on the physical connection method.

[0024] Optionally, step S103 includes:

[0025] Step S1031: Perform a protocol identification operation to identify the network protocols in the system that support RDMA;

[0026] Step S1032: Based on the identified network protocol, search for devices in the network that support RDMA;

[0027] Step S1033: Obtain the configuration information of the device supporting RDMA, wherein the configuration information includes IP address and port number.

[0028] Optionally, step S104 includes:

[0029] Step S1041: Perform RDMA initialization on the intelligent computing chip to ensure its normal operation and support for RDMA communication;

[0030] Step S1042: For the intelligent computing chip that has completed RDMA initialization, create an RDMA communication channel;

[0031] Step S1043: Configure the parameters of the created RDMA communication channel, wherein the configuration includes the peer QP number and the peer IP address;

[0032] Step S1044: Perform a memory region registration operation to register the application's memory region with the intelligent computing chip, so that the intelligent computing chip can directly access the memory region for data transmission.

[0033] Optionally, step S200 includes:

[0034] Receive and identify the PrepareToRecv signal from the intelligent computing chip, which acts as the receiving end;

[0035] Data to be processed is sent to the intelligent computing chip based on RDMA WRITE operation, so that the data to be processed is stored in the memory of the receiving end;

[0036] After the data to be processed has been sent, a SendDone signal is sent to the intelligent computing chip;

[0037] The SendDoneAck signal from the intelligent computing chip is received and identified, thus ending the data transmission.

[0038] Optionally, in step S200, a dedicated memory for receiving signaling is set up for the receiving end.

[0039] Optionally, step S300 includes:

[0040] Step S301: Close the physical and logical connections related to RDMA communication;

[0041] Step S302: Release memory resources used during RDMA communication;

[0042] Step S303: Cancel the registration of the memory region of the intelligent computing chip during RDMA communication;

[0043] Step S304: Clear the status information related to RDMA communication.

[0044] For example, step S400 includes:

[0045] In step S100, initialization anomaly detection and processing are performed, wherein the initialization anomaly includes at least one of RDMA network connectivity anomaly, device discovery anomaly, configuration error, and insufficient resources; and / or,

[0046] In step S200, data transmission anomaly detection and processing are performed, wherein the data transmission anomaly includes at least one of abnormal packet loss, link interruption, congestion control, and data consistency; and / or,

[0047] In step S300, communication exit anomaly detection and processing are performed, wherein the communication exit anomaly includes at least one of resource release anomaly, connection closure anomaly, and configuration recovery anomaly.

[0048] Another embodiment of the present invention provides a heterogeneous intelligent computing chip RDMA communication system, the system comprising:

[0049] The heterogeneous intelligent computing chip RDMA communication initialization unit is used to perform RDMA communication initialization in order to identify the intelligent computing chip and discover the internal interconnection topology;

[0050] The heterogeneous intelligent computing chip RDMA communication data transmission unit is used to perform RDMA communication data transmission on the data to be processed based on the identified intelligent computing chip and the discovered internal interconnection topology.

[0051] The heterogeneous intelligent computing chip RDMA communication exit operation unit is used to perform RDMA communication exit operation to release the occupied intelligent computing chip resources;

[0052] The heterogeneous intelligent computing chip RDMA communication anomaly detection and processing unit is used to perform RDMA communication anomaly detection and processing operations to identify whether a communication anomaly event has occurred and to process the identified communication anomaly event.

[0053] Another aspect of the present invention provides a heterogeneous intelligent computing chip computing platform, which includes at least two heterogeneous intelligent computing chips, wherein the data communication in the heterogeneous intelligent computing chip platform adopts the heterogeneous intelligent computing chip RDMA communication method described in any of the above claims.

[0054] Another aspect of the present invention provides a readable storage medium storing program instructions, which, when read and executed by a computing device, cause the computing device to perform the heterogeneous intelligent computing chip RDMA communication method described in any of the preceding claims.

[0055] The heterogeneous intelligent computing chip RDMA communication method of the present invention, by employing an RDMA communication method oriented towards hybrid communication of heterogeneous intelligent computing chips, can guarantee communication performance, thereby improving the utilization rate of computing resources. Correspondingly, the heterogeneous intelligent computing chip RDMA communication system, heterogeneous intelligent computing chip computing platform, and storage medium of the present invention also have the aforementioned technical effects. Attached Figure Description

[0056] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings. The drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the present invention and do not constitute a limitation of the present invention. In the drawings, the same reference numerals generally represent the same components or steps.

[0057] Figure 1 This is a schematic flowchart of a heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention;

[0058] Figure 2 This is a schematic block diagram of an RDMA communication initialization method according to an embodiment of the present invention;

[0059] Figure 3 This is a schematic flowchart illustrating a method for identifying and discovering intelligent computing chips by polling PCIe according to an embodiment of the present invention.

[0060] Figure 4 This is a schematic flowchart of an intra-machine interconnection topology discovery method according to an embodiment of the present invention;

[0061] Figure 5 This is a schematic flowchart of an RDMA network interface discovery method according to an embodiment of the present invention;

[0062] Figure 6 This is a schematic flowchart of an RDMA resource initialization method according to an embodiment of the present invention;

[0063] Figure 7 This is a schematic flowchart of an RDMA communication data transmission method according to an embodiment of the present invention;

[0064] Figure 8 This is a schematic flowchart of a heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention;

[0065] Figure 9 This is a schematic diagram of a hybrid communication SDK software system running on an intelligent computing server according to an embodiment of the present invention. Detailed Implementation

[0066] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thorough and complete, and will fully convey the scope of the present application to those skilled in the art.

[0067] In this application embodiment, intelligent computing chips refer to chips used for artificial intelligence computing tasks, including GPUs, NPUs, FPGAs, and other chips. The artificial computing tasks covered in this application include artificial intelligence training tasks and artificial intelligence inference tasks. Heterogeneous intelligent computing chips refer to a single artificial intelligence computing task being completed jointly by different intelligent computing chips, where differences include manufacturers, software ecosystems, and chip architectures. RDMA (Remote Direct Memory Access) is a high-performance network communication technology with advantages such as high bandwidth, low latency, and no CPU consumption. Specifically, RDMA at the protocol level mainly includes three protocols: Infiniband (IB), RDMA over Converged Ethernet (RoCE), and Internet Wide Area RDMA Protocol (iWARP). These three protocols all conform to the RDMA standard and share the same upper-layer user interface (Verbs), differing only at different layers. RDMA communication refers to data transfer via RDMA. Traditional RDMA communication typically operates under the same protocol. The heterogeneous intelligent computing chip RDMA communication in this application embodiment refers to communication between heterogeneous computing chips based on the RDMA protocol, which is clearly cross-protocol communication. A key inventive point of this application is the proposal of a specific implementation method for RDMA communication in heterogeneous intelligent computing chips.

[0068] Figure 1 The overall flow of a heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention is shown, which includes steps S100 to S400:

[0069] Step S100: RDMA communication initialization.

[0070] This step refers to the stage where the device discovers, establishes a communication connection, or initializes communication parameters. In the embodiments of this application, step S100 can be adopted... Figure 2 The method shown can also be implemented using other feasible methods. In this step, RDMA communication initialization is performed for intelligent computing chip identification and internal interconnect topology discovery.

[0071] Step S200: RDMA communication data transmission.

[0072] This step is used to perform data transmission related operations, specifically: based on the identified intelligent computing chip and the discovered internal interconnect topology, RDMA communication data transmission is performed on the data to be processed. In this embodiment of the invention, data transmission refers to the communication process of transferring data from one place to another.

[0073] Step S300: RDMA communication exits.

[0074] This step marks the end of the communication process, including closing the connection or releasing related resources. After the program completes step S200, it will execute the RDMA communication exit operation. Initiating the RDMA communication exit procedure is to ensure that system resources (i.e., intelligent computing chip resources) are properly released and that the system returns to its initial state.

[0075] Step S400: RDMA communication anomaly detection and handling.

[0076] This step is used to perform RDMA communication anomaly detection and handling operations to identify whether any communication anomalies have occurred and to handle the identified anomalies. The heterogeneous intelligent computing chip RDMA communication anomaly handling process refers to the handling procedures taken by the system when an anomaly occurs during RDMA communication. The purpose of this process is to ensure that the system can correctly handle anomalies and take appropriate measures to restore communication or minimize losses.

[0077] exist Figure 1 In the flowchart shown, the arrows indicate the execution order of these steps. A direct arrow connects steps S100 and S200, indicating that data transmission occurs immediately after initialization. A direct arrow also connects steps S200 and S300, indicating that communication terminates immediately after data transmission. Furthermore, steps S100, S200, and S300 all point to step S400, indicating that if an exception occurs during any communication process, an exception handling step will be executed; after processing and recovery, the process will return to the original step.

[0078] Figure 2 This document illustrates a detailed exemplary flow of step S100, or RDMA communication initialization step, in a heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention. Figure 2 As shown, step S100 may include steps S101 to S105, as detailed below:

[0079] Step S101: Intelligent computing chip device discovery.

[0080] Intelligent computing chip device discovery, also known as automatic intelligent computing chip identification and discovery, is the first step in the RDMA communication initialization process, involving the identification and discovery of intelligent computing chip devices. This step may include searching for available intelligent computing resources in the network or probing for specific devices.

[0081] In this embodiment, automatic identification and discovery of intelligent computing chips refers to the software system automatically discovering the intelligent computing chips installed in the server to achieve management and utilization of these chips. In existing technologies, servers often install intelligent computing chips and other external devices through a PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) interface. In existing non-heterogeneous intelligent computing chip solutions, since the intelligent computing chips support the same programming interface, automatic discovery of intelligent computing chips can usually be performed directly through the programming interface during communication. However, for systems including heterogeneous intelligent computing chips, due to the significant differences in the programming interfaces supported by the heterogeneous intelligent computing chips, automatic discovery cannot be performed directly through these interfaces. To solve this problem, this application proposes a scheme to identify and discover intelligent computing chips by polling the PCIe interface. By polling the PCIe interface, current network information is read, and information related to the intelligent computing chips is obtained from it.

[0082] Figure 3 This document illustrates a detailed exemplary process for identifying and discovering intelligent computing chips by polling PCIe according to an embodiment of the present invention. Figure 3 As shown, the method for identifying and discovering intelligent computing chips by polling PCIe includes the following steps:

[0083] Step S1011: Initialize the PCIe polling mechanism.

[0084] The purpose of initializing the PCIe polling mechanism is to periodically read PCIe device information.

[0085] Step S1012: Perform a polling operation to read PCIe device information in each polling cycle.

[0086] Perform a polling operation to read PCIe device information, including device list and configuration information, in each polling cycle.

[0087] Step S1013: Analyze the read PCIe device information to determine whether a smart computing chip exists.

[0088] One method to determine the presence of a smart computing chip is to look for specific device identifiers, configuration parameters, or other characteristics. If the PCIe device information includes a specific device identifier or specific configuration parameters, then the corresponding interface is confirmed to have a smart computing chip.

[0089] The embodiments of this application can achieve automatic discovery of intelligent computing chips in the server by polling PCIe, without relying on the specific programming interface of heterogeneous intelligent computing chips.

[0090] Step S102: Discovery of intra-machine interconnect topology.

[0091] After discovering the intelligent computing chip devices in step S101, the next step is to determine the internal connection structure between these intelligent computing chip devices, i.e., the server's internal interconnection topology. This step allows us to understand the physical or logical connection methods between the devices, which will be used for subsequent communication configuration.

[0092] In this application, server internal interconnect topology discovery refers to automatically identifying and discovering the internal interconnect topology of an intelligent computing server using specific methods and algorithms. An intelligent computing server typically contains multiple computing nodes and network devices, such as GPU cards, CPUs, memory, and storage devices. These devices are connected through various interconnect technologies, such as PCIe, NVLink, and InfiniBand. Because the interconnection methods and topologies of these devices can be very complex, and the interconnection methods and topologies of different intelligent computing chips are fundamentally different, specialized technologies are needed to automatically discover and identify them.

[0093] Figure 4 An exemplary flow of an intra-machine interconnect topology discovery method according to an embodiment of the present invention is shown. Figure 4 As shown, the on-board interconnect topology discovery method of this application includes the following steps:

[0094] Step S1021: Connection Detection. This step specifically involves performing connection relationship detection to determine the physical connection methods between devices within the server.

[0095] This step determines the physical connection methods between devices within the server by analyzing the connection relationships between them, such as PCIe links and NVLink channels.

[0096] Step S1022: Topology Construction. This step specifically involves constructing the internal interconnection topology of the server based on this physical connection method.

[0097] This step constructs the internal interconnection topology of the server based on the connection relationships and configuration information between devices. This interconnection topology includes the connection methods, bandwidth, latency, etc. between nodes.

[0098] The on-device interconnect topology discovery method of this application can obtain information on the physical or logical connection methods between devices through link detection and topology construction, which can then be used for subsequent communication configuration.

[0099] Step S103: Network interface discovery.

[0100] The purpose of this step is to identify network interfaces that can be used for RDMA communication. The specific methods for network interface discovery include searching for RDMA-enabled network cards, searching for RDMA-enabled ports, or searching for other RDMA-enabled network hardware resources; no specific limitations are specified here.

[0101] In this application, RDMA network interface discovery refers to the automatic identification and discovery of network interfaces that support RDMA through specific methods and protocols. Figure 5 An exemplary flow of an RDMA network interface discovery method according to an embodiment of the present invention is shown. Figure 5 As shown, based on the discovery of intra-machine topology interconnects, the RDMA network interface discovery method of this application mainly includes the following steps:

[0102] Step S1031: Protocol identification, that is, by analyzing network data packets or querying network device information, identify the network protocols that support RDMA, such as InfiniBand, RoCE (RDMA over Converged Ethernet) or iWARP (Internet Wide Area RDMA Protocol).

[0103] Step S1032: Device discovery, i.e., searching for devices in the network that support RDMA, such as RDMA network cards (HCA or RNIC), based on the identified protocol. This can be achieved by sending specific network requests or querying device information.

[0104] Step S1033: Configuration acquisition, that is, for the discovered devices that support RDMA, obtain their configuration information, such as IP address, port number, etc.

[0105] Step S104: RDMA resource initialization.

[0106] After discovering the network interface, the next step is to initialize the RDMA resources. This initialization may include configuring the network interface for RDMA communication, establishing a communication channel, and negotiating communication parameters.

[0107] Figure 6 An exemplary flow of an RDMA resource initialization method according to an embodiment of the present invention is shown. Figure 6 As shown in this application, after completing the RDMA network interface discovery, the method for initializing RDMA-related resources based on the acquired RDMA configuration includes the following steps:

[0108] Step S1041: Initialize the RDMA device.

[0109] This step is to ensure that the device is functioning properly and supports RDMA communication.

[0110] Specifically, RDMA devices can be initialized using APIs or library functions provided by the manufacturer, including configuring device parameters and setting the operating mode.

[0111] Step S1042: Create an RDMA communication channel.

[0112] Based on the initialized RDMA device, create RDMA communication channels, such as Queue Pair (QP) or Completion Queue (CQ). These channels will be used for data transfer and communication control between devices.

[0113] Step S1043: Configure the RDMA communication channel.

[0114] In this step, the parameters of the created RDMA communication channel are configured. This configuration includes setting the peer QP number and peer IP address. In one specific implementation, the configured communication channel parameters include communication mode, transport protocol, and packet size. These parameters directly affect communication performance and efficiency.

[0115] Step S1044: Register the memory region.

[0116] In this step, the application's memory regions are registered with the RDMA device so that the device can directly access these memory regions for data transfer. This is accomplished using vendor-provided APIs or library functions.

[0117] Through the above steps S1041 to S1044, RDMA-related resources can be initialized based on the obtained RDMA configuration, and a reliable RDMA connection can be established.

[0118] Step S105: Synchronize RDMA resource information and interconnection information.

[0119] This step synchronizes RDMA resource information and internal interconnect topology information with the communication peer. By performing this operation, it ensures that the RDMA communication parameters are consistent with the internal connection structure between devices, thereby enabling efficient communication.

[0120] RDMA resource information and interconnection information synchronization refers to ensuring consistent configuration and status information among devices participating in RDMA communication to achieve efficient and reliable data transmission. This process involves establishing an RDMA connection using a previously configured RDMA communication channel and registered memory regions. During the RDMA connection establishment process, devices perform a handshake and authentication process to ensure connection security and reliability. The handshake process includes exchanging necessary information. In a specific example of this application, the information exchanged during the handshake process includes: the RDMA network interface IP address, the heterogeneous intelligent computing chip virtual address, the heterogeneous intelligent computing chip memory address Key, the RDMA network interface QP number, and the message start sequence number, etc. This information is used to establish and maintain the connection and ensure correct data transmission.

[0121] The RDMA network interface IP address is used to uniquely identify the device in the network, ensuring that data packets are correctly sent to the target device. The heterogeneous intelligent computing chip virtual address is used to locate the data in the device's memory, allowing data to be directly transferred from the source memory to the target memory without CPU intervention. The heterogeneous intelligent computing chip address key is used to verify connection security, ensuring that only authorized devices can access specific memory areas. The address key prevents unauthorized access and data leakage. The RDMA network interface QP number is used to identify the queue pair in the RDMA communication channel, ensuring that data is correctly sent to the target queue. The message start sequence number ensures the order and reliability of the data. Each data packet has a unique sequence number, which the receiver can use to verify the integrity and order of the data.

[0122] Synchronizing this information between the communicating parties is crucial, as it directly impacts the correctness and efficiency of RDMA communication. This application ensures that each device uses a consistent configuration and state during communication by synchronizing this information, thereby avoiding data transmission errors and performance degradation.

[0123] By executing steps S101 to S105 above, this embodiment of the application ensures that all necessary components and resources are correctly identified, configured, and synchronized before RDMA communication begins. This avoids potential communication errors and optimizes communication performance. In this process, steps S101 to S105 are typically executed sequentially, but other feasible steps may exist between them, which are not limited here.

[0124] Figure 7 This document illustrates an exemplary detailed flow of step S200, i.e., the RDMA communication data transmission step, in a heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention. For example... Figure 7As shown, step S200 may include steps 2.1 to 2.4, as detailed below:

[0125] Figure 7 The RDMA communication transmission process is demonstrated, which includes two parts: the sender and the receiver.

[0126] Sender: In Figure 7 In this diagram, the sender is the entity on the left, representing the party that has completed communication initialization. The sender sends data to the receiver and receives an acknowledgment signal from the receiver.

[0127] Receiver: at Figure 7 In this diagram, the receiver is the entity on the right, representing the party that has also completed communication initialization. The receiver will receive the data sent by the sender and send an acknowledgment signal back to the sender.

[0128] The RDMA communication transmission process is as follows:

[0129] Communication initialization complete: At the start of the process, both communicating parties have completed the communication initialization work, including establishing an RDMA connection and configuring communication parameters.

[0130] Step 2.1: Receive PrepareToRecv signal. The receiving end sends a PrepareToRecv signal in the sending direction to indicate that the receiving end is ready to receive data.

[0131] Step 2.2: Data is sent based on RDMA WRITE. After receiving the PrepareToRecv signal, the sending end uses the RDMAWRITE operation to transfer the data directly from the sending end's memory to the sending end's memory.

[0132] Step 2.3: Send the SendDone signal. After the data transmission is completed, the sending end sends a SendDone signal to the receiving end to indicate that the data transmission has been completed.

[0133] Step 2.4: Receive SendDoneAck signal. After receiving the SendDone signal, the sender sends a SendDoneAck signal to the receiving end to indicate that the receiving end has received the data and confirms that the data transmission is complete.

[0134] Data transmission complete: At the end of the process, both communicating parties confirm the completion of data transmission.

[0135] The specific implementation forms of the communication control signaling in the embodiments of this application will be described below. In this application, the control signaling involved in the RDMA communication data transmission process includes the following signaling:

[0136] PrepareToRecv signal: The sender sends the PrepareToRecv signal to the receiver, indicating that the sender is ready to receive data.

[0137] SendDone signal: After data transmission is completed, the receiving end sends a SendDone signal to the sending end to indicate that data transmission has been completed.

[0138] SendDoneAck signal: After receiving the SendDone signal, the sending end sends the SendDoneAck signal to the receiving end, indicating that the sending end has received the data and confirms that the data transmission is complete.

[0139] This application designs control signaling that supports multiple implementation forms, including TCP and RDMA. Given the poor performance of TCP, this application prioritizes RDMA WRITE for control signaling in certain specific implementations. One feasible implementation method is as follows: the receiving or sending end declares a block of memory specifically for receiving or sending signaling. Each signaling requires only 4 bytes of memory space in the heterogeneous intelligent computing chip, thus requiring only 12 bytes of memory space to complete one transmission, and this memory space is reusable. The address-related information for each signaling is synchronized between the sending and receiving ends at the communication initialization node. For example, the address of the PrepareToRecv signal needs to be synchronized from the sending end to the receiving end. During data transmission, only one RDMA WRITE operation is needed to complete the signaling transmission. Simultaneously, the receiving end polls the value of the corresponding address; when it finds a semaphore value of 1, it indicates that the corresponding signal has been received, and therefore proceeds to the next step.

[0140] In one specific implementation, this application uses RDMA WRITE to transmit data. After receiving the PrepareToRecv signal, the sending end uses the RDMA WRITE operation to directly transfer data from the sending end's memory to the receiving end's memory. RDMA WRITE is a one-sided operation, and the receiving end does not need to perform any additional operations to receive data. In other specific implementations, this application may also use other interfaces, such as READ, SEND / RECV, etc., to transmit data.

[0141] This application resets the PrepareToRecv, SendDone, and SendDoneAck signals after completing an RDMA communication transmission. This means that after each data transmission, these signals are reset to their initial state to prepare for the next data transmission. Specifically:

[0142] For the PrepareToRecv signal: After each data transmission is completed, the sending end resets the PrepareToRecv signal memory space to indicate that it is ready to receive the next data.

[0143] For the SendDone signal: After each data transmission is completed, the receiving end will reset the SendDone signal memory space to indicate that it has completed the data transmission.

[0144] For the SendDoneAck signal: After each data transmission is completed, the sending end will reset the SendDoneAck signal memory space to indicate that it has received the acknowledgment signal sent by the receiving end.

[0145] Figure 8 This document illustrates an exemplary detailed flow of step S300, or RDMA communication exit step, in a heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention. After the program completes step S200, i.e., after all data transmission tasks are completed, the RDMA communication exit operation will be executed. Initiating the RDMA communication exit process ensures that system resources are correctly released and that the system returns to its initial state. Figure 8 As shown, step S300 may include the following key steps:

[0146] Step S301: Close the connection.

[0147] First, the program closes all connections related to RDMA communication. This includes closing the physical connection to the RDMA device, as well as closing logical connections established during communication, such as Queue Pairs (QPs) or CompletionQueues (CQs).

[0148] Step S302: Release memory.

[0149] Next, the program will release the memory resources used during RDMA communication. This includes releasing the buffers used to store data and the memory used to store RDMA communication status information.

[0150] Step S303: Cancel registration.

[0151] Memory registration is used during RDMA communication, and the program also needs to unregister these heterogeneous computing chip memory regions. This will decouple these memory regions from the RDMA device and make them available for use by other programs or system components.

[0152] Step S304: Cleanup status.

[0153] Finally, the program cleans up all state information related to RDMA communication. This includes clearing any incomplete transfer requests, error states, or other communication-related state information.

[0154] In this application, step S400, namely the RDMA communication anomaly handling process, is uniquely designed to ensure that the system can correctly handle abnormal situations and take appropriate measures to restore communication or minimize losses.

[0155] For example, in step S100, i.e., the initialization process of heterogeneous intelligent computing chip RDMA communication, this application will detect and process the following initialization anomalies.

[0156] RDMA Network Connectivity Anomalies: During initialization, the system needs to ensure the connectivity of the RDMA network. If there are problems with the network connection, such as link failure or network congestion, communication will fail. The system can detect network connectivity anomalies by sending network probe packets and checking the network status.

[0157] Device discovery anomalies: During initialization, the system needs to discover and identify heterogeneous intelligent computing chip devices participating in communication. If problems occur during the device discovery process, such as a device not responding or incorrect device configuration, communication will fail to be established. The system can detect device discovery anomalies by sending device discovery requests and checking device status.

[0158] Configuration error: During initialization, the system requires correct configuration of RDMA communication parameters, such as IP address, port number, and queue depth. Incorrect configuration will lead to communication failure. The system can detect configuration errors by verifying configuration parameters and checking configuration files.

[0159] Insufficient resources: During initialization, the system needs to allocate sufficient resources to support RDMA communication, such as memory and CPU. Insufficient resources will lead to degraded communication performance or communication failure. The system can detect resource insufficiency anomalies by monitoring resource usage and checking resource allocation strategies.

[0160] In another specific implementation, during the RDMA communication data transmission process of the heterogeneous intelligent computing chip in step S200, the embodiments of this application will detect and process the following data transmission anomalies.

[0161] Abnormal packet loss: If data packets are lost or corrupted during transmission, it will lead to communication errors or data loss. This application detects abnormal packet loss by monitoring the transmission status of data packets and checking the reception status of the receiving end.

[0162] Link interruption: During transmission, if the network connection is interrupted or unstable, it will lead to communication interruption or increased latency. This application detects link interruption by monitoring the status of the network connection and checking the operating status of network devices.

[0163] Congestion control: During transmission, network congestion or excessive load will lead to increased communication delays or communication failures. This application's embodiments detect and handle congestion control anomalies by monitoring network traffic and adjusting transmission parameters.

[0164] Data consistency: If data consistency is compromised during transmission, it will lead to incorrect calculation results or data loss. This application's embodiments detect and handle data consistency anomalies by implementing data verification and data redundancy.

[0165] Furthermore, in the S300 heterogeneous intelligent computing chip RDMA communication exit stage, the embodiments of this application detect and handle the following anomalies.

[0166] Resource release anomalies: During the exit phase, the system needs to release resources used during communication, such as memory and CPU. If problems occur during the resource release process, such as resource leaks or resource contention, it will lead to wasted system resources or system instability.

[0167] Connection Closure Anomaly: During the exit phase, the system needs to close all connections related to RDMA communication. If problems occur during the connection closure process, such as connections not being closed or inconsistent connection states, it will lead to wasted system resources or system instability. The system can detect connection closure anomalies by monitoring connection status and checking connection closure policies.

[0168] Configuration recovery anomaly: During the exit phase, the system needs to restore to its initial configuration state. If problems occur during the configuration recovery process, such as failure to restore the configuration or configuration errors, the system will malfunction. The system can detect configuration recovery anomalies by verifying configuration parameters and checking the configuration recovery strategy.

[0169] Figure 9 A schematic diagram of a hybrid communication SDK software system running on a smart computing server according to another embodiment of the present invention is shown. The SDK software system mainly includes the following modules:

[0170] The heterogeneous intelligent computing chip RDMA communication SDK provides users with a programming interface for communication operations. This is the top-level module of the entire system. The programming interface is used to send and receive data, including synchronous interfaces (Send / Recv) and asynchronous interfaces (AsyncSend / AsyncRecv).

[0171] Communication initialization module: responsible for initializing the communication environment, including establishing communication channels and configuring communication parameters.

[0172] The data transmission module is used for data transmission, mainly including sending and receiving data.

[0173] The communication exit module is responsible for releasing communication resources after communication is completed, including closing the communication channel and releasing memory.

[0174] The communication exception handling module is used to handle abnormal situations that may occur during communication, such as communication errors and timeouts.

[0175] The entire system in this application embodiment works collaboratively through these modules, achieving efficient communication between heterogeneous intelligent computing chips and providing users with a convenient programming interface and stable communication services.

[0176] Another embodiment of the present invention provides a heterogeneous intelligent computing chip RDMA communication system, the system comprising:

[0177] The heterogeneous intelligent computing chip RDMA communication initialization unit is used to perform RDMA communication initialization in order to identify the intelligent computing chip and discover the internal interconnection topology;

[0178] The heterogeneous intelligent computing chip RDMA communication data transmission unit is used to perform RDMA communication data transmission on the data to be processed based on the identified intelligent computing chip and the discovered internal interconnection topology.

[0179] The heterogeneous intelligent computing chip RDMA communication exit operation unit is used to perform RDMA communication exit operation to release the occupied intelligent computing chip resources;

[0180] The heterogeneous intelligent computing chip RDMA communication anomaly detection and processing unit is used to perform RDMA communication anomaly detection and processing operations to identify whether a communication anomaly event has occurred and to process the identified communication anomaly event.

[0181] The heterogeneous intelligent computing chip RDMA communication system of this invention can be used to execute the RDMA communication method described in the above embodiments.

[0182] According to an exemplary embodiment of the present invention, a heterogeneous intelligent computing chip platform is also provided. This heterogeneous chip hybrid platform can support heterogeneous chips from various manufacturers such as AMD, Huawei Ascend, Tianshu Intelligent Chip, Muxi, Moore Threads, and NVIDIA, and can be configured with a desired number (e.g., kilowatts or tens of thousands of kilowatts) of heterogeneous chips. Data communication in this heterogeneous intelligent computing chip platform employs the heterogeneous chip RDMA communication method described in the above embodiments.

[0183] In one embodiment, communication in this heterogeneous intelligent computing chip platform performs the following steps:

[0184] Step S100: Perform RDMA communication initialization to identify the intelligent computing chip and discover the internal interconnect topology;

[0185] Step S200: Based on the identified intelligent computing chip and the discovered internal interconnection topology, perform RDMA communication data transmission for the data to be processed;

[0186] Step S300: Perform RDMA communication exit operation to release the occupied intelligent computing chip resources;

[0187] Step S400: Perform RDMA communication anomaly detection and processing operations to identify whether any communication anomaly events have occurred and to process the identified communication anomaly events.

[0188] In addition, the communication in this heterogeneous intelligent computing chip platform also performs other steps of the aforementioned heterogeneous intelligent computing chip RDMA communication method, which will not be repeated here.

[0189] Furthermore, according to yet another embodiment of the present invention, a computer-readable storage medium is provided, on which program instructions are stored, which, when executed by a computer or processor, are used to perform corresponding steps of the heterogeneous intelligent computing chip RDMA communication method of the embodiments of the present invention. The storage medium may, for example, include a memory card of a smartphone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disc read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media.

[0190] In one embodiment, the computer program instructions, when executed by a computer, can perform the heterogeneous intelligent computing chip RDMA communication method according to an embodiment of the present invention.

[0191] In one embodiment, the computer program instructions perform the following steps when the computer runs:

[0192] Step S100: Perform RDMA communication initialization to identify the intelligent computing chip and discover the internal interconnect topology;

[0193] Step S200: Based on the identified intelligent computing chip and the discovered internal interconnection topology, perform RDMA communication data transmission for the data to be processed;

[0194] Step S300: Perform RDMA communication exit operation to release the occupied intelligent computing chip resources;

[0195] Step S400: Perform RDMA communication anomaly detection and processing operations to identify whether any communication anomaly events have occurred and to process the identified communication anomaly events.

[0196] In addition, when the computer program instructions are executed by the computer, they also perform other steps of the aforementioned heterogeneous intelligent computing chip RDMA communication method, which will not be elaborated here.

[0197] The heterogeneous intelligent computing chip RDMA communication method, system, platform, and storage medium according to embodiments of the present invention can guarantee communication performance and improve the utilization rate of computing resources by adopting an RDMA communication method for hybrid communication of heterogeneous intelligent computing chips.

[0198] The technology in this application has the following advantages over existing technologies: First, it has a wider range of application scenarios, is not limited to the same manufacturer or software ecosystem, and can cope with more complex heterogeneous chip scenarios. Second, it provides higher performance by using a high-performance RDMA communication protocol scheme, which can provide better utilization of computing resources.

[0199] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of the invention. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of the invention. All such changes and modifications are intended to be included within the scope of the invention as claimed in the appended claims.

[0200] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0201] The various techniques described herein can be implemented in combination with hardware or software, or a combination thereof. Thus, the methods, apparatus, and devices of the present invention, or certain aspects or portions thereof, can take the form of program code (i.e., instructions) embedded in a tangible medium, such as a removable hard disk, USB flash drive, floppy disk, CD-ROM, or any other machine-readable storage medium, wherein when the program is loaded into and executed by a machine such as a computer, the machine becomes an apparatus for practicing the present invention.

[0202] When the program code is executed on a programmable computer, the electronic device generally includes a processor, a processor-readable storage medium (including volatile and non-volatile memory and / or storage elements), at least one input device, and at least one output device. The memory is configured to store program code; the processor is configured to execute the remote assistance method of the present invention according to instructions in the program code stored in the memory.

[0203] By way of example and not limitation, readable media include readable storage media and communication media. Readable storage media store information such as computer-readable instructions, data structures, program modules, or other data. Communication media generally embody computer-readable instructions, data structures, program modules, or other data in the form of modulated data signals such as carrier waves or other transmission mechanisms, and include any information transmission medium. Any combination of the above is also included within the scope of readable media. In this specification, the algorithms and displays are not inherently related to any particular computer, virtual system, or other device. Various general-purpose systems can also be used with the examples of this invention. Based on the above description, the required structure for constructing such systems is obvious. Furthermore, this invention is not directed to any particular programming language. It should be understood that the software and algorithms related to this invention described herein can be implemented using various programming languages, and the above description of specific languages ​​is merely to disclose certain specific embodiments of the invention and is not intended to limit the use of a particular language.

[0204] Numerous specific details are set forth in the specification of this application. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0205] In the several embodiments provided in this application, it should be understood that the disclosed apparatus, devices, and methods can be implemented in other ways. For example, the apparatus and device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0206] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0207] Similarly, it should be understood that, in order to streamline the invention and aid in understanding one or more of the various aspects of the invention, features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of the invention. However, this approach should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with fewer features than all of those in a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of the invention.

[0208] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0209] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of the invention and form different embodiments. For example, in the claims, any of the claimed embodiments can be used in any combination.

[0210] The components in the various embodiments of this application can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that computers, servers, microprocessors, or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules in the devices and apparatuses according to embodiments of the present invention. The present invention can also be implemented as an apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such programs implementing the present invention can be stored on a computer-readable medium or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0211] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. Terms such as “comprising,” “including,” and “having” do not exclude the presence of elements or steps not listed in the claims. The quantifiers “a” or “an” preceding an element do not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the terms first, second, and third, etc., does not indicate any order and can be interpreted as names.

[0212] Furthermore, in the embodiments of this application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" can include A, can include B, or can include both A and B. Words such as "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner. In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0213] In the description of the embodiments of this application, when a component is referred to as "connected" or "accessed" to other components, it should be understood that the component is not only directly connected to or accessed to other components, but also that another component may exist between the component and other components. On the other hand, when a component is referred to as "directly connected" or "directly accessed" to other components, it should be understood that there is no component between them. When a component is referred to as "actively connected" to other components, it means that the positional relationship between the component and other components is variable, such as the relationship between a slide rail and a slider, where the slider can slide on the slide rail, and the slide rail and the track are actively connected. When a component is referred to as "fixedly connected" to other components, it means that the positional relationship between the component and other components after assembly is relatively fixed.

[0214] The above description is merely a specific embodiment or illustration of the present invention, and the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Although this application has been described with reference to a limited number of embodiments, those skilled in the art will understand from the above description that other embodiments can be conceived within the scope of the present application described herein. Furthermore, it should be noted that the language used in this specification has been chosen primarily for readability and instructional purposes, and not for interpreting or limiting the subject matter of this application. Therefore, many modifications and alterations will be apparent to those skilled in the art without departing from the scope and spirit of the appended claims. The disclosure of this application is illustrative and not restrictive, and the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A heterogeneous intelligent computing chip RDMA communication method, characterized in that, The method comprises: Step S100: performing RDMA communication initialization to identify intelligent calculation chips and discover intra-machine interconnection topology; Step S200: performing RDMA communication data transmission on to-be-processed data based on the identified intelligent calculation chips and the discovered intra-machine interconnection topology; Step S300: performing RDMA communication exit operation to release the occupied intelligent calculation chip resources; Step S400: performing RDMA communication exception detection and processing operation to identify whether a communication exception event occurs and processing the identified communication exception event; The step S100 comprises step S101: performing intelligent calculation chip discovery operation to identify and discover available intelligent calculation chips; and the step S101 is realized by polling PCIe, comprising the following steps: Step S1011: initializing the PCIe polling mechanism to periodically read PCIe device information; Step S1012: performing the PCIe polling operation to read the PCIe device information in each polling cycle, wherein the PCIe device information comprises device list and configuration information; Step S1013: analyzing the read PCIe device information to determine whether there is an intelligent calculation chip.

2. The method of claim 1, wherein, The step S100 further comprises: Step S102: performing intra-machine interconnection topology discovery operation to determine the interconnection topology relationship between the discovered intelligent calculation chips; Step S103: performing network interface discovery operation to identify the network interface available for RDMA communication; Step S104: performing RDMA resource initialization operation; Step S105: performing synchronization operation on the RDMA resource information and interconnection information.

3. The method of claim 2, wherein, The step S102 comprises: Step S1021: performing connection relationship detection operation to determine the physical connection mode between the intelligent calculation chips in the server; Step S1022: constructing the intra-machine interconnection topology structure of the server based on the physical connection mode.

4. The method of claim 2, wherein, The step S103 comprises: Step S1031: performing protocol identification operation to identify the network protocol supporting RDMA in the system; Step S1032: searching the device supporting RDMA in the network according to the identified network protocol; Step S1033: obtaining the configuration information of the device supporting RDMA, wherein the configuration information comprises IP address and port number.

5. The method of claim 2, wherein, The step S104 comprises: Step S1041: performing RDMA initialization on the intelligent calculation chip to ensure its normal work and support RDMA communication; Step S1042: creating RDMA communication channel for the intelligent calculation chip completing the RDMA initialization; Step S1043: performing parameter configuration on the created RDMA communication channel, wherein the configuration comprises peer QP number and peer IP address; Step S1044: performing registration memory area operation to register the memory area of the application program into the intelligent calculation chip, so that the intelligent calculation chip can directly access the memory area for data transmission.

6. The method of claim 1, wherein, The step S200 comprises: Receiving and identifying a PrepareToRecv signal from the intelligent computing chip as a receiving end; Sending to-be-processed data to the intelligent computing chip based on an RDMA WRITE operation to store the to-be-processed data in the memory of the receiving end; After the to-be-processed data is sent, a SendDone signal is sent to the intelligent computing chip; Receiving and identifying a SendDoneAck signal from the intelligent computing chip, and ending data transmission.

7. The method of claim 6, wherein, In the step S200, memory dedicated to receiving signaling is set for the receiving end.

8. The method of claim 1, wherein, The step S300 includes: Step S301: closing physical connections and logical connections related to RDMA communication; Step S302: releasing memory resources used in the RDMA communication process; Step S303: canceling the registration of the memory area of the intelligent computing chip in the RDMA communication process; Step S304: cleaning state information related to RDMA communication.

9. The method according to any one of claims 1 to 8, characterized in that, The step S400 includes: In the step S100, initialization exception detection and processing are performed, wherein the initialization exception includes at least one of RDMA network connectivity exception, device discovery exception, configuration error, and resource shortage; And / or, In the step S200, data transmission exception detection and processing are performed, wherein the data transmission exception includes at least one of abnormal packet loss, link interruption, congestion control, and data consistency; And / or, In the step S300, communication exit exception detection and processing are performed, wherein the communication exit exception includes at least one of resource release exception, connection closing exception, and configuration recovery exception.

10. A heterogeneous intelligent computing chip RDMA communication system, characterized in that, The system includes: A heterogeneous intelligent computing chip RDMA communication initialization unit for performing RDMA communication initialization to identify intelligent computing chips and discover in-machine interconnection topology; wherein the intelligent computing chip identification is achieved by polling PCIe, including the following steps: Step S1011: initializing a PCIe polling mechanism to periodically read PCIe device information; Step S1012: performing a PCIe polling operation to read PCIe device information in each polling cycle, wherein the PCIe device information includes a device list and configuration information; Step S1013: analyzing the read PCIe device information to determine whether there is an intelligent computing chip; A heterogeneous intelligent computing chip RDMA communication data transmission unit for performing RDMA communication data transmission of to-be-processed data based on the identified intelligent computing chips and the discovered in-machine interconnection topology; A heterogeneous intelligent computing chip RDMA communication exit operation unit for performing RDMA communication exit operation to release occupied intelligent computing chip resources; A heterogeneous intelligent computing chip RDMA communication exception detection and processing unit for performing RDMA communication exception detection and processing operation to identify whether there is a communication exception event and to process the identified communication exception event.

11. A heterogeneous intelligence chip platform, comprising: The system includes at least two heterogeneous intelligent computing chips, wherein data communication in the heterogeneous intelligent computing chip platform adopts the method according to any one of claims 1 to 9.

12. A readable storage medium storing program instructions, which, when read and executed by a computing device, cause the computing device to perform the method of any one of claims 1 to 9.

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