A broadband frequency conversion assembly with soft calibration function

Abstract

This invention discloses a broadband frequency conversion component with soft calibration function. A fine delay unit receives four RF signals from the front-end subarray synthesis output of the array, performs fine-step delay compensation and amplification on them, achieving first-level subarray delay. A switching synthesis network selects the synthesis mode for the four RF signals. A coarse delay unit performs coarse-step delay compensation and amplification on the RF signals, achieving second-level channel delay. A pre-selection unit performs frequency band switching filtering selection on the RF signals. A mixing unit performs mixing, filtering, and amplification on the RF signals. A calibration unit calibrates the amplitude, phase, and flatness of the converted intermediate frequency signal. An FPGA control unit decodes external control signals into TTL signals to control the entire component and enables power-on and power-off of devices within each unit according to different operating modes. This invention has the advantages of high integration, flexible and controllable receiving and synthesis methods, complete functionality, and high accuracy, meeting the frequency conversion requirements of broadband phased array equipment.

Description

Technical Field

[0001] This invention relates to an active phased array multifunctional radio frequency front end, and particularly to a broadband frequency conversion component with soft calibration function. Background Technology

[0002] The frequency converter is a key component in the active phased array RF front-end. Its function is to synthesize the RF signals from different subarrays received by the front-end receiving component, mix them one or more times to obtain intermediate frequency (IF) signals, and finally transmit them to the AD processing unit. As the front-end part directly connected to AD sampling in the phased array system, the amplitude and phase consistency of the output IF signals and the flatness of a single IF signal directly affect the accuracy and dynamics of the entire receiving system. Given the current broadband requirements in the phased array RF front-end field and the energy loss caused by the "aperture transit effect" at large scanning angles, improving the calibration capability of the frequency converter is of great significance. Currently, typical frequency converters operating in a broadband phased array front-end architecture have the following limitations.

[0003] (1) After multiple mixing processes, broadband signals suffer from insufficient flatness and amplitude-phase consistency among multiple channels, resulting in high AD sampling pressure;

[0004] (2) It does not have channel-level calibration function, and faces high pressure on branch delay when facing the large delay requirements of active phased arrays;

[0005] (3) The functions are relatively simple and it is difficult to adapt to the needs of multi-functional and multi-mode front-end work.

[0006] This patent addresses the problems encountered in broadband multifunctional active phased arrays by designing a broadband frequency converter component with soft calibration function. It achieves two-level distributed delay calibration at the radio frequency end and amplitude-phase consistency and flatness calibration at the intermediate frequency end. By designing a switch synthesis network, it supports five receiving function operating modes of multifunctional phased array equipment, improves and optimizes the versatility and flexibility of the frequency converter component, and has the advantages of high integration, high precision and complete functions.

[0007] The patent "A Multi-Octave Broadband Frequency Conversion Component" (202111310612.7) proposes a similar solution, and this invention patent focuses on the following improvements:

[0008] (1) The patent 202111310612.7 uses a multi-level digitally controlled attenuator to perform amplitude calibration of RF and IF signals. However, it has drawbacks such as a single calibration method, low calibration accuracy, and inability to support phased array channel-level calibration function. This solution is designed to implement two-level distributed delay calibration at the RF end. The input RF signal is calibrated using a fine-step delay chip with a small total amount, while the RF signal after being selected and synthesized by the switch is calibrated using a coarse-step delay chip with a large total amount. This greatly reduces the delay pressure of the branch, and performs amplitude and phase consistency and flatness calibration at the IF end. It supports phased array channel-level calibration function and has high calibration accuracy.

[0009] (2) This patent adds a switch synthesis network, supports five receiving synthesis working modes of multi-functional phased array equipment, and improves and optimizes the versatility and flexibility of frequency conversion components. Summary of the Invention

[0010] The purpose of this invention is to provide a frequency converter with multi-level flexible calibration function and multiple operating mode selection.

[0011] The technical solution to achieve the purpose of this invention is: a broadband frequency converter component with soft calibration function, comprising 4 sets of fine delay units, 1 set of switch synthesis network, 4 sets of coarse delay units, 4 sets of preselection units, 4 sets of mixing units, 4 sets of calibration units, and 1 set of FPGA control unit, wherein:

[0012] The four sets of fine delay units are used to receive the radio frequency signal from the front subarray synthesis output of the array, control its amplitude, perform fine step delay compensation and amplification, and transmit the radio frequency signal after the first-level subarray delay to the subsequent switching synthesis network.

[0013] The set of switch synthesis network includes 4 input ports and 4 output ports. The 4 input ports receive 4 radio frequency signals after the subarray level delay, and the 4 output ports output the radio frequency signals after being selected and synthesized by the switches and output them to the coarse delay unit. At the same time, based on the actual working conditions of the array, the unselected channel devices are powered off.

[0014] The four sets of coarse delay units are used to receive the radio frequency signal selected and synthesized by the front-end switching synthesis network, perform coarse step delay compensation and amplification on it, and transmit the radio frequency signal after realizing the second-level channel-level delay to the subsequent pre-selection unit.

[0015] The four pre-selection units are used to receive the delayed RF signal from the channel level of the preceding coarse delay unit, perform frequency band switching selection filtering on it, and transmit the selected RF signal to the subsequent mixing unit.

[0016] The four mixing units are used to receive the radio frequency signal after selection and filtering by the pre-selection unit, and after two stages of mixing, filtering and amplification, output the intermediate frequency signal and transmit it to the subsequent calibration unit.

[0017] The four calibration units are used to receive the intermediate frequency signal after frequency conversion by the pre-stage mixer, and output it to the corresponding IF1, IF2, IF3, and IF4 ports after amplitude, phase, and flatness calibration.

[0018] The first FPGA control unit is used to decode the control signals input from the external interface into TTL control signals and shut down unused channels in different switch selection synthesis modes.

[0019] Furthermore, among the four sets of fine delay units, the first fine delay unit includes amplifier AP1-1, digitally controlled attenuator AT1-1, amplifier AP2-1, delay unit DL1-1, and amplifier AP3-1 connected in sequence; the second fine delay unit includes amplifier AP1-2, digitally controlled attenuator AT1-2, amplifier AP2-2, delay unit DL1-2, and amplifier AP3-2 connected in sequence; the third fine delay unit includes amplifier AP1-3, digitally controlled attenuator AT1-3, amplifier AP2-3, delay unit DL1-3, and amplifier AP3-3 connected in sequence; and the second fine delay unit includes amplifier AP1-4, digitally controlled attenuator AT1-4, amplifier AP2-4, delay unit DL1-4, and amplifier AP3-4 connected in sequence.

[0020] Furthermore, the switch synthesis network includes switches S1-1, S1-2, S1-3, S1-4, power dividers PD1-1, PD1-2, PD1-3, PD1-4, S2-1, S2-2, S2-3, S2-4, amplifiers AP4-1, AP4-2, AP4-3, and AP4-4, wherein power dividers PD1-1, S2-1, and AP4-1 are connected sequentially, and power dividers PD1-2, S2-2, and AP4-4 are connected sequentially. Amplifier AP4-2 is connected in sequence. Power divider PD1-3, switch S2-3, and amplifier AP4-3 are connected in sequence. Power divider PD1-4, switch S2-4, and amplifier AP4-4 are connected in sequence. Switch S1-1 is connected to power divider PD1-1. Switch S1-2 is connected to power divider PD1-1 and power divider PD1-2. Switch S1-3 is connected to power divider PD1-1, power divider PD1-2, and power divider PD1-3. Switch S1-4 is connected to power divider PD1-1, power divider PD1-2, power divider PD1-3, and power divider PD1-4.

[0021] Furthermore, among the four sets of coarse delay units, the first coarse delay unit includes amplifier AP5-1, delay unit DL2-1, attenuator AT2-1, delay unit DL3-1, and amplifier AP6-1 connected in sequence; the second coarse delay unit includes amplifier AP5-2, delay unit DL2-2, attenuator AT2-2, delay unit DL3-2, and amplifier AP6-2 connected in sequence; the third coarse delay unit includes amplifier AP5-3, delay unit DL2-3, attenuator AT2-3, delay unit DL3-3, and amplifier AP6-3 connected in sequence; and the fourth coarse delay unit includes amplifier AP5-4, delay unit DL2-4, attenuator AT2-4, delay unit DL3-4, and amplifier AP6-4 connected in sequence.

[0022] Furthermore, the preselection unit includes switch S3-1, switch S4-1, and filters FP1-11 to FP-1M. Switch S3-1 is connected to filters FP1-11 to FP-1M and then connected to switch S4-1.

[0023] Furthermore, the mixing unit includes a mixer MX1-1, a switch S5-1, a switch S6-1, filters FP2-11~FP2-1K, an amplifier AP7-1, a mixer MX2-1, a filter FP3-1, and an amplifier AP8-1. The mixer MX1-1 is connected to the switch S6-1. The switch S6-1 is connected to the filters FP2-11~FP2-1K and then to the switch S5-1. The switch S5-1 is sequentially connected to the amplifier AP7-1, the mixer MX2-1, the filter FP3-1, and the amplifier AP8-1.

[0024] Furthermore, among the four calibration units, the first calibration unit includes a digitally controlled attenuator AT3-1, a digitally controlled phase shifter PH1-1, a digitally controlled equalizer EQ1-1, an amplifier AP9-1, and a filter FP4-1 connected in sequence; the second calibration unit includes a digitally controlled attenuator AT3-2, a digitally controlled phase shifter PH1-2, a digitally controlled equalizer EQ1-2, an amplifier AP9-2, and a filter FP4-2 connected in sequence; the third calibration unit includes a digitally controlled attenuator AT3-3, a digitally controlled phase shifter PH1-3, a digitally controlled equalizer EQ1-3, an amplifier AP9-3, and a filter FP4-3 connected in sequence; and the fourth calibration unit includes a digitally controlled attenuator AT3-4, a digitally controlled phase shifter PH1-4, a digitally controlled equalizer EQ1-4, an amplifier AP9-4, and a filter FP4-4 connected in sequence.

[0025] Furthermore, the four RF signals BF-A, BF-B, BF-C, and BF-D synthesized from the front-end receiving components pass through RF switches S1-1~S1-4, power dividers PD1-1~PD1-4, switches S2-1~S2-4, amplifiers AP4-1~AP4-4, and coarse delay unit, group preselection unit, and mixer unit, resulting in five output modes:

[0026] The combined signals BF-A, BF-B, BF-C, and BF-D are output via IF1, while IF2, IF3, and IF4 are turned off.

[0027] The combined signals of BF-A and BF-B are output through IF1, the combined signals of BF-C and BF-D are output through IF2, and IF3 and IF4 are turned off.

[0028] The combined signals of BF-A and BF-C are output through IF1, the combined signals of BF-B and BF-D are output through IF2, and IF3 and IF4 are turned off.

[0029] The BF-A signal is output via IF1, the BF-B signal via IF2, the BF-C signal via IF3, and the BF-D signal via IF4.

[0030] The combined BF-A and BF-B signals are output via IF1, the BF-C signal is output via IF3, the BF-D signal is output via IF4, and IF2 is turned off.

[0031] Furthermore, the integrated FPGA control unit decodes and generates TTL levels to control four fine delay units, one switch synthesis network, four coarse delay units, four preselection units, four mixer units, and four calibration units. By controlling the four fine delay units and four coarse delay units, the RF signal undergoes two-stage calibration: subarray-level fine-stepping and channel-level coarse-stepping distributed delay. Fine-stepping, low-total-delay chips are used for calibration of the input RF signal branch, while coarse-stepping, high-total-delay chips are used for calibration of the RF signal after switch selection and synthesis. The calibration unit controls the amplitude and phase consistency and flatness calibration of the frequency-converted intermediate frequency signal. Simultaneously, a TTL power-on signal is used to power off active devices in inactive channels under different operating modes.

[0032] Compared with the prior art, the significant advantages of this invention are:

[0033] (1) The integrated FPGA control unit performs two-level calibration of the RF signal: fine stepping at the subarray level and coarse stepping at the channel level. It also performs amplitude and phase consistency and flatness calibration on the intermediate frequency signal after frequency conversion, solving the "aperture crossing effect" in broadband phased array equipment. It supports the channel-level calibration function of the phased array surface and has high calibration accuracy.

[0034] (2) By designing a switch synthesis network to support five receiving function working modes of multifunctional phased array equipment, up to four frequency conversion channels can work independently. Their dynamic range adjustment and amplitude and phase adjustment are completely independently controlled, which improves and optimizes the versatility and flexibility of frequency conversion components. Attached Figure Description

[0035] Figure 1 This is a block diagram of a broadband frequency converter component with soft calibration function according to the present invention.

[0036] Figure 2 This is a block diagram of the fine delay unit principle of the present invention.

[0037] Figure 3 This is a block diagram of the switching synthesis network principle of the present invention.

[0038] Figure 4 This is a block diagram of the coarse delay unit principle of the present invention.

[0039] Figure 5 This is a block diagram of the preselected unit principle of the present invention.

[0040] Figure 6 This is a block diagram of the mixing unit principle of the present invention.

[0041] Figure 7 This is a block diagram of the calibration unit principle of the present invention. Detailed Implementation

[0042] The following is in conjunction with the appendix Figures 1-7 The present invention will be described in further detail below.

[0043] like Figure 1 As shown, a broadband frequency converter with soft calibration function is characterized by comprising 4 sets of fine delay units (1), 1 set of switch synthesis network (2), 4 sets of coarse delay units (3), 4 sets of preselection units (4), 4 sets of mixing units (5), 4 sets of calibration units (6) and 1 set of FPGA control unit (7).

[0044] like Figure 2 As shown, the four fine delay units (1) are used to receive the radio frequency signal from the front subarray synthesis output of the array, perform fine step delay compensation and amplification after amplitude control, and transmit the radio frequency signal after the first-level subarray delay to the subsequent switching synthesis network (2); taking fine delay unit 1-1 as an example, it includes amplifier AP1-1, digitally controlled attenuator AT1-1, amplifier AP2-1, delayer DL1-1, and amplifier AP3-1.

[0045] like Figure 3As shown, the 1-group switch combining network (2) includes 4 input ports and 4 output ports. The 4 input ports receive the 4 radio frequency signals after the subarray level delay, and the 4 output ports output the radio frequency signals after being combined by the switches and output them to the coarse delay unit (3). At the same time, based on the actual working conditions of the array, the unselected channel devices can be powered off. The switch combining network (2) includes switches S1-1, S1-2, S1-3, S1-4, power divider PD1-1, power divider PD1-2, power divider PD1-3, power divider PD1-4, switches S2-1, S2-2, S2-3, S2-4, amplifier AP4-1, amplifier AP4-2, amplifier AP4-3, and amplifier AP4-4.

[0046] Furthermore, the four RF signals BF-A, BF-B, BF-C, and BF-D synthesized from the front-end receiving components pass through RF switches S1-1~S1-4, power dividers PD1-1~PD1-4, switches S2-1~S2-4, amplifiers AP4-1~AP4-4, and subsequent functional units, resulting in five output modes:

[0047] The combined signals BF-A, BF-B, BF-C, and BF-D are output via IF1, while IF2, IF3, and IF4 are turned off.

[0048] The combined signals of BF-A and BF-B are output through IF1, the combined signals of BF-C and BF-D are output through IF2, and IF3 and IF4 are turned off.

[0049] The combined signals of BF-A and BF-C are output through IF1, the combined signals of BF-B and BF-D are output through IF2, and IF3 and IF4 are turned off.

[0050] The BF-A signal is output via IF1, the BF-B signal via IF2, the BF-C signal via IF3, and the BF-D signal via IF4.

[0051] The combined BF-A and BF-B signals are output via IF1, the BF-C signal is output via IF3, the BF-D signal is output via IF4, and IF2 is turned off.

[0052] like Figure 4 As shown, the four coarse delay units (3) are used to receive the radio frequency signal selected and synthesized by the front-end switching synthesis network (2), perform coarse step delay compensation and amplification on it, and transmit the radio frequency signal after realizing the second-level channel-level delay to the back-end pre-selection unit (4); taking coarse delay unit 1-1 as an example, it includes amplifier AP5-1, delayer DL2-1, attenuator AT2-1, delayer DL3-1, and amplifier AP6-1.

[0053] like Figure 5 As shown, the four pre-selection units (4) are used to receive the radio frequency signal after channel-level delay from the pre-stage coarse delay unit (3), perform frequency band switching selection filtering on it, and transmit the selected radio frequency signal to the subsequent mixing unit (5); taking pre-selection unit 1-1 as an example, it includes switch S3-1, filters FP1-11 to FP-1M, and switch S4-1.

[0054] like Figure 6 As shown, the four mixing units (5) are used to receive the radio frequency signal after selection and filtering by the pre-selection unit (4), and after two stages of mixing, filtering and amplification, output the intermediate frequency signal to the subsequent calibration unit (6); taking mixing unit 1-1 as an example, it includes mixer MX1-1, switch S5-1, switch S6-1, filter FP2-11 to FP2-1K, amplifier AP7-1, mixer MX2-1, filter FP3-1, and amplifier AP8-1.

[0055] like Figure 7 As shown, the four calibration units (6) are used to receive the intermediate frequency signal after frequency conversion by the pre-stage mixer unit (5), and output it to the corresponding IF1, IF2, IF3 or IF4 ports after amplitude, phase and flatness calibration; taking calibration unit 1-1 as an example, it includes digitally controlled attenuator AT3-1, digitally controlled phase shifter PH1-1, digitally controlled equalizer EQ1-1, amplifier AP9-1 and filter FP4-1.

[0056] The integrated FPGA control unit decodes and generates TTL levels to control four fine delay units, one switch synthesis network, four coarse delay units, four preselection units, four mixer units, and four calibration units. By controlling the four fine delay units and four coarse delay units, it performs two-stage distributed delay calibration of the RF signal: subarray-level fine-stepping and channel-level coarse-stepping. Fine-stepping, low-total-delay chips are used for calibration of the input RF signal branch, while coarse-stepping, high-total-delay chips are used for calibration of the RF signal after switch selection and synthesis. The calibration unit controls the amplitude and phase consistency and flatness calibration of the frequency-converted intermediate frequency signal. Simultaneously, the TTL power-on signal powers off active devices in inactive channels under different operating modes.

[0057] In summary, this invention solves the "aperture crossing effect" in broadband phased array devices by integrating a distributed design of fine-stepping delay at the subarray level and coarse-stepping delay at the channel level into the frequency conversion component; the subarray synthesis mode can be flexibly selected and the corresponding frequency conversion channel can be selected through the switching synthesis network, which can support the needs of 4 independent frequency conversions; and the integrated FPGA control unit realizes two-level calibration of RF delay and calibration of intermediate frequency signal amplitude, phase and flatness.

[0058] The present invention will be further described in detail below with reference to specific embodiments.

[0059] Example 1: Four frequency converters operate independently. BF-A, BF-B, BF-C, and BF-D receive broadband RF signals in the C / X / Ku band. Switches S1-1, S1-2, S1-3, and S1-4 are all single-pole triple-throw switches. Power dividers PD1-1, PD1-2, PD1-3, and PD1-4 are all 1-to-4 power dividers. Switch S1-1 is connected to power divider PD1-1, switch S1-2 is connected to power divider PD1-2, switch S1-3 is connected to power divider PD1-3, and switch S1-4 is connected to power divider PD1-4. Switches 2-1, 2-2, 2-3, and 2-4 are all single-pole double-throw switches. All functional units in the preceding and following stages are connected. Delay units DL1-1, DL1-2, DL1-3, and DL1-4 perform fine-step delay calibration, calibration units 1-1 to 1-4 perform amplitude, phase, and flatness calibration, and mixing units 1-1 to 1-4 provide four independent local oscillators 1 and 2, outputting four equal-amplitude and equal-phase independent intermediate frequency signals IF1, IF2, IF3, and IF4.

[0060] Example 2: Two frequency converters operate independently. BF-A, BF-B, BF-C, and BF-D receive broadband RF signals in the C / X / Ku band. Switches S1-1, S1-2, S1-3, and S1-4 are all single-pole triple-throw switches. Power dividers PD1-1, PD1-2, PD1-3, and PD1-4 are all 1-to-4 power dividers. Switches S1-1 and S1-2 are turned on to power divider PD1-1 for combining, and switches S1-3 and S1-4 are turned on to power divider PD1-2 for combining. Switches S2-1 and S2-2 are both single-pole double-throw switches and are turned on, while switches S2-3 and S2-4 are turned off. Delay units DL1-1 and DL1-2 perform fine-step delay calibration, delay units DL2-1 and DL2-2 perform coarse-step delay calibration, calibration units 1-1 and 1-2 perform amplitude, phase and flatness calibration, mixing units 1-1 and 1-2 provide two sets of independent local oscillators 1 and 2, and output two equal-amplitude and equal-phase independent intermediate frequency signals IF1 and IF2. FPGA control performs power-off processing on the strain frequency channel of IF3 and IF4.

[0061] Example 3: One-channel frequency conversion operation. BF-A, BF-B, BF-C, and BF-D receive broadband RF signals in the C / X / Ku band. Switches S1-1, S1-2, S1-3, and S1-4 are all single-pole triple-throw switches. Power dividers PD1-1, PD1-2, PD1-3, and PD1-4 are all 1-to-4 power dividers. Switches S1-1, S1-2, S1-3, and S1-4 are turned on to power divider PD1-1 for combining. Switch S2-1 is a single-pole double-throw switch and is turned on. Switches S2-2, S2-3, and S2-4 are turned off. Delay unit DL1-1 performs fine-step delay calibration, delay units DL2-1 and DL3-1 perform coarse-step delay calibration, calibration unit 1-1 performs amplitude, phase and flatness calibration, mixing unit 1-1 provides one set of local oscillator 1 and local oscillator 2, outputs one intermediate frequency signal IF1, and FPGA controls the power-off processing of IF2, IF3 and IF4 strain frequency channels.

[0062] In summary, the above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A broadband frequency converter component with soft calibration function, characterized in that, It includes 4 sets of fine delay units (1), 1 set of switch synthesis network (2), 4 sets of coarse delay units (3), 4 sets of preselection units (4), 4 sets of mixer units (5), 4 sets of calibration units (6) and 1 set of FPGA control unit (7), wherein: The four fine delay units (1) are used to receive the radio frequency signal from the front subarray synthesis output of the array, perform fine step delay compensation and amplification after amplitude control, and transmit the radio frequency signal after the first-level subarray delay to the subsequent switching synthesis network (2). The first set of switch synthesis network (2) includes 4 input ports and 4 output ports. The 4 input ports receive 4 radio frequency signals after the subarray level delay, and the 4 output ports output the radio frequency signals synthesized by the switch selection and output to the coarse delay unit (3). At the same time, based on the actual working conditions of the array, the unselected channel devices are powered off. The four sets of coarse delay units (3) are used to receive the radio frequency signal selected and synthesized by the front-end switching synthesis network (2), perform coarse step delay compensation and amplification on it, and transmit the radio frequency signal after realizing the second-level channel-level delay to the back-end pre-selection unit (4). The four pre-selection units (4) are used to receive the radio frequency signal after channel-level delay from the front-end coarse delay unit (3), perform frequency band switching selection filtering on it, and transmit the selected radio frequency signal to the rear-end mixing unit (5). The four mixing units (5) are used to receive the radio frequency signal after selection and filtering by the pre-selection unit (4), and after two stages of mixing, filtering and amplification, output the intermediate frequency signal to the subsequent calibration unit (6). The four calibration units (6) are used to receive the intermediate frequency signal after frequency conversion by the pre-stage mixer unit (5), and output it to the corresponding IF1, IF2, IF3, and IF4 ports after amplitude, phase, and flatness calibration. The FPGA control unit (7) is used to decode the control signals input from the external interface into TTL control signals and turn off unused channels in different switch selection synthesis modes.

2. The broadband frequency converter component with soft calibration function according to claim 1, characterized in that, The four sets of fine delay units (1) include: the first fine delay unit includes amplifier AP1-1, digitally controlled attenuator AT1-1, amplifier AP2-1, delay unit DL1-1, and amplifier AP3-1 connected in sequence; the second fine delay unit includes amplifier AP1-2, digitally controlled attenuator AT1-2, amplifier AP2-2, delay unit DL1-2, and amplifier AP3-2 connected in sequence; the third fine delay unit includes amplifier AP1-3, digitally controlled attenuator AT1-3, amplifier AP2-3, delay unit DL1-3, and amplifier AP3-3 connected in sequence; and the second fine delay unit includes amplifier AP1-4, digitally controlled attenuator AT1-4, amplifier AP2-4, delay unit DL1-4, and amplifier AP3-4 connected in sequence.

3. The broadband frequency converter component with soft calibration function according to claim 1, characterized in that, The switch synthesis network (2) includes switches S1-1, S1-2, S1-3, S1-4, power divider PD1-1, power divider PD1-2, power divider PD1-3, power divider PD1-4, switches S2-1, S2-2, S2-3, S2-4, amplifier AP4-1, amplifier AP4-2, amplifier AP4-3, and amplifier AP4-4, wherein power divider PD1-1, switch S2-1, and amplifier AP4-1 are connected sequentially, and power divider PD1-2, switch S2-2, and amplifier AP4-4 are connected sequentially. Connect AP4-2 in sequence, then connect PD1-3, switch S2-3, and amplifier AP4-3 in sequence, then connect PD1-4, switch S2-4, and amplifier AP4-4 in sequence, then connect switch S1-1 to power divider PD1-1, switch S1-2 to power divider PD1-1 and power divider PD1-2, switch S1-3 to power divider PD1-1, power divider PD1-2 and power divider PD1-3, and switch S1-4 to power divider PD1-1, power divider PD1-2, power divider PD1-3 and power divider PD1-4.

4. A broadband frequency converter with soft calibration function according to claim 1, characterized in that, The four sets of coarse delay units (3) include: the first coarse delay unit includes amplifier AP5-1, delayer DL2-1, attenuator AT2-1, delayer DL3-1, and amplifier AP6-1 connected in sequence; the second coarse delay unit includes amplifier AP5-2, delayer DL2-2, attenuator AT2-2, delayer DL3-2, and amplifier AP6-2 connected in sequence; the third coarse delay unit includes amplifier AP5-3, delayer DL2-3, attenuator AT2-3, delayer DL3-3, and amplifier AP6-3 connected in sequence; and the fourth coarse delay unit includes amplifier AP5-4, delayer DL2-4, attenuator AT2-4, delayer DL3-4, and amplifier AP6-4 connected in sequence.

5. A broadband frequency converter with soft calibration function according to claim 1, characterized in that, The preselection unit (4) includes switch S3-1, switch S4-1, and filters FP1-11~FP-1M. Switch S3-1 is connected to filters FP1-11~FP-1M and then connected to switch S4-1.

6. A broadband frequency converter with soft calibration function according to claim 1, characterized in that, The mixing unit (5) includes a mixer MX1-1, a switch S5-1, a switch S6-1, filters FP2-11~FP2-1K, an amplifier AP7-1, a mixer MX2-1, a filter FP3-1, and an amplifier AP8-1. The mixer MX1-1 is connected to the switch S6-1. The switch S6-1 is connected to the filters FP2-11~FP2-1K and then to the switch S5-1. The switch S5-1 is sequentially connected to the amplifier AP7-1, the mixer MX2-1, the filter FP3-1, and the amplifier AP8-1.

7. A broadband frequency converter component with soft calibration function according to claim 1, characterized in that, The four calibration units (6) are as follows: the first calibration unit includes a digitally controlled attenuator AT3-1, a digitally controlled phase shifter PH1-1, a digitally controlled equalizer EQ1-1, an amplifier AP9-1, and a filter FP4-1 connected in sequence; the second calibration unit includes a digitally controlled attenuator AT3-2, a digitally controlled phase shifter PH1-2, a digitally controlled equalizer EQ1-2, an amplifier AP9-2, and a filter FP4-2 connected in sequence; the third calibration unit includes a digitally controlled attenuator AT3-3, a digitally controlled phase shifter PH1-3, a digitally controlled equalizer EQ1-3, an amplifier AP9-3, and a filter FP4-3 connected in sequence; and the fourth calibration unit includes a digitally controlled attenuator AT3-4, a digitally controlled phase shifter PH1-4, a digitally controlled equalizer EQ1-4, an amplifier AP9-4, and a filter FP4-4 connected in sequence.

8. A broadband frequency converter with soft calibration function according to claim 3, characterized in that, The four RF signals BF-A, BF-B, BF-C, and BF-D, synthesized from the front-end receiving components of the array, pass through RF switches S1-1~S1-4, power dividers PD1-1~PD1-4, switches S2-1~S2-4, amplifiers AP4-1~AP4-4, and subsequent functional units, resulting in five output modes: The combined signals BF-A, BF-B, BF-C, and BF-D are output via IF1, while IF2, IF3, and IF4 are turned off. The combined signals of BF-A and BF-B are output through IF1, the combined signals of BF-C and BF-D are output through IF2, and IF3 and IF4 are turned off. The combined signals of BF-A and BF-C are output through IF1, the combined signals of BF-B and BF-D are output through IF2, and IF3 and IF4 are turned off. The BF-A signal is output via IF1, the BF-B signal via IF2, the BF-C signal via IF3, and the BF-D signal via IF4. The combined BF-A and BF-B signals are output via IF1, the BF-C signal is output via IF3, the BF-D signal is output via IF4, and IF2 is turned off.

9. A broadband frequency converter with soft calibration function according to claim 1, characterized in that, The integrated FPGA control unit decodes and generates TTL levels to control four fine delay units, one switch synthesis network, four coarse delay units, four preselection units, four mixer units, and four calibration units. By controlling the four fine delay units and four coarse delay units, it performs two-stage distributed delay calibration of the RF signal: subarray-level fine-stepping and channel-level coarse-stepping. Fine-stepping, low-total-delay chips are used for calibration of the input RF signal branch, while coarse-stepping, high-total-delay chips are used for calibration of the RF signal after switch selection and synthesis. The calibration unit controls the amplitude and phase consistency and flatness calibration of the frequency-converted intermediate frequency signal. Simultaneously, the TTL power-on signal powers off active devices in inactive channels under different operating modes.

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