An automatic gain control method for a single-carrier digital receiver

Abstract

This application provides an automatic gain control method for a single-carrier digital receiver. The automatic gain control method includes performing analog gain control; performing digital gain control when the analog gain ready flag is a first flag and the gain control lock flag is a fourth flag; obtaining a current in-band signal power estimate based on a first average digital power and a first actual signal power; updating the gain control lock flag according to the relationship between the current in-band signal power estimate and a power threshold; and updating the gain control lock flag when the gain control lock flag is the fourth flag by performing a cross-correlation operation using a coherent detection module, and updating the gain control lock flag according to the relationship between the correlation result and a preset threshold, until the gain control lock flag is updated to a third flag. This improves both the speed and accuracy of gain control.

Description

Technical Field

[0001] This application relates to the field of communication technology, specifically to an automatic gain control method for a single-carrier digital receiver. Background Technology

[0002] Receivers are mostly digital receivers. Specifically, they receive over-the-air (OTR) radio frequency (RF) signals via an antenna, pass them through a low-noise amplifier and several filters, and then use a digital-to-analog converter (ADC) to convert the analog signal into a digital signal for signal acquisition, synchronization, or demodulation. If the analog signal voltage entering the ADC is too high, it will cause digital sampling saturation; if the analog signal voltage entering the ADC is too low, a large number of high-order bits in the digital sample will be 0, making it impossible to fully utilize the effective bit width. Both data sampling saturation and insufficient effective bit width will seriously affect receiver performance. Therefore, automatic gain control (AGC) is needed to dynamically adjust the gain of each stage of the amplifier to maintain the signal power entering the ADC within an appropriate range.

[0003] For single-carrier communication systems, a known preamble or training signal is typically used for AGC (Automatic Gain Control) adjustments. For communication systems such as Bluetooth, it can usually be assumed that the power of the received signal will not change significantly during the transmission of a single data frame. Therefore, the receiver typically locks the gain level after determining that the signal to be received has arrived and continues demodulating the control or data signals.

[0004] However, since the receiver cannot know the exact arrival time of the transmitted signal, signal acquisition is required before locking the gain level. Current signal acquisition methods also consume a preamble signal. Furthermore, for highly sensitive communication systems, the signal-to-noise ratio (SNR) is typically less than 3 dB. In this case, energy-based signal acquisition mechanisms cannot operate effectively and reliably. To address this, the receiver typically reconstructs a known preamble or training sequence locally and detects signal arrival using coherent detection. However, coherent detection methods usually require a long detection time and require the link gain to remain constant or at least substantially constant during detection. Otherwise, the detection result will be determined by the signal with the higher gain, leading to high false alarm and false detection rates. Maintaining constant or at least substantially constant link gain during detection is quite challenging.

[0005] Current automatic gain control requires longer preamble or training signals, which increases system overhead and reduces detection performance. Furthermore, the receiver cannot know the exact arrival time of the transmitted signal, and in-band interference is common during signal acquisition, causing variations in received signal power. This results in high false alarm and false negative rates during detection, leading to poor performance of automatic gain control. Summary of the Invention

[0006] This application addresses the aforementioned technical problems in the existing technology. The purpose of this application is to provide an automatic gain control method for a single-carrier digital receiver, which solves the problems of slow gain control adjustment speed and long processing time, as well as high false alarm and missed detection rates due to gain changes during detection, resulting in low gain control accuracy.

[0007] According to the first aspect of this application, an automatic gain control method for a single-carrier digital receiver is provided. The automatic gain control method includes: presetting a gain level for analog gain control suitable for an adjustable gain combination of the receiver, and setting the gain level to the maximum level when the receiver starts receiving data signals; performing analog gain control, including adjusting the gain level by gradually decreasing the gain level based on a first saturation detection result of the sampled data, and updating an analog gain ready flag so that the analog gain ready flag is updated to a first flag based on the adjusted gain level; when the analog gain ready flag is the first flag and the gain control lock flag is a fourth flag, performing digital gain control, including adjusting the digital gain by gradually decreasing the digital gain based on a second saturation detection result of the sampled data, and sending a digital gain reset flag pulse to a coherent detection module after each update of the digital gain; and based on the digital attenuation... The attenuator generates a first average digital power from multiple consecutive input samples. Based on the currently used gain level, a first actual signal power is determined. Based on the first average digital power and the first actual signal power, a current in-band signal power estimate is obtained. The gain control lock flag is updated according to the relationship between the current in-band signal power estimate and a power threshold. When the gain control lock flag is updated to a third flag, subsequent data synchronization or demodulation operations are performed. If the gain control lock flag remains at a fourth flag, a cross-correlation operation is performed using the coherent detection module based on the output sample sequence of the digital attenuator and a reference signal. The gain control lock flag is updated according to the relationship between the correlation result and a preset threshold until the gain control lock flag is updated to the third flag. During the cross-correlation operation, the cross-correlation operation restarts whenever a digital gain reset flag pulse is detected.

[0008] Compared with the prior art, the beneficial effects of the embodiments of this application are as follows:

[0009] The automatic gain control method provided in this application adjusts the analog gain level by gradually decreasing it before the data signal arrives. Based on the first and second saturation detection results of the sampled data, the first level that ensures the sampled digital signal is not saturated can be found. Before the data signal arrives, the analog and digital gains are only allowed to decrease and not increase. The shortest time level required for convergence of the analog and digital gains is only one symbol period.

[0010] Based on the automatic gain control method provided in this application, once a gain level adjustment occurs or a change in signal power is detected, the coherent detection module is reset or paused to eliminate the impact on the detection algorithm. Simultaneously, the rapid gain level adjustment and the strategy of only decreasing and not increasing ensure that excessive processing time is not consumed due to gain level adjustment, preventing the detection algorithm from missing the detection window when the data signal arrives. When a data signal is detected, before locking the gain control, the analog and digital gains are adjusted based on a longer period of signal power statistics to improve the accuracy of gain control.

[0011] The above description is merely an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above description and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below. Attached Figure Description

[0012] In drawings that are not necessarily drawn to scale, the same reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar components. The drawings generally illustrate various embodiments by way of example rather than limitation, and are used together with the specification and claims to illustrate the disclosed embodiments. Such embodiments are illustrative and exemplary, and are not intended to be exhaustive or exclusive embodiments of the method, apparatus, system, or non-transitory computer-readable medium having instructions for implementing the method.

[0013] Figure 1 A flowchart illustrating an automatic gain control method for a single-carrier digital receiver according to an embodiment of this application is shown.

[0014] Figure 2 A schematic diagram of the adjustable gain combination of the receiver according to an embodiment of this application is shown. Detailed Implementation

[0015] To enable those skilled in the art to better understand the technical solutions of this application, the application will be described in detail below with reference to the accompanying drawings and specific embodiments. The embodiments of this application will be further described in detail below with reference to the accompanying drawings and specific examples, but these are not intended to limit the scope of this application.

[0016] The terms "first," "second," and similar words used in this application do not indicate any order, quantity, or importance, but are merely used for distinction. The terms "including" or "comprising," etc., used in this application mean that the element preceding the word encompasses the elements listed after the word, and do not exclude the possibility of encompassing other elements. In this application, the arrows shown in the figures for each step are merely examples of the execution order, not limitations. The technical solution of this application is not limited to the execution order described in the embodiments. The steps in the execution order can be combined, broken down, or rearranged, as long as the logical relationship of the executed content is not affected.

[0017] All terms used in this application (including technical or scientific terms) have the same meaning as understood by one of ordinary skill in the art to which this application pertains, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant art, and not as idealized or highly formalized, unless expressly defined herein. Technologies and equipment known to one of ordinary skill in the art may not be discussed in detail, but where appropriate, such technologies and equipment should be considered part of the specification.

[0018] Figure 1 A flowchart illustrating an automatic gain control method for a single-carrier digital receiver according to an embodiment of this application is shown. In step S101, a gain level for analog gain control applicable to the adjustable gain combination of the receiver is preset, and when the receiver begins receiving a data signal, the gain level is set to the maximum level. In this embodiment, the automatic gain control method includes analog gain control and digital gain control. Exemplarily, the adjustable gain combination of the receiver is as follows: Figure 2As shown, the data signal is received by the receiving antenna 202, amplified by the low-noise amplifier 203, and then mixed with the local carrier of the local oscillator 204 in the mixer 205, down-converting to zero or near-zero frequency. After passing through several analog low-pass filters 206, it passes through the analog variable gain amplifier 207 and is sampled by the analog-to-digital converter 208 to obtain a digital signal. The digital front-end 209 further processes the digital signal and then enters the baseband processing. The baseband processing link further uses a digital low-pass filter 210 to filter the digital signal, filtering out signals outside the target frequency band as much as possible. Since the actual effective bit width of the digital signal after filtering out out-of-band signals is often lower than the sampling bit width (i.e., the high bit is zero), considering the complexity of the subsequent acquisition, synchronization, and demodulation circuits, the digital signal is usually right-shifted by a digital attenuator 211 (divided by a power of 2 in amplitude) (signal attenuation). The lowest few bits are truncated by the truncation module 212 and sent to the subsequent signal acquisition module 213 and synchronization / demodulation module 214. The right shift and truncation operations can be regarded as digital gain attenuation, and the setting of the shift parameters of the digital attenuator 211 is also part of the automatic gain control.

[0019] Specifically, N gain levels for analog gain control can be preset based on different combinations of adjustable gain from low-noise amplifiers, analog variable gain amplifiers, and other filters. These gain levels are numbered from smallest to largest, with the highest gain level numbered N and the lowest gain level numbered 1. When the receiver begins receiving data signals, the gain level is set to the maximum level N, and the analog gain ready flag and gain control lock flag are set to 0.

[0020] In step S102, analog gain control is performed, including adjusting the gain level by progressively decreasing it based on the first saturation detection result of the sampled data, and updating the analog gain ready flag so that the analog gain ready flag is updated to the first flag based on the adjusted gain level. The gain level is adjusted by progressively decreasing it, meaning the gain level only decreases and never increases. During the analog gain control process, the gain level is adjusted from high to low based on the first saturation detection result. The adjustable gain combination structure can be as follows: Figure 2 As shown, other structures are also possible, and there are no restrictions on them.

[0021] Specifically, when performing analog gain control, the first saturation detection result can be obtained by detecting the voltage values ​​of the input signals of the low-noise amplifier, the analog amplifier, and the digital-to-analog converter. For example, saturation can be determined based on the duration for which the voltage value of the sampled data exceeds the set voltage value, or by counting the number of times the voltage value of each sampled data exceeds the set voltage value. There are no specific limitations on this.

[0022] The analog gain ready flag indicates that the current analog gain control gain level is temporarily stable. The first flag can be 1 or other flags, which are not limited and can be set by the user. For example, if the sampling is not saturated or occasionally saturated based on the first saturation detection result, or if the current gain level is already at the minimum level, the analog gain ready flag can be set to 1 to indicate that the current analog gain control is temporarily stable.

[0023] If the first saturation detection result indicates sampling saturation, the analog gain ready flag is updated to a second flag, which can be, for example, 0 or other representative values. The second flag indicates that the current analog gain is unstable and prone to change. Taking a second flag of 0, a maximum gain level of N, and a minimum gain level of 1 as an example, if the first saturation detection result indicates sampling saturation, the analog gain ready flag is updated to 0, and the gain level is reduced to gain level N-1. Then, analog gain control continues to be performed with the gain level at N-1, and saturation detection of the sampled data continues. If the first saturation detection result still indicates sampling saturation, the gain level is further reduced to N-2, and the above steps are repeated until the analog gain ready flag is updated to 1, at which point subsequent digital gain control is performed.

[0024] In step S103, when the analog gain ready flag is the first flag and the gain control lock flag is the fourth flag, digital gain control is performed. This includes adjusting the digital gain by progressively decreasing the digital gain based on the second saturation detection result of the sampled data, and sending a digital gain reset flag pulse to the coherent detection module after each digital gain update. The gain control lock flag indicates whether the current gain is locked. For example, when the gain control lock flag is the fourth flag, it means the gain is not locked, and both analog and digital gains may still change. When the gain control lock flag is the third flag, it means the gain is locked, and neither the analog nor digital gain will change.

[0025] In a specific embodiment, if the gain control lock flag is the fourth flag, step S102 is repeated continuously to adjust the analog level of the analog gain control. While continuously executing step S102, the analog gain ready flag is detected. If the analog gain ready flag is the first flag, it means that the gain level of the analog gain control is temporarily stable. At this time, the right shift bit of the digital attenuator can be initialized to 0, the digital saturation counter can be initialized to 0, and then steps S103-S107 are executed synchronously. If the analog gain ready flag is detected to switch back to the second flag at any time during this period, the execution of steps S103-S107 is terminated until the analog gain ready flag is detected to be the first flag, at which point step S103 is re-executed. In practical implementation, if the gain level of the analog gain control changes, the entire process will be reset.

[0026] During digital gain control, the second saturation detection result can be obtained based on the statistical value of the digital saturation counter. For example, the value of the digital saturation counter can be accumulated according to the bit width of the sampled data, and saturation can be determined based on the accumulated value of the digital saturation counter. For instance, if the second saturation detection result indicates saturation, the digital gain can be reduced by increasing the right shift bit value, and a digital gain reset flag pulse can be sent to the coherent detection module.

[0027] In step S104, a first average digital power is obtained based on a series of consecutive input samples from the digital attenuator. For example... Figure 2 The power estimate 2 shown can be calculated by statistically analyzing the first average digital power P1 of L1 consecutive input samples of the digital attenuator 211, for example, by averaging the squared magnitude of each sample. Then, based on the currently used gain level, the first actual signal power P0 corresponding to each unit of digital power is determined using a lookup table (as in step S105), with units in dBm. The gain level lookup table in gain control is typically used to describe the impact of different gain settings on signal processing equipment (such as audio equipment or amplifiers). These lookup tables are generally provided by the equipment manufacturer and can be found in the equipment's user manual or technical specifications. Each gain level has a unique number or name to identify different settings on the equipment. For example, it can be described using numbers (such as 1, 2, 3, etc.) or text (such as low, medium, high levels). Each gain level corresponds to a specific gain value. The gain value indicates whether the device increases or decreases the signal amplitude at that level setting. Positive gain indicates signal enhancement, and negative gain indicates signal reduction.

[0028] After determining the first average digital power P1 and the first actual signal power P0, the current in-band signal power estimate is obtained as P2 = P0 + 10 × log 10(P1), the unit is dBm. If the difference between the current in-band signal power estimate and the minimum in-band signal power estimate obtained from the previous t0 measurements is greater than the power threshold R, i.e., P2[t]-min(P2[t-1],P2[t-2],…,P2[t-t0])>R, then the data signal is considered to have arrived, and the gain control lock flag is updated to the third flag. In other words, based on the multiple previously obtained in-band signal power estimates, the previous minimum in-band signal power estimate is determined; if the difference between the current in-band signal power estimate and the previous minimum in-band signal power estimate is greater than the power threshold, the gain control lock flag is updated to the third flag; otherwise, the gain control lock flag is updated to the fourth flag.

[0029] The third flag indicates that the data signal has arrived and is not saturated, and the gain is stable and no longer changing. The third flag can be 1 or other preset values, which are not limited. The fourth flag indicates that the data signal has not arrived and the gain is unstable and prone to change.

[0030] Of course, when the gain control lock flag is updated to the third flag, subsequent data synchronization or demodulation operations are performed. That is, based on the first average digital power and the first actual signal power, the current in-band signal power estimate is obtained, and the gain control lock flag is updated according to the relationship between the current in-band signal power estimate and the power threshold. When the gain control lock flag is updated to the third flag, subsequent data synchronization or demodulation operations are performed (as in step S106).

[0031] In step S107, while the gain control lock flag remains at the fourth flag, a cross-correlation operation is performed using the coherent detection module based on the output sample sequence of the digital attenuator and the reference signal. The gain control lock flag is then updated according to the relationship between the correlation result and a preset threshold until it is updated to the third flag. During the cross-correlation operation, each time a digital gain reset flag pulse is detected, the cross-correlation operation is reset or paused. Specifically, the fourth flag can be 0. For example, if the gain control lock flag is 0, the output sample sequence of the digital attenuator can be cross-correlated with the locally reconstructed preamble or training signal. If the correlation result shows a peak value greater than the preset threshold, it is determined that the data signal has arrived, and the gain control lock flag is updated to 1.

[0032] Alternatively, to counteract large carrier frequency deviations, the output sample sequence can be conjugated with its delayed counterpart and multiplied term by term to obtain the phase differential received sequence. The locally reconstructed preamble or training signal can also be processed in the same way to obtain the phase differential preamble or training sequence. Then, the phase differential received sequence and the phase differential preamble or training sequence are cross-correlated. If the correlation result shows a peak value greater than a preset threshold, the data signal is considered reached, and the gain control lock flag is set to 1. That is, if the correlation result shows a peak value greater than the preset threshold, the gain control lock flag is updated to the third flag; otherwise, the gain control lock flag is updated to the fourth flag.

[0033] Whenever the correlation detection module detects a digital gain reset flag pulse, it clears the coherent detection buffer and resets or suspends the execution of cross-correlation operations.

[0034] Thus, before the arrival of the data signal is determined, the analog and digital gain levels are rapidly searched and adjusted from high to low gain levels based on the first and second saturation detection results. This improves the speed of gain control adjustment and meets the requirements of rapid gain adjustment and stable gain levels during data signal arrival detection. The automatic gain control method provided in this embodiment can ensure accurate gain levels during data signal demodulation and ensure sufficient effective displacement to guarantee demodulation performance. Furthermore, by combining the sensitivity of the coherent detection algorithm based on cross-correlation operation to changes in the power of the data signal to be detected, the decision operation of the coherent detection module is reset or paused simultaneously with gain adjustment and detection of signal power changes. This avoids false alarms and missed detections caused by significant power changes in the preceding and following segments of the signal to be detected, thereby improving the accuracy of gain control.

[0035] In other embodiments of this application, the first saturation detection result includes the sum of the first number of digital sampling saturation events occurring during analog gain control. The automatic gain control method further includes: obtaining the sum of the first number of digital sampling saturation events by monitoring events where the duration of the input signal of the first preset device exceeding the first peak detection threshold exceeds a preset time, and / or monitoring events where the duration of the output signal of the second preset device exceeding the second peak detection threshold exceeds a preset time. Specifically, digital saturation can be considered when the duration of the input signal of the first preset device exceeding the first peak detection threshold exceeds the preset time, and when the duration of the output signal of the second preset device exceeding the second peak detection threshold exceeds the preset time. The sum of the first number of digital sampling saturation events is obtained by counting the number of occurrences of each event.

[0036] Specifically, such as Figure 2The number of events in which the voltage value of the input signal of the low-noise amplifier 203 exceeds the first peak detection threshold for a duration exceeding a preset time can be counted, denoted as n1; the number of events in which the voltage value of the input signal of the analog variable gain amplifier 207 exceeds the first peak detection threshold for a duration exceeding a preset time can be counted, denoted as n2; the number of events in which the output signal of the analog-to-digital converter 208 exceeds the second peak detection threshold for a duration exceeding a preset time can be counted, denoted as n3; then, n1 + n2 + n3 can be used to obtain the first total number of digital sampling saturation events n.

[0037] Using this as an example only, the first and second preset devices can also be set according to the structure of the adjustable gain combination, without limitation.

[0038] If the sum of the first number of times is less than the first threshold number of times, it means that there is an unsaturated situation at the current gain level, or the current gain level is the minimum level, indicating that the gain level of the analog gain control cannot be further reduced. At this time, it is considered that the gain level of the analog gain control is in a temporarily stable state, and the analog gain ready flag is updated to the first flag.

[0039] Otherwise, the analog gain ready flag is updated to the second flag, and the gain level is reduced. With the reduced gain level, the sum of the first number of digital sampling saturation events is monitored. Furthermore, with the gain control lock flag at the fourth flag, the first saturation detection result is continuously acquired. In other words, if the sum of the first number of events is greater than or equal to the first threshold number, it means the analog signal is oversaturated. In this case, the gain level needs to be further reduced, and the sum of the first number of events is counted again after reducing the gain level. In this way, the first gain level that ensures the sampled digital signal is not saturated can be quickly and accurately determined, reducing gain control power consumption.

[0040] In some embodiments of this application, the right-shift bit value of the digital attenuator controlled by digital gain is set to an initial value; based on a consecutive preset number of input data from the digital attenuator, the maximum effective bit width is obtained, and the number of times the difference between the maximum effective bit width and the right-shift bit value is greater than a preset value of the output bit width is accumulated to obtain a second sum; based on the comparison result of the second sum and the second threshold number, a second saturation detection result is obtained. Specifically, for example, in the process of continuously calculating the first sum and judging whether saturation is achieved based on the first sum, an analog gain ready flag is simultaneously detected. If the analog gain ready flag is a first flag, the right-shift bit value of the digital attenuator controlled by digital gain is set to an initial value, for example, if the right-shift bit value is represented by g, then g = 0.

[0041] For M consecutive input data points to the digital attenuator, the maximum effective bit width is calculated, which represents the highest non-zero bits required to represent these data (if the data is a signed number, a sign bit needs to be added). If the input data is a complex number, the larger of the effective bit widths of the real and imaginary parts needs to be calculated. The maximum effective bit width of the input data can be set to w, the actual bit width to w0, and the preset output bit width to w1. Clearly, w < w0, w1 ≤ w0. If wg > w1, the value of the digital saturation counter is incremented by 1 to obtain the second summation; otherwise, the value of the digital saturation counter is cleared. This is only an example and does not constitute a limitation on any specific scheme.

[0042] By comparing the second sum of the numbers with the second threshold number of times, a second saturation detection result is obtained, which enables the determination of whether the signal is saturated based on the second saturation detection result.

[0043] Furthermore, if the sum of the second number of iterations is greater than the second threshold number of iterations, and the number of right-shifted bits is less than the difference between the actual bit width of the digital attenuator input data and the designed output bit width, the digital gain is reduced by increasing the value of the right-shifted bits. Specifically, if the sum of the second number of iterations is greater than the second threshold number of iterations, and g < w0 - w1, then the value of the right-shifted bits g is increased, i.e., g = g + 1, thereby reducing the digital gain.

[0044] In some embodiments of this application, the automatic gain control method further includes: during the detection of the average digital power of multiple consecutive input samples of the digital attenuator, the detection period is half the sequence length used to perform the cross-correlation operation; if the absolute value of the difference between the average digital power of two consecutive detection periods exceeds the energy difference threshold, the cross-correlation operation is paused during the time period corresponding to the next detection period, and the gain control lock flag is not updated to the third flag. That is, during the correlation operation, even if the correlation result shows a peak value greater than a preset threshold, but further detection reveals that the absolute value of the difference between the average digital power of two consecutive detection periods exceeds the energy difference threshold, it indicates that the gain is unstable and the gain level is inaccurate. In this case, the gain control lock flag will not be updated to the third flag.

[0045] If the absolute value of the difference between the average digital power of two consecutive detection cycles is less than or equal to the energy difference threshold, the gain control lock flag is updated based on the relationship between the relevant results and the preset threshold. Thus, by further determining the relationship between the absolute value of the difference between the average digital power of two consecutive detection cycles and the energy difference threshold, the correctness of the coherent detection results can be further verified, ensuring the stability of the average power of the signal participating in coherent detection.

[0046] In some embodiments of this application, a second average digital power Q1 is obtained based on multiple consecutive input samples of the digital low-pass filter; a second actual signal power Q0, in dBm, is determined by a lookup table based on the currently used gain level; and a current received signal power estimate Q2 = Q1 + 10 × log is obtained based on the second average digital power Q1 and the second actual signal power Q0. 10 (Q0), in dBm. When the gain control lock flag is updated to the third flag, the optimal gain level is determined based on the most recently obtained received signal power estimate Q2 and a lookup table.

[0047] If the analog gain corresponding to the optimal gain level is greater than the analog gain corresponding to the current gain level, the right shift value is increased accordingly; if the analog gain corresponding to the optimal gain level is less than the analog gain corresponding to the current gain level, the right shift value is decreased accordingly. Furthermore, the maximum value of the right shift value is the difference between the actual bit width and the designed output bit width, and the minimum value is 0. By comparing the optimal gain level and the current gain level, the gain level controlled by the analog gain is determined to be the optimal gain level. In this way, further fine adjustments can be made to the finally locked analog gain level and digital gain (i.e., the right shift value), thereby improving the accuracy of automatic gain control.

[0048] In addition, if there is no effective estimate of the received signal power, the current analog gain level and digital gain can be locked directly. After locking the gain, subsequent time-frequency synchronization or data demodulation operations can be performed.

[0049] This application describes various operations or functions that can be implemented as software code or instructions, or defined as software code or instructions. Such content can be directly executable source code or differential code (“incremental” or “patch” code) (“object” or “executable” form). The software code or instructions can be stored in a computer-readable storage medium and, when executed, can cause a machine to perform the described functions or operations, and include any mechanism for storing information in a machine-accessible form, such as recordable or non-recordable media (e.g., read-only memory (ROM), random access memory (RAM), disk storage media, optical storage media, flash memory devices, etc.).

[0050] Implementations of such methods may include software code, such as microcode, assembly language code, high-level language code, etc. Various software programming techniques can be used to create various programs or program modules. For example, program parts or program modules can be designed using or with the aid of Java, Python, C, C++, assembly language, or any known programming language. One or more of such software parts or modules can be integrated into a computer system and / or a computer-readable medium. Such software code may include computer-readable instructions for performing various methods. This software code can form part of a computer program product or a computer program module. Furthermore, in the example, the software code may be tangibly stored on one or more volatile, non-transitory, or non-volatile tangible computer-readable media, for example, during execution or at other times. Examples of such tangible computer-readable media may include, but are not limited to, hard disks, removable disks, removable optical discs (e.g., optical discs and digital video discs), magnetic tape cassettes, memory cards or memory sticks, random access memory (RAM), read-only memory (ROM), etc.

[0051] Furthermore, although exemplary embodiments have been described herein, their scope includes any and all embodiments based on this application that have equivalent elements, modifications, omissions, combinations (e.g., schemes involving intersections of various embodiments), adaptations, or alterations. Elements in the claims will be interpreted broadly based on the language used in the claims and are not limited to the examples described in this specification or during the implementation of this application, which will be interpreted as non-exclusive. Therefore, this specification and examples are intended to be considered illustrative only, and the true scope and spirit are indicated by the full scope of the following claims and their equivalents.

[0052] The above description is intended to be illustrative and not restrictive. For example, the above examples (or one or more of them) can be used in combination with each other. Other embodiments may be used by those skilled in the art upon reading the above description. Furthermore, in the above detailed description, various features may be grouped together to simplify the application. This should not be construed as an intention that a disclosed feature not claimed is necessary for any claim. Rather, the subject matter of the application may be less than all the features of a particular disclosed embodiment. Thus, the claims are incorporated herein by reference as examples or embodiments, wherein each claim is an independent, separate embodiment, and these embodiments are contemplated as being combined with each other in various combinations or arrangements. The scope of this application should be determined by reference to the appended claims and the full scope of their equivalents.

[0053] The above embodiments are merely exemplary embodiments of this application and are not intended to limit this application. The scope of protection of this application is defined by the claims. Those skilled in the art can make various modifications or equivalent substitutions to this application within its substance and scope of protection, and such modifications or equivalent substitutions should also be considered to fall within the scope of protection of this application.

Claims

1. An automatic gain control method for a single-carrier digital receiver, characterized in that, The automatic gain control method includes: A preset gain level for analog gain control suitable for adjustable gain combinations of the receiver is provided, and the gain level is set to the maximum level when the receiver starts receiving data signals. Perform analog gain control, including adjusting the gain level by gradually decreasing the gain level based on the first saturation detection result of the sampled data, and updating the analog gain ready flag so that the analog gain ready flag is updated to the first flag based on the adjusted gain level. When the analog gain ready flag is set to the first flag and the gain control lock flag is set to the fourth flag, Digital gain control is performed, including adjusting the digital gain by gradually decreasing the digital gain based on the second saturation detection result of the sampled data, and sending a digital gain reset flag pulse to the coherent detection module after each digital gain update; The first average digital power is obtained based on multiple consecutive input samples from the digital attenuator. The first actual signal power is determined based on the currently used gain level; Based on the first average digital power and the first actual signal power, the current in-band signal power estimate is obtained. Then, according to the relationship between the current in-band signal power estimate and the power threshold, the gain control lock flag is updated. When the gain control lock flag is updated to the third flag, subsequent data synchronization or demodulation operations are performed. However, when the gain control lock flag remains at the fourth flag... Based on the output sample sequence of the digital attenuator and the reference signal, the coherent detection module performs cross-correlation operation, and updates the gain control lock flag according to the relationship between the correlation result and the preset threshold, until the gain control lock flag is updated to the third flag. During the cross-correlation operation, if a digital gain reset flag pulse is detected, the cross-correlation operation is reset or paused.

2. The automatic gain control method according to claim 1, characterized in that, The first saturation detection result includes the sum of the first number of digital sampling saturation events occurring during analog gain control, and the automatic gain control method further includes: The first total number of digital sampling saturation events is obtained by monitoring events in which the duration of the input signal of the first preset device exceeding the first peak detection threshold exceeds a preset time, and / or monitoring events in which the duration of the output signal of the second preset device exceeding the second peak detection threshold exceeds a preset time.

3. The automatic gain control method according to claim 2, characterized in that, The automatic gain control method further includes: If the sum of the first counts is less than the first threshold count or the current gain level is the minimum level, the analog gain ready flag will be updated to the first flag. Otherwise, the analog gain ready flag is updated to the second flag, and the gain level is reduced. With the reduced gain level, the total number of the first digital sampling saturation events is monitored. With the gain control lock flag set to the fourth flag, the first saturation detection result is continuously acquired.

4. The automatic gain control method according to claim 1, characterized in that, The second saturation detection result is obtained based on the sampled data, specifically including: Set the right shift bit value of the digital attenuator controlled by digital gain to the initial value; Based on a continuous preset number of input data from the digital attenuator, the maximum effective bit width is obtained, and the number of times the difference between the maximum effective bit width and the right-shifted bit width is greater than the preset value of the output bit width is accumulated to obtain the second sum. The second saturation detection result is obtained based on the comparison between the sum of the second number of times and the number of times the second threshold is reached.

5. The automatic gain control method according to claim 4, characterized in that, The automatic gain control method further includes: If the sum of the second number of times is greater than the second threshold number of times, and the number of right shift bits is less than the difference between the actual bit width of the digital attenuator input data and the designed value of the output bit width, the digital gain is reduced by increasing the value of the right shift bits.

6. The automatic gain control method according to claim 1, characterized in that, The gain control lock flag is updated based on the relationship between the current in-band signal power estimate and the power threshold, specifically including: Based on the multiple in-band signal power estimates obtained previously, the minimum in-band signal power estimate was determined. If the difference between the current in-band signal power estimate and the previous minimum in-band signal power estimate is greater than the power threshold, the gain control lock flag is updated to the third flag; otherwise, the gain control lock flag is updated to the fourth flag.

7. The automatic gain control method according to claim 1, characterized in that, The gain control lock flag is updated based on the relationship between the relevant results and the preset threshold, specifically including: If the relevant result shows a peak value and the peak value is greater than a preset threshold, the gain control lock flag is updated to the third flag; otherwise, the gain control lock flag is updated to the fourth flag.

8. The automatic gain control method according to claim 7, characterized in that, The automatic gain control method further includes: During the detection of the average digital power of multiple consecutive input samples of the digital attenuator, the detection period is half the sequence length used to perform the cross-correlation operation; If the absolute value of the difference between the average digital power of two consecutive detection cycles exceeds the energy difference threshold, the cross-correlation operation will be suspended during the time period corresponding to the next detection cycle, and the gain control lock flag will not be updated to the third flag.

9. The automatic gain control method according to claim 8, characterized in that, If the absolute value of the difference between the average digital power of two consecutive detection cycles is less than or equal to the energy difference threshold, the gain control lock flag is updated based on the relationship between the relevant results and the preset threshold.

10. The automatic gain control method according to claim 1, characterized in that, The automatic gain control method further includes: The second average digital power is obtained based on multiple consecutive input samples from a digital low-pass filter. The second actual signal power is determined based on the currently used gain level; Based on the second average digital power and the second actual signal power, the current received signal power estimate is obtained; When the gain control lock flag is updated to the third flag. Based on the most recently obtained received signal power estimate and lookup table, the optimal gain level is determined; If the analog gain corresponding to the optimal gain level is greater than the analog gain corresponding to the current gain level, the value of the right shift bit will be increased accordingly. If the analog gain corresponding to the optimal gain level is less than the analog gain corresponding to the current gain level, the value of the right shift bit will be reduced accordingly. Furthermore, the maximum value of the right shift bit is the difference between the actual bit width and the designed output bit width, and the minimum value is 0.

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