Method for sequencing test items based on Sugiyama algorithm

Abstract

The invention provides a method for sorting test items based on a Sugiyama algorithm. The method comprises the following steps: creating a plurality of test items and connecting the test items; judging whether a condition for forming a directed acyclic graph (DAG) exists among the plurality of test items or not; and calling a Sugiyama algorithm to carry out hierarchical layout, wherein the hierarchical layout is used for reducing node crossing. By judging whether the test item has the condition of forming the directed acyclic graph or not, it can be ensured that no self-loop and cyclic dependence exists in the test process, and therefore the correctness of test logic and the feasibility of the process are ensured. A Sugiyama algorithm is used for carrying out hierarchical layout, node crossing can be reduced, the overall layout is optimized, and the readability of a test process is improved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit testing, and in particular to a method for sorting test items based on a Sugiyama algorithm. Background Art

[0002] In the field of semiconductor manufacturing and testing, automatic test equipment (ATE) is essential to ensure the functionality and performance of integrated circuits and semiconductor devices. As the complexity of integrated circuits increases, the testing process becomes more complex and varied. In order to improve the efficiency and accuracy of writing test projects, test engineers need to sort the test items reasonably to shorten the writing time and improve the efficiency of problem location.

[0003] There are two main test item sorting methods currently used:

[0004] Manual sorting by test engineers: Relying on the experience of engineers and their understanding of the devices under test, the sorting takes into account factors such as test item priority, resource allocation, and dependencies. This method is time-consuming and difficult to cope with complex test requirements.

[0005] Automatic sorting based on fixed rules and templates: ATE systems automatically arrange test items based on preset rules and templates. This static sorting method lacks flexibility and cannot be dynamically adjusted according to real-time test data, making it difficult to adapt to changes and uncertainties in the test process.

[0006] The existing test item sorting methods have obvious shortcomings: manual sorting is inefficient and difficult to adapt to complex requirements; automatic sorting based on fixed rules and templates lacks flexibility and adaptability. These problems affect the overall efficiency and quality of the test project, and there is an urgent need to seek more advanced solutions to optimize the test sorting process. Summary of the invention

[0007] The purpose of the present invention is to improve the efficiency of test engineers when writing test projects and the readability of the entire test project.

[0008] The present invention provides a method for sorting test items based on the Sugiyama algorithm, comprising:

[0009] Creating a plurality of test items and connecting the test items;

[0010] Determine whether a directed acyclic graph is formed between the plurality of test items;

[0011] The Sugiyama algorithm is called to perform a hierarchical layout, and the hierarchical layout is used to reduce node intersections.

[0012] Furthermore, the test items are created in a test flow tool, each of the test items includes an input port and multiple output ports, and the input port and the output port are used to represent the relationship between the test items and the flow direction of the test results.

[0013] Furthermore, when connecting the test items, the test items are manually connected according to the connection conditions.

[0014] Furthermore, the connection condition includes: dependencies between the test items and usage dependencies between the test items and hardware.

[0015] Furthermore, whether the test items meet the conditions for forming a directed acyclic graph includes: whether the test items have self-loops or whether circular dependencies are formed between the test items.

[0016] Furthermore, determining whether the test item has a self-loop or whether a circular dependency is formed between the test items includes: depth-first search or topological sorting.

[0017] Furthermore, in calling the Sugiyama algorithm for hierarchical layout, processing is performed according to the coordinates and dependency relationships of the test items.

[0018] Further, the processing includes:

[0019] Hierarchical processing distributes the test items into different layers;

[0020] sorting the test items within each of the layers;

[0021] The positions of the test items within each of the layers are swapped.

[0022] Furthermore, after the hierarchical layout is performed, a test sequence diagram is formed, and at this time, the test items are in an ordered state.

[0023] Furthermore, after the hierarchical layout is performed,

[0024] If new test items appear, the Sugiyama algorithm is called again to perform hierarchical layout again;

[0025] If a new connection relationship appears, the logic between the test items is re-summarized and the Sugiyama algorithm is called for hierarchical layout.

[0026] Compared with the prior art, the present invention has at least the following beneficial effects: by judging whether the test items have the conditions to form a directed acyclic graph (DAG), the present invention can ensure that there are no self-loops and circular dependencies in the test process, thereby ensuring the correctness of the test logic and the feasibility of the process. Using the Sugiyama algorithm for hierarchical layout can reduce node intersections, optimize the overall layout, and improve the readability of the test process. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0028] Figure 1 A flowchart of sorting test items based on the Sugiyama algorithm in one embodiment of the present invention;

[0029] Figure 2 It is a schematic diagram of manually connecting test items in one embodiment of the present invention;

[0030] Figure 3 This is a schematic diagram of sorting test items using the Sugiyama algorithm in one embodiment of the present invention. DETAILED DESCRIPTION

[0031] A method for sorting test items based on the Sugiyama algorithm of the present invention will be described in more detail below in conjunction with a schematic diagram, wherein a preferred embodiment of the present invention is shown, and it should be understood that those skilled in the art can modify the present invention described herein while still achieving the advantageous effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art, and not as a limitation of the present invention.

[0032] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0033] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention.

[0034] The present invention provides a method for sorting test items based on the Sugiyama algorithm, such as Figure 1 As shown, including:

[0035] Creating a plurality of test items and connecting the test items;

[0036] Determine whether a directed acyclic graph is formed between the plurality of test items;

[0037] The Sugiyama algorithm is called to perform a hierarchical layout, and the hierarchical layout is used to reduce node intersections.

[0038] Specifically, first, create multiple test items. First, you need to clarify the specific content of the test items, which may include test cases, test steps, test requirements, etc. Create multiple test items according to the definition. Each test item can be regarded as a node. Next, according to the dependencies or sequence between the test items, use directed edges to connect them, which usually involves manually connecting the input and output ports of the test items to represent the dependencies between the test items. For example, if test item B depends on the completion of test item A, a directed edge from A to B represents this dependency.

[0039] Next, determine whether these test items meet the conditions for forming a DAG. This step ensures that there are no self-loops or circular dependencies in the test process, ensuring the logical correctness of the test process.

[0040] Finally, the Sugiyama algorithm is used to lay out the test items hierarchically, with the goal of reducing node intersections and improving the readability and clarity of the test process layout.

[0041] Furthermore, the test items are created in a test flow tool, each of the test items includes an input port and multiple output ports, and the input port and the output port are used to represent the relationship between the test items and the flow direction of the test results.

[0042] When each test item is created, it includes an input port and multiple output ports. The function of these ports is to represent the relationship between test items, that is, which test items depend on the results of other test items, and the flow of test results, that is, how the output of one test item affects the execution of subsequent test items. In order to ensure that the test flow forms a DAG, it is necessary to check whether there are self-loops in the test items or whether there are circular dependencies between the test items.

[0043] Furthermore, when connecting the test items, the test items are manually connected according to the connection conditions.

[0044] Furthermore, the connection condition includes: dependencies between the test items and usage dependencies between the test items and hardware.

[0045] In a possible embodiment of the present invention, the test engineer manually connects the input and output ports of the test items according to specific logical relationships and dependency conditions. This process is graphical and is usually completed by dragging the connection line. Figure 2 , the test items after manual connection are as follows Figure 2 As shown, the test item is still in a discrete state at this time.

[0046] Dependencies between test items refer to the interdependencies between different test items. For example, test item A may need to be executed after test item B is successfully completed because test item A depends on the environment set up or the data generated by test item B. Dependencies can be sequential dependencies (one test item must be executed after another) or conditional dependencies (the execution of one test item depends on the results of another test item).

[0047] Usage dependencies between test items and hardware refer to the fact that specific hardware resources or hardware configurations may be required in order to execute a specific test item. For example, a test item may require a large amount of memory or a specific processor to run. Usage dependencies may include minimum or recommended configuration requirements for hardware, as well as the use of specific hardware features, such as specific network interfaces or external devices.

[0048] In general, when planning and executing tests, the interdependencies between test items must be considered to ensure that the tests are performed in the correct order and that each test item has the prerequisites provided by the other test items it depends on. At the same time, the hardware resource requirements of each test item must also be considered to ensure that the test environment is configured correctly to meet the requirements for test item execution.

[0049] Furthermore, whether the test items meet the conditions for forming a directed acyclic graph includes: whether the test items have self-loops or whether circular dependencies are formed between the test items.

[0050] Furthermore, determining whether the test item has a self-loop or whether a circular dependency is formed between the test items includes: depth-first search or topological sorting.

[0051] A self-loop is when the output port of a test item is directly or indirectly connected back to its own input port. This will lead to an infinite loop execution and is not allowed. A circular dependency is when there is a path in a directed graph that starts from a vertex, passes through several other vertices, and then returns to the starting vertex. Such a path is called a loop or cycle. A circular dependency usually indicates the mutual dependence between multiple vertices.

[0052] Secondly, all test items are traversed through depth-first search (DFS). If a test item is found to be repeatedly visited (except for the direct predecessor node) during the traversal process, it indicates that there is a self-loop. If the test items are judged using topological sorting, if some test items cannot be sorted during the sorting process, it means that there is a loop in the graph, which may be a self-loop or other form of loop. Through the above method, the test flow tool can ensure that the relationship between test items is valid and the entire test process can be executed without loops.

[0053] Furthermore, in calling the Sugiyama algorithm for hierarchical layout, processing is performed according to the coordinates and dependency relationships of the test items.

[0054] Further, the processing includes:

[0055] The hierarchical processing distributes the test items into different layers.

[0056] The test items are sorted within each of the layers.

[0057] The positions of the test items within each of the layers are swapped.

[0058] Specifically, the algorithm first distributes all test items to different layers. This is achieved by analyzing the dependencies between test items, ensuring that each test item is behind all its dependent items. This hierarchical processing helps to clearly show the execution order of the test process. After determining the layer to which each test item belongs, the algorithm will sort the test items within each layer. The purpose of sorting is to reduce the intersection of edges between layers and improve the readability of the overall layout. Sorting can be based on a variety of criteria, such as the dependency strength between test items, execution frequency, or other preset priority rules. To further optimize the layout, the algorithm may swap the positions of test items in the same layer. This swap is based on the goal of reducing the intersection of edges and improving the neatness of the layout. Through this position adjustment, the graphical representation of the entire test process can be made more intuitive and easy to understand.

[0059] By layering and sorting within layers, the number of edge crossings is minimized, making the graph layout clearer. Exchanging the positions of test items within a layer helps find a better layout solution, making the graphical representation of the entire test flow more compact and organized.

[0060] Furthermore, after performing the hierarchical layout, a test sequence diagram is formed, such as Figure 3 As shown, at this time, the test items are in an ordered state.

[0061] By calling the Sugiyama algorithm and executing the above method steps to form a test sequence diagram, the test items are arranged in a hierarchical manner, making the entire test process clear at a glance, and the test phase division and task allocation can be effectively performed. The intersections between test items are reduced, simplifying the test process. When the test items need to be adjusted, the test process is easier to maintain because there are fewer intersections and the impact of the modification is smaller. At the same time, the optimized layout makes the test sequence diagram more intuitive, enhancing the readability and communication effect of the test items.

[0062] By applying the Sugiyama algorithm, the layout of test items in the graphical interface becomes more orderly, making the test process intuitive and easy to understand, and significantly enhancing the readability of the interface. It helps users quickly locate test items and understand the process structure, and achieve more accurate operation execution, thereby reducing the error rate. Overall, these optimizations not only improve the user's operating experience, but also improve the efficiency of editing and maintaining test flows.

[0063] Furthermore, after the hierarchical layout is performed, if a new test item appears, the Sugiyama algorithm is called again to perform the hierarchical layout again. If a new connection relationship appears, the logic between the test items is summarized again, and the Sugiyama algorithm is called to perform the hierarchical layout.

[0064] After the hierarchical layout is completed, the test flow may change due to the following situations, in which case the Sugiyama algorithm needs to be reapplied for hierarchical layout. When new test items are added to the test flow, the existing hierarchical layout may be affected because the addition of new test items may change the dependencies between test items.

[0065] To adapt to this change, the Sugiyama algorithm needs to be re-invoked to incorporate the new test items into the existing hierarchical structure, reallocate all test items to the appropriate layers, and adjust the order and position of the test items within the layers to ensure that the entire layout is still optimal.

[0066] When the connection relationship between test items changes, such as new dependencies are established or existing dependencies are modified, this will affect the logical structure of the test process.

[0067] When this happens, you first need to re-introduce the logical relationships between test items to ensure that all dependencies are correctly reflected in the test process.

[0068] Subsequently, the Sugiyama algorithm needs to be called for hierarchical layout in order to redistribute the test items to different layers according to the updated dependencies, and to sort and adjust the positions of the test items within each layer.

[0069] Through this dynamic adjustment mechanism, the method provided by the present invention can ensure that the layout of the test process always reflects the latest test logic and maintains optimal readability and maintainability.

[0070] In summary, in the present application, by judging whether the test item has the conditions for forming DAG, the present invention can ensure that there is no self-loop and circular dependency in the test flow, thereby ensuring the correctness of the test logic and the feasibility of the flow. Using the Sugiyama algorithm for hierarchical layout, it is possible to reduce node intersections, optimize the overall layout, and improve the readability of the test flow. By creating test items with input and output ports and allowing manual connection, test engineers can intuitively design and modify the test flow, making the test logic clearer. The automatic sorting and layout adjustment of the test items make the test flow management more automated, and at the same time, when new test items or connection relationships appear, they can be flexibly re-sorted and laid out to adapt to changes.

[0071] The above specific examples are used to illustrate the present invention, which is only used to help understand the present invention and is not intended to limit the present invention. For those skilled in the art, according to the concept of the present invention, some simple deductions, modifications or substitutions can be made.

Claims

1. A method for sorting test items based on Sugiyama algorithm, characterized in that: include: Creating a plurality of test items and connecting the test items; Determine whether a directed acyclic graph is formed between the plurality of test items; The Sugiyama algorithm is called to perform a hierarchical layout, and the hierarchical layout is used to reduce node intersections.

2. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 1, characterized in that: The test items are created in a test flow tool, each of the test items includes an input port and multiple output ports, and the input port and the output port are used to represent the relationship between the test items and the flow direction of the test results.

3. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 1, characterized in that: When the test items are connected, the test items are manually connected according to the connection conditions.

4. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 2, characterized in that: The connection conditions include: dependencies between the test items and usage dependencies between the test items and hardware.

5. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 1, characterized in that: Whether the test items meet the conditions for forming a directed acyclic graph includes: whether the test items have a self-loop or whether a circular dependency is formed between the test items.

6. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 5, characterized in that: Determining whether the test item has a self-loop or whether a circular dependency is formed between the test items includes: depth-first search or topological sorting.

7. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 1, characterized in that: In calling the Sugiyama algorithm for hierarchical layout, processing is performed according to the coordinates and dependency relationships of the test items.

8. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 7, characterized in that: The processing includes: Hierarchical processing distributes the test items into different layers; sorting the test items within each of the layers; The positions of the test items within each of the layers are swapped.

9. The method for sorting test items based on the Sugiyama algorithm as claimed in claim 1, characterized in that: After the hierarchical layout is performed, a test sequence diagram is formed, and the test items are in an ordered state.

10. The method for sorting test items based on Sugiyama algorithm as claimed in claim 1, characterized in that: After the hierarchical layout is performed, If new test items appear, the Sugiyama algorithm is called again to perform hierarchical layout again; If a new connection relationship appears, the logic between the test items is re-summarized and the Sugiyama algorithm is called for hierarchical layout.

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