Semiconductor wafer level packaging method and packaging structure

Abstract

The application discloses a semiconductor wafer-level packaging method and a packaging structure. In the semiconductor wafer-level packaging method, the ring-shaped protrusion is arranged, and the glue coating mode is used, so that the packaging bonding strength is maintained, the air tightness and reliability of the packaging structure are improved, and the bonding glue can prevent the functional area from being affected.

Description

Technical Field

[0001] This invention belongs to the field of chip bonding and packaging technology, specifically relating to a semiconductor wafer-level packaging method and packaging structure. Background Technology

[0002] For chip packaging with functional areas, a substrate is typically bonded to the chip to protect these functional areas. Currently, polymer-adhesive bonding is used to bond the chip to the substrate, which is the most cost-effective method.

[0003] There are several ways to apply adhesive:

[0004] The first method is screen printing. The substrate is placed with the side to be coated with adhesive facing up. A screen with windows is set on this side, and the windows (i.e., the adhesive application area) are set at the parts of the substrate that need to be bonded. A squeegee is used to scrape the adhesive on the screen across the entire surface of the substrate. During this process, the adhesive is squeezed through the windows on the screen onto the bonding parts of the substrate, thus completing the coating process.

[0005] The second method is the roller coating method. The side of the substrate to be coated with glue is placed facing up, and a roller covered with glue is rolled over the surface of the substrate. The parts of the substrate that need to be bonded will be covered with glue.

[0006] However, regardless of whether screen printing or roller coating is used, when the substrate has two flat surfaces, or the height difference between the recessed area used to form the cavity and the bonding portion is small, and the substrate portion of the cavity area (where the chip's functional area is located) serves a certain function (e.g., a glass substrate that needs to be transparent) or contains some functional structures (e.g., micromechanical structures), if screen printing is used, the screen will deform under pressure during the printing process. As the adhesive flows down the window, some of it will flow along the back of the screen. If there is no relative height or the relative height is too low, the screen will come into contact with the cavity area and become covered with adhesive. If roller coating is used, because the adhesive on the glue tube is thicker (approximately 10μm), and the roller brush surface is circular with a slight curvature when in contact with the substrate, the movement of the glue tube will make the cavity area more prone to being covered with adhesive if there is no relative height or the relative height is too low.

[0007] Therefore, neither of the above two adhesive application methods is suitable, as there is a high probability that the adhesive will be applied to the functional areas, affecting the performance of the packaged device.

[0008] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0009] The purpose of this invention is to provide a semiconductor wafer-level packaging method and packaging structure that can solve the problems in the prior art.

[0010] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution:

[0011] A semiconductor wafer-level packaging method includes:

[0012] A first wafer is provided having a plurality of chip units, each of the chip units having a functional area and a first bonding area, the first bonding area being disposed around the functional area;

[0013] A second wafer or substrate is provided, the second wafer or substrate having a second bonding region corresponding to the first bonding region;

[0014] A first annular protrusion is formed on the first bonding area of ​​the chip unit, and a first spacing area is provided between the first annular protrusions of adjacent chip units; and / or, at least one first annular protrusion is formed on the second bonding area of ​​the second wafer or substrate, and a second spacing area is provided between the first annular protrusions of adjacent second bonding areas.

[0015] Fill the first and / or second interval with glue, the glue protruding from the top surface of the first annular protrusion;

[0016] The second wafer or substrate is aligned and pressed with the first wafer.

[0017] In one or more embodiments of the present invention, the amount of adhesive is controlled such that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the first spacing region and / or the second spacing region.

[0018] In one or more embodiments of the present invention, the adhesive pressed onto the side of the first annular protrusion away from the first spacer region and / or the second spacer region is in contact with at least one of the first wafer and the second wafer or the substrate.

[0019] In one or more embodiments of the present invention, the adhesive pressed onto the side of the first annular protrusion away from the first spacer region and / or the second spacer region is in contact with both the first wafer and the second wafer or the substrate.

[0020] In one or more embodiments of the present invention, before aligning and laminating the second wafer or substrate with the first wafer, the method further includes:

[0021] The step of forming a second annular protrusion on the first bonding area of ​​the chip unit and / or on the second bonding area of ​​the second wafer or substrate.

[0022] In one or more embodiments of the present invention, the inner diameter of the second annular protrusion is smaller than the inner diameter of any of the first annular protrusions on the first or second bonding region to which it belongs;

[0023] A third gap is formed between the second annular protrusion and the adjacent first annular protrusion.

[0024] In one or more embodiments of the present invention, the amount of adhesive is controlled such that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is only partially or completely squeezed into the third interval area.

[0025] In one or more embodiments of the present invention, a first cutting region is formed between adjacent chip units, and the first cutting region is located within the first interval region;

[0026] The second wafer or substrate has a second dicing region corresponding to the first dicing region, and the second dicing region is located within the second spacing region.

[0027] A semiconductor wafer-level packaging method includes:

[0028] A first wafer is provided having one or more chip cells, each chip cell having a functional area and a first bonding area, the first bonding area being disposed around the functional area;

[0029] A second wafer or substrate is provided, the second wafer or substrate having a second bonding region corresponding to the first bonding region;

[0030] At least two rings of first annular protrusions are formed on the first bonding area of ​​the chip unit, and / or at least two rings of first annular protrusions are formed on the second bonding area of ​​the second wafer or substrate, and a fourth spacer is formed between adjacent first annular protrusions.

[0031] The fourth interval area is filled with glue, which protrudes from the top surface of the first annular protrusion.

[0032] The second wafer or substrate is aligned and pressed with the first wafer.

[0033] In one or more embodiments of the present invention, the amount of adhesive is controlled such that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the fourth interval region.

[0034] In one or more embodiments of the present invention, the amount of adhesive is controlled such that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is partially squeezed into the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface.

[0035] In one or more embodiments of the present invention, when two or more first annular protrusions are formed, the amount of adhesive filling in the fourth interval area near the functional area is controlled to be less than or equal to the amount of adhesive filling in the other fourth interval areas.

[0036] In one or more embodiments of the present invention, before aligning and laminating the second wafer or substrate with the first wafer, the method further includes:

[0037] The step of setting an annular dam on the second bonding area of ​​the second wafer or substrate and / or on the first bonding area of ​​the first wafer;

[0038] In one or more embodiments of the present invention, the inner diameter of the annular cofferdam is smaller than the inner diameter of any of the first annular protrusions on its respective first bonding region or second bonding region.

[0039] The annular cofferdam is positioned on the first bonding area or the second bonding area, which is aligned with the top surface of the first annular protrusion of the innermost ring.

[0040] In one or more embodiments of the present invention, the method of forming the first annular protrusion includes:

[0041] Forming layer structure;

[0042] A photoresist layer is formed and patterned on the layer structure to form an annular raised pattern;

[0043] The annular raised pattern is transferred onto the layer structure to form the annular raised pattern; or...

[0044] The method for forming the annular protrusion includes:

[0045] A photoresist layer is formed and patterned to create a ring-shaped recessed pattern;

[0046] A layer structure is formed covering the annular recessed pattern;

[0047] The annular recessed pattern is removed while the layer structure on the surface of the annular recessed pattern is removed to form the annular protrusion.

[0048] In one or more embodiments of the present invention, the adhesive is filled by dispensing or printing.

[0049] A semiconductor package structure, comprising:

[0050] A first chip has a first surface, the first surface having a functional area and a first bonding area, the first bonding area being disposed around the functional area;

[0051] A second chip or substrate is disposed on a first surface of the first chip, and the second chip or substrate has a second bonding region that is bonded to the first bonding region.

[0052] An adhesive bonding layer is disposed between the first bonding region and the second bonding region; and

[0053] The first annular protrusion is disposed on the first bonding area and / or the second bonding area and is partially or entirely located within the adhesive bonding layer.

[0054] In one or more embodiments of the present invention, a second annular protrusion is further included, disposed on the first bonding area of ​​the first chip and / or the second bonding area of ​​the second chip or substrate. The inner diameter of the second annular protrusion is smaller than the inner diameter of any first annular protrusion on the first or second bonding area to which it belongs. A third gap is formed between the second annular protrusion and the adjacent first annular protrusion. The adhesive bonding layer is partially or entirely disposed in the third gap.

[0055] In one or more embodiments of the present invention, the height of the second annular protrusion is greater than or equal to the height of the first annular protrusion.

[0056] A semiconductor package structure, comprising:

[0057] A first chip has a first surface, the first surface having a functional area and a first bonding area, the first bonding area being disposed around the functional area;

[0058] A second chip or substrate is disposed on a first surface of the first chip, and the second chip or substrate has a second bonding region that is bonded to the first bonding region.

[0059] At least two first annular protrusions are disposed on the first bonding area of ​​the first chip and / or on the second bonding area of ​​the second chip or substrate. A fourth spacer is formed between adjacent first annular protrusions. Adhesive is disposed in the fourth spacer. The adhesive extends from the fourth spacer to at least a portion of the space between the top surface of the first annular protrusion and the first or second bonding area that is aligned with the top surface.

[0060] In one or more embodiments of the present invention, an annular cofferdam is further included, the annular cofferdam being disposed on the first bonding region or the second bonding region that is aligned with the top surface of the first annular protrusion closest to the functional region.

[0061] Compared with the prior art, the semiconductor wafer-level packaging method and packaging structure of the present invention, for the bonding packaging of substrates or chips to chips, can prevent the adhesive applied during bonding from contaminating the functional areas. At the same time, by controlling the amount of adhesive, it can prevent the adhesive from overflowing and affecting the functional areas.

[0062] The semiconductor wafer-level packaging method and packaging structure of the present invention, through the setting of annular protrusions and the combination of adhesive application, maintains the bonding strength of the packaging while improving the hermeticity and reliability of the packaging structure, and at the same time prevents the bonding adhesive from affecting the functional areas. Attached Figure Description

[0063] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0064] Figure 1 This is a process flow diagram of the semiconductor wafer-level packaging method in the first embodiment of the present invention;

[0065] Figures 2a-2d This is a schematic diagram of the process steps of the semiconductor wafer-level packaging method in Embodiment 1 of the present invention;

[0066] Figure 3 yes Figure 2d A partial schematic diagram;

[0067] Figure 4 It is in Embodiment 2 of the present invention and Figure 2d A partial schematic diagram of the corresponding steps;

[0068] Figure 5 It is in embodiment 3 of the present invention and Figure 2d A partial schematic diagram of the corresponding steps;

[0069] Figures 6a-6d This is a schematic diagram of the process steps of the semiconductor wafer-level packaging method according to Embodiment 4 of the present invention;

[0070] Figure 7 yes Figure 6d A partial schematic diagram;

[0071] Figure 8 It is in embodiment 5 of the present invention and Figure 2d A partial schematic diagram of the corresponding steps;

[0072] Figure 9This is a process flow diagram of the semiconductor wafer-level packaging method in the second embodiment of the present invention;

[0073] Figures 10a-10d This is a schematic diagram of the process steps of the semiconductor wafer-level packaging method in Embodiment 6 of the present invention;

[0074] Figure 11 yes Figure 10d A partial schematic diagram;

[0075] Figure 12 It is in embodiment 7 of the present invention and Figure 10d A partial schematic diagram of the corresponding steps;

[0076] Figure 13 It is in embodiment 8 of the present invention and Figure 10d A partial schematic diagram of the corresponding steps;

[0077] Figure 14 It is in embodiment 9 of the present invention and Figure 10d A partial schematic diagram of the corresponding steps;

[0078] Figures 15a-15d This is a schematic diagram of the process steps of the semiconductor wafer-level packaging method according to Embodiment 11 of the present invention;

[0079] Figure 16 yes Figure 15d A partial schematic diagram. Detailed Implementation

[0080] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0081] As mentioned in the background art, for substrates with functional properties or for packaging chips whose functional areas cannot be affected, the existing screen printing or roller coating methods are prone to applying bonding adhesive to the positions of the substrate corresponding to the chip functional areas or to the chip functional areas, and therefore are not suitable for bonding the substrate and the chip.

[0082] Based on this, this application provides a semiconductor wafer-level packaging method. By setting an annular protrusion and using a coating method, the packaging bonding strength is maintained while the hermeticity and reliability of the packaging structure are improved, and the bonding adhesive can also be prevented from affecting the functional areas.

[0083] like Figure 1As shown, the semiconductor wafer-level packaging method in the first embodiment of the present invention includes the following specific steps:

[0084] S1, provides a first wafer having multiple chip units, each chip unit having a functional area and a first bonding area, the first bonding area being arranged around the functional area;

[0085] S2, providing a second wafer or substrate, the second wafer or substrate having a second bonding region corresponding to the first bonding region;

[0086] S3, a first annular protrusion is formed on the first bonding area of ​​the chip unit, and a first spacing area is provided between the first annular protrusions of adjacent chip units, and / or, at least one first annular protrusion is formed on the second bonding area of ​​the second wafer or substrate, and a second spacing area is provided between the first annular protrusions of adjacent second bonding areas.

[0087] S4, fill the first interval area and / or the second interval area with glue, the glue protruding from the top surface of the first annular protrusion;

[0088] S5, align and press the second wafer or substrate with the first wafer.

[0089] In the above technical solution, by controlling the amount of adhesive filling, after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the first and / or second spacer regions. The adhesive squeezed to the side of the first annular protrusion away from the first and / or second spacer regions is in contact with at least one of the first wafer and the second wafer or the substrate. Alternatively, the adhesive squeezed to the side of the first annular protrusion away from the first and / or second spacer regions is in contact with both the first wafer and the second wafer or the substrate.

[0090] Preferably, the adhesive can be filled in the first and / or second spacer areas by dispensing or printing.

[0091] The number of rings in the first annular protrusion can be set to multiple rings to further increase airtightness.

[0092] When the number of rings of the first annular protrusion is multiple, the adhesive can not only fill the first gap area between the first annular protrusions of adjacent chip units and / or the second gap area between the first annular protrusions of the first gap area and / or the first annular protrusions of the adjacent second bonding area, but can also further fill the area between adjacent first annular protrusions to further increase the bonding strength.

[0093] Understandably, as the number of rings of the first annular protrusion increases, the first annular protrusion will get closer and closer to the functional area. At this time, the adhesive protruding from the top surface of the first annular protrusion is prone to flow to the functional area after bonding, thus affecting the functional area. In order to prevent the adhesive after bonding from affecting the functional area located within the ring of the first annular protrusion, the amount of adhesive filled into the first and / or second spacer areas near the functional area can be controlled to be less than or equal to the amount of adhesive in the other first and / or second spacer areas. This ensures that the adhesive filled into the first and / or second spacer areas near the functional area will not be squeezed out of the bonding area in large quantities after alignment and pressing, thus affecting the functional area.

[0094] In another embodiment, a second annular protrusion can be provided on the second bonding area and / or the first bonding area to prevent the glue from flowing to the functional area after bonding.

[0095] Specifically, the height of the second annular protrusion is greater than or equal to the height of the first annular protrusion. The inner diameter of the second annular protrusion is smaller than the inner diameter of any first annular protrusion in the first bonding region and / or the second bonding region in which it is located. A third spacer region is formed between the second annular protrusion and its adjacent first annular protrusion.

[0096] After the first wafer and the second wafer or substrate are bonded, the adhesive protruding from the top surface of the first annular protrusion is only partially or completely squeezed into the third spacer area. That is, the second annular protrusion can prevent the adhesive from flowing into the functional area after bonding. At the same time, since the top surface of the second annular protrusion can completely contact and seal with the aligned first or second bonding area, it can prevent the volatile gases generated by the curing of adhesive in the first and / or second and / or third spacer areas from entering the functional area and having an adverse effect on the functional area.

[0097] Understandably, a first dicing region is formed between adjacent chip cells on the first wafer for dicing. The second wafer or substrate has a second dicing region corresponding to the first dicing region. To improve bonding strength, the width of the first spacer region is preferably greater than or equal to the width of the first dicing region. That is, the first dicing region is located within the first spacer region. The width of the second spacer region is preferably greater than or equal to the width of the second dicing region. That is, the second dicing region is located within the second spacer region.

[0098] Preferably, both the first annular bump and the second annular bump can be metal bumps, which can be manufactured in the following way:

[0099] First, a metal layer structure is formed by sputtering or vapor deposition; a photoresist layer is formed and patterned on the metal layer structure (reserving the area for forming the first annular protrusion and / or the second annular protrusion), forming the first annular protrusion pattern and / or the second annular protrusion pattern; the first annular protrusion pattern and / or the second annular protrusion pattern are transferred to the metal layer structure to form the first annular protrusion and / or the second annular protrusion; the remaining photoresist layer is removed.

[0100] Secondly, a photoresist layer is first formed and patterned (removing the area used to form the first annular protrusion and / or the second annular protrusion) to form an annular recess pattern; a metal layer structure covering the annular recess pattern is formed by sputtering or evaporation.

[0101] While removing the annular recessed pattern, the metal layer structure located on the surface of the annular recessed pattern is also removed to form a first annular protrusion and / or a second annular protrusion.

[0102] The semiconductor wafer-level packaging method of this application is described below through several specific embodiments.

[0103] Example 1

[0104] refer to Figure 2a As shown, a substrate 10 is provided, on which a plurality of grooves 11 are formed. The substrate 10 has a second bonding region S2, and each groove 11 is surrounded by a second bonding region S2. A second cutting region S4 is formed between adjacent second bonding regions S2.

[0105] It is understood that in other embodiments, the recess 11 may not be provided on the substrate 10. In this case, each annular second bonding region S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip unit of the wafer to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0106] refer to Figure 2b As shown, a first annular protrusion 121 is provided on each second bonding region S2 of the substrate 10. A second spacing region A with a certain width is formed between the first annular protrusions 121 of adjacent second bonding regions S2.

[0107] The first annular protrusion 121 on each second bonding area S2 is positioned as close as possible to the outer edge of the second bonding area S2 but not exceeding the outer edge, so that the width of the second spacing area A is greater than or equal to the width of the second cutting area S4, thereby increasing the bonding area of ​​the subsequent adhesive and improving the bonding strength. A certain buffer space is maintained between the first annular protrusion 121 and the inner edge of the second bonding area S2.

[0108] Specifically, the first annular protrusion 121 is preferably a metal protrusion, and the first annular protrusion 121 can be manufactured in the following two ways.

[0109] First, metal is sputtered or vapor-deposited across the entire surface of the second bonding region S2 to form a metal layer structure. Photoresist is then applied to the metal layer structure to form a photoresist layer. The photoresist layer is patterned (reserving the area for forming the first annular protrusion) to form a first annular protrusion pattern. Using the patterned photoresist layer as a mask, the metal layer structure is etched to transfer the first annular protrusion pattern onto the metal layer structure, forming the first annular protrusion. The remaining photoresist layer is then removed.

[0110] Secondly, a photoresist layer is formed by lifting off the entire surface of the second bonding region S2. The photoresist layer is then patterned (removing the area used to form the first annular protrusion) to form an annular recess pattern. Metal is sputtered or vapor-deposited to form a metal layer structure covering the annular recess pattern. The patterned photoresist layer is then peeled off, along with the metal layer vapor-deposited onto the photoresist layer, to form the first annular protrusion.

[0111] refer to Figure 2c As shown, adhesive is applied to the second gap area A between adjacent first annular protrusions 121 using either dispensing or printing. The adhesive is applied up to the top surface of the first annular protrusions 121. The amount of adhesive is controlled so that after subsequent alignment and pressing, all the adhesive protruding from the top surface of the first annular protrusions 121 is squeezed to the side of the first annular protrusions 121 away from the second gap area A.

[0112] refer to Figure 2d As shown, a first wafer 20 is provided, which has multiple chip units 21. A first dicing region S3 corresponding to the second dicing region S4 is formed between adjacent chip units 21. Each chip unit 21 has a functional area S0 and a first bonding area S1, with the first bonding area S1 surrounding the functional area S0. The second bonding area S2 of the substrate 10 is aligned and pressed with the first bonding area S1 of the first wafer 20. During alignment and pressing, the substrate 10 is positioned below, and the first wafer 20 is positioned above. By adjusting the pressing process parameters such as temperature and pressure, the adhesive protruding from the top surface of the first annular protrusion 121 is squeezed outwards.

[0113] refer to Figure 3 As shown, Figure 3 yes Figure 2d A partial schematic diagram in the image. Figure 3In the process, the adhesive protruding from the top surface of the first annular protrusion 121 is completely squeezed into the space on the side of the first annular protrusion 121 away from the second spacer region A, but does not flow into the area where the functional region is located. The adhesive squeezed into the side of the first annular protrusion 121 away from the second spacer region A is in contact with the surfaces of the first wafer 20 and the substrate 10.

[0114] Finally, complete the subsequent encapsulation as needed, and cut it into a single-chip encapsulation structure along the first and second cutting areas.

[0115] It is understandable that the first annular protrusion 121 can also be formed on the first bonding region S1 of the first wafer 10.

[0116] Example 2

[0117] The difference between Example 2 and Example 1 is that the pressing process parameters - pressure - are different during the alignment pressing.

[0118] In Embodiment 2, to improve the uniformity of the packaging and the bonding strength between the first wafer 20 and the substrate 10, the contact area between the adhesive and the substrate 10 (including the first annular protrusion 121) and the first wafer 20 is maximized without affecting the functional area S0. (Refer to...) Figure 4 As shown, by reducing the pressure during pressing, the amount of adhesive protruding from the top surface of the first annular protrusion 121 is controlled, so that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion 121 is partially squeezed into the space on the side of the first annular protrusion 121 away from the second spacing region A, but does not flow to the area where the functional region is located. The top surfaces of the first annular protrusion 121 of the first wafer 20 and the substrate 10 are not in complete contact, and the space is filled with adhesive.

[0119] Example 3

[0120] The only difference between Example 3 and Example 1 is that... Figure 2c In the steps shown, the amount of glue applied to the top surface of the first annular protrusion 121 varies.

[0121] In Example 3, reference Figure 5 As shown, the adhesive protruding from the top surface of the first annular protrusion 121 is completely squeezed into the space on the side of the first annular protrusion 121 away from the second spacer region A, but does not flow into the area where the functional region is located. The adhesive squeezed into the side of the first annular protrusion 121 away from the second spacer region A is in contact with the surface of the first wafer 20 but not with the surface of the substrate 10.

[0122] Example 4

[0123] refer to Figure 6aAs shown, a substrate 10 is provided, on which a plurality of grooves 11 are formed. The substrate 10 has a second bonding region S2, and each groove 11 is surrounded by a second bonding region S2. A second cutting region S4 is formed between adjacent second bonding regions S2.

[0124] It is understood that in other embodiments, the recess 11 may not be provided on the substrate 10. In this case, each annular second bonding region S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip unit of the wafer to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0125] refer to Figure 6b As shown, a ring of first annular protrusions 121 is provided on each second bonding region S2 of the substrate 10. A second spacing region A with a certain width is formed between the first annular protrusions 121 of adjacent second bonding regions S2. At the same time, a ring of second annular protrusions 122 is provided on each second bonding region S2 of the substrate 10. The inner diameter of the second annular protrusion 122 is smaller than the inner diameter of the first annular protrusion 121, the height of the second annular protrusion 122 is greater than or equal to the height of the first annular protrusion 121, and a third spacing region C is formed between the second annular protrusion 122 and the adjacent first annular protrusion 121.

[0126] Specifically, the first annular protrusion 121 and the second annular protrusion 122 are both preferably metal protrusions, which can be manufactured in the following two ways.

[0127] First, metal is sputtered or vapor-deposited across the entire surface of the second bonding region S2 to form a metal layer structure. Photoresist is then applied to the metal layer structure to form a photoresist layer. The photoresist layer is patterned, reserving areas for forming annular protrusions (including a first annular protrusion and a second annular protrusion), thus forming an annular protrusion pattern. Using the patterned photoresist layer as a mask, the metal layer structure is etched to transfer the annular protrusion pattern onto the metal layer structure, forming the annular protrusions. The remaining photoresist layer is then removed.

[0128] Secondly, a photoresist layer is formed by lifting off the entire surface of the second bonding region S2. The photoresist layer is patterned, and the areas used to form the annular protrusions (including the first and second annular protrusions) are removed, forming an annular recess pattern. Metal is sputtered or vapor-deposited to form a metal layer structure covering the annular recess pattern. The patterned photoresist layer is then peeled off, along with the metal layer vapor-deposited onto the photoresist layer, forming the annular protrusions.

[0129] refer to Figure 6cAs shown, adhesive is applied to the second interval A between adjacent first annular protrusions 121 using either dispensing or printing. The adhesive fills to the top surface of the protrusions 121. The amount of adhesive is controlled so that after subsequent alignment and pressing, only part or all of the adhesive protruding from the top surface of the first annular protrusions 121 is squeezed into the third interval C. The third interval C also accommodates the volatile gases generated during adhesive curing, preventing them from entering the functional area and adversely affecting it.

[0130] refer to Figure 6d As shown, a first wafer 20 is provided, which has multiple chip units 21. Each chip unit 21 has a functional area S0 and a first bonding area S1, with the first bonding area S1 surrounding the functional area S0. A substrate 10 and the first wafer 20 are aligned and pressed together. During alignment and pressing, the substrate 10 is positioned below and the first wafer 20 is positioned above. By adjusting the pressing process parameters such as temperature and pressure, the adhesive protruding from the top surface of the first annular protrusion 121 is squeezed and flows outwards.

[0131] refer to Figure 7 As shown, Figure 7 yes Figure 6d A partial schematic diagram in the image. Figure 7 In this process, the adhesive protruding from the top surface of the first annular protrusion 121 is completely squeezed into the third spacer region C, preventing it from flowing into the functional area. The adhesive squeezed into the third spacer region C is in contact with both the surface of the first wafer 20 and the substrate 10. The third spacer region C also accommodates the volatile gases generated during adhesive curing, preventing them from entering the functional area and adversely affecting it.

[0132] Finally, complete the subsequent encapsulation as needed, and cut it into a single-chip encapsulation structure along the first and second cutting areas.

[0133] Example 5

[0134] The difference between Example 5 and Example 1 is only that, in Example 5, the first annular protrusion 121 is respectively disposed on the first bonding region S1 of the first wafer 20 and on the second spacer region S2 of the substrate 10 or the second wafer. (See reference) Figure 8 As shown, there is a first interval region B between the first annular protrusions 121 of adjacent first bonding regions S1, and there is a second interval region A between the first annular protrusions 121 of adjacent second bonding regions S2.

[0135] One or both of the first compartment B and the second compartment A are filled with glue.

[0136] After alignment and pressing, the first annular protrusion 121 of the first bonding area S1 and the first annular protrusion 121 of the second bonding area S2 are misaligned.

[0137] This application also provides a packaging structure encapsulated using the above-described packaging method.

[0138] refer to Figure 2d and Figures 3 to 5 As shown, the packaging structure of this application includes a first wafer 20, a substrate 10, an adhesive bonding layer, and a first annular protrusion 121.

[0139] The first wafer 20 has a first surface, the first surface has a functional area S0 and a first bonding area S1, the first bonding area S1 being arranged around the functional area S0.

[0140] The substrate 10 has a second surface with a second bonding region S2, and a groove 11 surrounded by the second bonding region S2 is formed on the second surface. The second surface of the substrate 10 is attached to the first surface of the first wafer 20, the groove 11 corresponds to and covers the functional region S0, and the second bonding region S2 is bonded to the first bonding region S1.

[0141] It is understood that in other embodiments, the groove 11 may not be provided.

[0142] The adhesive bonding layer is disposed between the first bonding region S1 and the second bonding region S2.

[0143] The first annular protrusion 121 is disposed on the first bonding area S1 and / or the second bonding area S2 and is partially or entirely located within the adhesive bonding layer.

[0144] In a preferred embodiment, the first annular protrusion 121 is selected from a metal protrusion to further improve airtightness.

[0145] In another embodiment, reference Figure 7 As shown, it also includes a second annular protrusion 122, disposed on the first bonding region S1 and / or the second bonding region S2, and located within the area enclosed by the first annular protrusion 121. The height of the second annular protrusion 122 is higher than or equal to the height of the first annular protrusion 121. A third spacer region C is formed between the second annular protrusion 122 and the adjacent first annular protrusion 121. The third spacer region C is not connected to the functional area. An adhesive bonding layer is partially or entirely disposed within the third spacer region C.

[0146] like Figure 9 As shown, the semiconductor wafer-level packaging method in the second embodiment of the present invention includes the following specific steps:

[0147] S10 provides a first wafer having one or more chip cells, each chip cell having a functional area and a first bonding area, the first bonding area being arranged around the functional area.

[0148] S20, a second wafer or substrate is provided, the second wafer or substrate having a second bonding region corresponding to the first bonding region.

[0149] S30, at least two rings of first annular protrusions are formed on the first bonding area of ​​the chip unit, and / or at least two rings of first annular protrusions are formed on the second bonding area of ​​the second wafer or substrate, and a fourth spacer area is formed between adjacent first annular protrusions.

[0150] S40, fill the fourth interval area with glue, the glue protruding from the top surface of the first annular protrusion.

[0151] S50, align and press the second wafer or substrate with the first wafer.

[0152] In the above technical solution, the amount of adhesive is controlled so that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is squeezed to partially or completely fill the space between the top surface of the first annular protrusion and the first or second bonding area aligned with the top surface. Alternatively, the amount of adhesive is controlled so that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is squeezed to completely fill the space between the top surface of the first annular protrusion and the first or second bonding area aligned with the top surface, and extends to the side surface of the first annular protrusion away from the fourth spacer region.

[0153] Preferably, the adhesive can be filled in the fourth interval area by dispensing or printing.

[0154] The number of rings in the first annular protrusion can be set to more than two to further increase airtightness.

[0155] When the number of rings of the first annular protrusion is greater than two, as the number of rings increases, the first annular protrusion will get closer and closer to the functional area. At this time, the adhesive on the top surface of the first annular protrusion is prone to flow to the functional area after bonding, thus affecting the functional area. In order to prevent the adhesive after bonding from affecting the functional area located within the ring of the first annular protrusion, the amount of adhesive filled into the fourth spacer area near the functional area can be controlled so that the amount of adhesive protruding from the top surface of the first annular protrusion in the fourth spacer area is partially or completely filled after alignment and pressing. Preferably, it partially fills the space between the top surface of the first annular protrusion and the first or second bonding area aligned with the top surface, so that the adhesive is not squeezed out of the bonding area.

[0156] Furthermore, in order to ensure the bonding strength between the first wafer and the substrate or the second wafer, the amount of adhesive filled in the remaining fourth spacer area away from the functional area can be controlled to be slightly more than the amount of adhesive filled in the fourth spacer area close to the functional area. This allows the amount of adhesive protruding from the top surface of the first annular protrusion in the remaining fourth spacer area to be squeezed to completely fill the space between the top surface of the first annular protrusion and the first or second bonding area aligned with the top surface after alignment and pressing, and to extend to the side surface of the first annular protrusion.

[0157] In another embodiment, an annular dam can be formed on the second bonding area of ​​the second wafer or substrate and / or the first bonding area of ​​the first wafer to prevent adhesive from flowing to the functional area after bonding. The inner diameter of the annular dam is smaller than the inner diameter of any of the first annular protrusions. The annular dam is disposed on the first or second bonding area aligned with the top surface of the innermost first annular protrusion, and the height of the annular dam is less than the height between the second and first bonding areas and greater than or equal to the height between the top surface of the first annular protrusion and the first or second bonding area aligned with its top surface.

[0158] For example, when the first annular protrusion is disposed on the first bonding region of the first wafer, the annular dam is disposed on the second bonding region of the substrate or the second wafer, and its position is configured such that, after the substrate or the second wafer and the first wafer are bonded, the annular dam is located between the innermost first annular protrusion and the functional region. The height of the annular dam is configured such that, in a direction parallel to the first surface of the first wafer, the annular dam partially overlaps with the first annular protrusion.

[0159] For example, when the first annular protrusion is disposed on the second bonding region of the substrate or the second wafer, the annular dam is disposed on the first bonding region of the first wafer, and its position is configured such that, after the substrate or the second wafer and the first wafer are bonded, the annular dam is located between the innermost first annular protrusion and the functional region. The height of the annular dam is configured such that, in a direction parallel to the first surface of the first wafer, the annular dam partially overlaps with the first annular protrusion.

[0160] In other embodiments, a combination of annular dikes and glue volume control can be used to prevent the glue from flowing into the functional area after bonding.

[0161] Preferably, the first annular bump can be a metal bump, which can be manufactured in the following way:

[0162] First, a metal layer structure is formed by sputtering or vapor deposition; a photoresist layer is formed and patterned on the metal layer structure (reserving the area used to form the first annular protrusion) to form an annular protrusion pattern; the annular protrusion pattern is transferred to the metal layer structure to form the first annular protrusion; the remaining photoresist layer is removed.

[0163] Secondly, a photoresist layer is first formed and patterned (removing the area used to form the first annular protrusion) to form an annular recess pattern; a metal layer structure covering the annular recess pattern is formed by sputtering or evaporation.

[0164] While removing the annular recessed pattern, the metal layer structure located on the surface of the annular recessed pattern is also removed to form the first annular protrusion.

[0165] The semiconductor wafer-level packaging method of this application is described below through several specific embodiments.

[0166] Example 6 (Two rings of first annular protrusions are disposed on the substrate)

[0167] refer to Figure 10a As shown, a substrate 10 is provided, a plurality of grooves 11 are formed on the substrate 10, and a second bonding region S2 is provided on the substrate 10, with a second bonding region S2 surrounding each groove 11.

[0168] It is understood that in other embodiments, the recess 11 may not be provided on the substrate 10. In this case, each annular second bonding region S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0169] refer to Figure 10b As shown, two rings of first annular protrusions 121 are provided on the second bonding area S2 of the substrate 10. The two rings of first annular protrusions 121 are arranged coaxially or non-axially, and a fourth gap area D with a certain width is formed between the two rings of first annular protrusions 121. A certain buffer space is maintained between the inner ring of the first annular protrusions 121 and the inner edge of the second bonding area S2.

[0170] Specifically, the first annular protrusion 121 is preferably a metal protrusion.

[0171] refer to Figure 10c As shown, glue is applied to the fourth interval D between the two first annular protrusions 121 using either dispensing or printing. The glue is applied until it slightly protrudes from the top surface of the first annular protrusions 121.

[0172] refer to Figure 10d As shown, a first wafer 20 is provided, which has multiple chip units 21. Each chip unit 21 has a functional area S0 and a first bonding area S1, with the first bonding area S1 surrounding the functional area S0. A substrate 10 and the first wafer 20 are aligned and pressed together. During alignment and pressing, the substrate 10 is positioned below and the first wafer 20 is positioned above. By adjusting the pressing process parameters such as temperature and pressure, the adhesive on the top surface of the first protruding annular protrusion 121 is squeezed outwards.

[0173] refer to Figure 11 As shown, Figure 11 yes Figure 10d A partial schematic diagram in the image. Figure 11 In this process, the adhesive protruding from the top surface of the first annular protrusion 121 is squeezed to fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface. The area between the two mutually distant side surfaces of the two annular protrusions 121 is defined as the space region or the entire space region between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface. The above definition is used in the remaining embodiments below.

[0174] Finally, complete the subsequent packaging as needed.

[0175] Example 7

[0176] The only difference between Example 7 and Example 6 is that... Figure 10c In the steps shown, the amount of glue applied to the top surface of the first annular protrusion 121 varies.

[0177] In embodiment 7, in order to improve the uniformity of the packaging and the bonding strength between the first wafer 20 and the substrate 10, the contact area between the adhesive and the substrate 10 (including the first annular protrusion 121) and the first wafer 20 is maximized without affecting the functional area S0. (Refer to...) Figure 12 As shown, the amount of adhesive protruding from the top surface of the first annular protrusion 121 is controlled so that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion 121 is squeezed to fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface, and extends to the side surface of the first annular protrusion 121 away from the fourth spacer area D.

[0178] Example 8 (Three rings of first annular protrusions are provided on the substrate)

[0179] The difference between Example 8 and Example 7 is that in Example 8, three rings of first annular protrusions 121 are provided. The fourth interval D between adjacent first annular protrusions 121 is filled with adhesive. The provision of three rings of first annular protrusions 121 further increases the hermeticity of the package. When the first bonding area S1 around the functional area S0 of the first wafer 20 is uneven (due to design reasons causing different undulations), the multiple rings of first annular protrusions 121 can provide multiple layers of hermetic protection.

[0180] refer to Figure 13As shown, in embodiment 8, the amount of adhesive in each fourth interval zone D is controlled to be the same, so that the adhesive protruding from the top surface of the first annular protrusion 121 in each fourth interval zone D is squeezed to fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface after alignment and pressing, and extends to the side surface of the annular protrusion 121.

[0181] Example 9

[0182] The only difference between Example 9 and Example 8 is that... Figure 10c In the steps shown, the amount of glue applied to the top surface of the first annular protrusion 121 varies.

[0183] Understandably, the more rings the first annular protrusion 121 has, the closer it will be to the functional area S0. Therefore, when the first annular protrusion 121 has three rings, the buffer area corresponding to the innermost ring of the first annular protrusion 121 and the functional area S0 will be too narrow. This makes it easy for the glue protruding from the top surface of the first annular protrusion to flow to the functional area S0 during alignment and pressing, thus affecting the functional area S0.

[0184] Therefore, refer to Figure 14 As shown, to ensure that the adhesive after bonding does not affect the functional area S0 located within the enclosure of the first annular protrusion 121, the amount of adhesive filled into the fourth interval region near the functional area S0—defined here as the fourth interval region D1—is controlled to be slightly less than the amount of adhesive filled into the fourth interval region away from the functional area S0—defined here as the fourth interval region D2. This ensures that the amount of adhesive protruding from the top surface of the first annular protrusion in the fourth interval region D1, after alignment and pressing, partially fills the space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with its top surface, preventing the adhesive from being squeezed out of the bonding area. Meanwhile, the amount of adhesive protruding from the top surface of the first annular protrusion 121 in the fourth interval region D2, after alignment and pressing, is squeezed to completely fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with its top surface, and extends to the side surface of the first annular protrusion 121.

[0185] Example 10

[0186] The only difference between Example 10 and Example 6 is that, in Example 10, the first annular protrusion 121 is disposed on the first bonding region S1 of the first wafer 20.

[0187] Example 11

[0188] refer to Figure 15a As shown, a substrate 10 is provided, a plurality of grooves 11 are formed on the substrate 10, and a second bonding region S2 is provided on the substrate 10, with a second bonding region S2 surrounding each groove 11.

[0189] It is understood that in other embodiments, the recess 11 may not be provided on the substrate 10. In this case, each annular second bonding region S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0190] refer to Figure 15b As shown, three rings of first annular protrusions 121 are provided on the second bonding area S2 of the substrate 10. The three rings of first annular protrusions 121 are arranged coaxially or non-axially at intervals, and a fourth spacing area D with a certain width is formed between two adjacent rings of first annular protrusions 121. In this embodiment, the fourth spacing area D1 is defined as the one closer to the functional area, and the one farther away from the functional area is defined as the fourth spacing area D2.

[0191] Specifically, the first annular protrusion 121 is preferably a metal protrusion.

[0192] refer to Figure 15c As shown, glue is applied to the fourth interval zone D1 and the fourth interval zone D2 using either dispensing or printing methods. The glue is applied until it slightly protrudes from the top surface of the first annular protrusion 121.

[0193] refer to Figure 15d As shown, a first wafer 20 is provided, which has multiple chip units 21. Each chip unit 21 has a functional area S0 and a first bonding area S1, which surrounds the functional area S0. An annular dam 21 is provided on the first bonding area S1. The inner diameter of the annular dam 21 is smaller than the inner diameter of any first annular protrusion 121 on the substrate 10, so that after subsequent alignment and lamination, the annular dam 21 is located at the innermost circle, preventing the adhesive from flowing to the functional area S0 after bonding.

[0194] The substrate 10 and the first wafer 20 are aligned and pressed together. During alignment and pressing, the substrate 10 is positioned below and the first wafer 20 is positioned above. By adjusting the pressing process parameters such as temperature and pressure, the adhesive protruding from the top surface of the first annular protrusion 121 is squeezed and flows to the surrounding area.

[0195] refer to Figure 16 As shown, Figure 16 yes Figure 15d A partial schematic diagram in the image. Figure 16In this process, by controlling the amount of adhesive filled into the fourth spacer zone D1 near the functional area S0, making the amount of adhesive slightly less than the amount filled into the fourth spacer zone D2 away from the functional area S0, the amount of adhesive protruding from the top surface of the first annular protrusion in the fourth spacer zone D1 partially fills the space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface after alignment and pressing, preventing the adhesive from being squeezed out of the bonding area. Meanwhile, the amount of adhesive protruding from the top surface of the first annular protrusion 121 in the fourth spacer zone D2 is squeezed after alignment and pressing to completely fill the space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface, and extends to the side surface of the second annular protrusion 121.

[0196] Finally, complete the subsequent packaging as needed.

[0197] This application also provides a packaging structure encapsulated using the above-described packaging method.

[0198] refer to Figure 10d and Figures 11 to 14 As shown, the chip packaging structure of this application includes a first wafer 20, a substrate 10, an adhesive bonding layer, and at least two annular protrusions 121.

[0199] The first wafer 20 has a first surface, the first surface has a functional area S0 and a first bonding area S1, the first bonding area S1 being arranged around the functional area S0.

[0200] The substrate 10 has a second surface with a second bonding region S2, and a groove 11 surrounded by the second bonding region S2 is formed on the second surface. The second surface of the substrate 10 is attached to the first surface of the first wafer 20, the groove 11 corresponds to and covers the functional region S0, and the second bonding region S2 is bonded to the first bonding region S1.

[0201] It is understood that in other embodiments, the groove 11 may not be provided.

[0202] The adhesive bonding layer is disposed between the first bonding region S1 and the second bonding region S2.

[0203] Multiple first annular protrusions 121 are disposed on the second bonding region S2 and / or the first bonding region S1. The multiple first annular protrusions 121 are distributed in concentric rings at intervals. Some or all of the multiple first annular protrusions 121 are located within the adhesive bonding layer.

[0204] In a preferred embodiment, the first annular protrusion 121 is selected from a metal protrusion to further improve airtightness.

[0205] In another embodiment, reference Figure 16As shown, it also includes an annular dam 21, positioned on the top surface of the first annular protrusion 121 closest to the functional region S0, on either the first bonding region S1 or the second bonding region S2. The annular dam 21 is located between the innermost first annular protrusion 121 and the functional region S0. The height of the annular dam 21 is set such that, in a direction parallel to the first surface of the first wafer 20, the annular dam 21 partially overlaps with the first annular protrusion 121 to block adhesive from the fourth spacer region D in the innermost circle.

[0206] Compared with the prior art, the semiconductor wafer-level packaging method and packaging structure of the present invention, for packaging of functional substrates and chips, can prevent the adhesive applied during bonding from contaminating the functional areas. At the same time, by controlling the amount of adhesive, it can prevent the adhesive from overflowing and affecting the functional areas.

[0207] The semiconductor wafer-level packaging method and packaging structure of the present invention, through the setting of annular protrusions and the combination of adhesive application, maintains the packaging bonding strength while improving the hermeticity and reliability of the chip packaging structure, and at the same time prevents the bonding adhesive from affecting the functional areas.

[0208] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0209] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A semiconductor wafer-level packaging method, characterized in that, include: A first wafer is provided having a plurality of chip units, each of the chip units having a functional area and a first bonding area, the first bonding area being disposed around the functional area; A second wafer or substrate is provided, the second wafer or substrate having a second bonding region corresponding to the first bonding region; A first annular protrusion is formed on the first bonding area of ​​the chip unit, and a first spacing region is provided between the first annular protrusions of adjacent chip units; and / or, at least one first annular protrusion is formed on the second bonding area of ​​the second wafer or substrate, and a second spacing region is provided between the first annular protrusions of adjacent second bonding areas; the first annular protrusion is a metal protrusion. The step of forming a second annular protrusion on the first bonding area of ​​the chip unit and / or on the second bonding area of ​​the second wafer or substrate; wherein the inner diameter of the second annular protrusion is smaller than the inner diameter of any first annular protrusion on the first bonding area or the second bonding area to which it belongs; a third gap area is formed between the second annular protrusion and the adjacent first annular protrusion. Fill the first and / or second interval with glue, the glue protruding from the top surface of the first annular protrusion; The second wafer or substrate is aligned and pressed with the first wafer; Specifically, the amount of adhesive is controlled so that after alignment and pressing, the adhesive protruding from the top surface of the first annular protrusion is only partially or completely squeezed into the third interval area.

2. The semiconductor wafer-level packaging method according to claim 1, characterized in that, The adhesive that is squeezed to the side of the first annular protrusion away from the first spacer region and / or the second spacer region is in contact with at least one of the first wafer and the second wafer or the substrate. or The adhesive that is squeezed onto the side of the first annular protrusion away from the first and / or second spacer regions comes into contact with both the first and second wafers or the substrate.

3. The semiconductor wafer-level packaging method according to claim 1, characterized in that, A first cutting region is formed between adjacent chip units, and the first cutting region is located within the first interval region; The second wafer or substrate has a second dicing region corresponding to the first dicing region, and the second dicing region is located within the second spacing region.

4. The semiconductor wafer-level packaging method according to claim 1, characterized in that, The method for forming the first annular protrusion includes: Forming layer structure; A photoresist layer is formed and patterned on the layer structure to form an annular raised pattern; The annular raised pattern is transferred onto the layer structure to form the annular raised pattern; or... The method for forming the annular protrusion includes: A photoresist layer is formed and patterned to create a ring-shaped recessed pattern; A layer structure is formed covering the annular recessed pattern; The annular recessed pattern is removed while the layer structure on the surface of the annular recessed pattern is removed to form the annular protrusion.

5. The semiconductor wafer-level packaging method according to claim 1, characterized in that, The adhesive is applied by dispensing or printing.

6. A semiconductor packaging structure, characterized in that, A semiconductor package structure fabricated using the semiconductor wafer-level packaging method according to any one of claims 1-4, the semiconductor package structure comprising: A first chip has a first surface, the first surface having a functional area and a first bonding area, the first bonding area being disposed around the functional area; A second chip or substrate is disposed on a first surface of the first chip, and the second chip or substrate has a second bonding region that is bonded to the first bonding region. An adhesive bonding layer is disposed between the first bonding region and the second bonding region; and A first annular protrusion is disposed on the first bonding area and / or the second bonding area and is partially or entirely located within the adhesive bonding layer. The first annular protrusion is a metal protrusion. The first annular protrusion on the first bonding area contacts the second bonding area and / or the first annular protrusion on the second bonding area contacts the first bonding area. The second annular protrusion is disposed on the first bonding area of ​​the first chip and / or the second bonding area of ​​the second chip or substrate. The inner diameter of the second annular protrusion is smaller than the inner diameter of any first annular protrusion on the first or second bonding area to which it belongs. A third gap is formed between the second annular protrusion and the adjacent first annular protrusion. The adhesive bonding layer is partially or completely disposed in the third gap.

7. The semiconductor packaging structure according to claim 6, characterized in that, The height of the second annular protrusion is greater than or equal to the height of the first annular protrusion.

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