Control Circuit of Energy Storage Device and Energy Storage Device

Abstract

The present invention provides a control circuit and an energy storage device for an energy storage device, which relates to the field of circuit technologies. The energy storage device includes a battery, a negative output terminal, and a positive output terminal. The battery is charged and discharged through the negative output terminal and the positive output terminal. The control circuit of the energy storage device includes: a switching transistor connected in series between the negative electrode of the battery and the negative output terminal; an analog front-end chip; a microcontroller unit; a first AND gate, the first input terminal of the first AND gate is connected to the analog front-end chip, and the second input terminal of the first AND gate is connected to the microcontroller unit; a flip-flop, the input terminal of the flip-flop is connected to the output terminal of the first AND gate, and the clock input port of the flip-flop is connected to the microcontroller unit; a drive circuit, the input terminal of the drive circuit is connected to the output terminal of the flip-flop, and the output terminal of the drive circuit is connected to the control terminal of the switching transistor to drive the switching transistor to conduct and cut off. During this process, the probability that the switching transistor cannot be effectively controlled is reduced, and the reliability of the control circuit of the energy storage device is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of circuits, and more specifically, to a control circuit for an energy storage device and an energy storage device. Background Art

[0002] In an energy storage device, a switching transistor is usually used to control charging and discharging.

[0003] Specifically, in the control circuit of the energy storage device, the switching transistor is controlled by a chip. As Figure 1 shown, the energy storage device 200' includes a battery 202', a positive output terminal PACK+, a negative output terminal PACK-, a fuse F, and a control circuit of the energy storage device. The control circuit of the energy storage device includes a switching transistor 102', an analog front-end chip 104', a microcontroller unit 106', a pre-charge circuit 108', a feedback circuit 110', and a drive circuit 112'. Among them, the analog front-end chip 104' collects the cell state parameters of the cells in the battery 202' and feeds them back to the microcontroller unit 106'. The microcontroller unit 106' controls the conduction and cut-off of the switching transistor 102' according to the information fed back by the pre-charge circuit 108' and the feedback circuit 110'.

[0004] If the microcontroller unit 106' used to control the conduction and cut-off of the switching transistor fails, the switching transistor 102' will lose control, resulting in low reliability.

[0005] At the same time, when the microcontroller unit 106' that controls the conduction and cut-off of the switching transistor is reset, the switching transistor 102' will suddenly cut off, causing damage to the switching transistor 102'. Summary of the Invention

[0006] The present invention aims to at least solve the technical problem in the prior art or related art that if the chip used to control the conduction and cut-off of the switching transistor fails, the switching transistor will lose control, resulting in low reliability.

[0007] To this end, the first aspect of the present invention is to provide a control circuit for an energy storage device.

[0008] The second aspect of the present invention is to provide an energy storage device.

[0009] In view of this, according to the first aspect of the present invention, the present invention provides a control circuit for an energy storage device. The energy storage device includes a battery, a negative output terminal, and a positive output terminal. The battery is charged and discharged through the negative output terminal and the positive output terminal. The control circuit of the energy storage device includes: a switching transistor connected in series between the negative electrode of the battery and the negative output terminal; an analog front-end chip; a microcontroller unit; a first AND gate, the first input terminal of the first AND gate is connected to the analog front-end chip, and the second input terminal of the first AND gate is connected to the microcontroller unit; a flip-flop, the input terminal of the flip-flop is connected to the output terminal of the first AND gate, and the clock input port of the flip-flop is connected to the microcontroller unit; a drive circuit, the input terminal of the drive circuit is connected to the output terminal of the flip-flop, and the output terminal of the drive circuit is connected to the control terminal of the switching transistor to drive the switching transistor to conduct and cut off.

[0010] The present invention proposes a control circuit for an energy storage device. Among them, the control circuit of the energy storage device includes a switching transistor, an analog front-end chip, a microcontroller unit, a first AND gate, a flip-flop, and a drive circuit. Among them, the analog front-end chip and the microcontroller unit are respectively connected to the first input terminal and the second input terminal of the first AND gate, and can input level signals to the first input terminal and the second input terminal of the first AND gate. In this case, the conduction and cut-off of the switching transistor are controlled by two chips, namely the analog front-end chip and the microcontroller unit. In the case where one of the analog front-end chip and the microcontroller unit fails, the switching transistor can still be controlled under the action of the other chip, reducing the probability that the switching transistor cannot be effectively controlled, thereby improving the reliability of the control circuit of the energy storage device.

[0011] In addition, in the case where one of the analog front-end chip and the microcontroller unit is reset, the flip-flop can be used to keep the normal driving of the drive circuit, reducing the probability that the switching transistor suddenly cuts off when the analog front-end chip or the microcontroller unit is reset. In this case, the probability of damage to the switching transistor is reduced, thereby improving the reliability of the control circuit of the energy storage device.

[0012] In addition, the control circuit of the energy storage device proposed in this application also has the following additional technical features.

[0013] In some technical solutions, optionally, the switching transistor includes a charging switching transistor, the first AND gate includes a first sub-AND gate, the driving circuit includes a first driving circuit, the flip-flop includes a first flip-flop, the first input terminal of the first sub-AND gate is connected to the charging signal output terminal of the analog front-end chip, the second input terminal of the first sub-AND gate is connected to the charging signal output terminal of the microcontroller unit, the output terminal of the first sub-AND gate is connected to the input terminal of the first flip-flop, the output terminal of the first flip-flop is connected to the input terminal of the first driving circuit, the clock input port of the first flip-flop is connected to the clock control signal output terminal of the microcontroller unit, and the output terminal of the first driving circuit is connected to the control terminal of the charging switching transistor; and / or the switching transistor includes a discharging switching transistor, the first AND gate includes a second sub-AND gate, the driving circuit includes a second driving circuit, the flip-flop includes a second flip-flop, the first input terminal of the second sub-AND gate is connected to the discharging signal output terminal of the analog front-end chip, the second input terminal of the second sub-AND gate is connected to the discharging signal output terminal of the microcontroller unit, the output terminal of the second sub-AND gate is connected to the input terminal of the second flip-flop, the output terminal of the second flip-flop is connected to the input terminal of the second driving circuit, the clock input port of the second flip-flop is connected to the clock control signal output terminal of the microcontroller unit, and the output terminal of the second driving circuit is connected to the control terminal of the discharging switching transistor.

[0014] In this technical solution, the switching transistor may include a charging switching transistor, may also include a discharging switching transistor, or may include both a charging switching transistor and a discharging switching transistor.

[0015] Among them, according to the selection of the charging switching transistor and the discharging switching transistor, the first AND gate may include a first sub-AND gate and a second sub-AND gate. At the same time, the driving circuit correspondingly includes a first driving circuit and a second driving circuit, and the flip-flop includes a first flip-flop and a second flip-flop.

[0016] During this process, different switching transistors can be controlled by driving different driving circuits and different flip-flops.

[0017] In some technical solutions, optionally, the control circuit of the energy storage device further includes: a second AND gate, the first input terminal of the second AND gate is connected to the fault signal output terminal of the analog front-end chip, the second input terminal of the second AND gate is connected to the charging signal output terminal of the analog front-end chip, the third input terminal of the second AND gate is connected to the clear signal output terminal of the microcontroller unit, and the output terminal of the second AND gate is connected to the reset port of the first flip-flop; and / or a third AND gate, the first input terminal of the third AND gate is connected to the fault signal output terminal of the analog front-end chip, the second input terminal of the third AND gate is connected to the discharging signal output terminal of the analog front-end chip, the third input terminal of the third AND gate is connected to the clear signal output terminal of the microcontroller unit, and the output terminal of the third AND gate is connected to the reset port of the second flip-flop.

[0018] In this technical solution, the second AND gate can perform an AND operation on the level signals output by the fault signal output terminal of the analog front-end chip, the clear signal output terminal of the microcontroller unit, and the charging signal output terminal of the analog front-end chip, and output the level signal after the AND operation. At this time, the first flip-flop determines whether to reset according to the level signal output by the output terminal of the second AND gate, so as to control the level signal output by the output terminal of the first flip-flop.

[0019] During this process, the first flip-flop can be used to indirectly control the charging switch tube. When one or more of the fault signal output terminal of the analog front-end chip, the clear signal output terminal of the microcontroller unit, and the charging signal output terminal of the analog front-end chip output low-level signals, the first flip-flop can be controlled to reset, and then the charging switch tube can be controlled to turn off, so as to improve the reliability of the control circuit of the energy storage device.

[0020] Similarly, the third AND gate can perform an AND operation on the level signals output by the fault signal output terminal of the analog front-end chip, the clear signal output terminal of the microcontroller unit, and the discharge signal output terminal of the analog front-end chip, and output the level signal after the AND operation. At this time, the second flip-flop determines whether to reset according to the level signal output by the output terminal of the third AND gate, so as to control the level signal output by the output terminal of the second flip-flop.

[0021] During this process, the second flip-flop can be used to indirectly control the discharge switch tube. When one or more of the fault signal output terminal of the analog front-end chip, the clear signal output terminal of the microcontroller unit, and the discharge signal output terminal of the analog front-end chip output low-level signals, the second flip-flop can be controlled to reset, and then the discharge switch tube can be controlled to turn off, so as to improve the reliability of the control circuit of the energy storage device.

[0022] In some technical solutions, optionally, based on the charging signal output terminal of the analog front-end chip and the charging signal output terminal of the microcontroller unit outputting high-level signals, the first sub-AND gate outputs a high-level signal, and the first drive circuit drives the charging switch tube to conduct in response to the high-level signal; based on the discharge signal output terminal of the analog front-end chip and the discharge signal output terminal of the microcontroller unit outputting high-level signals, the second sub-AND gate outputs a high-level signal, and the second drive circuit drives the discharge switch tube to conduct in response to the high-level signal.

[0023] In some technical solutions, optionally, one or both of the charging signal output terminal of the analog front-end chip and the charging signal output terminal of the microcontroller unit output a low-level signal, the first sub AND gate outputs a low-level signal, and the first driving circuit responds to the low-level signal to drive the charging switch tube to cut off; one or both of the discharge signal output terminal of the analog front-end chip and the discharge signal output terminal of the microcontroller unit output a low-level signal, the second sub AND gate outputs a low-level signal, and the second driving circuit responds to the low-level signal to drive the discharge switch tube to cut off.

[0024] In this technical solution, for the charging switch tube and the discharge switch tube, they can conduct when the analog front-end chip and the microcontroller unit output the same high-level signal, and can control the charging switch tube and the discharge switch tube to cut off when one or both of the analog front-end chip and the microcontroller unit output a low-level signal, so that the conduction and cut-off of the charging switch tube are simultaneously controlled by the analog front-end chip and the microcontroller unit. Compared with the solution using a single chip for control, the reliability of the control circuit of the energy storage device is improved.

[0025] In some technical solutions, optionally, one or more of the fault signal output terminal of the analog front-end chip, the charging signal output terminal of the analog front-end chip, and the clear signal output terminal of the microcontroller unit output a low-level signal, the output terminal of the second AND gate outputs a low-level signal, and the first flip-flop responds to the low-level signal to drive the charging switch tube to cut off through the first driving circuit; one or more of the fault signal output terminal of the analog front-end chip, the discharge signal output terminal of the analog front-end chip, and the clear signal output terminal of the microcontroller unit output a low-level signal, the output terminal of the third AND gate outputs a low-level signal, and the second flip-flop responds to the low-level signal to drive the discharge switch tube to cut off through the second driving circuit.

[0026] In this technical solution, the first flip-flop can be used to indirectly control the charging switch tube. When one or more of the fault signal output terminal of the analog front-end chip, the clear signal output terminal of the microcontroller unit, and the charging signal output terminal of the analog front-end chip output a low-level signal, the first flip-flop can be controlled to reset, and then the charging switch tube can be controlled to cut off, thereby improving the reliability of the control circuit of the energy storage device.

[0027] Similarly, the second flip-flop can be used to indirectly control the discharge switch tube. When one or more of the fault signal output terminal of the analog front-end chip, the clear signal output terminal of the microcontroller unit, and the discharge signal output terminal of the analog front-end chip output a low-level signal, the second flip-flop can be controlled to reset, and then the discharge switch tube can be controlled to cut off, thereby improving the reliability of the control circuit of the energy storage device.

[0028] In some technical solutions, optionally, the battery includes battery cells, and the microcontroller unit is configured to: if the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery are all within the corresponding protection threshold ranges, the charging signal output terminal and the discharging signal output terminal of the microcontroller unit output high-level signals and send a first signal to the analog front-end chip; otherwise, output low-level signals, where the battery cell state parameter is the state parameter collected by the analog front-end chip for the battery cells; the analog front-end chip is configured to: when receiving the first signal, if the battery cell state parameter is within the corresponding protection threshold range, the charging signal output terminal and the discharging signal output terminal of the analog front-end chip output high-level signals; otherwise, output low-level signals; where the battery cell state parameter includes at least one of the following: battery cell voltage value, battery cell current value, battery cell temperature value.

[0029] In this technical solution, the microcontroller unit can obtain the battery cell state parameter from the analog front-end chip, and after obtaining the battery cell state parameter, compare the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery with the corresponding protection threshold ranges respectively. If the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery are all within the corresponding protection threshold ranges, it is considered that the current state of the energy storage device is normal. At this time, the charging signal output terminal and the discharging signal output terminal of the microcontroller unit output high-level signals to control the charging switching transistor and the discharging switching transistor to conduct. At the same time, by outputting the first signal, the analog front-end chip is informed through the first signal that it is required to output high-level signals.

[0030] When the analog front-end chip receives the first signal, it will compare the battery cell state parameter with the corresponding protection threshold range, and output a high-level signal when the battery cell state parameter is within the corresponding protection threshold range.

[0031] In this process, the microcontroller unit and the analog front-end chip will respectively detect the current state of the energy storage device and the state of the battery, so as to ensure the reliability of the opening and closing of the charging switching transistor and the discharging switching transistor.

[0032] In some technical solutions, optionally, the microcontroller unit is configured to: during the charging and discharging of the battery, if an alarm signal and / or communication abnormality is detected, obtain the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery; if at least one of the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery is not within the corresponding protection threshold range, control at least one of the clear signal output terminal, the charging signal output terminal, and the discharging signal output terminal of the microcontroller unit to output a low-level signal.

[0033] In this technical solution, during the charging and discharging process of the battery, if an alarm signal and / or communication anomaly is detected, it is considered that an anomaly has occurred during the charging and discharging process of the battery. At this time, the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery are acquired to verify whether there is an anomaly based on the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery.

[0034] Specifically, if at least one of the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery is not within the corresponding protection threshold range, it is considered that there is an anomaly in the charging and discharging of the battery. At this time, at least one of the clear signal output terminal of the driving micro-control unit, the charging signal output terminal of the micro-control unit, and the discharging signal output terminal of the micro-control unit outputs a low-level signal to end the charging and discharging of the battery, thereby ensuring the reliability of the energy storage device.

[0035] In some technical solutions, optionally, the alarm signal includes at least one of the following: cell overvoltage alarm signal, cell undervoltage alarm signal, cell overtemperature alarm signal, equalization overtemperature alarm signal, charging and discharging overcurrent alarm signal, voltage difference alarm signal, switching tube overtemperature alarm signal.

[0036] Among them, the cell overvoltage alarm signal is an alarm signal generated when the cell overvoltage value exceeds the upper limit of the protection threshold range; the cell undervoltage alarm signal is an alarm signal generated when the cell overvoltage value is lower than the lower limit of the overprotection threshold range; the cell overtemperature alarm signal is an alarm signal generated when the cell temperature exceeds the upper limit of the protection threshold range; the equalization overtemperature alarm signal is an alarm signal generated when the temperature difference between cells exceeds the upper limit of the protection threshold range; the charging and discharging overcurrent alarm signal is an alarm signal generated when the charging and discharging current exceeds the upper limit of the protection threshold range during the charging and discharging process; the voltage difference alarm signal is an alarm signal generated when the voltage difference between cells exceeds the upper limit of the protection threshold range, and the switching tube overtemperature alarm signal is an alarm signal generated when the temperature of the switching tube exceeds the upper limit of the protection threshold range.

[0037] Among them, the communication anomaly can be a communication interruption between the micro-control unit and the analog front-end chip.

[0038] In some technical solutions, optionally, the battery includes battery cells, and the microcontroller unit is configured to: if the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery are all within the corresponding protection threshold ranges, the charging signal output terminal, the discharging signal output terminal, and the clearing signal output terminal of the microcontroller unit output high-level signals, and send a first signal to the analog front-end chip; otherwise, control at least one of the charging signal output terminal, the discharging signal output terminal, and the clearing signal output terminal of the microcontroller unit to output a low-level signal, where the battery cell state parameter is the state parameter collected by the analog front-end chip for the battery cells; the analog front-end chip is configured to: when receiving the first signal, if the battery cell state parameter is within the corresponding protection threshold range, the charging signal output terminal, the discharging signal output terminal, and the fault signal output terminal of the analog front-end chip output high-level signals; otherwise, control at least one of the charging signal output terminal, the discharging signal output terminal, and the fault signal output terminal of the analog front-end chip to output a low-level signal; where the battery cell state parameter includes at least one of the following: battery cell voltage value, battery cell current value, battery cell temperature value.

[0039] During this process, the microcontroller unit and the analog front-end chip will respectively detect the current state of the energy storage device and the state of the battery, so as to ensure the reliability of the opening and closing of the charging switching transistor and the discharging switching transistor.

[0040] In some technical solutions, optionally, the microcontroller unit is configured to: during the charging and discharging of the battery, if an alarm signal and / or communication anomaly is detected, obtain the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery; if at least one of the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery is not within the corresponding protection threshold range, at least one of the clearing signal output terminal, the charging signal output terminal, and the discharging signal output terminal of the microcontroller unit outputs a low-level signal.

[0041] In this technical solution, during the charging and discharging of the battery, if an alarm signal and / or communication anomaly is detected, it is considered that an anomaly has occurred during the charging and discharging of the battery. At this time, the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery are obtained to verify whether there is an anomaly based on the battery cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery.

[0042] Specifically, if at least one of the cell state parameter, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery is not within the corresponding protection threshold range, it is considered that there is an abnormality in the battery charging and discharging. At this time, at least one of the clear signal output terminal of the driving microcontroller unit, the charging signal output terminal of the microcontroller unit, and the discharging signal output terminal of the microcontroller unit outputs a low-level signal to end the battery charging and discharging, thereby ensuring the reliability of the energy storage device.

[0043] In some technical solutions, optionally, the microcontroller unit further includes a fault signal input terminal, and the fault signal input terminal is connected to the fault signal output terminal. The analog front-end chip is further configured to: during the battery charging and discharging process, if the cell state parameter is not within the corresponding protection threshold range and / or it is detected that the battery has a discharge short circuit, the fault signal output terminal outputs a low-level signal and transmits the low-level signal to the microcontroller unit; the microcontroller unit is further configured to: if the fault signal input terminal receives a low-level signal, control at least one of the clear signal output terminal of the microcontroller unit, the charging signal output terminal of the microcontroller unit, and the discharging signal output terminal of the microcontroller unit to output a low-level signal.

[0044] In this technical solution, the analog front-end chip judges the cell state parameter, thereby knowing the state of the battery, and feeds back the state of the battery to the microcontroller unit through the connection relationship between the fault signal input terminal and the fault signal output terminal for the microcontroller unit to determine the level signal output by the clear signal output terminal, the charging signal output terminal of the microcontroller unit, and the discharging signal output terminal of the microcontroller unit.

[0045] In this process, when the analog front-end chip detects an abnormality in the battery, it can timely control the charging switch transistor and the discharging switch transistor to turn off, thereby reducing the probability of damage to the charging switch transistor and the discharging switch transistor and improving the reliability of the control circuit of the energy storage device.

[0046] In some technical solutions, optionally, the battery having a discharge short circuit can be understood as that the positive output terminal is short-circuited with the negative output terminal during the battery discharging process.

[0047] In some technical solutions, optionally, the microcontroller unit is further configured to transmit configuration parameters to the analog front-end chip; wherein, upon receiving the configuration parameters, the analog front-end chip configures the protection threshold range corresponding to the cell state parameter based on the configuration parameters.

[0048] In this technical solution, the protection threshold range used in the analog front-end chip can be configured by the microcontroller unit. In this process, the user can configure the analog front-end chip during the configuration of the microcontroller unit, so as to improve the configuration efficiency of the control circuit of the energy storage device.

[0049] In some technical solutions, the configuration parameters include the protection threshold range corresponding to the cell state parameters.

[0050] In some technical solutions, optionally, the control circuit of the energy storage device further includes: a fuse, connected in series between the positive electrode of the battery and the positive electrode output terminal.

[0051] In this technical solution, by setting the fuse, in the case where the discharge current or the charging current of the battery is too large, the connection between the positive electrode output terminal and the positive electrode of the battery can be cut off, thereby protecting the battery and improving the safety of the control circuit of the energy storage device.

[0052] According to the second aspect of the present invention, the present invention provides an energy storage device, including: a positive electrode output terminal; a negative electrode output terminal; a battery, the battery is charged and discharged through the negative electrode output terminal and the positive electrode output terminal; an inverter, the inverter is connected to the positive electrode output terminal and the negative electrode output terminal, and is used for charging and discharging the battery; the control circuit of the energy storage device as described in any one of the above, the control circuit of the energy storage device is connected to the positive electrode output terminal, the negative electrode output terminal and the battery.

[0053] The additional aspects and advantages of the present invention will be partly given in the following description, partly will become obvious from the following description, or will be understood through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The above and / or additional aspects and advantages of the present invention will become obvious and easy to understand from the description of the embodiments in conjunction with the following drawings, wherein:

[0055] Figure 1 Shows a topological schematic diagram of an energy storage device in a related technical solution;

[0056] Figure 2 Shows one of the topological schematic diagrams of an energy storage device in an embodiment of the present invention;

[0057] Figure 3 Shows another topological schematic diagram of an energy storage device in an embodiment of the present invention;

[0058] Figure 4 Shows a third topological schematic diagram of an energy storage device in an embodiment of the present invention.

[0059] Wherein, Figure 1 The corresponding relationship between the reference numerals in the drawings and the component names is as follows:

[0060] 200’ energy storage device, 202’ battery, PACK+ positive electrode output terminal, PACK- negative electrode output terminal, F fuse, 102’ switching tube, 104’ analog front-end chip, 106’ micro control unit, 108’ pre-charge circuit, 110’ feedback circuit, 112’ drive circuit.

[0061] Among them, Figures 2 to 4 The corresponding relationship between the reference numerals in the drawings and the component names is as follows:

[0062] The control circuit of the energy storage device 100, the energy storage device 200, the battery 202, the positive output terminal PACK+, the negative output terminal PACK-, the switching transistor 102, the analog front-end chip 104, the microcontroller unit 106, the first AND gate 108, the first sub-AND gate 1082, the second sub-AND gate 1084, the second AND gate 114, the third AND gate 116, the battery cell Cn, the flip-flop 110, the first flip-flop 1102, the second flip-flop 1104, the drive circuit 112, the first drive circuit 1122, the second drive circuit 1124, the charging switch transistor Q1, the discharging switch transistor Q2, the fuse F, the inverter 204, the clock control signal output terminal CLK, the fault signal input terminal ALIN, the fault signal output terminal ALOUT, the charging signal output terminal CHG, the discharging signal output terminal DSG, the clear signal output terminal CLR, and the reset port CL. Detailed implementation manners

[0063] In order to more clearly understand the above aspects, features, and advantages of the present invention, the present invention will be further described in detail below with reference to the drawings and specific implementation manners. It should be noted that, without conflict, the embodiments of the present application and the features in the embodiments may be combined with each other.

[0064] In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention may be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited by the specific embodiments disclosed below.

[0065] In one embodiment of the present application, as Figure 2 、 Figure 3 and Figure 4As shown, a control circuit 100 of an energy storage device is provided. The energy storage device 200 includes a battery 202, a negative output terminal PACK-, and a positive output terminal PACK+. The battery 202 is charged and discharged through the negative output terminal PACK- and the positive output terminal PACK+. The control circuit 100 of the energy storage device includes: a switching transistor 102 connected in series between the negative electrode of the battery 202 and the negative output terminal PACK-; an analog front-end chip 104; a microcontroller unit 106; a first AND gate 108, the first input terminal of the first AND gate 108 is connected to the analog front-end chip 104, and the second input terminal of the first AND gate 108 is connected to the microcontroller unit 106; a flip-flop 110, the input terminal of the flip-flop 110 is connected to the output terminal of the first AND gate 108, and the clock input port of the flip-flop 110 is connected to the microcontroller unit 106; a drive circuit 112, the input terminal of the drive circuit 112 is connected to the output terminal of the flip-flop 110, and the output terminal of the drive circuit 112 is connected to the control terminal of the switching transistor 102 to drive the switching transistor 102 to conduct and cut off.

[0066] The present invention provides a control circuit 100 of an energy storage device. The control circuit 100 of the energy storage device includes a switching transistor 102, an analog front-end chip 104, a microcontroller unit 106, a first AND gate 108, a flip-flop 110, and a drive circuit 112. Among them, the analog front-end chip 104 and the microcontroller unit 106 are respectively connected to the first input terminal and the second input terminal of the first AND gate 108, and can input level signals to the first input terminal and the second input terminal of the first AND gate 108. In this case, the conduction and cut-off of the switching transistor 102 are controlled by two chips, namely, the analog front-end chip 104 and the microcontroller unit 106. In the case where one of the analog front-end chip 104 and the microcontroller unit 106 fails, the switching transistor 102 can still be controlled by the other chip, reducing the probability that the switching transistor 102 cannot be effectively controlled, thereby improving the reliability of the control circuit 100 of the energy storage device.

[0067] In addition, in the case where one of the analog front-end chip 104 and the microcontroller unit 106 is reset, the flip-flop 110 can be used to maintain the normal driving of the drive circuit 112, reducing the probability that the switching transistor 102 suddenly cuts off when the analog front-end chip 104 or the microcontroller unit 106 is reset. In this case, the probability that the switching transistor 102 is damaged is reduced, thereby improving the reliability of the control circuit 100 of the energy storage device.

[0068] In some embodiments, the analog front-end chip 104 is also an analog front-end circuit (Analog Front End, AFE) chip.

[0069] In some embodiments, optionally, the switching transistor 102 includes a charging switching transistor Q1, the first AND gate 108 includes a first sub-AND gate 1082, the driving circuit 112 includes a first driving circuit 1122, the flip-flop 110 includes a first flip-flop 1102, the first input terminal of the first sub-AND gate 1082 is connected to the charging signal output terminal CHG of the analog front-end chip 104, the second input terminal of the first sub-AND gate 1082 is connected to the charging signal output terminal CHG of the microcontroller unit 106, the output terminal of the first sub-AND gate 1082 is connected to the input terminal of the first flip-flop 1102, the output terminal of the first flip-flop 1102 is connected to the input terminal of the first driving circuit 1122, the clock input port of the first flip-flop 1102 is connected to the clock control signal output terminal CLK of the microcontroller unit 106, and the output terminal of the first driving circuit 1122 is connected to the control terminal of the charging switching transistor Q1; and / or the switching transistor 102 includes a discharging switching transistor Q2, the first AND gate 108 includes a second sub-AND gate 1084, the driving circuit 112 includes a second driving circuit 1124, the flip-flop 110 includes a second flip-flop 1104, the first input terminal of the second sub-AND gate 1084 is connected to the discharging signal output terminal DSG of the analog front-end chip 104, the second input terminal of the second sub-AND gate 1084 is connected to the discharging signal output terminal DSG of the microcontroller unit 106, the output terminal of the second sub-AND gate 1084 is connected to the input terminal of the second flip-flop 1104, the output terminal of the second flip-flop 1104 is connected to the input terminal of the second driving circuit 1124, the clock input port of the second flip-flop 1104 is connected to the clock control signal output terminal CLK of the microcontroller unit 106, and the output terminal of the second driving circuit 1124 is connected to the control terminal of the discharging switching transistor Q2.

[0070] In this embodiment, the switching transistor 102 may include a charging switching transistor Q1, may include a discharging switching transistor Q2, or may include both a charging switching transistor Q1 and a discharging switching transistor Q2.

[0071] Wherein, according to the selection of the charging switching transistor Q1 and the discharging switching transistor Q2, the first AND gate 108 may include a first sub-AND gate 1082 and a second sub-AND gate 1084. At the same time, the driving circuit 112 correspondingly includes a first driving circuit 1122 and a second driving circuit 1124, and the flip-flop 110 includes a first flip-flop 1102 and a second flip-flop 1104.

[0072] In this process, different switching transistors 102 can be controlled by driving different driving circuits 112 and different flip-flops 110.

[0073] In some embodiments, optionally, the flip-flop 110 is a D flip-flop.

[0074] Table 1 shows the working logic schematic table of the D flip-flop, as shown in Table 1:

[0075] Table 1

[0076]

[0077] Among them, INPUT is the input of the D flip-flop, OUTPUT is the output of the D flip-flop, CL represents the reset port of the D flip-flop, CLK is the clock input port of the D flip-flop, D is the input terminal of the D flip-flop, Q is the output terminal of the D flip-flop, H represents a high-level signal, L represents a low-level signal, ↑ represents that the clock signal changes from a low-level signal to a high-level state, H or L represents that the clock input port maintains a high-level signal or a low-level signal, X represents any level state, where any level state is a high-level signal or a low-level signal, and Q 0 represents the original state of the D flip-flop.

[0078] In some embodiments, optionally, the control circuit 100 of the energy storage device further includes: a second AND gate 114, a first input terminal of the second AND gate 114 is connected to the fault signal output terminal ALOUT of the analog front-end chip 104, a second input terminal of the second AND gate 114 is connected to the charging signal output terminal CHG of the analog front-end chip 104, a third input terminal of the second AND gate 114 is connected to the clear signal output terminal CLR of the microcontroller unit 106, and an output terminal of the second AND gate 114 is connected to the reset port CL of the first flip-flop 1102; and / or a third AND gate 116, a first input terminal of the third AND gate 116 is connected to the fault signal output terminal ALOUT of the analog front-end chip 104, a second input terminal of the third AND gate 116 is connected to the discharge signal output terminal DSG of the analog front-end chip 104, a third input terminal of the third AND gate 116 is connected to the clear signal output terminal CLR of the microcontroller unit 106, and an output terminal of the third AND gate 116 is connected to the reset port CL of the second flip-flop 1104.

[0079] In this embodiment, the second AND gate 114 can perform an AND operation on the level signals output by the fault signal output terminal ALOUT of the analog front-end chip 104, the clear signal output terminal CLR of the microcontroller unit 106, and the charging signal output terminal CHG of the analog front-end chip 104, and output the level signal after the AND operation. At this time, the first flip-flop 1102 determines whether to reset according to the level signal output by the output terminal of the second AND gate 114, so as to control the level signal output by the output terminal of the first flip-flop 1102.

[0080] During this process, the first flip-flop 1102 can be used to indirectly control the charging switch transistor Q1. When one or more of the fault signal output terminal ALOUT of the analog front-end chip 104, the clear signal output terminal CLR of the microcontroller unit 106, and the charging signal output terminal CHG of the analog front-end chip 104 output low-level signals, the first flip-flop 1102 can be controlled to reset, thereby controlling the charging switch transistor Q1 to turn off, so as to improve the reliability of the control circuit 100 of the energy storage device.

[0081] Similarly, the third AND gate 116 can perform an AND operation on the level signals output by the fault signal output terminal ALOUT of the analog front-end chip 104, the clear signal output terminal CLR of the microcontroller unit 106, and the discharge signal output terminal DSG of the analog front-end chip 104, and output the level signal after the AND operation. At this time, the second flip-flop 1104 determines whether to reset according to the level signal output by the output terminal of the third AND gate 116, so as to control the level signal output by the output terminal of the second flip-flop 1104.

[0082] During this process, the second flip-flop 1104 can be used to indirectly control the discharge switch transistor Q2. When one or more of the fault signal output terminal ALOUT of the analog front-end chip 104, the clear signal output terminal CLR of the microcontroller unit 106, and the discharge signal output terminal DSG of the analog front-end chip 104 output low-level signals, the second flip-flop 1104 can be controlled to reset, thereby controlling the discharge switch transistor Q2 to turn off, so as to improve the reliability of the control circuit 100 of the energy storage device.

[0083] In some embodiments, optionally, based on the charging signal output terminal CHG of the analog front-end chip 104 and the charging signal output terminal CHG of the microcontroller unit 106 outputting high-level signals, the first sub-AND gate 1082 outputs a high-level signal, and the first driving circuit 1122 responds to the high-level signal and drives the charging switch transistor Q1 to conduct; based on the discharge signal output terminal DSG of the analog front-end chip 104 and the discharge signal output terminal DSG of the microcontroller unit 106 outputting high-level signals, the second sub-AND gate 1084 outputs a high-level signal, and the second driving circuit 1124 responds to the high-level signal and drives the discharge switch transistor Q2 to conduct.

[0084] In some embodiments, optionally, based on one or both of the charging signal output terminal CHG of the analog front-end chip 104 and the charging signal output terminal CHG of the microcontroller unit 106 outputting a low-level signal, the first sub AND gate 1082 outputs a low-level signal, and the first drive circuit 1122 responds to the low-level signal to drive the charging switch transistor Q1 to turn off; based on one or both of the discharging signal output terminal DSG of the analog front-end chip 104 and the discharging signal output terminal DSG of the microcontroller unit 106 outputting a low-level signal, the second sub AND gate 1084 outputs a low-level signal, and the second drive circuit 1124 responds to the low-level signal to drive the discharging switch transistor Q2 to turn off.

[0085] In this embodiment, for the charging switch transistor Q1 and the discharging switch transistor Q2, they can conduct when the analog front-end chip 104 and the microcontroller unit 106 output the same high-level signal, and when one or both of the analog front-end chip 104 and the microcontroller unit 106 output a low-level signal, it controls the charging switch transistor Q1 and the discharging switch transistor Q2 to turn off, so that the conduction and cutoff of the charging switch transistor Q1 are simultaneously controlled by the analog front-end chip 104 and the microcontroller unit 106. Compared with the scheme of using a single chip for control, the reliability of the control circuit 100 of the energy storage device is improved.

[0086] In some embodiments, optionally, based on one or more of the fault signal output terminal ALOUT of the analog front-end chip 104, the charging signal output terminal CHG of the analog front-end chip 104, and the clear signal output terminal CLR of the microcontroller unit 106 outputting a low-level signal, the output terminal of the second AND gate 114 outputs a low-level signal, and the first flip-flop 1102 responds to the low-level signal and drives the charging switch transistor Q1 to turn off through the first drive circuit 1122; based on one or more of the fault signal output terminal ALOUT of the analog front-end chip 104, the discharging signal output terminal DSG of the analog front-end chip 104, and the clear signal output terminal CLR of the microcontroller unit 106 outputting a low-level signal, the output terminal of the third AND gate 116 outputs a low-level signal, and the second flip-flop 1104 responds to the low-level signal and drives the discharging switch transistor Q2 to turn off through the second drive circuit 1124.

[0087] In this embodiment, the first flip-flop 1102 can be used to indirectly control the charging switch transistor Q1. When one or more of the fault signal output terminal ALOUT of the analog front-end chip 104, the clear signal output terminal CLR of the microcontroller unit 106, and the charging signal output terminal CHG of the analog front-end chip 104 output a low-level signal, the first flip-flop 1102 can be controlled to reset, and then the charging switch transistor Q1 is controlled to turn off, thereby improving the reliability of the control circuit 100 of the energy storage device.

[0088] Similarly, the second flip-flop 1104 can be used to indirectly control the discharge switch tube Q2. When a low-level signal is output at one or more of the fault signal output terminal ALOUT of the analog front-end chip 104, the clear signal output terminal CLR of the microcontroller unit 106, and the discharge signal output terminal DSG of the analog front-end chip 104, the second flip-flop 1104 can be controlled to reset, thereby controlling the discharge switch tube Q2 to cut off, so as to improve the reliability of the control circuit 100 of the energy storage device.

[0089] In some embodiments, optionally, the battery 202 includes battery cells Cn. The microcontroller unit 106 is configured to: if the battery cell state parameter, the temperature value of the switch tube 102, the ambient temperature value, and the output voltage of the battery 202 are all within the corresponding protection threshold ranges, the charging signal output terminal CHG and the discharge signal output terminal DSG of the microcontroller unit 106 output high-level signals and send a first signal to the analog front-end chip 104; otherwise, output low-level signals, where the battery cell state parameter is the state parameter collected by the analog front-end chip 104 for the battery cells; the analog front-end chip 104 is configured to: when receiving the first signal, if the battery cell state parameter is within the corresponding protection threshold range, the charging signal output terminal CHG and the discharge signal output terminal DSG of the analog front-end chip 104 output high-level signals; otherwise, output low-level signals; where the battery cell state parameter includes at least one of the following: the battery cell voltage value, the battery cell current value, and the battery cell temperature value.

[0090] In this embodiment, the microcontroller unit 106 can obtain the battery cell state parameter from the analog front-end chip 104. After obtaining the battery cell state parameter, the microcontroller unit 106 compares the battery cell state parameter, the temperature value of the switch tube 102, the ambient temperature value, and the output voltage of the battery 202 with the corresponding protection threshold ranges respectively. If the battery cell state parameter, the temperature value of the switch tube 102, the ambient temperature value, and the output voltage of the battery 202 are all within the corresponding protection threshold ranges, it is considered that the current state of the energy storage device 200 is normal. At this time, the charging signal output terminal CHG and the discharge signal output terminal DSG of the microcontroller unit 106 output high-level signals to control the charging switch tube Q1 and the discharge switch tube Q2 to conduct. At the same time, by outputting the first signal, the analog front-end chip 104 is informed through the first signal that high-level signals need to be output.

[0091] When the analog front-end chip 104 receives the first signal, it will compare the battery cell state parameter with the corresponding protection threshold range, and output a high-level signal when the battery cell state parameter is within the corresponding protection threshold range.

[0092] During this process, the micro - control unit 106 and the analog front - end chip 104 will respectively detect the current state of the energy storage device 200 and the state of the battery 202, so as to ensure the reliability of the opening and closing of the charging switch transistor Q1 and the discharging switch transistor Q2.

[0093] In some embodiments, optionally, the micro - control unit 106 is configured to: during the charging and discharging of the battery 202, if an alarm signal and / or communication anomaly is detected, obtain the cell state parameters, the temperature value of the switch transistor, the ambient temperature value, and the output voltage of the battery 202; if at least one of the cell state parameters, the temperature value of the switch transistor, the ambient temperature value, and the output voltage of the battery 202 is not within the corresponding protection threshold range, control at least one of the clear signal output terminal CLR, the charging signal output terminal CHG, and the discharging signal output terminal DSG of the micro - control unit 106 to output a low - level signal.

[0094] In this embodiment, during the charging and discharging of the battery 202, if an alarm signal and / or communication anomaly is detected, it is considered that an anomaly has occurred during the charging and discharging of the battery 202. At this time, the cell state parameters, the temperature value of the switch transistor, the ambient temperature value, and the output voltage of the battery 202 are obtained to verify whether there is an anomaly based on the cell state parameters, the temperature value of the switch transistor, the ambient temperature value, and the output voltage of the battery 202.

[0095] Specifically, if at least one of the cell state parameters, the temperature value of the switch transistor, the ambient temperature value, and the output voltage of the battery 202 is not within the corresponding protection threshold range, it is considered that there is an anomaly in the charging and discharging of the battery 202. At this time, drive at least one of the clear signal output terminal CLR, the charging signal output terminal CHG, and the discharging signal output terminal DSG of the micro - control unit 106 to output a low - level signal to end the charging and discharging of the battery 202, so as to ensure the reliability of the energy storage device.

[0096] In some embodiments, optionally, the alarm signal includes at least one of the following: cell over - voltage alarm signal, cell under - voltage alarm signal, cell temperature over - temperature alarm signal, equalization temperature over - temperature alarm signal, charging and discharging current over - current alarm signal, voltage difference alarm signal, switch transistor temperature over - temperature alarm signal.

[0097] Among them, the cell overvoltage warning signal is a warning signal generated when the cell overvoltage value exceeds the upper limit of the protection threshold range; the cell undervoltage warning signal is a warning signal generated when the cell overvoltage value is lower than the lower limit of the overprotection threshold range; the cell temperature overheating warning signal is a warning signal generated when the cell temperature exceeds the upper limit of the protection threshold range; the equalization temperature overheating warning signal is a warning signal generated when the temperature difference between cells exceeds the upper limit of the protection threshold range; the charge and discharge current overcurrent warning signal is a warning signal generated when the charge and discharge current exceeds the upper limit of the protection threshold range during the charge and discharge process; the voltage difference warning signal is a warning signal generated when the voltage difference between cells exceeds the upper limit of the protection threshold range, and the switching transistor temperature overheating warning signal is a warning signal generated when the temperature of the switching transistor exceeds the upper limit of the protection threshold range.

[0098] Among them, the communication anomaly can be an interruption in communication between the microcontroller unit 106 and the analog front-end chip 104.

[0099] In some embodiments, optionally, the battery 202 includes cells, and the microcontroller unit 106 is configured to: if the cell state parameters, the temperature value of the switching transistor, the ambient temperature value, and the output voltage of the battery 202 are all within the corresponding protection threshold ranges, the charging signal output terminal CHG of the microcontroller unit 106, the discharging signal output terminal DSG of the microcontroller unit 106, and the clearing signal output terminal CLR of the microcontroller unit 106 output high-level signals, and send a first signal to the analog front-end chip 104; otherwise, control at least one of the charging signal output terminal CHG of the microcontroller unit 106, the discharging signal output terminal DSG of the microcontroller unit 106, and the clearing signal output terminal CLR of the microcontroller unit 106 to output a low-level signal, where the cell state parameters are the state parameters collected by the analog front-end chip 104 for the cells; the analog front-end chip 104 is configured to: in the case of receiving the first signal, if the cell state parameters are within the corresponding protection threshold ranges, the charging signal output terminal CHG of the analog front-end chip 104, the discharging signal output terminal DSG of the analog front-end chip 104, and the fault signal output terminal ALOUT of the analog front-end chip 104 output high-level signals; otherwise, control at least one of the charging signal output terminal CHG of the analog front-end chip 104, the discharging signal output terminal DSG of the analog front-end chip 104, and the fault signal output terminal ALOUT of the analog front-end chip 104 to output a low-level signal; where the cell state parameters include at least one of the following: cell voltage value, cell current value, cell temperature value.

[0100] During this process, the microcontroller unit 106 and the analog front-end chip 104 will respectively detect the current state of the energy storage device and the state of the battery 202, so as to ensure the reliability of the opening and closing of the charging switch transistor and the discharging switch transistor.

[0101] In some embodiments, optionally, the microcontroller unit 106 is configured to: during the charging and discharging of the battery 202, if an alarm signal and / or communication anomaly is detected, obtain the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery 202; if at least one of the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery 202 is not within the corresponding protection threshold range, at least one of the clear signal output terminal CLR of the microcontroller unit 106, the charging signal output terminal CHG of the microcontroller unit 106, and the discharging signal output terminal DSG of the microcontroller unit 106 outputs a low-level signal.

[0102] In this embodiment, during the charging and discharging of the battery 202, if an alarm signal and / or communication anomaly is detected, it is considered that an anomaly has occurred during the charging and discharging of the battery 202. At this time, the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery 202 are obtained to verify whether there is an anomaly based on the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery 202.

[0103] Specifically, if at least one of the cell state parameters, the temperature value of the switching tube, the ambient temperature value, and the output voltage of the battery 202 is not within the corresponding protection threshold range, it is considered that there is an anomaly in the charging and discharging of the battery 202. At this time, at least one of the clear signal output terminal CLR of the driving microcontroller unit 106, the charging signal output terminal CHG of the microcontroller unit 106, and the discharging signal output terminal DSG of the microcontroller unit 106 outputs a low-level signal to end the charging and discharging of the battery 202, thereby ensuring the reliability of the energy storage device.

[0104] In some embodiments, optionally, the microcontroller unit 106 further includes a fault signal input terminal ALIN, the fault signal input terminal ALIN is connected to the fault signal output terminal ALOUT, and the analog front-end chip 104 is further configured to: during the charging and discharging of the battery 202, if the cell state parameters are not within the corresponding protection threshold range and / or a discharge short circuit of the battery is detected, the fault signal output terminal ALOUT outputs a low-level signal and transmits the low-level signal to the microcontroller unit 106; the microcontroller unit 106 is further configured to: if the fault signal input terminal ALIN receives a low-level signal, control at least one of the clear signal output terminal CLR of the microcontroller unit 106, the charging signal output terminal CHG of the microcontroller unit 106, and the discharging signal output terminal DSG of the microcontroller unit 106 to output a low-level signal.

[0105] In this embodiment, the analog front-end chip 104 determines the state of the battery cell by judging the battery cell state parameters, thereby knowing the state of the battery 202, and feeds back the state of the battery 202 to the microcontroller unit 106 through the connection relationship between the fault signal input terminal ALIN and the fault signal output terminal ALOUT, so that the microcontroller unit 106 can determine the level signals output by the clear signal output terminal CLR, the charging signal output terminal CHG of the microcontroller unit 106, and the discharge signal output terminal DSG of the microcontroller unit 106.

[0106] During this process, when the analog front-end chip 104 detects an abnormality in the battery 202, the charging switch transistor Q1 and the discharge switch transistor Q2 can be timely controlled to turn off, thereby reducing the probability of damage to the charging switch transistor Q1 and the discharge switch transistor Q2, and improving the reliability of the control circuit 100 of the energy storage device.

[0107] In some embodiments, optionally, the existence of a discharge short circuit in the battery 202 can be understood as that during the discharge process of the battery 202, the positive output terminal PACK+ is short-circuited with the negative output terminal PACK-.

[0108] In some embodiments, optionally, the microcontroller unit 106 is further configured to transmit configuration parameters to the analog front-end chip 104; wherein, upon receiving the configuration parameters, the analog front-end chip 104 configures the protection threshold interval corresponding to the battery cell state parameters based on the configuration parameters.

[0109] In this embodiment, the microcontroller unit 106 can be used to configure the protection threshold interval used in the analog front-end chip 104. During this process, the user can configure the microcontroller unit 106 to implement the configuration of the analog front-end chip 104, thereby improving the configuration efficiency of the control circuit 100 of the energy storage device.

[0110] In some embodiments, the configuration parameters include the protection threshold interval corresponding to the battery cell state parameters.

[0111] In some embodiments, optionally, the microcontroller unit 106 and the analog front-end chip 104 are connected through an I2C bus, a universal asynchronous receiver / transmitter, or a serial peripheral interface.

[0112] Among them, the I2C (Inter-Integrated Circuit) bus is a simple, two-way, two-wire synchronous serial bus. It only requires two wires to transmit information between the devices connected to the bus.

[0113] Among them, the universal asynchronous receiver / transmitter (UART) is a universal serial data bus.

[0114] Among them, the Serial Peripheral Interface (SPI) is a synchronous peripheral interface.

[0115] Specifically, for the analog front-end chip 104, the microcontroller unit 106 first configures protection parameters for the analog front-end chip 104. Among them, the protection parameters are the protection threshold intervals corresponding to the battery cell state parameters in this application, and the protection parameters are respectively used for overvoltage protection, undervoltage protection, over-temperature protection of the battery cell, overcurrent protection during charge and discharge, and battery short-circuit protection. The configuration parameters also include the switching control configuration of the switching tube 102 and the fault alarm parameters. When the battery 202 is powered on, the analog front-end chip 104 and the microcontroller unit 106 complete configuration initialization. When the microcontroller unit 106 detects that the system function is normal, the microcontroller unit 106 will send a first signal to the analog front-end chip 104, requesting the switching tube 102 to close and power on. When the analog front-end chip 104 receives the command from the microcontroller unit 106, it will collect data and judge according to the parameters configured by the analog front-end chip 104. If the data collected by the analog front-end chip 104 is normal, the analog front-end chip 104 outputs a high-level signal to the first AND gate 108, and then the first AND gate 108 outputs a high-level signal to control the input signal of the flip-flop 110. At this time, the microcontroller unit 106 outputs a rising-edge level signal through the clock input port of the flip-flop 110, and the flip-flop 110 will output a high-level signal to control the drive circuit 112, so that the charging switching tube Q1 and the discharging switching tube Q2 are turned on.

[0116] For the microcontroller unit 106, when the battery 202 is powered on, after the microcontroller unit 106 initializes and detects that the function is normal, the microcontroller unit 106 establishes communication with the analog front-end chip 104. The analog front-end chip 104 collects the battery cell voltage value, battery cell current value, and battery cell temperature value, and sends these parameters to the microcontroller unit 106. The microcontroller unit 106 judges whether the data is normal through data analysis. The microcontroller unit 106 judges whether the power-on is normal through the battery cell voltage value, battery cell current value, and battery cell temperature value sampled and sent by the analog front-end chip 104, as well as the temperature value of the switching tube 102, ambient temperature value, and output voltage of the battery 202 sampled by the microcontroller unit 106 itself. If it is detected that the data sampled by the microcontroller unit 106 is normal, the microcontroller unit 106 outputs a high-level signal to the first AND gate 108, and then the first AND gate 108 outputs a high-level signal to control the input signal of the flip-flop 110. At the same time, the microcontroller unit 106 outputs a rising-edge level signal through the clock input port of the flip-flop 110, and the flip-flop 110 will output a high-level signal to control the drive circuit 112, so that the charging switching tube Q1 and the discharging switching tube Q2 are turned on.

[0117] In this embodiment, the micro-control unit 106 and the analog front-end chip 104 simultaneously output high-level signals as the input signals of the first AND gate 108, jointly determining that the first AND gate 108 outputs a high-level signal, and only then can the switching transistor 102 be turned on, thereby realizing the dual-drive control to turn on the switching transistor 102.

[0118] For the analog front-end chip 104, during the charging and discharging process of the battery 202, if the cell state parameters are not within the corresponding protection threshold range, such as the cell voltage exceeding the permanent overvoltage threshold, the cell voltage being lower than the permanent undervoltage threshold, the discharge current exceeding the overload current, the cell temperature exceeding the permanent failure temperature threshold, or the battery 202 discharging and short-circuiting and failing, the fault signal output terminal ALOUT outputs a low-level signal, and the second AND gate 114 and the third AND gate 116 will output low-level signals, causing the reset port CL of the flip-flop 110 to be triggered, and the flip-flop 110 outputs a low-level signal to control the drive circuit 112, turning off the charging switching transistor Q1 and the discharging switching transistor Q2.

[0119] Among them, the low-level signal output by the fault signal output terminal ALOUT can be understood as the alarm signal ALERT.

[0120] For the micro-control unit 106, when the battery 202 is charging and discharging, if there are cell overvoltage level 2 alarms, undervoltage level 2 alarms, cell temperature over-temperature level 2 alarms, equalization temperature over-temperature alarms, charging and discharging current level 2 overcurrent alarms, voltage difference level 2 alarms, switching transistor 102 over-temperature alarms, communication anomalies, the micro-control unit 106 will compare the sampled cell state parameters of the battery 202, the temperature value of the switching transistor 102, the ambient temperature value, and the output voltage of the battery 202 with the protection thresholds set by the micro-control unit 106, that is, compare the cell state parameters, the temperature value of the switching transistor 102, the ambient temperature value, and the output voltage of the battery 202 with the corresponding protection threshold ranges respectively. If one or more of the cell state parameters, the temperature value of the switching transistor 102, the ambient temperature value, and the output voltage of the battery 202 are not within the corresponding protection threshold ranges, the clear signal output terminal CLR of the micro-control unit 106 outputs a low-level signal, and under the action of the flip-flop 110, controls the switching transistor 102 and the discharging switching transistor Q2 to turn off.

[0121] Or when one or more of the cell state parameters, the temperature value of the switching transistor 102, the ambient temperature value, and the output voltage of the battery 202 are not within the corresponding protection threshold ranges, the micro-control unit 106 outputs a low-level signal to the first AND gate 108, controls the flip-flop 110 to output a rising-edge level signal, and controls the switching transistor 102 and the discharging switching transistor Q2 to turn off.

[0122] In some embodiments, since the analog front-end chip 104 has a high sampling accuracy for the battery cell voltage, with 24-bit high-precision sampling used in the internal analog-to-digital conversion and the battery cell voltage sampling error controlled within 5 mV, it is possible to make the protection or control have higher accuracy. At the same time, the analog front-end chip 104 uses 32-bit high-precision current sampling, which can implement configurable hardware over-current protection parameters.

[0123] In some embodiments, in terms of the protection strategy, the microcontroller unit 106 is given priority in fault protection. When the protection fault strategy of the microcontroller unit 106 fails, the hardware protection of the analog front-end chip 104 serves as the last line of defense for the battery 202 fault protection to protect the safety of the battery 202.

[0124] Among them, the microcontroller unit 106 realizes the acquisition of the battery cell voltage value, battery cell current value, and battery cell temperature value of the battery 202, and realizes the communication logic with external devices, the parallel connection between batteries 202, and the function of energy scheduling management. When the battery 202 has a battery cell overvoltage level 2 alarm, undervoltage level 2 alarm, battery cell temperature overheat level 2 alarm, equalization temperature overheat alarm, charge and discharge current level 2 overcurrent alarm, voltage difference level 2 alarm, overheat alarm of the switching tube 102, or communication anomaly, the microcontroller unit 106 is preferentially used for fault protection.

[0125] In some embodiments, optionally, the control circuit 100 of the energy storage device further includes: a fuse F, which is connected in series between the positive electrode of the battery 202 and the positive electrode output terminal PACK+.

[0126] In this embodiment, by setting the fuse F, in the case where the discharge current or charge current of the battery 202 is too large, the connection between the positive electrode output terminal PACK+ and the positive electrode of the battery 202 can be cut off, thereby protecting the battery 202 and improving the safety of the control circuit 100 of the energy storage device.

[0127] In one of the embodiments, the present invention provides an energy storage device, including: a positive electrode output terminal PACK+; a negative electrode output terminal PACK-; a battery 202, which is charged and discharged through the negative electrode output terminal PACK- and the positive electrode output terminal PACK+; an inverter 204, which is connected to the positive electrode output terminal PACK+ and the negative electrode output terminal PACK- and is used for charging and discharging the battery; the control circuit of the energy storage device as described in any one of the above, and the control circuit of the energy storage device is connected to the positive electrode output terminal PACK+, the negative electrode output terminal PACK-, and the battery 202.

[0128] In this embodiment, the inverter 204 can convert the direct current in the battery 202 into alternating current and output it externally. It can also receive alternating current and convert it into direct current for storage in the battery 202. Additionally, it can be connected to a photovoltaic panel to receive the direct current generated by the photovoltaic conversion of the photovoltaic panel and store it in the battery 202.

[0129] In one embodiment, the energy storage device 200 can be a household energy storage device or an outdoor portable energy storage device.

[0130] The terms "first" and "second" in the description and claims of this application may explicitly or implicitly include one or more of such features. In the written description of the present invention, unless otherwise specified, the meaning of "a plurality" is two or more. Additionally, "and / or" in the description and claims means at least one of the connected objects. The character " / ", generally, indicates that the related objects before and after are in an "or" relationship.

[0131] In the written description of the present invention, it can be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the embodiments of the present invention and simplifying the description of the embodiments of the present invention, rather than indicating or implying that the structures, devices, and elements referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, these descriptions should not be construed as limitations on the present invention.

[0132] In the written description of the present invention, it can be understood that, except for clear regulations and limitations, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it can be fixedly connected, detachably connected, or integrally connected; it can be a mechanical structure connection or an electrical connection; it can be a direct connection between the two, or an indirect connection between the two through an intermediate medium, and it can be the communication inside the two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0133] In the claims, specification and drawings of the present invention, the descriptions of terms such as "one embodiment", "some embodiments", "specific embodiments", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In the claims, specification and drawings of the present invention, the schematic representations of the above terms do not necessarily refer to the same embodiment or instance. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0134] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A control circuit for an energy storage device, characterized in that: The energy storage device comprises a battery, a negative output terminal and a positive output terminal, the battery is charged and discharged through the negative output terminal and the positive output terminal, and the control circuit of the energy storage device comprises: A switch tube, connected in series between the negative electrode of the battery and the negative electrode output terminal; Analog front-end chip; Micro control unit; A first AND gate, wherein a first input end of the first AND gate is connected to the analog front-end chip, and a second input end of the first AND gate is connected to the micro control unit; A trigger, wherein an input end of the trigger is connected to an output end of the first AND gate, and a clock input port of the trigger is connected to the micro control unit; A driving circuit, wherein the input end of the driving circuit is connected to the output end of the trigger, and the output end of the driving circuit is connected to the control end of the switch tube to drive the switch tube to be turned on and off; The switch tube includes a charging switch tube; the switch tube includes a discharging switch tube; The trigger includes a first trigger, and the trigger includes a second trigger; The driving circuit includes a first driving circuit, and the driving circuit includes a second driving circuit; The output end of the first trigger is connected to the input end of the first drive circuit, and the output end of the first drive circuit is connected to the control end of the charging switch tube; The output end of the second trigger is connected to the input end of the second drive circuit, and the output end of the second drive circuit is connected to the control end of the discharge switch tube; The control circuit of the energy storage device also includes: a second AND gate, wherein a first input terminal of the second AND gate is connected to a fault signal output terminal of the analog front-end chip, a second input terminal of the second AND gate is connected to a charging signal output terminal of the analog front-end chip, a third input terminal of the second AND gate is connected to a clear signal output terminal of the microcontroller unit, and an output terminal of the second AND gate is connected to a reset port of the first trigger; and / or A third AND gate, wherein the first input terminal of the third AND gate is connected to the fault signal output terminal of the analog front-end chip, the second input terminal of the third AND gate is connected to the discharge signal output terminal of the analog front-end chip, the third input terminal of the third AND gate is connected to the clear signal output terminal of the micro control unit, and the output terminal of the third AND gate is connected to the reset port of the second trigger.

2. The control circuit of the energy storage device according to claim 1, characterized in that: The first AND gate includes a first sub-AND gate, a first input end of the first sub-AND gate is connected to the charging signal output end of the analog front-end chip, a second input end of the first sub-AND gate is connected to the charging signal output end of the micro control unit, an output end of the first sub-AND gate is connected to the input end of the first trigger, and a clock input port of the first trigger is connected to the clock control signal output end of the micro control unit; and / or The first AND gate includes a second sub-AND gate, a first input end of the second sub-AND gate is connected to the discharge signal output end of the analog front-end chip, a second input end of the second sub-AND gate is connected to the discharge signal output end of the micro control unit, an output end of the second sub-AND gate is connected to the input end of the second trigger, and a clock input port of the second trigger is connected to the clock control signal output end of the micro control unit.

3. The control circuit of the energy storage device according to claim 2, characterized in that: Based on the charging signal output terminal of the analog front-end chip and the charging signal output terminal of the micro control unit outputting a high level signal, the first sub-AND gate outputs the high level signal, and the first driving circuit drives the charging switch tube to conduct in response to the high level signal; Based on the discharge signal output end of the analog front-end chip and the discharge signal output end of the micro control unit outputting a high level signal, the second sub-AND gate outputs a high level signal, and the second driving circuit drives the discharge switch tube to conduct in response to the high level signal.

4. The control circuit of the energy storage device according to claim 2, characterized in that: Based on one or both of the charging signal output terminal of the analog front-end chip and the charging signal output terminal of the micro control unit outputting a low-level signal, the first sub-AND gate outputs the low-level signal, and the first driving circuit drives the charging switch tube to be turned off in response to the low-level signal; Based on that one or both of the discharge signal output terminals of the analog front-end chip and the discharge signal output terminals of the micro control unit output a low-level signal, the second sub-AND gate outputs the low-level signal, and the second drive circuit drives the discharge switch tube to be cut off in response to the low-level signal.

5. The control circuit of the energy storage device according to claim 1, characterized in that: Based on one or more of the fault signal output terminal of the analog front-end chip, the charging signal output terminal of the analog front-end chip, and the clear signal output terminal of the micro control unit outputting a low-level signal, the output terminal of the second AND gate outputs the low-level signal, and the first trigger drives the charging switch tube to be turned off through the first driving circuit in response to the low-level signal; Based on one or more output low-level signals from the fault signal output terminal of the analog front-end chip, the discharge signal output terminal of the analog front-end chip, and the clear signal output terminal of the microcontroller unit, the output terminal of the third AND gate outputs the low-level signal, and the second trigger responds to the low-level signal to drive the discharge switch tube to be cut off through the second drive circuit.

6. The control circuit of the energy storage device according to claim 3, characterized in that: The battery comprises a battery cell, and the micro control unit is used for: If the cell state parameter, the temperature value of the switch tube, the ambient temperature value and the output voltage of the battery are all within the corresponding protection threshold interval, the charging signal output terminal of the microcontroller unit and the discharging signal output terminal of the microcontroller unit output a high level signal and send a first signal to the analog front-end chip, otherwise a low level signal is output, wherein the cell state parameter is a state parameter acquired by the analog front-end chip from the cell; The analog front-end chip is used for: When the first signal is received, if the cell state parameter is within the corresponding protection threshold interval, the charging signal output terminal of the analog front-end chip and the discharging signal output terminal of the analog front-end chip output a high level signal, otherwise a low level signal is output; The battery cell status parameter includes at least one of the following: Battery cell voltage value, battery cell current value, battery cell temperature value.

7. The control circuit of the energy storage device according to claim 6, characterized in that: The micro control unit is used for: During the process of charging and discharging the battery, if an alarm signal and / or communication abnormality is detected, obtaining the battery cell state parameter, the temperature value of the switch tube, the ambient temperature value and the output voltage of the battery; If at least one of the cell state parameter, the temperature value of the switch tube, the ambient temperature value and the output voltage of the battery is not in the corresponding protection threshold interval, at least one of the clear signal output terminal of the microcontroller unit, the charging signal output terminal of the microcontroller unit and the discharge signal output terminal of the microcontroller unit is controlled to output the low level signal.

8. The control circuit of the energy storage device according to claim 5, characterized in that: The battery comprises a battery cell, and the micro control unit is used for: If the cell state parameter, the temperature value of the switch tube, the ambient temperature value and the output voltage of the battery are all in the corresponding protection threshold interval, the charging signal output terminal of the microcontroller unit, the discharging signal output terminal of the microcontroller unit and the clearing signal output terminal of the microcontroller unit output a high level signal and send a first signal to the analog front-end chip, otherwise at least one of the charging signal output terminal of the microcontroller unit, the discharging signal output terminal of the microcontroller unit and the clearing signal output terminal of the microcontroller unit is controlled to output a low level signal, wherein the cell state parameter is a state parameter obtained by the analog front-end chip from collecting the cell; The analog front-end chip is used for: In the case of receiving the first signal, if the battery cell state parameter is in the corresponding protection threshold interval, the charging signal output terminal of the analog front-end chip, the discharging signal output terminal of the analog front-end chip, and the fault signal output terminal of the analog front-end chip output a high level signal; otherwise, at least one of the charging signal output terminal of the analog front-end chip, the discharging signal output terminal of the analog front-end chip, and the fault signal output terminal of the analog front-end chip is controlled to output a low level signal; The battery cell status parameter includes at least one of the following: Battery cell voltage value, battery cell current value, battery cell temperature value.

9. The control circuit of the energy storage device according to claim 8, characterized in that: The micro control unit is used for: During the process of charging and discharging the battery, if an alarm signal and / or communication abnormality is detected, obtaining the battery cell state parameter, the temperature value of the switch tube, the ambient temperature value and the output voltage of the battery; If at least one of the battery cell state parameter, the temperature value of the switch tube, the ambient temperature value and the output voltage of the battery is not in the corresponding protection threshold interval, at least one of the clear signal output terminal of the microcontroller unit, the charging signal output terminal of the microcontroller unit and the discharge signal output terminal of the microcontroller unit outputs the low level signal.

10. The control circuit of the energy storage device according to claim 5, characterized in that: The micro control unit further comprises a fault signal input terminal, wherein the fault signal input terminal is connected to the fault signal output terminal, and the analog front-end chip is further used for: During the process of charging and discharging the battery, if the cell state parameter is not in the corresponding protection threshold interval and / or a discharge short circuit is detected in the battery, the fault signal output terminal outputs the low level signal and transmits the low level signal to the micro control unit; The micro control unit is also used for: If the fault signal input terminal receives the low level signal, at least one of the clear signal output terminal of the micro control unit, the charge signal output terminal of the micro control unit and the discharge signal output terminal of the micro control unit is controlled to output the low level signal.

11. The control circuit of the energy storage device according to claim 10, characterized in that: The micro control unit is also used to transmit configuration parameters to the analog front-end chip; When receiving the configuration parameters, the analog front-end chip configures the protection threshold interval corresponding to the cell state parameter based on the configuration parameters.

12. The control circuit of the energy storage device according to any one of claims 1 to 9, characterized in that: The control circuit of the energy storage device also includes: A fuse is connected in series between the positive electrode of the battery and the positive electrode output terminal.

13. An energy storage device, characterized in that: include: Positive output terminal; Negative output terminal; A battery, wherein the battery is charged and discharged through the negative output terminal and the positive output terminal; An inverter, the inverter being connected to the positive output terminal and the negative output terminal and being used to charge and discharge the battery; The control circuit of the energy storage device according to any one of claims 1 to 12, wherein the control circuit of the energy storage device is connected to the positive output terminal, the negative output terminal and the battery.

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