Current-limiting protection circuit controlled by soft start

Abstract

The invention belongs to the field of chips, and provides a current-limiting protection circuit controlled by soft start, which comprises an operational amplifier, a first N-type MOS (Metal Oxide Semiconductor) tube, a second N-type MOS tube, a first resistor, a second resistor and a current mirror, the positive phase input end of the operational amplifier is connected with soft start reference voltage, and the output end of the operational amplifier is connected with the grid electrode of the first N-type MOS tube; an inverted input end of the first N-type MOS transistor is connected with a source electrode of the first N-type MOS transistor and one end of the first resistor, the other end of the first resistor is grounded, a drain electrode of the first N-type MOS transistor and a grid electrode of the second N-type MOS transistor are respectively connected with two ends of the current mirror, one end of the second resistor is connected with the grid electrode of the second N-type MOS transistor, the other end of the second resistor is grounded, the resistance value of the first resistor is equal to that of the second resistor, and the width-to-length ratio of the current mirror is 1: 1. The source electrode of the second N-type MOS tube outputs a driving signal to the grid electrode of the low-side NMOS tube of the chip, and the drain electrode of the second N-type MOS tube is connected with the power supply; according to the invention, the driving voltage of the low-side NMOS tube of the chip can be kept at a relatively low level during soft start, so that current-limiting protection is realized.

Description

Technical Field

[0001] The invention relates to the field of chips, and in particular to a current limiting protection circuit controlled by soft start. Background Art

[0002] Currently, the current limiting protection circuit for the Low Side NMOS inside the chip is mainly in the following ways:

[0003] Use the external resistor R1 to limit the current, such as Figure 1 As shown, Figure 1 The circuit is the external circuit of the chip, which is mainly used to generate the VGH voltage. The Low Side NMOS (low-side NMOS tube) inside the chip is used to generate the VGH voltage. Figure 1 The Low Side NMOS inside the chip refers to the NMOS transistor in the integrated circuit, whose source is connected to the ground and whose drain is connected to the load. Its main function is to control the current flow of the load and is usually used in switching circuits.

[0004] like Figure 2 The BOOST boost circuit in asynchronous mode is shown in the figure. Its output voltages AVDD and LXA are used to Figure 1 In the VGH generation circuit, the Low Side NMOS inside the chip is connected between LXA and GND.

[0005] The specific current limiting protection principle is: before the Charge Pump mode starts working, the voltage of the upper and lower plates of FlyCap (C1) has been charged to VIN. When the Charge Pump mode starts, LSNMOS is turned on, that is, the voltage of LXA starts to switch. During the switching, the voltage of LXA will drop from VIN to 0V instantly, generating a large switching current. Adding resistor R1 between LXA and C1 can play a current limiting role to prevent the LSNMOS from being burned due to excessive switching current.

[0006] In the above method, the current limiting is more dependent on the external resistor R1. If the resistor R1 is not added between FLY CAP and LXA, the current may be too large, causing the Low Side NMOS inside the chip to burn out. Summary of the invention

[0007] In view of the above technical problems, the present invention provides a current limiting protection circuit controlled by soft start, so that the driving voltage of the low-side NMOS tube of the chip is maintained at a low level during soft start, thereby achieving current limiting protection.

[0008] Other features and advantages of the present invention will become apparent from the following detailed description, or may be learned in part by practice of the present invention.

[0009] The present invention discloses a current limiting protection circuit controlled by soft start. The current limiting protection circuit is arranged inside a chip. The current limiting protection circuit comprises an operational amplifier, a first N-type MOS tube, a second N-type MOS tube, a first resistor, a second resistor and a current mirror. The positive input terminal of the operational amplifier is connected to a soft start reference voltage, the output terminal thereof is connected to the gate of the first N-type MOS tube, the negative input terminal thereof is connected to the source of the first N-type MOS tube and one end of the first resistor, the other end of the first resistor is grounded, the drain of the first N-type MOS tube and the gate of the second N-type MOS tube are respectively connected to the two ends of the current mirror, one end of the second resistor is connected to the gate of the second N-type MOS tube, and the other end thereof is grounded, the resistance value of the first resistor is equal to that of the second resistor, the width-to-length ratio of the current mirror is 1:1, the source of the second N-type MOS tube outputs a driving signal to the gate of a low-side NMOS tube of the chip, and the drain of the second N-type MOS tube is connected to a power supply.

[0010] Furthermore, the current mirror includes a first P-type MOS tube and a second P-type MOS tube, the gates of the first P-type MOS tube and the second P-type MOS tube are connected to each other and the drains are respectively connected to the power supply, the source of the first P-type MOS tube is connected to its gate and the drain of the first N-type MOS tube, and the source of the second P-type MOS tube is respectively connected to the gate of the second N-type MOS tube and one end of the second resistor.

[0011] Furthermore, a small current branch and a capacitor are provided between the second N-type MOS tube and the low-side NMOS tube. The small current branch is used to remain closed before the end of the soft start, and to charge the capacitor at the end of the soft start. The charged capacitor is used to drive the low-side NMOS tube.

[0012] Furthermore, the small current branch includes a third P-type MOS tube, the gate of the third P-type MOS tube is connected to the soft start end signal, the source is connected between the second N-type MOS tube and the low-side NMOS tube, and the drain is connected to the power supply.

[0013] The technical solution of the present invention has the following beneficial effects:

[0014] Soft start is used to control the GATE drive voltage of the low-side NMOS tube, so that it is at a lower level during the soft start process, thereby achieving current limiting protection; after the soft start is completed, the low-side NMOS tube can return to normal driving capability; an operational amplifier with a negative feedback structure is used as a buffer to isolate the larger noise at the low-side NMOS tube, prevent the noise from having a greater impact on the soft start reference voltage, and protect other front-stage circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1A schematic diagram of a VGH generating circuit in Charge Pump mode disclosed in the background technology of this specification;

[0016] Figure 2 The schematic diagram of the BOOST boost circuit operating in asynchronous mode disclosed in the background technology of this specification;

[0017] Figure 3 is a schematic diagram of a current limiting protection circuit controlled by soft start in an embodiment of this specification;

[0018] Figure 4 This is a schematic diagram of another current limiting protection circuit controlled by soft start in the embodiments of this specification. DETAILED DESCRIPTION

[0019] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as being limited to the examples set forth herein; on the contrary, these embodiments are provided so that the present invention will be more comprehensive and complete, and the concept of the example embodiments will be fully conveyed to those skilled in the art. The described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present invention. However, those skilled in the art will appreciate that the technical solutions of the present invention may be practiced while omitting one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known technical solutions are not shown or described in detail to avoid obscuring various aspects of the present invention.

[0020] like Figure 1-3 As shown, the embodiment of the present specification provides a current limiting protection circuit controlled by soft start, the current limiting protection circuit is arranged inside the chip, and the current limiting protection circuit includes an operational amplifier 1, a first N-type MOS tube NM1, a second N-type MOS tube NM2, a first resistor R1, a second resistor R2, and a current mirror 2. The positive input terminal of the operational amplifier 1 is connected to the soft start reference voltage, the output terminal thereof is connected to the gate of the first N-type MOS tube NM1, the inverting input terminal thereof is connected to the source of the first N-type MOS tube NM1 and one end of the first resistor R1, the other end of the first resistor R1 is grounded, the drain of the first N-type MOS tube NM1 and the gate of the second N-type MOS tube NM2 are respectively connected to the two ends of the current mirror 2, one end of the second resistor R2 is connected to the gate of the second N-type MOS tube NM2, and the other end thereof is grounded, the resistance value of the first resistor R1 is equal to that of the second resistor R2, the width-to-length ratio of the current mirror 2 is 1:1, the source of the second N-type MOS tube NM2 outputs a driving signal to the gate of the low-side NMOS tube LSNMOS of the chip, and the drain thereof is connected to the power supply VDD.

[0021] The current mirror 2 includes a first P-type MOS transistor PM1 and a second P-type MOS transistor PM2, wherein the gates of the first P-type MOS transistor PM1 and the second P-type MOS transistor PM2 are connected to each other and the drains are respectively connected to the power supply VDD, the source of the first P-type MOS transistor PM1 is connected to the gate thereof and the drain of the first N-type MOS transistor NM1, and the source of the second P-type MOS transistor PM2 is respectively connected to the gate of the second N-type MOS transistor NM2 and one end of the second resistor R2.

[0022] This embodiment mainly makes an improved design inside the chip. During the soft start process, the GATE drive voltage (NDRV) of the low-side NMOS tube LSNMOS is reduced, that is, the VGS of LSNMOS is reduced, thereby reducing the current of LSNMOS during the switching process, playing a role of current limiting protection and preventing it from being burned. When the soft start time ends, the voltage of NDRV is increased again to restore the normal driving capability of LSNMOS.

[0023] Please continue reading Figure 1-3 , during the soft start process, Figure 3 The soft start reference voltage VREF_SST in the circuit rises slowly. Under the clamping action of the operational amplifier, VFB=VREF_SST, I1=VFB / R1, the first P-type MOS tube PM1 and the second P-type MOS tube PM2 form a current mirror, and the ratio of W / L between the two is 1:1, then I2=I1, VG=I2*R2, and the first resistor R1 is designed to be equal to the second resistor R2 in the circuit, then VG=VFB=VREF_SST, VLP=VREF_SST-VGS2, wherein VLP is used as the power supply voltage of the GATE drive circuit of LSNMOS. When the low-side NMOS tube LSNMOS is turned on, NDRV=VLP, thereby achieving the purpose of reducing the GATE drive voltage NDRV of the low-side NMOS tube LSNMOS and reducing its VGS for current limiting during the soft start process.

[0024] In another embodiment, if Figure 4 As shown, a small current branch 3 and a capacitor C1 are provided between the second N-type MOS tube NM2 and the low-side NMOS tube LSNMOS. The small current branch 3 is used to remain closed before the end of the soft start, and to charge the capacitor C1 at the end of the soft start. The charged capacitor C1 is used to drive the low-side NMOS tube.

[0025] Specifically, the small current branch 3 includes a third P-type MOS transistor PM3 , a gate of the third P-type MOS transistor PM3 is connected to the soft start end signal, a source is connected between the second N-type MOS transistor NM2 and the low-side NMOS transistor, and a drain is connected to the power supply.

[0026] At the end of soft start, the voltage of VREF_SST rises to VDD. In order to ensure the normal static operating point of the circuit, VFB = VDD-VGS1, VG = VFB = VDD-VGS1, VLP = VGVGS2, that is, VLP = VDD-VGS1-VGS2. It can be seen that after the end of soft start, the voltage of VLP is low. When LSNMOS is turned on, the voltage of NDRV is also low, resulting in its weak driving ability. Therefore, it is necessary to add an additional small current branch 3 to slowly charge the capacitor C1 after the end of soft start, so that VLP gradually returns to the VDD voltage, that is, when LSNMOS is turned on, NDRV = VLP = VDD, restoring the normal driving ability of LSNMOS.

[0027] like Figure 4 As shown, a small current branch 3 is added, and its current is I, and it is controlled by the soft start end signal. Before the end of the soft start, SST_ENDB remains at a high level, the current branch is closed, and VLP = VREF_SST-VGS2; at the end of the soft start, SST_ENDB becomes a low level, the small current branch 3 is opened, and the capacitor C1 is charged until VLP = VDD, and the charging stops. At this time, the voltage domain of NDRV is VLP = VDD, and the normal driving capability of LSNMOS is restored.

[0028] In the above embodiment, soft start is used to control the GATE driving voltage of the low-side NMOS tube so that it is at a lower level during the soft start process, thereby realizing current limiting protection; after the soft start is completed, the low-side NMOS tube can be restored to normal driving capability; an operational amplifier with a negative feedback structure is used as a buffer to isolate the larger noise at the low-side NMOS tube, prevent the noise from having a greater impact on the soft start reference voltage, and protect other front-stage circuits.

[0029] Those skilled in the art will readily appreciate other embodiments of the invention after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art that are not disclosed in the present invention. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the claims.

Claims

1. A current limiting protection circuit controlled by soft start, It is characterized in that The current limiting protection circuit is arranged inside the chip, and comprises an operational amplifier, a first N-type MOS tube, a second N-type MOS tube, a first resistor, a second resistor, and a current mirror. The non-phase input terminal of the operational amplifier is connected to a soft start reference voltage, the output terminal thereof is connected to the gate of the first N-type MOS tube, the inverting input terminal thereof is connected to the source of the first N-type MOS tube and one end of the first resistor, the other end of the first resistor is grounded, the drain of the first N-type MOS tube and the gate of the second N-type MOS tube are respectively connected to the two ends of the current mirror, one end of the second resistor is connected to the gate of the second N-type MOS tube, and the other end thereof is grounded, the resistance value of the first resistor is equal to that of the second resistor, the width-to-length ratio of the current mirror is 1:1, the source of the second N-type MOS tube outputs a driving signal to the gate of the low-side NMOS tube of the chip, and the drain thereof is connected to a power supply.

2. A current limiting protection circuit controlled by soft start according to claim 1, It is characterized in that The current mirror includes a first P-type MOS tube and a second P-type MOS tube, the gates of the first P-type MOS tube and the second P-type MOS tube are connected to each other and the drains are respectively connected to the power supply, the source of the first P-type MOS tube is connected to the gate and the drain of the first N-type MOS tube, and the source of the second P-type MOS tube is respectively connected to the gate of the second N-type MOS tube and one end of the second resistor.

3. A current limiting protection circuit controlled by soft start according to claim 1, It is characterized in that A small current branch and a capacitor are provided between the second N-type MOS tube and the low-side NMOS tube. The small current branch is used to remain closed before the end of the soft start, and to charge the capacitor at the end of the soft start. The charged capacitor is used to drive the low-side NMOS tube.

4. A current limiting protection circuit controlled by soft start according to claim 3, It is characterized in that The small current branch includes a third P-type MOS tube, the gate of the third P-type MOS tube is connected to the soft start end signal, the source is connected between the second N-type MOS tube and the low-side NMOS tube, and the drain is connected to the power supply.

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