Method, computer device and medium for virtualization hardware acceleration
By introducing high availability processes in user-mode applications to backup and restore the configuration and socket connection of virtualized hardware accelerated drivers, the input and output interruption caused by the virtual machine equipment being offline is solved, and the effect of resource saving and delay reduction is achieved.
Patent Information
- Application Number
- CN202411606920.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-12
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2044-11-12
AI Technical Summary
In the prior art, socket disconnection of the virtual host-user protocol will cause the equipment in the virtual machine to be offline, causing input and output interruptions and data service interruptions, and avoiding interruptions through virtual machine migration or backup requires a large amount of resources and increasing delays.
By providing high availability processes in user-mode applications, backup configuration information of virtualized hardware acceleration drivers, file descriptors and messages for socket connections, ensuring that the socket connection can be kept uninterrupted when user-mode applications fail or upgrade.
It realizes that socket connections are not interrupted when user-mode application errors or upgrades are encountered, avoids data service interruption, saves resource usage, and reduces processing delays.
Smart Images

Figure CN119127407B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a method, computer device and medium for virtualization hardware acceleration. Background Art
[0002] In application scenarios such as high-performance servers, cloud computing, and large data centers, data plane direct access is achieved through virtualization hardware acceleration (vhost Data Path Acceleration, VDPA), for example, virtual machines interact directly with dedicated hardware such as smart NICs. The implementation of VDPA is based on the vhost-user protocol, which defines the specifications for communication between user-mode virtual machines and user-mode applications such as the Data Plane Development Kit (DPDK). The implementation scheme of VDPA in the prior art uses the socket method defined by the vhost-user protocol to complete event notification and data interaction between processes. However, this means that when a user-mode application crashes or its version is upgraded, the socket of the vhost-user protocol will be disconnected, which may cause the device in the corresponding virtual machine to go offline, thereby causing input and output interruptions and data service interruptions. Virtual machine migration or virtual machine backup can avoid data service interruption due to program crash or version upgrade, but this requires a large amount of resources to use the migrated virtual machine or backup virtual machine to provide data services during application restart or application upgrade. In addition, for data copying and configuration synchronization of existing data services, it is necessary to migrate the virtual machine first, upgrade the application, and then migrate it back after the upgrade is completed, which increases the delay.
[0003] To this end, the present application provides a method, computer device and medium for virtualized hardware acceleration, which can not only meet the requirements of data plane direct connection to improve data transmission performance, but also avoid data service interruption due to program crash or version upgrade, while saving resource usage and reducing processing delay. Summary of the invention
[0004] In a first aspect, the present application provides a method for virtualized hardware acceleration. The method includes: a first virtualization driver in a first virtual machine in a user space of a host machine interacts with a first virtualization hardware acceleration driver in a first user state application in the user space, thereby indirectly interacting with a first quick peripheral component interconnect device in a message transceiver hardware through the first virtualization hardware acceleration driver, thereby building a first control plane path, and the first virtualization driver directly interacts with the message transceiver hardware to build a first data plane pass-through path corresponding to the first control plane path, wherein the first virtualization driver in the first virtual machine and the first virtualization hardware acceleration driver in the first user state application perform event notification and data interaction through a first socket connection; the first user state application provides a main process for supporting the first socket connection and provides a first high availability process as a backup process for the main process, wherein the first high availability process at least backs up the virtualization hardware acceleration device configuration information of the first virtualization hardware acceleration driver, the connection file descriptor of the first socket connection, and the message exchanged through the first socket connection; when the first user state application fails or is upgraded, the first high availability process sequentially executes a device addition operation, a file descriptor synchronization operation, and a message synchronization operation, thereby keeping the first socket connection uninterrupted.
[0005] Through the first aspect of the present application, the first high-availability process is used as a backup process for the main process, and through the optimized design of the backup, the first socket connection can be kept uninterrupted when the first user-mode application fails or is upgraded. This not only meets the requirements of direct data connection to improve data transmission performance, but also avoids data service interruptions due to program crashes or version upgrades, while saving resource usage and reducing processing delays.
[0006] In a possible implementation of the first aspect of the present application, the method further includes: each time the main process adds a new device, the main process synchronizes the device configuration information of the new device to the first high availability process for backing up the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver.
[0007] In a possible implementation of the first aspect of the present application, the method also includes: when the main process establishes the first socket connection and successfully connects to the first virtualization driver in the first virtual machine, the main process synchronizes the connection file descriptor of the first socket connection to the first high availability process for backing up the connection file descriptor of the first socket connection.
[0008] In a possible implementation of the first aspect of the present application, the method also includes: the main process determines a first message synchronization order based on the message type, and then synchronizes the messages interacting through the first socket connection to the first high availability process according to the first message synchronization order, for backing up the messages interacting through the first socket connection.
[0009] In a possible implementation manner of the first aspect of the present application, the first message synchronization sequence includes: global messages other than device status, the device status, and queue messages.
[0010] In a possible implementation of the first aspect of the present application, the global messages other than the device status include: communication protocol characteristics, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability characteristics, the device status indicates whether the driver has confirmed the device capabilities and whether the protocol version is supported, wherein the queue messages include: queue depth, queue address, queue call, queue write, and queue enable.
[0011] In a possible implementation of the first aspect of the present application, the device adding operation includes: calling the device adding interface of the first user-state application through the first high availability process to add a new virtualized hardware acceleration device, and then synchronizing the virtualized hardware acceleration device configuration of the newly added virtualized hardware acceleration device using the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver backed up by the first high availability process.
[0012] In a possible implementation of the first aspect of the present application, the file descriptor synchronization operation includes: determining, through the first high availability process, whether the current file descriptor of the first socket connection is valid; and, when the current file descriptor of the first socket connection is invalid, using the connection file descriptor of the first socket connection backed up by the first high availability process to rebuild the inter-process communication channel of the first socket connection.
[0013] In a possible implementation of the first aspect of the present application, the message synchronization operation includes: determining a first message recovery order based on a message type through the first high availability process, and then, according to the first message recovery order, using the messages backed up by the first high availability process and interacted through the first socket connection, restoring the status data of the newly added virtualized hardware acceleration device.
[0014] In a possible implementation manner of the first aspect of the present application, the first message recovery order includes: global messages other than device status, queue messages, and the device status.
[0015] In a possible implementation of the first aspect of the present application, the global messages other than the device status include: communication protocol characteristics, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability characteristics, and the queue messages include: queue depth, queue address, queue call, queue write, queue enable, wherein the device status indicates whether the driver has confirmed the device capabilities and whether the protocol version is supported.
[0016] In a possible implementation manner of the first aspect of the present application, when the first user-state application fails or is upgraded, the first high-availability process is used to enable the newly added virtualized hardware acceleration device to have a synchronized virtualized hardware acceleration device configuration, synchronized file descriptors, and synchronized messages interacted through the first socket connection, and the queue state and device state are restored by restoring the state data of the newly added virtualized hardware acceleration device, thereby preventing the first virtual machine from detecting the disconnection of the first socket connection.
[0017] In a possible implementation manner of the first aspect of the present application, an error or upgrade of the first user-state application corresponds to one or more of the following: a program crash of the first user-state application, an abnormality of the first virtualization hardware acceleration driver in the first user-state application, an upgrade of the first user-state application, an upgrade of the first virtualization hardware acceleration driver in the first user-state application, a memory leak, and a version conflict between a main protocol and a backup protocol.
[0018] In a possible implementation of the first aspect of the present application, the method also includes: when the first virtual machine detects the disconnection of the first socket connection, the first virtual machine notifies the message sending and receiving hardware to interrupt the input and output services associated with the first socket connection and to disconnect the device associated with the first socket connection.
[0019] In a possible implementation of the first aspect of the present application, the first socket connection is an inter-process communication socket connection, the first data plane direct path is used for data plane direct connection between the first virtual machine and the message sending and receiving hardware, and the construction of the first control plane path and the construction of the first data plane direct path are both based on the virtual host-user protocol.
[0020] In a second aspect, an embodiment of the present application further provides a computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements a method according to any one of the implementation modes of any of the above aspects when executing the computer program.
[0021] In a third aspect, an embodiment of the present application further provides a computer-readable storage medium, which stores computer instructions. When the computer instructions are executed on a computer device, the computer device executes a method according to any one of the implementation methods of any of the above aspects.
[0022] In a fourth aspect, an embodiment of the present application further provides a computer program product, which includes instructions stored on a computer-readable storage medium, and when the instructions are executed on a computer device, the computer device executes a method according to any one of the implementation methods of any of the above aspects. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0024] Figure 1 A flowchart of a method for virtualized hardware acceleration provided in an embodiment of the present application;
[0025] Figure 2 A schematic diagram of virtualized hardware acceleration provided in an embodiment of the present application;
[0026] Figure 3 A schematic diagram of the structure of a computing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0027] The embodiments of the present application will be further described in detail below in conjunction with the accompanying drawings.
[0028] It should be understood that, in the description of this application, "at least one" means one or more, and "a plurality of" means two or more. In addition, unless otherwise specified, the words "first", "second", etc. are only used for the purpose of distinguishing descriptions, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying an order.
[0029] Figure 1 A flowchart of a method for virtualizing hardware acceleration provided in an embodiment of the present application is shown below. Figure 1 As shown, the method includes the following steps.
[0030] Step S101: A first virtualization driver in a first virtual machine in a user space of a host machine interacts with a first virtualization hardware acceleration driver in a first user state application in the user space, thereby indirectly interacting with a first quick peripheral component interconnect device in message transceiver hardware through the first virtualization hardware acceleration driver, thereby building a first control plane path, and the first virtualization driver directly interacts with the message transceiver hardware to build a first data plane pass-through path corresponding to the first control plane path, wherein event notification and data interaction are performed between the first virtualization driver in the first virtual machine and the first virtualization hardware acceleration driver in the first user state application through a first socket connection.
[0031] Step S103: The first user-state application provides a main process for supporting the first socket connection and provides a first high-availability process as a backup process for the main process, wherein the first high-availability process at least backs up the virtualization hardware acceleration device configuration information of the first virtualization hardware acceleration driver, the connection file descriptor of the first socket connection, and messages interacted through the first socket connection.
[0032] Step S105: When the first user-mode application fails or is upgraded, the first high-availability process sequentially performs a device adding operation, a file descriptor synchronization operation, and a message synchronization operation, thereby maintaining the first socket connection uninterrupted.
[0033] See also Figure 1In application scenarios such as high-performance servers, cloud computing, and large data centers, a large number of user-mode virtualization hardware acceleration (vhost Data Path Acceleration, VDPA) drivers and offload solutions need to be applied. Through virtualization hardware acceleration, data plane direct access is achieved, for example, virtual machines interact directly with dedicated hardware such as smart NICs. In the user-mode virtualization hardware acceleration driver and offload solution, the user-mode system simulator (QEMU) provides platform and operating system simulation for generating various virtual machines. The virtual machine interacts with user-mode applications such as the Data Plane Development Kit (DPDK) through the driver, such as the virtio driver, and then interacts with the peripheral component interconnect express (PCIE) device in the message transceiver hardware through the virtualization hardware acceleration driver in the data plane development tool set, thus realizing the control plane, that is, the control plane path of user-mode virtual machine-user-mode application-PCIE device on dedicated hardware. The user-mode virtual machine interacts directly with the dedicated hardware through the driver, thereby achieving direct data plane access, which is the meaning of virtualized hardware acceleration, that is, the data plane path from the user-mode virtual machine to the dedicated hardware. The above-mentioned control plane and data plane designs are generally based on the virtual host-user protocol, that is, the vhost-user protocol, which defines the specifications for communication between user-mode virtual machines and user-mode applications such as DPDK, including the definition of event notification and data interaction between processes through sockets. Therefore, when a user-mode application crashes or its version is upgraded, the system simulator will perceive that the socket based on the virtual host-user protocol is disconnected, that is, the control plane path between the user-mode virtual machine and the user-mode application is interrupted. In this way, the system simulator needs to notify the corresponding virtual machine to go offline, resulting in input and output interruptions. In order to avoid data service interruptions due to program crashes or version upgrades, if virtual machine migration or virtual machine backup is performed, the migrated virtual machine or backup virtual machine can be used to provide data services during application restart or application upgrade. However, this means that when a user-state application crashes or a version upgrade occurs, the virtual host-user protocol socket will be disconnected, which may cause the corresponding virtual machine to go offline, resulting in input and output interruptions and data service interruptions.Through virtual machine migration or virtual machine backup, data service interruption caused by program crash or version upgrade can be avoided, but this requires a lot of resources to use the migrated virtual machine or backup virtual machine to provide data services during application restart or application upgrade. In addition, for data copy and configuration synchronization of existing data services, it is necessary to migrate the virtual machine first, then upgrade the application, and then migrate it back after the upgrade is completed, which increases the delay. The following is combined. Figure 1 The other drawings also provide detailed descriptions of specific embodiments of the present application. Figure 1 The method for virtualized hardware acceleration shown can not only meet the requirements of data plane direct pass-through to improve data transmission performance, but also avoid data service interruption due to program crash or version upgrade, while saving resource usage and reducing processing delay.
[0034] Continue reading Figure 1In step S101, a first virtualization driver in a first virtual machine in a user space of a host machine interacts with a first virtualization hardware acceleration driver in a first user state application in the user space, thereby indirectly interacting with a first quick peripheral component interconnect device in the message transceiver hardware through the first virtualization hardware acceleration driver, thereby constructing a first control plane path, and the first virtualization driver directly interacts with the message transceiver hardware to construct a first data plane direct path corresponding to the first control plane path, wherein the first virtualization driver in the first virtual machine and the first virtualization hardware acceleration driver in the first user state application perform event notification and data interaction through a first socket connection. In this way, the design of the control plane and the data plane is realized, by constructing the first control plane path, that is, from the first virtualization driver in the first virtual machine in the user space to the first virtualization hardware acceleration driver in the first user state application to the first quick peripheral component interconnect device in the message transceiver hardware, and constructing the first data plane direct path corresponding to the first control plane path, that is, the first virtualization driver directly interacts with the message transceiver hardware. Here, the first virtualized driver in the first virtual machine does not directly interact with the first quick peripheral component interconnect device in the message transceiving hardware in the first control plane path, but first interacts with the first virtualized hardware acceleration driver in the first user state application in the user space, thereby indirectly interacting with the first quick peripheral component interconnect device in the message transceiving hardware through the first virtualized hardware acceleration driver. This is different from the first virtual machine's direct interaction with the message transceiving hardware in the first data plane path. Such a design of the control plane and the data plane, on the one hand, improves the data forwarding performance by utilizing the data plane direct connection between the first virtualized driver in the first virtual machine and the message transceiving hardware; on the other hand, the control plane path is constructed by using the first virtualized hardware acceleration driver in the first user state application as an intermediate layer, so that various mature control tools in the first user state application, such as code libraries, application tools, etc., can be fully utilized. In order to ensure the synchronization between the control plane and the data plane, it is necessary to ensure that the first control plane path and the first data plane direct connection path corresponding to the first control plane path are synchronized. Therefore, when the first control plane path is interrupted, the first virtual machine needs to interrupt the corresponding first data plane direct connection in time to ensure synchronization. Due to the design of the control plane and the data plane, the first data plane direct path does not pass through the first user state application, but the first virtualization driver directly interacts with the message transceiver hardware. Therefore, the first virtual machine relies on monitoring whether an interruption occurs on the first control plane path to determine whether to trigger the interruption of the first data plane path. The first virtualization driver in the first virtual machine and the first virtualization hardware acceleration driver in the first user state application perform event notification and data interaction through a first socket connection.Therefore, when the first socket connection is interrupted, the first virtual machine senses the interruption of the first socket connection and triggers the interruption of the first data plane path, such as notifying the corresponding device to go offline, thereby causing the input and output services and data services to be interrupted.
[0035] Continue reading Figure 1In step S103, the first user-state application provides a main process for supporting the first socket connection and provides a first high-availability process as a backup process for the main process, wherein the first high-availability process at least backs up the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver, the connection file descriptor of the first socket connection, and the message interacted through the first socket connection. In step S105, when the first user-state application fails or is upgraded, the first high-availability process sequentially performs a device adding operation, a file descriptor synchronization operation, and a message synchronization operation, thereby keeping the first socket connection uninterrupted. In this way, by utilizing the optimized design of the first availability process and the backup aspect, on the basis of the above-mentioned construction of the first control plane path and the first data plane path, the first socket connection can be kept uninterrupted, so that when the first user-state application fails or is upgraded, the system simulator and the first virtual machine will not perceive the interruption of the socket connection, and will not trigger the forced device offline and interrupt the input and output services. Here, the first high-availability process means high availability (HA), which refers to the ability to perform its functions without interruption. As mentioned above, the first virtualization driver in the first virtual machine and the first virtualization hardware acceleration driver in the first user state application perform event notification and data interaction through the first socket connection. Moreover, the first socket connection is the key to constructing the first control plane path. The first virtualization driver in the first virtual machine interacts with the first virtualization hardware acceleration driver in the first user state application in the user space, thereby indirectly interacting with the first quick peripheral component interconnect device in the message transceiver hardware through the first virtualization hardware acceleration driver, and then constructing the first control plane path. Therefore, the optimized design of the first high availability process in terms of backup ensures that the first high availability process can replace the main process in time to support the first socket connection, and it is necessary to minimize the system load, that is, to minimize the resource loss in maintaining the first high availability process and managing backup. To this end, the first high availability process at least backs up the virtualization hardware acceleration device configuration information of the first virtualization hardware acceleration driver, the connection file descriptor of the first socket connection, and the message interacted through the first socket connection.In this way, through the first high availability process, an optimized design in terms of backup is achieved, specifically: virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver (each time the main process adds a new device, the device configuration information is synchronized to the first high availability process); the connection file descriptor of the first socket connection (each time the main process successfully connects to the virtualization driver on the virtual machine side, that is, establishes a new socket connection, the connection file descriptor of the new socket connection is synchronized to the first high availability process); and messages interacted through the first socket connection, such as virtual host-user information interacted through the first socket connection (here, the main process k maliciously selects the information to be synchronized according to a preset policy). In some embodiments, the first socket connection can be an inter-process communication (Unix domain socket, UDS) socket connection, based on the inter-process communication (IPC) mechanism between processes, suitable for copying application layer data from one process to another process, and can be combined with virtualization technology to realize event notification and data interaction between the first virtualization driver and the first virtualization hardware acceleration driver in the first user state application.
[0036] In conclusion, Figure 1 The method for virtualized hardware acceleration shown supports data plane direct access to virtualized hardware acceleration based on the virtual host-user protocol, and supports adaptation of control planes based on various virtualization protocols including new ones. Through the backup mechanism and the recovery mechanism, the interruption of the socket connection detected by the virtual machine and the system simulator can be avoided, thereby avoiding the forced offline of the device and the interruption of the data service, which is conducive to keeping the data service uninterrupted during the hot upgrade period. In addition, in the face of abnormal situations such as virtualized hardware acceleration driver abnormalities, the first high availability process can also be used to intervene to avoid the interruption of the socket connection caused by the abnormality of the main process. In addition, because the first high availability process provided by the first user state application is used to perform backup and recovery work, the necessary backup operations and recovery operations after the abnormality are realized by the first user state application side, which means that the virtual machine and the system simulator side are unaware of this, and there is no need to migrate and backup virtual machines, which saves resources and reduces delays. In this way, the first high-availability process is used as a backup process for the main process, and through the optimized design of the backup, the first socket connection can be kept uninterrupted when the first user-mode application fails or is upgraded. This not only meets the requirements of direct data connection to improve data transmission performance, but also avoids data service interruptions due to program crashes or version upgrades, while saving resource usage and reducing processing delays.
[0037] Figure 2A schematic diagram of virtualized hardware acceleration provided by an embodiment of the present application. Figure 2 As shown, the host machine 200 includes a user space 201 and a message transceiver hardware 203. The method for virtualization hardware acceleration applied to the host machine 200 includes: a first virtualization driver 213 in a first virtual machine 211 in the user space 201 of the host machine 200 interacts with a first virtualization hardware acceleration driver 223 in a first user state application 221 in the user space 201, thereby indirectly interacting with a first quick peripheral component interconnect device 231 in the message transceiver hardware 203 through the first virtualization hardware acceleration driver 223, thereby building a first control plane path, and the first virtualization driver 213 directly interacts with the message transceiver hardware 203 to build a first data plane pass-through path corresponding to the first control plane path, wherein the first virtualization driver 213 in the first virtual machine 211 interacts with the first user state application 221 in the user space 201. 1, event notification and data interaction are performed between the first virtualized hardware acceleration driver 223 through a first socket connection; the first user-state application 221 provides a main process for supporting the first socket connection and provides a first high-availability process as a backup process for the main process, wherein the first high-availability process at least backs up the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver 223, the connection file descriptor of the first socket connection, and the messages interacted through the first socket connection; when the first user-state application 221 fails or is upgraded, the device adding operation, the file descriptor synchronization operation, and the message synchronization operation are executed in sequence through the first high-availability process, so as to keep the first socket connection uninterrupted.
[0038] In conclusion, Figure 2 The virtualized hardware acceleration solution shown utilizes the first high-availability process as a backup process for the main process, and through optimized backup design, the first socket connection can be kept uninterrupted when the first user-state application 221 fails or is upgraded. This not only meets the requirements of data plane direct access to improve data transmission performance, but also avoids data service interruptions due to program crashes or version upgrades, while saving resource usage and reducing processing delays.
[0039] See also Figure 1 and Figure 2In a possible implementation, the method further includes: each time the main process adds a new device, the main process synchronizes the device configuration information of the new device to the first high availability process, for backing up the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver. In this way, by using the first high availability process as a backup process for the main process and optimizing the backup design, not only can the requirements of data plane direct access be met to improve data transmission performance, but also data service interruption caused by program crash or version upgrade can be avoided, while saving resource usage and reducing processing delay.
[0040] In a possible implementation, the method further includes: when the main process establishes the first socket connection and successfully connects to the first virtualization driver in the first virtual machine, the main process synchronizes the connection file descriptor of the first socket connection to the first high availability process for backing up the connection file descriptor of the first socket connection. In this way, by using the first high availability process as a backup process for the main process and optimizing the backup design, not only can the requirements of data plane direct access be met to improve data transmission performance, but also data service interruption due to program crash or version upgrade can be avoided, while saving resource usage and reducing processing delay.
[0041] In a possible implementation, the method further includes: the main process determines a first message synchronization order based on the message type, and then synchronizes the messages interacted through the first socket connection to the first high availability process according to the first message synchronization order, so as to back up the messages interacted through the first socket connection. In this way, by using the first high availability process as a backup process for the main process and optimizing the backup design, not only can the requirements of data plane direct access be met to improve data transmission performance, but also data service interruption caused by program crash or version upgrade can be avoided, while saving resource usage and reducing processing delay.
[0042] In some embodiments, the first message synchronization sequence includes: global messages other than device status, the device status, and queue messages. In this way, message synchronization is achieved, and the device adding operation, the file descriptor synchronization operation, and the message synchronization operation are sequentially performed through the first high availability process, thereby maintaining the first socket connection uninterrupted.
[0043] In some embodiments, the global messages other than the device status include: communication protocol features, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability features, the device status indicates whether the driver has confirmed the device capabilities and whether the protocol version is supported, wherein the queue messages include: queue depth, queue address, queue call, queue write, queue enable. In this way, message synchronization is achieved, and through the first high availability process, the device addition operation, file descriptor synchronization operation, and message synchronization operation are sequentially executed to keep the first socket connection uninterrupted.
[0044] In a possible implementation, the device adding operation includes: calling the device adding interface of the first user-state application through the first high-availability process to add a new virtualized hardware acceleration device, and then synchronizing the virtualized hardware acceleration device configuration of the newly added virtualized hardware acceleration device using the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver backed up by the first high-availability process. When the first user-state application fails or is upgraded, the device adding operation, the file descriptor synchronization operation, and the message synchronization operation are sequentially executed through the first high-availability process to keep the first socket connection uninterrupted. Here, through the device adding operation and the recovery operation, the necessary backup operation and the recovery operation after the exception are realized by the first user-state application side, which means that the virtual machine and the system simulator side are unaware of this, and there is no need to perform virtual machine migration and virtual machine backup, which saves resources and reduces latency. In this way, by utilizing the optimized design of the first availability process and backup, based on the above-mentioned construction of the first control plane path and the first data plane path, the first socket connection can be kept uninterrupted. In this way, when the first user-state application fails or is upgraded, the system simulator and the first virtual machine will not perceive the interruption of the socket connection and will not trigger the forced device offline and interruption of input and output services.
[0045] In some embodiments, the file descriptor synchronization operation includes: determining whether the current file descriptor of the first socket connection is valid through the first high availability process, and when the current file descriptor of the first socket connection is invalid, using the connection file descriptor of the first socket connection backed up by the first high availability process to rebuild the inter-process communication channel of the first socket connection. In this way, by utilizing the optimized design of the first availability process and backup, on the basis of the above-mentioned construction of the first control plane path and the first data plane path, the first socket connection can be kept uninterrupted, so that when the first user-mode application fails or is upgraded, the system simulator and the first virtual machine will not perceive the interruption of the socket connection, and will not trigger the forced device offline and interruption of input and output services.
[0046] In some embodiments, the message synchronization operation includes: determining the first message recovery order based on the message type through the first high availability process, and then, according to the first message recovery order, using the messages interacted through the first socket connection backed up by the first high availability process, restoring the state data of the newly added virtualized hardware acceleration device. In this way, by utilizing the first availability process and the optimized design of the backup, on the basis of the above-mentioned construction of the first control plane path and the first data plane path, the first socket connection can be kept uninterrupted, so that when the first user-mode application fails or is upgraded, the system simulator and the first virtual machine will not perceive the socket connection interruption, and will not trigger the forced device offline and interruption of input and output services.
[0047] In some embodiments, the first message recovery sequence includes: global messages other than device status, queue messages, and the device status. In this way, global messages other than device status are recovered first, then queue messages are recovered to recover queue status, and finally device status is recovered. In this way, the number of queue operations and historical records do not need to be considered, and only the maximum number of queue operations needs to be extracted. The virtual host-user protocol of multiple queues can be adapted, thereby improving the execution efficiency of message synchronization operations and optimizing overall efficiency.
[0048] In some embodiments, the global messages other than the device status include: communication protocol features, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability features, and the queue messages include: queue depth, queue address, queue call, queue write, queue enable, wherein the device status indicates whether the driver has confirmed the device capability and whether the protocol version is supported. In this way, message recovery is achieved without considering the number and history of queue operations, only the maximum number of queues needs to be extracted, and the virtual host-user protocol of multiple queues can be adapted, thereby improving the execution efficiency of message synchronization operations and helping to optimize overall efficiency.
[0049] In some embodiments, when the first user-state application fails or is upgraded, the first high-availability process enables the newly added virtualized hardware acceleration device to have a synchronized virtualized hardware acceleration device configuration, synchronized file descriptors, and synchronized messages interacting through the first socket connection, and by restoring the state data of the newly added virtualized hardware acceleration device, the queue state and device state are restored, thereby avoiding the first virtual machine from detecting the disconnection of the first socket connection. In this way, by utilizing the first availability process and the optimized design of the backup, the first socket connection can be kept uninterrupted on the basis of the above-mentioned construction of the first control plane path and the first data plane path, so that when the first user-state application fails or is upgraded, the system simulator and the first virtual machine will not perceive the interruption of the socket connection, and will not trigger the forced device offline and interruption of input and output services.
[0050] In a possible implementation, in terms of message synchronization operations, by improving the first message synchronization sequence and the first message recovery sequence, and not arranging them according to the mirror image but utilizing the difference between the first message synchronization sequence and the first message recovery sequence, it is possible to ignore the number of queue operations and historical records, thereby improving the execution efficiency of the message synchronization operation, which is conducive to optimizing the overall efficiency. Specifically, the main process determines the first message synchronization sequence based on the message type, and then synchronizes the messages interacted through the first socket connection to the first high availability process according to the first message synchronization sequence, for backing up the messages interacted through the first socket connection, where the first message synchronization sequence includes in sequence: global messages other than device status, the device status, and queue messages. Wherein, in terms of the first message synchronization sequence, the global messages other than the device status include: communication protocol features, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability features, and the device status indicates whether the driver has confirmed the device capability and whether it supports the protocol version, wherein the queue messages include: queue depth, queue address, queue call, queue write, and queue enable. In contrast, when the first user-state application fails or is upgraded, the first high-availability process is used to sequentially perform a device adding operation, a file descriptor synchronization operation, and a message synchronization operation, thereby keeping the first socket connection uninterrupted. Here, the device adding operation includes: calling the device adding interface of the first user-state application through the first high-availability process to add a new virtualized hardware acceleration device, and then performing virtualized hardware acceleration device configuration synchronization on the newly added virtualized hardware acceleration device using the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver backed up by the first high-availability process. Among them, the file descriptor synchronization operation includes: determining whether the current file descriptor of the first socket connection is valid through the first high-availability process, and when the current file descriptor of the first socket connection is invalid, using the connection file descriptor of the first socket connection backed up by the first high-availability process to rebuild the inter-process communication channel of the first socket connection. Specifically, the message synchronization operation includes: determining a first message recovery order based on a message type through the first high availability process, and then, according to the first message recovery order, using the messages backed up by the first high availability process and interacted through the first socket connection, recovering the state data of the newly added virtualized hardware acceleration device. The first message recovery order includes, in sequence: global messages other than device status, queue messages, and the device status.In terms of the first message recovery sequence, the global messages other than the device status include: communication protocol features, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability features, and the queue messages include: queue depth, queue address, queue call, queue write, queue enable, wherein the device status indicates whether the driver has confirmed the device capability and whether the protocol version is supported. Thus, in terms of the first message synchronization sequence, the following are synchronized in sequence: global messages other than the device status, device status, and queue messages; then, in terms of the first message recovery sequence, the following are restored in sequence: global messages other than the device status, queue messages, and device status. Thus, the first message synchronization sequence is different from the first message recovery sequence, firstly restoring the global messages other than the device status, then restoring the queue messages to restore the queue status, and finally restoring the device status. Thus, the number of queue operations and historical records do not need to be considered, only the maximum number of queue operations needs to be extracted, and the virtual host-user protocol of multiple queues can be adapted, thereby improving the execution efficiency of message synchronization operations, which is conducive to optimizing the overall efficiency.
[0051] In a possible implementation, the error or upgrade of the first user-state application corresponds to one or more of the following: program crash of the first user-state application, an exception of the first virtualized hardware acceleration driver in the first user-state application, an upgrade of the first user-state application, an upgrade of the first virtualized hardware acceleration driver in the first user-state application, a memory leak, and a version conflict between a primary protocol and a backup protocol. The error or upgrade of the first user-state application may be due to various possible factors, which is conducive to adapting to complex and changeable application environments.
[0052] In a possible implementation, the method further includes: when the first virtual machine detects the disconnection of the first socket connection, the first virtual machine notifies the message transceiver hardware to interrupt the input and output services associated with the first socket connection and offline the device associated with the first socket connection. By utilizing the optimized design of the first availability process and backup, on the basis of the above-mentioned construction of the first control plane path and the first data plane path, the first socket connection can be kept uninterrupted, so that when the first user-mode application fails or is upgraded, the system simulator and the first virtual machine will not perceive the interruption of the socket connection and will not trigger the forced device offline and interrupt the input and output service. In this way, on the basis of the above-mentioned maintenance of the first socket connection, through further preventive measures, that is, when the first virtual machine detects the disconnection of the first socket connection, the first virtual machine notifies the message transceiver hardware to interrupt the input and output services associated with the first socket connection and offline the device associated with the first socket connection, the synchronization between the data plane and the control plane can be ensured.
[0053] In a possible implementation, the first socket connection is an inter-process communication socket connection, the first data plane direct path is used for data plane direct communication between the first virtual machine and the message transceiver hardware, and the construction of the first control plane path and the construction of the first data plane direct path are both based on the virtual host-user protocol. In this way, various communication protocols can be adapted.
[0054] Figure 3 3 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application, and the computing device 300 includes: one or more processors 310, a communication interface 320 and a memory 330. The processor 310, the communication interface 320 and the memory 330 are interconnected via a bus 340. Optionally, the computing device 300 may also include an input / output interface 350, and the input / output interface 350 is connected to an input / output device for receiving parameters set by a user, etc. The computing device 300 can be used to implement some or all of the functions of the device embodiment or system embodiment in the above-mentioned embodiment of the present application; the processor 310 can also be used to implement some or all of the operating steps of the method embodiment in the above-mentioned embodiment of the present application. For example, the specific implementation of the various operations performed by the computing device 300 can refer to the specific details in the above-mentioned embodiments, such as the processor 310 is used to perform some or all of the steps in the above-mentioned method embodiment or some or all of the operations in the above-mentioned method embodiment. For another example, in an embodiment of the present application, the computing device 300 may be used to implement part or all of the functions of one or more components in the above-mentioned apparatus embodiment. In addition, the communication interface 320 may be specifically used to perform the communication functions necessary to implement the functions of these apparatuses and components, and the processor 310 may be specifically used to perform the processing functions necessary to implement the functions of these apparatuses and components.
[0055] It should be understood that Figure 3 The computing device 300 may include one or more processors 310, and the multiple processors 310 may provide processing capabilities in a parallel connection mode, a serial connection mode, a serial-parallel connection mode, or any connection mode, or the multiple processors 310 may form a processor sequence or a processor array, or the multiple processors 310 may be divided into a main processor and an auxiliary processor, or the multiple processors 310 may have different architectures such as a heterogeneous computing architecture. In addition, Figure 3 The computing device 300 shown in the figure, and the related structural description and functional description are exemplary and non-limiting. In some exemplary embodiments, the computing device 300 may include Figure 3 More or fewer components may be shown, or some components may be combined or separated, or may have a different arrangement of components.
[0056] The processor 310 may have a variety of specific implementation forms. For example, the processor 310 may include a central processing unit (CPU), a graphic processing unit (GPU), a neural-network processing unit (NPU), a tensor processing unit (TPU) or a data processing unit (DPU), etc., and the embodiment of the present application does not specifically limit it. The processor 310 may also be a single-core processor or a multi-core processor. The processor 310 may be a combination of a CPU and a hardware chip. The above-mentioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD) or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL) or any combination thereof. The processor 310 may also be implemented using a logic device with built-in processing logic alone, such as an FPGA or a digital signal processor (DSP). The communication interface 320 may be a wired interface or a wireless interface for communicating with other modules or devices. The wired interface may be an Ethernet interface, a local interconnect network (LIN), etc., and the wireless interface may be a cellular network interface or a wireless local area network interface, etc.
[0057] The memory 330 may be a non-volatile memory, such as a read-only memory (ROM), a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The memory 330 may also be a volatile memory, which may be a random access memory (RAM) used as an external cache. By way of example but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM). The memory 330 may also be used to store program codes and data, so that the processor 310 calls the program codes stored in the memory 330 to execute some or all of the operation steps in the above method embodiment, or to execute the corresponding functions in the above device embodiment. Figure 3 Show more or fewer components, or have different component configurations.
[0058] The bus 340 may be a peripheral component interconnect express (PCIE) bus, an extended industry standard architecture (EISA) bus, a unified bus (Ubus or UB), a compute express link (CXL), a cache coherent interconnect for accelerators (CCIX), etc. The bus 340 may be divided into an address bus, a data bus, a control bus, etc. In addition to the data bus, the bus 340 may also include a power bus, a control bus, and a status signal bus, etc. However, for the sake of clarity, Figure 3 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.
[0059] The method and device provided in the embodiments of the present application are based on the same inventive concept. Since the principles of solving the problems in the methods and devices are similar, the embodiments, implementation methods, examples or implementation methods of the methods and devices can refer to each other, and the repeated parts will not be repeated. The embodiments of the present application also provide a system, which includes multiple computing devices, and the structure of each computing device can refer to the structure of the computing device described above. The functions or operations that can be implemented by the system can refer to the specific implementation steps in the above method embodiments and / or the specific functions described in the above device embodiments, which will not be repeated here.
[0060] The present application also provides a computer-readable storage medium, in which computer instructions are stored. When the computer instructions are executed on a computer device (such as one or more processors), the method steps in the above method embodiment can be implemented. The specific implementation of the processor of the computer-readable storage medium in executing the above method steps can refer to the specific operations described in the above method embodiment and / or the specific functions described in the above device embodiment, which will not be repeated here.
[0061] It should be understood by those skilled in the art that the embodiments of the present application may be provided as methods, systems, or computer program products. The present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. The embodiments of the present application may be implemented in whole or in part by software, hardware, firmware, or any other combination. When implemented using software, the above embodiments may be implemented in whole or in part in the form of a computer program product. The present application may take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program codes. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, the process or function described in the embodiments of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. Computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. Computer-readable storage media can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media. Available media can be magnetic media (such as floppy disks, hard disks, tapes), optical media, or semiconductor media. Semiconductor media can be solid-state hard disks, random access memory, flash memory, read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, or any other form of suitable storage media.
[0062] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. Each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0063] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the embodiments of the present application. The steps in the method of the embodiment of the present application can be adjusted in order, merged or deleted according to actual needs; the modules in the system of the embodiment of the present application can be divided, merged or deleted according to actual needs. If these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalent technologies, the present application is also intended to include these modifications and variations.
Claims
1. A method for virtualized hardware acceleration, characterized in that: The method comprises: A first virtualization driver in a first virtual machine in a user space of a host machine interacts with a first virtualization hardware acceleration driver in a first user state application in the user space, thereby indirectly interacting with a first quick peripheral component interconnect device in message transceiver hardware through the first virtualization hardware acceleration driver, thereby building a first control plane path, and the first virtualization driver directly interacts with the message transceiver hardware to build a first data plane pass-through path corresponding to the first control plane path, wherein the first virtualization driver in the first virtual machine and the first virtualization hardware acceleration driver in the first user state application perform event notification and data interaction through a first socket connection; The first user state application provides a main process for supporting the first socket connection and provides a first high availability process as a backup process of the main process, wherein the first high availability process at least backs up virtualization hardware acceleration device configuration information of the first virtualization hardware acceleration driver, a connection file descriptor of the first socket connection, and messages interacted through the first socket connection; When the first user state application fails or is upgraded, the first high availability process sequentially performs a device adding operation, a file descriptor synchronization operation, and a message synchronization operation, thereby maintaining the first socket connection uninterrupted. The device adding operation includes: calling the device adding interface of the first user state application through the first high availability process to add a new virtualized hardware acceleration device, and then synchronizing the virtualized hardware acceleration device configuration of the newly added virtualized hardware acceleration device using the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver backed up by the first high availability process. The file descriptor synchronization operation includes: determining, by the first high availability process, whether a current file descriptor of the first socket connection is valid, and when the current file descriptor of the first socket connection is invalid, using the connection file descriptor of the first socket connection backed up by the first high availability process to rebuild an inter-process communication channel of the first socket connection, The message synchronization operation includes: determining a first message recovery order based on a message type through the first high availability process, and then, according to the first message recovery order, restoring the status data of the newly added virtualized hardware acceleration device using the messages interacted through the first socket connection backed up by the first high availability process.
2. The method according to claim 1, characterized in that The method further comprises: Each time the main process adds a new device, the main process synchronizes the device configuration information of the new device to the first high availability process for backing up the virtualized hardware acceleration device configuration information of the first virtualized hardware acceleration driver.
3. The method according to claim 1, characterized in that The method further comprises: When the main process establishes the first socket connection and successfully connects to the first virtualization driver in the first virtual machine, the main process synchronizes the connection file descriptor of the first socket connection to the first high availability process for backing up the connection file descriptor of the first socket connection.
4. The method according to claim 1, characterized in that: The method further comprises: The main process determines a first message synchronization order based on the message type, and then synchronizes the messages interacted through the first socket connection to the first high availability process according to the first message synchronization order, so as to back up the messages interacted through the first socket connection.
5. The method according to claim 4, characterized in that The first message synchronization sequence includes: global messages except device status, the device status, and queue messages.
6. The method according to claim 5, characterized in that The global messages other than the device status include: communication protocol characteristics, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability characteristics, the device status indicates whether the driver has confirmed the device capabilities and whether the protocol version is supported, wherein the queue messages include: queue depth, queue address, queue call, queue write, and queue enable.
7. The method according to claim 1, characterized in that The first message recovery sequence includes: global messages except device status, queue messages, and the device status.
8. The method according to claim 7, characterized in that The global messages other than the device status include: communication protocol characteristics, request file descriptors for data plane pass-through in the virtual host-user protocol, client physical addresses, device capability characteristics, and the queue messages include: queue depth, queue address, queue call, queue write, queue enable, wherein the device status indicates whether the driver has confirmed the device capabilities and whether the protocol version is supported.
9. The method according to claim 1, characterized in that: When the first user-state application fails or is upgraded, the first high-availability process enables the newly added virtualized hardware acceleration device to have a synchronized virtualized hardware acceleration device configuration, synchronized file descriptors, and synchronized messages interacted through the first socket connection, and restores the queue state and device state by restoring the state data of the newly added virtualized hardware acceleration device, thereby preventing the first virtual machine from detecting the disconnection of the first socket connection.
10. The method according to claim 1, characterized in that The error or upgrade of the first user-state application corresponds to one or more of the following: program crash of the first user-state application, abnormality of the first virtualization hardware acceleration driver in the first user-state application, upgrade of the first user-state application, upgrade of the first virtualization hardware acceleration driver in the first user-state application, memory leak, and version conflict between the main protocol and the backup protocol.
11. The method according to claim 1, characterized in that: The method further comprises: When the first virtual machine detects the disconnection of the first socket connection, the first virtual machine notifies the message transceiver hardware to interrupt the input and output services associated with the first socket connection and disconnect the device associated with the first socket connection.
12. The method according to claim 1, characterized in that The first socket connection is an inter-process communication socket connection, the first data plane direct path is used for data plane direct connection between the first virtual machine and the message sending and receiving hardware, and the construction of the first control plane path and the construction of the first data plane direct path are both based on the virtual host-user protocol.
13. A computer device, characterized in that: The computer device comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method according to any one of claims 1 to 12 when executing the computer program.
14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, which, when executed on a computer device, cause the computer device to perform the method according to any one of claims 1 to 12.
Citation Information
Patent Citations
Method for deploying virtual machine supporting virtualization hardware acceleration
CN115858102A
User mode paravirtualization data path acceleration method and device, cluster and medium
CN118331687A