Method for mitigating load of midpoint switch of three-level inverter
By adjusting the switching mode of the three-level inverter, the voltage vector of the mid-point switch state is replaced by other switching states, which solves the problem of high conduction loss of the mid-point switch, improves system efficiency and reduces the load of the mid-point switch. .
Patent Information
- Application Number
- CN202380037392.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-08-09
- Filing Date
- 2023-07-12
- Publication Date
- 2024-12-13
AI Technical Summary
The three-level inverter has a high conduction loss of the mid-point switch in some operating points, resulting in reduced system efficiency and overload of the mid-point switch.
By adjusting the switching mode, the voltage vector generated by the switching state participating in the at least one mid-point switching device is replaced by the voltage vector generated by the switching state without the mid-point switching device, and the load is uniformly applied during the modulation period to reduce the mid-point voltage Change to reduce the load on the midpoint switch.
It effectively reduces the average conduction loss of the mid-point switch of the three-level inverter, improves the system efficiency, and reduces the risk of overload of the mid-point switch.
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Figure CN119137850A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a method for operating a three-level inverter, the three-level inverter having an intermediate circuit and at least three switch parts connected to the intermediate circuit, the intermediate circuit having three terminals in the form of a high-side terminal, a low-side terminal and a midpoint terminal, the switch parts each having a phase tap, the phase tap being used to be electrically connected to a phase of an electric drive device. Each switch part has three switching devices in the form of a high-side switching device connected to the high-side terminal, a low-side switching device connected to the low-side terminal and a midpoint switching device connected to the midpoint terminal. In order to modulate an output voltage specific to an operating point, a switching pattern is determined for the switching devices, by which the switching devices are switched into different switching states, and the phase taps of the corresponding switch parts are connected to one of the terminals of the intermediate circuit in each case while generating a voltage vector. In addition, the invention relates to a control device, a power module and a motor vehicle. Background Art
[0002] Currently, demand is focused on three-level inverters (3-Level-Inverter (German: Dreistufenwechselrichter)) for electrically driven motor vehicles (ie electric vehicles or hybrid vehicles). Such three-level inverters are connected between the electric drive device and an electric energy storage device (eg traction battery) of the motor vehicle and are used to convert the DC voltage provided by the electric energy storage device into a multi-phase AC voltage for the phases of the electric drive device. The three-level inverter can also be used as a power factor correction filter for a three-phase charger.
[0003] The inverter usually has three half-bridges connected in parallel and an intermediate circuit connected to the half-bridge. Each half-bridge has two switching devices, wherein the first switching device is configured as a high-side switching device and is connected to the high-side terminal of the intermediate circuit, and wherein the second switching device is configured as a low-side switching device and is connected to the low-side terminal of the intermediate circuit. In addition to the half-bridge, the three-level inverter also has three third switching devices, which are configured as midpoint switching devices and are respectively electrically connected to the tap between the first and second switching devices of the half-bridge and the midpoint terminal of the intermediate circuit. This three-level inverter can provide three voltage levels for the phase of the motor for each switching part composed of a half-bridge and a midpoint switching device, and therefore has 19 other switching states for modulating the output voltage specific to the working point in addition to the eight switching states of the conventional two-level inverter. With the help of these 27 switching states, the desired sinusoidal shape of the output voltage with particularly low harmonic content can be generated, thereby reducing the loss in the motor. In addition, the three-level inverter has particularly low switching losses.
[0004] In order to reduce the costs of the three-level inverter, for example, the mass and number of the center switches of the center switching device can be reduced. This reduction in the number of center switches increases the conduction losses at certain operating points of the three-level inverter. Due to thermal boundary conditions, these conduction losses reduce the efficiency of the system and can also lead to overloading of the center switches. Summary of the invention
[0005] The object of the present invention is to provide a solution for reducing the average conduction losses occurring in a center point switch of a three-level inverter for a motor vehicle during a modulation period.
[0006] According to the invention, this object is achieved by a method, a control device, a power electronics module and a motor vehicle having the features according to the respective independent claims. Advantageous embodiments of the invention are the subject of the dependent claims, the description and the drawings.
[0007] The method according to the invention is used to operate a three-level inverter. The three-level inverter has an intermediate circuit with three terminals in the form of a high-side terminal, a low-side terminal and a midpoint terminal. In addition, the three-level inverter has at least three switch parts connected to the intermediate circuit, each of which has a phase tap, which is used to be electrically connected to a phase of an electric drive device. Each switch part has three switching devices in the form of a high-side switching device connected to the high-side terminal, a low-side switching device connected to the low-side terminal, and a midpoint switching device connected to the midpoint terminal. In order to modulate the output voltage specific to the working point, a switching mode for the switching device is determined, by which the switching device is converted into different switching states, and the phase taps of the corresponding switching parts are connected to one of the terminals of the intermediate circuit respectively when a voltage vector is generated.
[0008] In order to reduce the conduction losses of the midpoint switching device, a switching pattern is determined in a variant for reducing conduction losses, in which at least one voltage vector of the switching pattern generated by a switching state involving at least one midpoint switching device is at least partially replaced by two voltage vectors generated by switching states without the participation of the midpoint switching device.
[0009] Furthermore, the invention also includes a control device which is designed to carry out the method according to the invention, and a power electronics module with a three-level inverter and a control device according to the invention. The motor vehicle according to the invention comprises an electrical energy storage device, an electric machine and a power electronics module according to the invention, wherein the three-level inverter is connected to the electrical energy storage device on the input side and to the phases of the stator of the electric machine on the output side. The three-level inverter is designed to convert a DC voltage provided by the electrical energy storage device into a multi-phase AC voltage and to provide it as an output voltage for the phases of the electric machine, the DC voltage being applied as an input voltage to the intermediate circuit of the three-level inverter.
[0010] The three-level inverter has an intermediate circuit on the input side, which in particular has at least one series circuit consisting of at least two capacitors. The switch part or the switch bridge respectively has a high-side switch device with at least one high-side switch, a low-side switch device with at least one low-side switch and a mid-point switch device with at least one mid-point switch. The high-side switch device and the low-side switch device of the switch part are connected in circuit to form a half bridge. Each switch part has a phase tap, which is connected to the motor phase to which it belongs. The terminals of the series circuit consisting of capacitors forming the high-side terminal and the low-side terminal of the intermediate circuit are connected to the poles of the energy storage device and to the half bridge of the switch part. A mid-point terminal, referred to as the mid-point for short, is provided between the capacitors of at least one series circuit, which is connected to the mid-point switch device of the switch part. The half bridge here respectively forms the vertical bridge branch of the corresponding switch part, and the mid-point switch device forms the horizontal bridge branch of the corresponding switch part. The high-side switch and the low-side switch can be configured as IGBTs or power MOSFETs, for example. In order to provide a bidirectional blocking capability, the mid-point switch device can respectively have two mid-point switches connected in series in reverse or respectively have one bidirectional mid-point switch. The midpoint switch can also be designed as an IGBT or a power MOSFET.
[0011] Since each switching bridge has three switching devices, the three-level inverter has 27 switching states when there are three switching bridges, wherein each switching state generates a voltage vector, which can be represented as a space vector in the vector diagram. Here, when the high-side switching device of the switching part is closed, the phase tap of the switching part is electrically connected to the high-side terminal, and therefore, the high-side potential is applied to the corresponding phase. When the low-side switching device of the switching part is closed, the phase tap of the switching part is electrically connected to the low-side terminal, and therefore, the low-side potential is applied to the corresponding phase. When the midpoint switching device of the switching part is closed, the phase tap of the switching part is electrically connected to the midpoint terminal, and therefore, the midpoint potential is applied to the corresponding phase.
[0012] For example, three switching states produce a zero voltage vector, in which either all high-side switches are closed and therefore all phase taps and phases are connected to the high-side terminal of the intermediate circuit, or all low-side switches are closed and therefore all phase taps and phases are connected to the low-side terminal of the intermediate circuit, or all midpoint switches are closed and therefore all phase taps and phases are connected to the midpoint terminal of the intermediate circuit, and the zero voltage vector is represented as a zero voltage space vector in the space vector diagram. Therefore, the zero voltage space vector can be generated redundantly. Six other switching states without the participation of the midpoint switching device and therefore without the participation of the midpoint switch produce six voltage vectors, which are represented as long external voltage space vectors in the space vector diagram and constitute the corner points of the external hexagon. These six long external voltage space vectors correspond to the basic voltage space vector of the two-level inverter, and are also referred to as the basic voltage space vector hereinafter. Six other switching states have the participation of the midpoint switching device and produce six other voltage vectors, which are mapped as average external voltage space vectors in the space vector diagram and are located between every two long external voltage space vectors on the sides of the external hexagon.
[0013] Twelve further switching states, which also involve the center point switching device, produce twelve short internal voltage space vectors, wherein every two switching states provide two identical voltage space vectors, i.e. voltage space vectors with the same length and the same phase angle. Each of the short internal voltage space vectors can therefore be generated redundantly. In this case, the short internal voltage space vectors span an internal hexagon, wherein every two redundant voltage space vectors form a corner point of the internal hexagon. The mutually redundant voltage space vectors have opposite, complementary effects on the current in the center point terminal of the intermediate circuit.
[0014] The outer hexagon is divided into six triangular regions, wherein the corner points of each region are formed by a zero voltage space vector and two adjacent long outer voltage space vectors. Each region is further divided into four triangular segments, wherein at least one corner point of each segment has two redundant voltage space vectors. Now, in order to modulate any output voltage specific to the operating point by means of a voltage vector, it is determined in which region and in which segment of the region the output voltage space vector specific to the operating point representing the output voltage is located. Subsequently, the output voltage space vector specific to the operating point can be generated by pulse width modulation of the voltage space vector that spans the segment. For this purpose, a switching pattern is determined in which the sequence and duration of the segment-specific voltage space vectors used for modulation are determined.
[0015] When modulating the output voltage, the following voltage vectors in the switching mode are also used, which are generated by the switching state in which the midpoint switching device participates, and therefore, the phase tap of at least one switching part is connected to the midpoint terminal circuit of the intermediate circuit. In the case where the midpoint switches of these midpoint switching devices are provided with a quality lower than that of the switches of the high-side switching device and the low-side switching device, for example for cost reasons, these midpoint switches have higher conduction losses in certain operating ranges. These operating ranges are characterized, for example, by the modulation degree and / or modulation index and / or modulation degree and / or phase current and / or temperature of the midpoint switching device. The modulation degree of the three-level inverter describes the ratio of the current output voltage to the maximum possible output voltage that can be provided by the three-level inverter. In order to reduce these conduction losses, a variant of the switching mode that reduces the conduction losses is determined, and preferably always provided when there is an operating range of the three-level inverter with increased conduction losses. Outside this operating range of increased conduction losses, the voltage vectors of the switching mode can be alternated, for example, so that these voltage vectors are evenly loaded within the modulation period.
[0016] In a variant of the switching mode for reducing conduction losses, the participation of the midpoint switching device in the switching state is reduced. For this purpose, at least one voltage space vector, in particular one of the zero voltage space vectors and / or one of the internal short voltage space vectors, is replaced by two other voltage space vectors. In the case of low modulation indexes (e.g. below 0.6) and in the case of high phase currents, the zero voltage space vector, for example generated only by the midpoint switching device, is replaced at least partially by a voltage space vector generated only with the participation of the high-side switching device and / or by a voltage space vector generated only with the participation of the low-side switching device, depending on the modulation index.
[0017] In the case of certain modulation degrees, in particular in the case of modulation degrees of approximately 0.6 and high phase currents, one of the redundant internal short-circuit voltage space vectors is replaced by two alternative voltage space vectors adjacent in the space vector diagram, namely the basic voltage space vector and the zero voltage space vector, by providing these alternative voltage space vectors alternately and with equal weighting in time. This makes it possible to relieve the center point switch in a simple manner when necessary.
[0018] It can also be provided that the time weighting of the redundant voltage vectors within the switching pattern is determined in such a way that the deviation of the midpoint voltage is reduced. This embodiment is based on the recognition that the switching state involving the midpoint switching device causes a current load in the midpoint terminal, and if the current load is not compensated within the modulation period, the current load may cause an undesirable deviation in the midpoint voltage. This deviation can be achieved by the time weighting of the redundant voltage vectors in the switching pattern and in a variant of the switching pattern that reduces the conduction losses. In the case where two voltage vector pairs with redundant voltage vectors participate in the modulated output voltage, the following voltage vector pair is mainly used for midpoint balancing, in which the redundant voltage vector with a higher time weighting has a smaller number of switching states involving the midpoint switch. Therefore, it is possible to simultaneously achieve a reduction in midpoint voltage variation and a reduction in the load on the midpoint switching device.
[0019] The embodiments described with regard to the method according to the invention and their advantages apply correspondingly to the control device according to the invention, the power electronics module according to the invention and the motor vehicle according to the invention.
[0020] Further features of the invention are apparent from the claims, the drawings and the description of the drawings. The features and feature combinations mentioned above in the description and the features and feature combinations mentioned below in the description of the drawings and / or shown individually in the drawings can be used not only in the respectively given combination but also in other combinations or alone. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] The present invention will now be described in detail according to a preferred embodiment and with reference to the accompanying drawings. Shown in the drawings:
[0022] Figure 1 A circuit diagram of a design of a three-level inverter is shown;
[0023] Figure 2 A diagram showing a vector diagram of a three-level inverter;
[0024] Figure 3 A diagram showing a switching pattern for modulating the output voltage;
[0025] Figure 4 a diagram showing the time proportions of different voltage vectors within a switching pattern; and
[0026] Figure 5 A diagram showing a switching mode variant of a three-level inverter for modulating the output voltage to reduce conduction losses is shown.
[0027] In the figures, identical elements or elements having the same function are provided with the same reference symbols. DETAILED DESCRIPTION
[0028] Figure 1 A three-level inverter 1 for an electric vehicle is shown. The three-level inverter 1 has an intermediate circuit 2 on the input side, which here has three intermediate circuit branches 2a, 2b, 2c, each of which has a series circuit consisting of two capacitors C1, C2. The high-side terminal DC+ and the low-side terminal DC- of the intermediate circuit 2 are connected to the poles of an electric energy storage device of the motor vehicle, which supplies the intermediate circuit 2 with a DC voltage V DC Here, half of the DC voltage V is applied to each capacitor C1, C2. DC / 2. In addition, the three-level inverter 1 has three switch parts 3a, 3b, 3c, which are electrically connected to one of the intermediate circuit branches 2a, 2b, 2c. However, it can also be provided that the intermediate circuit 2 has only one intermediate circuit branch with two capacitors C1, C2 connected in series, and the switch parts 3a, 3b, 3c are connected to the capacitors C1, C2. Each switch part 3a, 3b, 3c has a phase tap u, v, w, which is connected to the phase Phu, Phv, Phw of the electric drive device of the motor vehicle.
[0029] Each switch section has three switch devices S1, S2, S3, which can each have at least one switch configured as a semiconductor switch, such as an IGBT. The switch devices S1 and S2 are connected in circuit to form the half bridge HB of the corresponding switch section 3a, 3b, 3c. The first switch device S1 is a high-side switch device and is connected to the high-side terminal DC+ of the intermediate circuit 2 and the tap A of the corresponding half bridge HB, and the high-side terminal is connected to the positive pole of the electric energy storage device. The second switch device S2 is a low-side switch device and is connected to the tap of the corresponding half bridge HB and the low-side terminal DC- of the intermediate circuit 2, and the low-side terminal is connected to the negative pole of the electric energy storage device. The third switch device S3 is a midpoint switch device and is connected to the midpoint terminal N and the tap of the corresponding intermediate circuit branch 2a, 2b, 2c between the two capacitors C1 and C2. The midpoint switch device S3 here respectively has two midpoint switches S3a and S3b connected in reverse series.
[0030] The three-level inverter 1 can assume 27 switching states, by means of which the desired operating point-specific output voltage can be modulated to be applied to the phases Phu, Phv, Phw. Each switching state generates a voltage vector which can be Figure 2 The space vector shown Figure 4 In the space vector Figure 4In the figure, different switching states (u, v, w) are marked at discrete points, where u, v, w = 0, 1, 2, where u indicates which of the switching devices S1, S2, S3 in the first switching part 3a is closed, v indicates which of the switching devices S1, S2, S3 in the second switching part 3b is closed, and w indicates which of the switching devices S1, S2, S3 in the third switching part 3c is closed. "0" means that the corresponding low-side switching device S2 is closed and thus the corresponding phase taps u, v, w are connected to the low-side terminal DC-. "1" means that the corresponding midpoint device S3 is closed and thus the corresponding phase taps u, v, w are connected to the midpoint terminal N. "2" means that the corresponding high-side switching device S1 is closed and thus the corresponding phase taps u, v, w are connected to the high-side terminal DC+. Here, the discrete points mark the arrows of the voltage space vectors generated by the corresponding switching states, which have a certain length and a certain phase angle. It can be seen here that there are switch states that produce the same voltage vector. For example, switch states "221" and "110" produce the same voltage vector. Switch states "000", "111", "222" also produce the same voltage vector, that is, zero voltage vectors v01, v02, v03 respectively.
[0031] The space vector diagram is divided into six regions K1, K2, K3, K4, K5, K6, wherein each region K1, ... K6 is divided into four segments Q1, Q2, Q3, Q4 (only the first region K1 is shown here). If a certain output voltage specific to the operating point is to be modulated, for example Figure 2 The output voltage vector V a , then first determine the corresponding output voltage vector V a In which region K1, ...K6 is it located and in which section Q1, ...Q4 of the corresponding region K1, ...K6 is it located. For example, the output voltage vector V a The first section Q1 in the first region K1 is located and can therefore be modulated or approached by the voltage vector v01 generated by the switching state "000", the voltage vector v02 generated by the switching state "111", the voltage vector v03 generated by the switching state "222", the voltage vector v2p generated by the switching state "221", the voltage vector v2n generated by the switching state "110", the voltage vector v1p generated by the switching state "211", the voltage vector v1n generated by the switching state "100", which form the corner points of the first section Q1 and thus surround the output voltage vector V to be generated a .
[0032] In the case of a low modulation index of the three-level inverter 1, especially when the modulation index is below a predetermined threshold (e.g., 0.6), in the case of symmetric space vector modulation, the internal short voltage vectors v1p, v1n, v2p, v2n and the zero voltage vectors v01, v02, v03 alternate within the switching pattern in order to achieve an even load on the switching devices. For example, the switching pattern SM shown in Figure 3 may be specified. In Figure 4 the total duration d0 of the zero voltage vectors v01, v02, v03, the total duration d1 of the voltage vectors v1p and v1n, and the duration d2 of the voltage vectors v2p and v2n within the switching pattern SM are shown. Within the total duration d0, the individual durations of the zero voltage vectors v01, v02, v03 may be chosen to be of the same length. However, depending on the modulation index and the phase current, the proportion of the zero voltage vector v02 may be reduced and distributed to the other two zero voltage vectors v01, v03.
[0033] In particular, the voltage vectors v1p, v1n, v2p, v2n influence the midpoint voltage at the midpoint terminal N of the intermediate circuit 2 because these voltage vectors v01, v1p, v1n, v2p, v2n are generated with the participation of at least one midpoint switching device S3 and, therefore, at least one of the phase taps u, v, w is electrically connected to the midpoint terminal N. In each switching state, the more phase taps u, v, w connected to the midpoint terminal N, i.e., the more midpoint switching devices S3 participating in the switching state, the greater the undesired influence on the midpoint voltage. Therefore, in the region K1, either the voltage vector v1n is weighted proportionally higher than the voltage vector v1p or the voltage vector v2n is weighted proportionally higher than the voltage vector v2p. Since, during generation, the voltage vector v1n is connected to the midpoint N only via one phase tap u, while the voltage vector v2n is connected to the midpoint terminal N via two phase taps u, v, the balancing of the midpoint voltage is carried out by weighting the voltage vector v1n proportionally higher in order to relieve the load on the midpoint switching device S3.
[0034] In the case of a high modulation index, e.g., when the modulation index is about 0.6 and the phase current is high, the midpoint switching device S3 mainly has high conduction losses. Therefore, the duration d1 or d2 of the redundant voltage vectors v1p, v1n or v2p, v2n is reduced by at least the duration d1 red or d2 red , so that the voltage vectors v1p, v1n or v2p, v2n only still occur in the switching pattern for the duration d1* or d2*. In order to achieve this reduction in duration d1 red or d2 red , a reduced-conduction-loss variant SMa* (for d1 > d2) or SMb* (for d1 < d2) of the switching pattern SM is determined. In Figure 5 Variants SMa*, SMb* for reducing conduction losses are shown for two consecutive modulation periods P1, P2. For d1>d2, the vectors v1p, v1n in the variant SMa* are replaced by adjacent voltage vectors v01 and v3 or v03 and v3 in a configurable proportion. For d2>d1, the vectors v2p, v2n in the variant SMb* are replaced by adjacent voltage vectors v01 and v5 or v03 and v5 in a configurable proportion. These voltage vectors v01, v03, v3 and v5 do not have the participation of the midpoint switching device S3, but can be mapped to the voltage vectors v1p, v1n or v2p, v2n located between them in the space vector diagram. Here, the time weighting of the voltage vector v2n, v1p of the midpoint switching device S3 whose switching state has the largest proportion can be mainly reduced. In addition, the zero vector v01 can be established each time in the first modulation period P1, and the zero vector v03 can be established each time in the second modulation period P2. Therefore, the load is evenly distributed to the high-side switching device S1 and the low-side switching device S2.
Claims
1. A method for operating a three-level inverter (1), the three-level inverter having an intermediate circuit (2) and at least three switching sections (3a, 3b, 3c) connected to the intermediate circuit (2), the intermediate circuit having three terminals in the form of a high-side terminal (DC+), a low-side terminal (DC-) and a midpoint terminal (N), the switching sections each having a phase tap (u, v, w) for electrical connection to each phase (Phu, Phv, Phw) of an electric drive device, wherein: Each switching section (3a, 3b, 3c) has three switching devices, each in the form of a high-side switching device (S1) connected to a high-side terminal (DC+), a low-side switching device (S2) connected to a low-side terminal (DC-) and a midpoint switching device (S3) connected to a midpoint terminal (N), wherein in order to modulate an output voltage (V a ), determining a switching mode (SM) for the switching means (S1, S2, S3), by means of which the switching means (S1, S2, S3) are switched into different switching states and in which the phase taps (u, v, w) of the corresponding switching parts (3a, 3b, 3c) are respectively connected to one of the terminals (DC+, DC-, N) of the intermediate circuit (2) while generating a voltage vector (v01, v02, v03, v1p, v1n, v2p, v2n), It is characterized in that In order to reduce the conduction losses of the midpoint switching device (S3), a switching pattern (SM) is predefined in a variant (SMa*, SMb*) for reducing conduction losses, in which at least one voltage vector (v02, v1p, v1n, v2p, v2n) of the switching pattern (SM) generated by a switching state in which at least one midpoint switching device (S3) is involved is at least partially replaced by two voltage vectors (v01, v03, v3, v5) generated by a switching state in which the midpoint switching device (S3) is not involved.
2. The method according to claim 1, characterized in that A conduction-reducing variant (SMa*, SMb*) of the switching mode (SM) is provided depending on the modulation index and / or the modulation degree and / or the phase current and / or the temperature of the midpoint switching device (S3).
3. The method according to claim 2, characterized in that Depending on the modulation index and the phase current of the reduced conduction variant (SMa*, SMb*) for the switching mode (SM), a zero voltage vector (v02) generated by a switching state with the participation of a midpoint switching device (S3) is at least partially replaced by a zero voltage vector (v01, v03) generated by a switching state without the participation of the midpoint switching device (S3).
4. The method according to claim 2 or 3, characterized in that: Depending on the modulation degree and the phase current of the variant (SMa*, SMb*) for reducing conduction losses of the switching mode (SM), at least one of the two voltage vectors (v1p, v1n, v2p, v2n) redundantly generated by different switching states with the participation of a midpoint switching device (S3) is at least partially replaced by a zero voltage vector (v01, v03) and a basic voltage vector (v3, v5) adjacent to the redundant voltage vector (v1p, v1n, v2p, v2n), wherein the zero voltage vector (v01, v03) and the basic voltage vector (v3, v5) are generated without the participation of the midpoint switching device (S3).
5. The method according to claim 4, characterized in that At least one of the redundant voltage vectors (v1p, v2n) of the center point switching device (S3) whose switching state has the highest proportion is at least partially replaced by a zero voltage vector (v01, v03) and a basic voltage vector (v3, v5).
6. The method according to any one of the preceding claims, characterized in that A time weighting of voltage vectors (v1p, v1n, v2p, v2n) redundantly generated by different switching states of switching devices (S1, S2, S3) is determined within a switching pattern (SM) such that deviations of the center point voltage are reduced within a modulation period.
7. The method according to claim 6, characterized in that In the case of two voltage vector pairs each with two redundant voltage vectors (v1p, v1n; v2p, v2n), the redundant voltage vector (v2n) of the voltage vector pair whose switching state has a lower proportion of the involved center point switching device (S3) is weighted more heavily in time when reducing the deviation of the center point voltage in order to reduce the conduction losses of the center point switching device (S3). 8 . A control device for a power electronics module of a motor vehicle, the control device being designed to carry out the method according to one of the preceding claims.
9. Power electronic modules for motor vehicles, having: - A three-level inverter (1), comprising an intermediate circuit (2) and at least three switching parts (3a, 3b, 3c) connected to the intermediate circuit (2), the intermediate circuit having three terminals in the form of a high-side terminal (DC+), a low-side terminal (DC-) and a midpoint terminal (N), the switching parts each having a phase tap (u, v, w) for being electrically connected to a phase (Phu, Phv, Phw) of an electric drive device, wherein: Each switch section (3a, 3b, 3c) has three switch devices, each of which is in the form of a high-side switch device (S1) connected to the high-side terminal (DC+), a low-side switch device (S2) connected to the low-side terminal (DC-), and a midpoint switch device (S3) connected to the midpoint terminal (N), and - A control device according to claim 8.
10. A motor vehicle having an electrical energy storage device, an electric drive device and a power electronics module according to claim 9, wherein: The three-level inverter (1) is connected on the input side to an electrical energy storage device and on the output side to the phases (Phu, Phv, Phw) of the electric drive.
