Dual pressure point terahertz chip, assembly and method of manufacture

Abstract

The application provides a dual-press-point terahertz chip, an assembly and a preparation method. The dual-press-point structure of the dual-press-point terahertz chip comprises a substrate, a signal pad and two ground pads symmetrically arranged on both sides of the signal pad; the signal pad comprises a first signal pad and a second signal pad, the first signal pad is close to the edge of the dual-press-point terahertz chip, and the second signal pad is close to the inside of the dual-press-point terahertz chip; the width of the second signal pad is smaller than the width of the first signal pad; the two ground pads are special-shaped pads, and each of the two ground pads comprises a first part and a second part connected to each other, the first part is close to the edge of the dual-press-point terahertz chip, one end of the second part is connected to the first part, and the other end of the second part gradually approaches the second signal pad; the minimum distance between the second part of each of the two ground pads and the transverse central axis of the second signal pad is smaller than the probe spacing, and the maximum distance is greater than the probe spacing. The application can reduce the parasitic inductance of the terahertz chip.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of terahertz chip design, and in particular to a double-press-point terahertz chip, an assembly and a preparation method. BACKGROUND

[0002] With the wide application of terahertz technology in the fields of wireless communication and radar imaging, terahertz monolithic integrated circuit chips have developed rapidly. Terahertz chips belong to planar integrated circuits, and the chip interface generally adopts a common plane waveguide (GSG) form of a press point. G represents a ground press point, and S represents a signal press point. The press point is used for on-chip testing and wire bonding assembly.

[0003] In the terahertz frequency band (above 100 GHz), the high-frequency microwave probe structure for electrical performance testing is very precise. The width of the probe is generally not more than 20 um, and the spacing between adjacent needles is 50 um. Such a design can ensure that the signal transmission loss of the test probe on the chip pad path is as low as possible, and the reflection is as small as possible, so that the electrical performance of the terahertz chip circuit can be accurately tested. In order to match the test probe, the width of the signal pad in the conventional terahertz chip is 35 um, the gap between the signal pad and the ground pad is 20 um, and the width of the ground pad on both sides is 80 um. The ground pad of the terahertz chip is connected to the ground on the back of the chip through a grounding hole. Figure 1 .

[0004] Although the signal pad of the conventional terahertz chip can meet the demand of accurate testing, it is limited by the small pad size. When the chip needs to be interconnected with other microstrip transmission lines, only one 25 um diameter bonding wire can be used for bonding. The single-wire bonding diagram of the terahertz chip is as follows Figure 2 . This single-wire bonding method is more likely to introduce a larger parasitic inductance in the terahertz frequency band. SUMMARY

[0005] The embodiments of the present application provide a double-press-point terahertz chip, an assembly and a preparation method to solve the problem of reducing parasitic inductance of a terahertz chip.

[0006] In a first aspect, the embodiments of the present application provide a double-press-point terahertz chip, comprising:

[0007] a substrate, a signal pad and two ground pads symmetrically arranged on both sides of the signal pad; the signal pad and the two ground pads are arranged on the edge of the front surface of the substrate;

[0008] The signal pads include first signal pads and second signal pads which are linearly connected in sequence transversely and perpendicularly to the edge of the front surface of the substrate, the first signal pads are close to the edge of the dual-pressure-point terahertz chip, and the second signal pads are close to the inside of the dual-pressure-point terahertz chip; the width of the second signal pads is smaller than the width of the first signal pads;

[0009] The two ground pads are special-shaped pads, and each of the two ground pads includes a first part and a second part which are connected to each other, the first part is close to the edge of the dual-pressure-point terahertz chip, one end of the second part is connected to the first part, and the other end of the second part gradually approaches the second signal pad; the minimum distance between the second part of each of the two ground pads and the transverse central axis of the second signal pad is smaller than the probe spacing, and the maximum distance between the second part of each of the two ground pads and the transverse central axis of the second signal pad is greater than the probe spacing;

[0010] The first signal pads are used for bonding with multi-bonding wires, and the second signal pads and the second parts of the two ground pads are used for cooperating with the probes; the width of the first signal pads is greater than the sum of the diameters of the multi-bonding wires.

[0011] In a second aspect, an embodiment of the present application provides a dual-pressure-point terahertz assembly, including:

[0012] A microstrip transmission line and the dual-pressure-point terahertz chip described above.

[0013] The microstrip transmission line is bonded with the first signal pads through multi-bonding wires.

[0014] In a third aspect, an embodiment of the present application provides a preparation method of a dual-pressure-point terahertz assembly, applied to the preparation of the dual-pressure-point terahertz assembly described above, including:

[0015] The dual-pressure-point terahertz chip is prepared;

[0016] The probes are stuck on the second parts of the two ground pads and the second signal pad of the dual-pressure-point terahertz chip, and the dual-pressure-point terahertz chip is tested;

[0017] After the test, the multi-bonding wires are bonded on the first signal pads of the dual-pressure-point terahertz chip, and the external microstrip transmission line is connected, so that the dual-pressure-point terahertz assembly is prepared.

[0018] The embodiment of the present application provides a double-pressure-point terahertz chip, an assembly and a preparation method, the first signal pad is close to the edge of the double-pressure-point terahertz chip, bonding with the microstrip transmission line is facilitated, the minimum distance between the second part of the two ground pads and the transverse central axis of the second signal pad is less than the probe spacing, the maximum distance between the second part of the two ground pads and the transverse central axis of the second signal pad is greater than the probe spacing, the double-pressure-point terahertz chip is tested by the probe, and the needs of on-chip testing and multi-wire bonding assembly of the double-pressure-point terahertz chip are considered. The double-pressure-point terahertz chip has a simple structure, when the double-pressure-point terahertz chip needs to be tested on-chip, the probe can be used to directly pierce the two ground pads and the small pressure points of the second signal pad for testing; when the double-pressure-point terahertz chip needs to be bonded, the large pressure point of the first signal pad can ensure that multiple bonding wires are bonded, compared with the single-wire bonding mode with the same length, multiple inductors are connected in parallel, thereby reducing the parasitic inductance and improving transmission matching. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0020] Figure 1 is a structure schematic diagram of a probe on-chip testing of a terahertz chip;

[0021] Figure 2 is a structure schematic diagram of single-wire bonding of a terahertz chip;

[0022] Figure 3a is a structure schematic diagram of a double-pressure-point terahertz chip provided by the embodiment of the present application;

[0023] Figure 3b is a structure schematic diagram of on-chip testing of a double-pressure-point terahertz chip provided by the embodiment of the present application;

[0024] Figure 3c is a structure schematic diagram of double-wire bonding of a double-pressure-point terahertz chip provided by the embodiment of the present application;

[0025] Figure 4a is a structure schematic diagram of on-chip testing of a microwave millimeter wave chip;

[0026] Figure 4b is a structure schematic diagram of double-wire bonding of a microwave millimeter wave chip.

[0027] Explanation of reference signs

[0028] In the figure, 1, substrate; 2, first signal pad; 3, second signal pad; 4, ground pad; 41, first part; 42, second part; 5, probe; 6, microstrip transmission line; 7, bonding wire; 8, microwave millimeter wave chip signal pad; 9, microwave millimeter wave chip ground pad; 10, ground hole; 11, terahertz chip ground pad; 12, terahertz chip signal pad. DETAILED DESCRIPTION

[0029] In order to make the person skilled in the art better understand the present application, the technical solutions in the embodiments of the present application will be clearly described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative labor should belong to the scope of protection of the present application.

[0030] The terms "include", and other any variations thereof, in the specification and claims of the present application and the above-described drawings, refer to "including but not limited to", and are intended to cover non-exclusive inclusion, and are not limited to the examples listed in the text. In addition, the terms "first" and "second" and the like are used to distinguish different objects, rather than to describe a specific order.

[0031] In order to ensure good transmission of signals, two compensation methods are generally used. One is to design a T-shaped matching measure at the position of the microstrip transmission line on one side of the bonding, to offset the influence of the parasitic inductance of the bonding wire. The disadvantage is that the larger the parasitic inductance, the narrower the matching bandwidth. It is difficult to achieve ultra-wideband matching for the T-shaped matching of single-wire bonding, and special design is required for specific frequency bands. The other is to assemble the bonding wire with as low arc height and as short arc length as possible to reduce the parasitic inductance. The disadvantage is that the assembly difficulty is increased and the assembly success rate is reduced.

[0032] The implementation of the present application will be described in detail below in combination with specific drawings:

[0033] Figure 3a A structure diagram of a dual-pressure-point terahertz chip is provided for the embodiments of the present application. Referring to Figure 3a The dual-pressure-point terahertz chip comprises:

[0034] The substrate 1, the signal pad, and the two ground pads 4 symmetrically arranged on both sides of the signal pad are all arranged on the edge of the front surface of the substrate 1;

[0035] The signal pad comprises the first signal pad 2 and the second signal pad 3 connected in sequence in a transverse linear manner perpendicular to the edge of the front surface of the substrate 1. The first signal pad 2 is close to the edge of the dual-pressure-point terahertz chip, and the second signal pad 3 is close to the inside of the dual-pressure-point terahertz chip. The width of the second signal pad 3 is smaller than the width of the first signal pad 2.

[0036] The two ground pads 4 are shaped pads, each of which comprises a first part 41 and a second part 42 connected to each other, the first part 41 is close to the edge of the dual-pressure-point terahertz chip, one end of the second part 42 is connected to the first part 41, and the other end of the second part 42 gradually approaches the second signal pad 3; the minimum distance between the second part 42 of each ground pad 4 and the transverse central axis of the second signal pad 3 is less than the probe 5 spacing, and the maximum distance between the second part 42 of each ground pad 4 and the transverse central axis of the second signal pad 3 is greater than the probe 5 spacing.

[0037] The first signal pad 2 is used for bonding with the multi-bonding wire 7, and the second signal pad 3 and the second part 42 of the two ground pads 4 are used for cooperating with the probe 5; the width of the first signal pad 2 is greater than the sum of the diameters of the multi-bonding wire 7.

[0038] The first signal pad 2 is close to the edge of the dual-pressure-point terahertz chip, which facilitates the bonding of the dual-pressure-point terahertz chip with the external microstrip transmission line 6 through the bonding wire 7.

[0039] The substrate 1 of the dual-pressure-point terahertz chip is provided with a signal line, the second signal pad 3 is connected with the signal line, and is used for transmitting signals.

[0040] The width of the second signal pad 3 is less than the width of the first signal pad 2, so that a gap is left between the second part 42 and the second signal pad 3, which facilitates the testing of the probe 5, and the specific value of the gap can be determined according to the width of the second signal pad 3, the second part 42 and the probe 5 spacing, etc., so as to satisfy the in-situ testing of the dual-pressure-point terahertz chip by the probe 5 with a spacing of 50 um.

[0041] The other end of the second part 42 gradually approaches the second signal pad 3, so that the gap between the two second parts 42 and the second signal pad 3 gradually decreases, the minimum distance from the transverse central axis of the second signal pad 3 to the second part 42 is less than the probe 5 spacing of 50 um, and the maximum distance between the second part 42 of each ground pad 4 and the transverse central axis of the second signal pad 3 is greater than the probe 5 spacing, so that when the middle probe 5 is pierced on the transverse central axis of the second signal pad 3, the probes 5 on both sides are located on the two second parts 42 respectively, and the probes 5 on both sides can be pierced on the second part 42, so that the probe 5 can perform in-situ testing on the dual-pressure-point terahertz chip.

[0042] The width of the first signal pad 2 is greater than the sum of the diameters of the multi-bonding wire 7, so that the width of the first signal pad 2 is large enough, the multi-bonding wire 7 is arranged in the vertical direction in sequence and linearly, and the first signal pad 2 can accommodate all the bonding wires 7, which facilitates the smooth bonding of the multi-bonding wire 7 on the first signal pad 2. Figure 3a

[0043] ​The embodiment of the present application facilitates bonding with the microstrip transmission line 6 by arranging the first signal pad 2 close to the edge of the dual-pressure-point terahertz chip, and facilitates testing of the dual-pressure-point terahertz chip by the probe 5 by arranging the minimum distance between the second part 42 of the two ground pads 4 and the transverse central axis of the second signal pad 3 to be less than the probe 5 spacing and the maximum distance between the second part 42 of the two ground pads 4 and the transverse central axis of the second signal pad 3 to be greater than the probe 5 spacing, thus meeting the requirements of on-chip testing and multi-wire bonding assembly of the dual-pressure-point terahertz chip. The dual-pressure-point terahertz chip has a simple structure, and when the dual-pressure-point terahertz chip needs to be tested on-chip, the probe 5 can be used to directly pierce the two ground pads 4 and the small pressure points of the second signal pad 3 for testing; when the dual-pressure-point terahertz chip needs to be bonded, the large pressure point of the first signal pad 2 can ensure bonding of multiple bonding wires 7, and compared with the single-wire bonding mode of the same length, it is equivalent to multiple inductors in parallel, thereby reducing the parasitic inductance and improving the transmission matching.

[0044] In a possible implementation, the number of bonding wires 7 is 2, and the bonding wire 7 is a bonding gold wire.

[0045] In other possible implementations, the bonding gold wire can be other forms of bonding wires, such as a bonding silver wire, a bonding copper wire, a bonding aluminum wire, etc. The embodiment of the present application takes the bonding gold wire as an example for description.

[0046] In a possible implementation, the shape of the bonding gold wire is arched.

[0047] The arched shape of the bonding gold wire is one of the key factors to ensure the bonding quality and stable signal transmission. By controlling the process parameters, optimizing the equipment performance, and strengthening the material research, etc., a required arch shape can be formed, thereby improving the reliability and performance of the gold wire bonding.

[0048] In a possible implementation, the first part of the two ground pads 4 is respectively provided with a grounding hole 10, and the first part 41 is respectively grounded through the grounding hole 10.

[0049] The grounding hole 10 is connected with the grounding pin of the dual-pressure-point terahertz chip as a ground connection point in the circuit, thereby ensuring the potential stability of the entire circuit system and preventing electrical interference and noise caused by potential difference.

[0050] In a possible implementation, the shape of the second signal pad 3 is rectangular.

[0051] The rectangular shape of the second signal pad 3 facilitates connection of the second signal pad 3 with a signal line for signal transmission.

[0052] In a possible implementation, the side of the first signal pad 2 close to the edge of the dual-pressure-point terahertz chip is flush with the side of the first part 41 of the two ground pads 4 close to the edge of the dual-pressure-point terahertz chip.

[0053] The first signal pad 2 and the first part 41 are flush with each other on the side close to the edge of the dual-voltage-point terahertz chip, facilitating the installation of the bonding wire 7 on the first signal pad 2 and the grounding of the first part 41.

[0054] In a possible implementation, the second signal pad 3 is flush with the second part 42 of the two ground pads 4 on the side close to the inner part of the dual-voltage-point terahertz chip.

[0055] The second signal pad 3 and the second part 42 are flush with each other on the side close to the inner part of the dual-voltage-point terahertz chip, facilitating the needle test of the dual-voltage-point terahertz chip by the probe 5.

[0056] In a possible implementation, the first signal pad 2 is square.

[0057] The square first signal pad 2 facilitates the installation of the bonding wire 7 and the bonding of the two bonding wires 7 to the first signal pad 2.

[0058] The embodiment of the application further discloses a dual-voltage-point terahertz assembly, which comprises a microstrip transmission line 6 and the dual-voltage-point terahertz chip.

[0059] The microstrip transmission line 6 is bonded to the first signal pad 2 through the multiple bonding wires 7.

[0060] The bonding of the microstrip transmission line 6 to the first signal pad 2 through the multiple bonding wires 7 connects the microstrip transmission line 6 to the dual-voltage-point terahertz chip, facilitating signal transmission.

[0061] The embodiment of the application further discloses a preparation method of a dual-voltage-point terahertz assembly, which is applied to the preparation of the dual-voltage-point terahertz assembly.

[0062] The dual-voltage-point terahertz chip is prepared.

[0063] The probe 5 is stuck on the second part 42 of the two ground pads 4 and the second signal pad 3 of the dual-voltage-point terahertz chip, and the dual-voltage-point terahertz chip is tested.

[0064] After the test, the multiple bonding wires 7 are bonded to the first signal pad 2 of the dual-voltage-point terahertz chip, and the external microstrip transmission line 6 is connected, so that the dual-voltage-point terahertz assembly is prepared.

[0065] According to the above method, the first signal pad 2, the second signal pad 3, the ground pad 4 and the like are arranged on the substrate 1 according to the requirements of the probe 5 spacing and bonding, so that the dual-voltage-point terahertz chip is prepared.

[0066] According to the data of the probe 5 spacing, the data of the probe 5 spacing is located between the minimum distance and the maximum distance from the second part 42 of the ground pad 4 to the transverse central axis of the second signal pad 3, so that the probe 5 is smoothly pierced on the second part 42 and the second signal pad 3, and the double-point-pressing terahertz chip is tested by using the probe 5, so that the double-point-pressing terahertz chip can be tested on the wafer.

[0067] After the test is completed, since the first signal pad 2 is located at the edge of the double-point-pressing terahertz chip, and the length and width dimensions of the first signal pad 2 are sufficient to accommodate the multi-bonding wires 7, so that the multi-bonding wires 7 can be mounted on the first signal pad 2, so that the double-point-pressing terahertz chip is connected to the external microstrip transmission line 6 through the multi-bonding wires 7, and finally a double-point-pressing terahertz assembly is obtained.

[0068] The first signal pad 2 of the present application is close to the edge of the double-point-pressing terahertz chip, which is convenient for bonding with the microstrip transmission line 6. By setting the minimum distance between the second part 42 of the two ground pads 4 and the transverse central axis of the second signal pad 3 to be less than the probe 5 spacing, and the maximum distance between the second part 42 of the two ground pads 4 and the transverse central axis of the second signal pad 3 to be greater than the probe 5 spacing, the double-point-pressing terahertz chip is tested by the probe 5, and the needs of wafer testing and multi-wire bonding assembly of the double-point-pressing terahertz chip are considered. The double-point-pressing terahertz chip structure is simple, when the double-point-pressing terahertz chip needs to be tested on the wafer, the probe 5 can be used to directly pierce the two ground pads 4 and the second signal pad 3 small pressing points for testing; when the double-point-pressing terahertz chip needs to be bonded, the first signal pad 2 large pressing point can ensure the bonding of the multi-bonding wires 7. Compared with the single-wire bonding method of the same length, it is equivalent to the parallel connection of multiple inductors, thereby reducing the parasitic inductance and improving the transmission matching.

[0069] The specific implementation of the scheme is introduced above. In the actual process, experimental analysis is carried out based on specific examples to verify the effect of the above scheme.

[0070] The in-chip test probe 5 of the microwave millimeter wave circuit chip below 100GHz frequency band generally adopts a needle spacing of 100um and a probe width of about 40um, and the corresponding test pressure point size is as follows: the width of the microwave millimeter wave circuit chip signal pad 8 in the middle is 70um, the width of the microwave millimeter wave circuit chip ground pad 9 on both sides is 100um, and the gap between the microwave millimeter wave circuit chip signal pad 8 and the microwave millimeter wave circuit chip ground pad 9 is 40um. Since the diameter of the bonding wire 7 is 25um, the microwave millimeter wave circuit chip signal pad 8 with a length and width of 70um can accommodate 2 bonding wires 7, which can meet the requirement of double wire bonding. However, since the spacing of the in-chip test probe 5 of the terahertz frequency band is 50um, the setting of the microwave millimeter wave circuit chip signal pad 8 and the microwave millimeter wave circuit chip ground pad 9 cannot adapt to the in-chip test probe 5 of the terahertz frequency band. Figure 4a 、 Figure 4b .

[0071] The in-chip test probe 5 of the terahertz circuit chip above 100GHz frequency band generally adopts a needle spacing of 50um and a probe width of about 20um, and the corresponding test pressure point size is as follows: the width of the terahertz chip signal pad 12 in the middle is 35um, the width of the terahertz chip ground pad 11 on both sides is 80um, and the gap between the terahertz chip signal pad 12 and the terahertz chip ground pad 11 is 20um. The setting of the terahertz chip signal pad 12 and the two terahertz chip ground pads 11 with a length and width of 35um can adapt to the in-chip test probe 5 (spacing of 50um) of the terahertz frequency band, but can only meet the requirement of single wire bonding, and the width size of the terahertz chip signal pad 12 cannot accommodate 2 bonding wires 7. The in-chip test probe 5 and single wire bonding schematic diagram of the terahertz chip are as follows: Figure 1 、 Figure 2 .

[0072] In combination with the respective pressure points of the microwave millimeter wave chip and the terahertz circuit chip, the length and width of the microwave millimeter wave chip signal pad 8 are sufficient to accommodate 2 bonding wires 7 for bonding, the terahertz chip signal pad 12 and the two terahertz chip ground pads 11 meet the test requirement of the terahertz chip test probe 5 (spacing of 50um), the present application cascades and combines two kinds of pressure points to obtain a double pressure point terahertz chip, the first signal pad 2 is a large size pressure point with a length and width of 70um, which is close to the edge of the double pressure point terahertz chip, facilitating double wire bonding; the gap between the first part 41 and the first signal pad 2 is 40um, the second signal pad 3 is a small size pad with a length and width of 35um, which is close to the inside of the chip, the gap between the second part 42 and the second signal pad 3 is 20um, and the second signal pad 3 cooperates with the two second parts 42 to enable three probes 5 to be sequentially pierced onto the second part 42, the second signal pad 3 and the other second part 42, facilitating testing, and a structure schematic diagram of the double pressure point terahertz chip is as follows:Figure 3a Finally, a double-press-point terahertz chip which can meet the requirements of direct probe testing and double wire bonding is realized. Figure 3b 、 Figure 3c .

[0073] The double-press-point terahertz chip has a simple structure, when the double-press-point terahertz chip needs to be tested on a wafer, the probe 5 can be used to directly test the second part 42 of the two ground pads 4 and the small press point of the second signal pad 3; when the double-press-point terahertz chip needs to be bonded, the large press point of the first signal pad 2 can ensure the bonding of two bonding wires 7, compared with the single wire bonding mode of the same length, it is equivalent to two inductors in parallel, thereby reducing the parasitic inductance by nearly half and improving the transmission matching.

[0074] The above examples are only used to illustrate the technical solutions of the present application, but not limit it; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A dual-press-point terahertz chip, characterized by, The application relates to a double-press-point terahertz chip. The double-press-point terahertz chip comprises a substrate, a signal pad and two ground pads symmetrically arranged on two sides of the signal pad; the signal pad and the two ground pads are arranged on the edge of the front surface of the substrate; The signal pad comprises a first signal pad and a second signal pad which are linearly connected in sequence in the transverse direction and perpendicular to the edge of the front surface of the substrate; the first signal pad is close to the edge of the double-press-point terahertz chip; the second signal pad is close to the inner part of the double-press-point terahertz chip; the width of the second signal pad is smaller than that of the first signal pad; The two ground pads are special-shaped pads; each of the two ground pads comprises a first part and a second part which are connected to each other; the first part is close to the edge of the double-press-point terahertz chip; one end of the second part is connected to the first part; the other end of the second part gradually approaches the second signal pad; the minimum distance between the second part of each of the two ground pads and the transverse central axis of the second signal pad is smaller than the probe spacing; the maximum distance between the second part of each of the two ground pads and the transverse central axis of the second signal pad is greater than the probe spacing; The first signal pad is used for being bonded with a plurality of bonding wires; the second signal pad and the second part of the two ground pads are used for cooperating with the probe; the width of the first signal pad is greater than the sum of the diameters of the plurality of bonding wires.

2. The dual plasmonic terahertz chip of claim 1, wherein, The number of the bonding wires is 2; the bonding wires are bonding gold wires.

3. The dual plasmonic point terahertz chip of claim 2, wherein, The shape of the bonding gold wires is arc-shaped.

4. The dual plasmonic terahertz chip of claim 1, wherein, The first part of each of the two ground pads is provided with a grounding hole; the first part is grounded through the grounding hole.

5. The dual plasmonic terahertz chip of claim 1, wherein, The shape of the second signal pad is rectangular.

6. The dual plasmonic terahertz chip of claim 1, wherein, The side of the first signal pad close to the edge of the double-press-point terahertz chip is flush with the side of the first part of each of the two ground pads close to the edge of the double-press-point terahertz chip.

7. The dual plasmonic terahertz chip of claim 1, wherein, The side of the second signal pad close to the inner part of the double-press-point terahertz chip is flush with the side of the second part of each of the two ground pads close to the inner part of the double-press-point terahertz chip.

8. The dual plasmonic terahertz chip of claim 1, wherein, The first signal pad is square-shaped.

9. A double-press-point terahertz assembly, comprising a microstrip transmission line and the double-press-point terahertz chip according to any one of claims 1 to 8; wherein The microstrip transmission line is bonded with the first signal pad through the plurality of bonding wires.

10. A method for fabricating a dual-pressure-point terahertz component, characterized in that, The method is applied to the preparation of the double-press-point terahertz assembly according to claim 9; the method comprises the following steps: The double-press-point terahertz chip is prepared; The probe is stuck on the second part of the two ground pads and the second signal pad of the double-press-point terahertz chip; the double-press-point terahertz chip is tested; After the test, the plurality of bonding wires are bonded on the first signal pad of the double-press-point terahertz chip; the external microstrip transmission line is connected; the double-press-point terahertz assembly is prepared.

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