Power supply system and power factor correction control circuit and control method thereof

Abstract

The invention discloses a power supply system and a power factor correction control circuit and a control method thereof. The power factor correction control circuit is used for correcting a power factor of a rectification power supply so as to generate an output power supply to a load, and comprises a reference voltage generation circuit used for generating a reference voltage according to a rectification voltage of the rectification power supply; and the feedback modulation circuit is used for generating a modulation control signal according to the reference voltage and a feedback signal related to an output voltage of the output power supply, so as to control at least one switch in a power level circuit to switch an inductor in the power level circuit and adjust the output voltage. The reference voltage generating circuit selects one of at least two candidate voltages as the reference voltage according to comparison between the rectified voltage and at least one judgment threshold, so that at least part of the output voltage is positively correlated with the rectified voltage.

Description

Technical Field

[0001] The present invention relates to a power supply system, and more particularly to a power supply system capable of adjusting output power according to the peak value of input power. The present invention also relates to a power factor correction control circuit and a control method for controlling the power supply system. Background Art

[0002] Please refer to Figure 1A , Figure 1A is a schematic diagram of a power supply system 9000 of the prior art. Figure 1A As shown, the power supply system 9000 of the prior art includes a power factor correction conversion circuit 900 and a rectifier 92. The rectifier 92 rectifies the AC voltage to generate a rectified voltage VBD. The power factor correction conversion circuit 900 is used to convert the rectified voltage VBD to generate an output voltage VO after power factor correction. The power factor correction conversion circuit 900 includes a power factor correction control circuit 90 and a power stage circuit 91. The power stage circuit 91 is a boost converter, including a switch Swa, a diode Da and an inductor La. The switch Swa is an N-type metal oxide semiconductor (MOS) element. The power factor correction control circuit 90 is used to generate a modulation signal PWM according to the rectified voltage VBD and the feedback voltage VF, thereby controlling the switching of the switch Swa to convert the rectified voltage VBD into the output voltage VO. The power factor correction control circuit 90 is also used to correct the power factor of the power supply system 9000.

[0003] Please refer to Figure 1B , Figure 1B It is a waveform diagram of input voltage and output voltage in the power supply system of the prior art. Figure 1B As shown, after rectification by the rectifier 92, the waveform of the rectified voltage VBD is a sinusoidal wave with the same phase above zero, and the output voltage VO generated by the power factor correction conversion circuit of the prior art is usually a fixed value higher than the rectified voltage VBD.

[0004] The disadvantage of the above prior art is that the output voltage VO is a fixed voltage and cannot be adjusted according to the input voltage. The common output voltage value is, for example, 400 volts, and the minimum effective voltage value of the rectified voltage VBD is, for example, 85 volts, which will cause the MOS element in the power stage circuit to have a larger drain-source voltage, resulting in energy loss and low efficiency.

[0005] In view of this, the present invention aims at the above-mentioned deficiencies of the prior art and proposes a power supply system whose output voltage can be adjusted according to the peak value of the input voltage, and can be adjusted by a programmable and settable voltage outside the integrated circuit. Since the output voltage of the present invention is adjusted according to the peak value of the input voltage, the conduction time loss and energy loss of the MOS element in the power stage circuit can be reduced, and the inductor size in the power stage circuit can be reduced, thereby improving the conversion efficiency. Summary of the invention

[0006] The present invention provides a power factor correction control circuit for correcting the power factor of a rectifier power supply to generate an output power supply for a load. The power factor correction control circuit includes: a reference voltage generating circuit for generating a reference voltage according to a rectified voltage of the rectifier power supply; and a feedback modulation circuit for generating a modulation control signal according to the reference voltage and a feedback signal related to an output voltage of the output power supply to control at least one switch in a power stage circuit to switch an inductor in the power stage circuit to adjust the output voltage; wherein the reference voltage generating circuit selects one of at least two candidate voltages as the reference voltage according to a comparison between the rectified voltage and at least one judgment threshold, so that the output voltage is at least partially positively correlated with the rectified voltage.

[0007] In some embodiments, the power factor correction control circuit is configured as an integrated circuit, whose characteristics include: at least one of the at least two candidate voltages is generated by the inside of the integrated circuit; at least one of the at least two candidate voltages is generated by the outside of the integrated circuit; or wherein the at least two candidate voltages include two candidate voltages, wherein the two candidate voltages are both generated by the inside of the integrated circuit.

[0008] In some embodiments, the at least two candidate voltages include a first candidate voltage and a second candidate voltage, wherein the first candidate voltage is generated by the outside of the integrated circuit and the second candidate voltage is generated by the inside of the integrated circuit, wherein the at least one judgment threshold includes a first judgment threshold, and the reference voltage generating circuit includes: a comparison circuit for comparing a rectification-related signal with a threshold voltage to generate a comparison signal, wherein the rectification-related signal is related to the rectification voltage and the threshold voltage is related to the first judgment threshold; and a selection circuit for selecting one of the first candidate voltage and the second candidate voltage as the reference voltage according to the comparison signal.

[0009] In some embodiments, the reference voltage generating circuit also includes a plurality of diodes for shunt-connecting a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the first candidate voltage, wherein the overwrite candidate voltage is generated outside the integrated circuit and is an externally programmable value.

[0010] In some embodiments, one of the plurality of diodes is coupled between the first candidate voltage and the second candidate voltage, so that the second candidate voltage serves as the preset candidate voltage.

[0011] In some embodiments, the reference voltage generating circuit also includes a set current source for providing a set current to a set pin of the integrated circuit, and the set current is used to externally set the overwrite candidate voltage, wherein the overwrite candidate voltage is coupled to at least one of the multiple diodes through the set pin.

[0012] In some embodiments, the reference voltage generating circuit also includes a plurality of diodes, which are used to shunt a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the reference voltage, wherein the overwrite candidate voltage is generated outside the integrated circuit and is an externally programmable value, wherein the selection circuit selects one of the first candidate voltage and the second candidate voltage as the preset candidate voltage according to the comparison signal.

[0013] In some embodiments, the overwrite candidate voltage is used to clamp the preset candidate voltage, so that the reference voltage is clamped at the overwrite candidate voltage.

[0014] In some embodiments, the rectification-related signal is generated by dividing and filtering the rectified voltage; or the rectification-related signal is generated by an auxiliary winding, wherein the auxiliary winding is magnetically coupled to the inductor, wherein the power stage circuit is used to switch the inductor to convert the rectified voltage to generate the output voltage.

[0015] In some embodiments, the power stage circuit operates in a boundary conduction mode, or in a discontinuous conduction mode.

[0016] The present invention also provides a power supply system, comprising: a rectifier for converting an AC power supply to generate a rectified power supply; and a power factor correction conversion circuit for converting the rectified power supply to generate an output power supply for a load; wherein the power factor correction conversion circuit includes: a power stage circuit including at least one switch and an inductor; and a power factor correction control circuit for correcting the power factor of the rectified power supply, the power factor correction control circuit includes: a reference voltage generating circuit for generating a reference voltage according to a rectified voltage of the rectified power supply; and a feedback modulation circuit for generating a modulation control signal according to the reference voltage and a feedback signal related to an output voltage of the output power supply to control the at least one switch to switch the inductor to adjust the output voltage; wherein the reference voltage generating circuit selects one of at least two candidate voltages as the reference voltage according to a comparison between the rectified voltage and at least one judgment threshold, so that the output voltage is at least partially positively correlated with the rectified voltage.

[0017] In some embodiments, the load includes: an isolated power conversion circuit, including a transformer, a primary-side switching circuit and a secondary-side switching circuit, the primary-side winding and the secondary-side winding of the transformer are respectively coupled to the primary-side switching circuit and the secondary-side switching circuit, and the isolated power conversion circuit is used to convert the output power coupled to the primary-side switching circuit to generate another output power in the secondary-side switching circuit.

[0018] The present invention also provides a control method for correcting the power factor of a rectifier power supply to generate an output power supply for a load, comprising: generating a reference voltage based on a rectified voltage of the rectifier power supply; and generating a modulation control signal based on the reference voltage and a feedback signal related to an output voltage of the output power supply to control at least one switch in a power stage circuit to switch an inductor in the power stage circuit to adjust the output voltage; wherein the step of generating the reference voltage includes: selecting one of at least two candidate voltages as the reference voltage based on a comparison between the rectified voltage and at least one judgment threshold, so that the output voltage is at least partially positively correlated with the rectified voltage.

[0019] The following will be described in detail through specific embodiments to make it easier to understand the purpose, technical content, characteristics and effects achieved by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1A is a schematic diagram of a power supply system in the prior art.

[0021] Figure 1B It is a waveform diagram of input voltage and output voltage in a power supply system of the prior art.

[0022] Figure 2Ais a block diagram of an embodiment of a power supply system of the present invention.

[0023] Figure 2B It is a schematic diagram of an embodiment of a load in the power supply system of the present invention.

[0024] Figure 3 It is an operation waveform diagram of an embodiment of the output voltage and the rectified voltage in the power supply system of the present invention.

[0025] Figure 4A It is an operation waveform diagram of an embodiment of the power supply system of the present invention operating in the boundary conduction mode.

[0026] Figure 4B It is an operation waveform diagram of an embodiment of the power supply system of the present invention operating in the discontinuous conduction mode.

[0027] Figure 5 It is a block diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention.

[0028] Figure 6 It is a schematic diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention.

[0029] Figure 7 It is a relationship diagram of an embodiment of the reference voltage and rectification-related signals of the power factor correction control circuit of the present invention.

[0030] Figure 8 and Fig. 9 It is a schematic diagram of various embodiments of the reference voltage generating circuit of the power factor correction control circuit of the present invention.

[0031] Fig.10 It is a schematic diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention.

[0032] Fig.11A The reference voltage generating circuit in the power factor correction control circuit of the present invention corresponds to Fig.10 A schematic diagram of a specific embodiment of the invention.

[0033] Fig. 11B The reference voltage of the power factor correction control circuit of the present invention corresponds to the rectifier-related signal Fig.11A A relationship diagram of an embodiment of the present invention.

[0034] Fig. 12A The reference voltage generating circuit in the power factor correction control circuit of the present invention corresponds to Fig.10 A schematic diagram of another specific embodiment of .

[0035] Fig. 12B The reference voltage of the power factor correction control circuit of the present invention corresponds to the rectifier-related signal Fig. 12AA relationship diagram of an embodiment of the present invention.

[0036] Fig.13A It is a schematic diagram of a specific embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention.

[0037] Fig. 13B The reference voltage of the power factor correction control circuit of the present invention corresponds to the rectifier-related signal Fig.13A A relationship diagram of an embodiment of the present invention.

[0038] Fig.14 It is a schematic diagram of a specific embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention.

[0039] Fig.15 It is a schematic diagram of a specific embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention.

[0040] Fig.16 It is a schematic diagram of an embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention.

[0041] Fig.17A The reference voltage of the power factor correction control circuit of the present invention corresponds to the sampling and holding signal Fig.16 A relationship diagram of an embodiment of the present invention.

[0042] Fig. 17B The output voltage and the rectified voltage in the power supply system of the present invention correspond to Fig.16 An operation waveform diagram of an embodiment of the present invention.

[0043] Fig.18 is a block diagram of an embodiment of a power supply system of the present invention.

[0044] Fig.19A It is a schematic diagram of a specific embodiment of a power factor correction conversion circuit in the power supply system of the present invention.

[0045] Fig.19B is corresponding to Fig.19A An operation waveform diagram of an embodiment of the present invention.

[0046] Fig. 20 It is a schematic diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention.

[0047] Explanation of symbols in the figure

[0048] 10: Comparison circuit

[0049] 100: Rectifier

[0050] 1002, 1018: Power supply system

[0051] 101: Comparison Circuit

[0052] 11: Select the circuit

[0053] 111: Select Circuit

[0054] 12: Error amplification and compensation circuit

[0055] 13: Modulation signal generation circuit

[0056] 14: Drive

[0057] 15, 151, 152: Multiple diodes

[0058] 161: Multiple diodes

[0059] 17: Analog-to-digital conversion circuit

[0060] 18: Digital peak hold circuit

[0061] 19: Logic Circuit

[0062] 20: Voltage divider circuit

[0063] 200: Load

[0064] 2002, 2005, 2006, 2010, 2018-2020: Power factor correction conversion circuit

[0065] 30: DC converter

[0066] 300, 301-312: Reference voltage generating circuit

[0067] 3002, 3005, 3006, 3010, 3018-3020: Power factor correction control circuit

[0068] 400, 401: Feedback modulation circuit

[0069] 500: Power stage circuit

[0070] 600, 601: Rectification related signal generation circuit

[0071] 700: Clamping and detection circuits

[0072] 90: Power factor correction control circuit

[0073] 900: Power factor correction conversion circuit

[0074] 9000: Power supply system

[0075] 91: Power stage circuit

[0076] 92: Rectifier

[0077] B1, B2, B3: Transistors

[0078] CT: Pin

[0079] D1~D4,Da,Dw,Dz:diode

[0080] FB: Pin

[0081] GD: Pin

[0082] I1, Ib: current

[0083] Id1, Id2: current source

[0084] IFF, IFFi: current

[0085] IL: Inductor current

[0086] Io1: output current

[0087] Ist: Set current source

[0088] k: constant

[0089] L: Inductor

[0090] La: Inductance

[0091] M1, M2: transistors

[0092] n: positive integer

[0093] PWM: Modulation signal

[0094] RF: Pin

[0095] Rst: Setting resistance

[0096] Rvff: resistance

[0097] Spw: modulation control signal

[0098] ST1, ST2: Pins

[0099] Sw, Swa: switch

[0100] t1~t3: time point

[0101] Vaux: Auxiliary voltage

[0102] VBD: Rectified voltage

[0103] VCd, VCM: comparison signal

[0104] Vco: compensation signal

[0105] VF: Feedback voltage

[0106] Vfb: feedback signal

[0107] VFF: Rectification related signal

[0108] VFFd: Digital rectification related signal

[0109] VFFi: voltage

[0110] VFFid: digital signal

[0111] Vg: control signal

[0112] VHY: Hysteresis voltage

[0113] VLX: voltage

[0114] VO, Vo1, Vo2: output voltage

[0115] VPH: Sample and hold signal

[0116] VRe: Override candidate voltage

[0117] VREF: reference voltage

[0118] VRH: Second candidate voltage

[0119] VRi: Preset candidate voltage

[0120] VRL: First candidate voltage

[0121] VTH: Threshold voltage

[0122] Wa: Auxiliary winding DETAILED DESCRIPTION

[0123] The drawings in the present invention are schematic, and are mainly intended to show the coupling relationship between the various circuits and the relationship between the various signal waveforms. The circuits, signal waveforms and frequencies are not drawn according to scale. For the purpose of clarity, many practical details will be described in the following description, but this is not intended to limit the scope of the patent application of the present invention.

[0124] Please refer to Figure 2A , Figure 2A FIG. 1 is a block diagram of an embodiment of a power supply system of the present invention. Figure 2A As shown, in one embodiment, the power supply system 1002 includes: a rectifier 100 and a power factor correction conversion circuit 2002. In one embodiment, the rectifier 100 is used to convert AC power to generate rectified power, and the power factor correction conversion circuit 2002 is used to convert the rectified power to generate output power for the load 200.

[0125] In one embodiment, the power factor correction conversion circuit 2002 includes: a power stage circuit 500 and a power factor correction control circuit 3002. In one embodiment, the power stage circuit 500 is, for example, a boost converter, including at least one switch and an inductor L. In this embodiment, at least one switch in the power stage circuit 500 includes a switch Sw and a diode Dw. The switch Sw corresponds to the lower bridge switch of the power stage circuit 500, and the diode Dw corresponds to the upper bridge switching element of the power stage circuit 500. The switch Sw is an N-type metal oxide semiconductor (MOS) element. In other embodiments, the diode Dw can also be a switch. In one embodiment, the power factor correction control circuit 3002 is used to correct the power factor of the rectified power supply to generate an output power supply. The power factor correction control circuit 3002 includes: a reference voltage generation circuit 300 and a feedback modulation circuit 400.

[0126] In one embodiment, the reference voltage generating circuit 300 is used to generate a reference voltage VREF according to a rectified voltage VBD of a rectified power source. The feedback modulation circuit 400 is used to generate a pulse width modulation signal Spw according to the reference voltage VREF and a feedback signal Vfb related to the output voltage Vo1 of the output power source to control at least one switch (herein, switch Sw) in the power stage circuit 500 to switch the inductor L to adjust the output voltage Vo1. In one embodiment, the reference voltage generating circuit 300 selects one of at least two candidate voltages as the reference voltage according to a comparison between the rectified voltage VBD and at least one determination threshold, so that the output voltage Vo1 is at least partially positively correlated with the rectified voltage VBD. The operation details of the at least one determination threshold and the at least two candidate voltages will be described in detail in the subsequent embodiments.

[0127] Please refer to Figure 2B , Figure 2B FIG. 1 is a schematic diagram of an embodiment of a load in a power supply system of the present invention. In one embodiment, Figure 2A The load 200 includes an isolated power conversion circuit (such as Figure 2B In this embodiment, the isolated power conversion circuit is used to convert the output voltage Vo1 coupled to the primary-side switching circuit and generate another output voltage Vo2 in the secondary-side switching circuit. Figure 2B The isolated power conversion circuit includes a transformer, a primary-side switching circuit and a secondary-side switching circuit. The primary-side winding and the secondary-side winding of the transformer are respectively coupled to the primary-side switching circuit and the secondary-side switching circuit.

[0128] Please refer to Figure 3 , Figure 33 is an operation waveform diagram of an embodiment of the output voltage and the rectified voltage in the power supply system of the present invention. In one embodiment, through the adjustment of the output voltage Vo1 by the power factor correction control circuit 3002 of the present invention, the output voltage Vo1 is at least partially positively correlated with the peak value of the rectified voltage VBD. For example, in this embodiment, if Figure 3 As shown, when the peak value of the rectified voltage VBD rises after time point t1, the output voltage Vo1 also changes from a low level to a high level after time point t1. By adjusting the output voltage Vo1 by the power factor correction control circuit 3002 of the present invention, the energy loss of the MOS element (switch Sw) in the power stage circuit 500 can be reduced, and the size of the inductor L in the power stage circuit 500 can be reduced, thereby improving the conversion efficiency.

[0129] Please refer to Figure 4A and Figure 4B , Figure 4A is an operation waveform diagram of an embodiment of the power supply system of the present invention operating in the boundary conduction mode, Figure 4B FIG. 5 is an operation waveform diagram of an embodiment of the power supply system of the present invention operating in a discontinuous conduction mode. In one embodiment, the power stage circuit 500 operates in a boundary conduction mode (eg Figure 4A ), or operate in a discontinuous conduction mode (such as Figure 4B ).exist Figure 4A and Figure 4B In FIG. 1 , the output current Io1 related to the output voltage Vo1 is shown as a solid line, the rectified voltage VBD is shown as a short dashed line, and the average value of the output current Io1 is shown as a long dashed line. Figure 4A and Figure 4B As shown, the power factor of the rectifier power source is corrected by the power factor correction control circuit 3002 of the present invention, so that the average value of the output current Io1 can track the rectified voltage VBD, and its waveform is a sine wave in phase with the rectified voltage VBD.

[0130] Please refer to Figure 5 , Figure 5 It is a block diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention. Figure 5 The power factor correction conversion circuit 2005 is similar to Figure 2A The power factor correction conversion circuit 2002 is compared with Figure 2A The power factor correction conversion circuit 2002, in one embodiment, Figure 5The power factor correction conversion circuit 2005 further includes a rectification-related signal generating circuit 600, which is used to generate a rectification-related signal VFF according to the rectified voltage VBD. In one embodiment, the power factor correction control circuit 3005 in the power factor correction conversion circuit 2005 is configured as an integrated circuit, the reference voltage generating circuit 300 detects the rectification-related signal VFF via the pin RF, thereby generating a reference voltage VREF, the feedback modulation circuit 400 detects the feedback signal Vfb via the pin FB, and generates a modulation control signal Spw according to the reference voltage VREF and the feedback signal Vfb, and the modulation control signal Spw controls the switching of the switch Sw via the pin CT.

[0131] In one embodiment, the power factor correction control circuit 3005 configured as an integrated circuit includes: the at least two candidate voltages ( Figure 2A At least one of the at least two candidate voltages ( Figure 2A or the at least two candidate voltages include two candidate voltages (a first candidate voltage VRL and a second candidate voltage VRH), wherein the two candidate voltages are both generated inside the integrated circuit (such as Figure 5 The features of the above integrated circuit will be described in detail in the subsequent specific embodiments.

[0132] Please refer to Figure 6 , Figure 6 It is a schematic diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention. Figure 6 The power factor correction conversion circuit 2006 is similar to Figure 5 The power factor correction conversion circuit 2005, compared with Figure 5 In the embodiment of Figure 6 In the embodiment of the present invention, the rectification related signal generating circuit 601 includes a voltage dividing resistor and a filter capacitor, and the power factor correction control circuit 3006 includes a reference voltage generating circuit 301 and a feedback modulation circuit 401. In one embodiment, the reference voltage generating circuit 301 includes: a comparison circuit 10 and a selection circuit 11, and the feedback modulation circuit 401 includes: an error amplification and compensation circuit 12, a modulation signal generating circuit 13 and a driver 14.

[0133] In one embodiment, if Figure 6 As shown, the rectification-related signal generating circuit 601 is used to divide and filter the rectified voltage VBD to generate the rectification-related signal VFF. In one embodiment, Figure 2AThe at least two candidate voltages described in the embodiment include a first candidate voltage VRL and a second candidate voltage VRH. The first candidate voltage VRL is generated outside the integrated circuit and connected to the selection circuit 11 via the pin ST1, and the second candidate voltage VRH is generated inside the integrated circuit. In this embodiment, the first candidate voltage VRL is set according to the external reference voltage, and the second candidate voltage VRH is generated according to the internal reference voltage. It should be noted that in other embodiments, the configuration of the first candidate voltage VRL and the second candidate voltage VRH can also be swapped. Specifically, the second candidate voltage VRH is generated outside the integrated circuit, and the first candidate voltage VRL is generated inside the integrated circuit.

[0134] In one embodiment, Figure 2A The at least one judgment threshold described in the embodiment includes a first judgment threshold. In one embodiment, Figure 6 The comparison circuit 10 is used to compare the rectifier-related signal VFF with the threshold voltage VTH to generate a comparison signal VCM. In this embodiment, the rectifier-related signal VFF is related to the rectifier voltage VBD, and the threshold voltage VTH corresponds to the first determination threshold. In this embodiment, the selection circuit 11 selects one of the first candidate voltage VRL and the second candidate voltage VRH as the reference voltage VREF according to the comparison signal VCM.

[0135] Please also refer to Figure 6 and Figure 7 , Figure 7 It is a relationship diagram of an embodiment of the reference voltage and rectification-related signals of the power factor correction control circuit of the present invention. In a specific embodiment, the second candidate voltage VRH is higher than the first candidate voltage VRL. In a preferred embodiment, the threshold voltage VTH and the rectification-related signal VFF have a hysteresis relationship. Specifically, when the voltage value of the rectification-related signal VFF is not yet greater than the threshold voltage VTH, the comparison signal VCM indicates that the selection circuit 11 selects the first candidate voltage VRL as the reference voltage VREF; when the voltage value of the rectification-related signal VFF is greater than the threshold voltage VTH, the comparison signal VCM indicates that the selection circuit 11 selects the second candidate voltage VRH as the reference voltage VREF, and at this time the threshold voltage VTH is switched to the hysteresis voltage VHY, wherein the threshold voltage VTH is greater than the hysteresis voltage VHY, so that the rectification-related signal VFF and the threshold voltage VTH have a hysteresis relationship, thereby avoiding the noise caused when the voltage value of the rectification-related signal VFF is close to the threshold voltage VTH. In one embodiment, as Figure 6 The comparison circuit 10 may use a comparator with hysteresis to achieve the above hysteresis relationship.

[0136] Please also refer to Figure 3 , Figure 6 and Figure 7It should be noted that in Figure 6 In the embodiment of the present invention, since the reference voltage VREF in the power factor correction control circuit 3006 selects the first candidate voltage VRL or the second candidate voltage VRH as the reference voltage VREF according to whether the rectification-related signal VFF is less than or greater than the threshold voltage VTH, and the rectification-related signal VFF is related to the rectification voltage VBD, therefore, in the present embodiment, Figure 3 As shown, the output voltage Vo1 can be adjusted to two levels according to the peak value of the rectified voltage VBD. It should also be noted that in this embodiment, the low level of the output voltage Vo1 (eg Figure 3 Before the time point t1) is related to the first candidate voltage VRL, the high level of the output voltage Vo1 (such as Figure 3 is related to the second candidate voltage VRH) at time point t1.

[0137] Please continue to refer to Figure 6 In one embodiment, the error amplification and compensation circuit 12 is used to amplify the difference between the reference voltage VREF and the feedback signal Vfb, and perform frequency compensation on the difference to generate the compensation signal Vco. In one embodiment, the modulation signal generation circuit 13 generates the modulation control signal Spw according to the compensation signal Vco, and the modulation control signal Spw is then controlled by the driver 14 and the pin CT to switch the switch Sw.

[0138] Please refer to Figure 8 and Fig. 9 , Figure 8 and Fig. 9 It is a schematic diagram of various embodiments of the reference voltage generating circuit of the power factor correction control circuit of the present invention. Figure 8 The reference voltage generating circuit 302 and Fig. 9 The reference voltage generating circuit 303 is similar to Figure 6 The reference voltage generating circuit 301 is described below. Figure 8 As shown, in one embodiment, the first candidate voltage VRL and the second candidate voltage VRH are both generated inside the integrated circuit. Fig. 9 As shown, in one embodiment, the first candidate voltage VRL and the second candidate voltage VRH are both generated outside the integrated circuit, and the second candidate voltage VRH is connected to the selection circuit 11 via the pin ST2.

[0139] Please refer to Fig.10 , Fig.10 It is a schematic diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention. Fig.10 The power factor correction conversion circuit 2010 is similar to Figure 6 The power factor correction conversion circuit 2006 is compared with Figure 6 The power factor correction conversion circuit 2006, in one embodiment, Fig.10 The reference voltage generating circuit 304 in the power factor correction control circuit 3010 further includes a plurality of diodes 15 for shunt-connecting the preset candidate voltage VRi and the overwritten candidate voltage VRe, thereby comparing the preset candidate voltage VRi and the overwritten candidate voltage VRe to select one of them as the first candidate voltage VRL. In the present embodiment, the overwritten candidate voltage VRe is generated from outside the integrated circuit and is an externally programmable value, the preset candidate voltage VRi is a fixed voltage built into the integrated circuit, and the overwritten candidate voltage VRe is coupled to the plurality of diodes 15 through the pin ST1.

[0140] It should be noted that the plurality of diodes 15 can select a higher or lower one of the preset candidate voltage VRi and the overwrite candidate voltage VRe through different coupling methods, and the details will be described in detail in the following embodiments.

[0141] Please refer to Fig.11A , Fig.11A The reference voltage generating circuit in the power factor correction control circuit of the present invention corresponds to Fig.10 In one embodiment, as shown in FIG. Fig.11A In the reference voltage generating circuit 305, the plurality of diodes 151 include a diode D1 and a diode D2. The diode D1 is forward coupled from the overwrite candidate voltage VRe to the first candidate voltage VRL, and the diode D2 is forward coupled from the preset candidate voltage VRi to the first candidate voltage VRL, thereby making the preset candidate voltage VRi and the overwrite candidate voltage VRe shunt-connected in parallel. In one embodiment, the reference voltage generating circuit 305 further includes a current source Id1, coupled between the first candidate voltage VRL and the ground potential, to ensure that the diode D1 or the diode D2 is forward-conducted.

[0142] Please also refer to Fig. 11B , Fig. 11B The reference voltage of the power factor correction control circuit of the present invention corresponds to the rectifier-related signal Fig.11A A relationship diagram of an embodiment of the present invention. Fig.11A In the embodiment of the present invention, the higher voltage value of the preset candidate voltage VRi and the overwrite candidate voltage VRe can turn on the diode coupled thereto. In other words, in the present embodiment, the diode D1 and the diode D2 are used to select the higher voltage value of the preset candidate voltage VRi and the overwrite candidate voltage VRe. Fig. 11BAs shown in the solid line curve, the voltage value of the overwrite candidate voltage VRe is higher than the preset candidate voltage VRi and lower than the second candidate voltage VRH. In this embodiment, when the voltage value of the rectification-related signal VFF is not greater than the threshold voltage VTH, the selection circuit 11 selects the first candidate voltage VRL as the reference voltage VREF. The first candidate voltage VRL is determined by the diode D1 and the diode D2. Therefore, at this time, the reference voltage VREF is determined by the overwrite candidate voltage VRe with a higher voltage value. When the voltage value of the rectification-related signal VFF is greater than the threshold voltage VTH, the selection circuit 11 selects the second candidate voltage VRH as the reference voltage VREF.

[0143] It should be noted that in Fig.11A In the embodiment of the present invention, when the overwrite candidate voltage VRe is not set outside the integrated circuit, or the overwrite candidate voltage VRe set outside the integrated circuit is lower than the preset candidate voltage VRi, the relationship between the rectification related signal VFF and the reference voltage VREF is as follows: Fig. 11B As shown by the long dashed line, the reference voltage VREF is determined by the preset candidate voltage VRi or the second candidate voltage VRH. When the overwrite candidate voltage VRe set outside the integrated circuit is higher than the preset candidate voltage VRi and lower than the second candidate voltage VRH, the relationship between the rectification-related signal VFF and the reference voltage VREF is as follows: Fig. 11B As shown by the solid line, the reference voltage VREF is determined by the overwrite candidate voltage VRe or the second candidate voltage VRH. In other words, the overwrite candidate voltage VRe is used to clamp the low level of the reference voltage VREF so that the low level of the reference voltage VREF is not lower than the overwrite candidate voltage VRe (if any). It should also be noted that in order to clearly represent the long dashed line, Fig. 11B It is intentionally made not to overlap with the solid line. In actual situations, after the voltage value of the rectification-related signal VFF is greater than the threshold voltage VTH, Fig. 11B The long dashed line overlaps the solid line.

[0144] Please refer to Fig. 12A , Fig. 12A The reference voltage generating circuit in the power factor correction control circuit of the present invention corresponds to Fig.10 A schematic diagram of another specific embodiment of . Fig. 12A The reference voltage generating circuit 306 is similar to Fig.11A The reference voltage generating circuit 305 is different in that Fig. 12A In the embodiment of the present invention, the coupling direction of the diode D1 and the diode D2 in the plurality of diodes 152 is the same as Fig.11A In contrast to the embodiment of FIG. 1 , the current source Id1 is coupled between the supply voltage and the first candidate voltage VRL.

[0145] Please also refer to Fig. 12B , Fig. 12BThe reference voltage of the power factor correction control circuit of the present invention corresponds to the rectifier-related signal Fig. 12A A relationship diagram of an embodiment of the present invention. Fig. 12A In the embodiment of the present invention, the lower voltage value between the preset candidate voltage VRi and the overwrite candidate voltage VRe can conduct the diode coupled thereto. In other words, in the present embodiment, the diode D1 and the diode D2 are used to select the lower voltage value between the preset candidate voltage VRi and the overwrite candidate voltage VRe. Fig. 12B As shown by the solid line curve, the voltage value of the overwrite candidate voltage VRe is lower than the preset candidate voltage VRi. In this embodiment, when the voltage value of the rectification-related signal VFF is not greater than the threshold voltage VTH, the selection circuit 11 selects the first candidate voltage VRL as the reference voltage VREF. The first candidate voltage VRL is determined by the diode D1 and the diode D2. Therefore, at this time, the reference voltage VREF is determined by the overwrite candidate voltage VRe with a lower voltage value. When the voltage value of the rectification-related signal VFF is greater than the threshold voltage VTH, the selection circuit 11 selects the second candidate voltage VRH as the reference voltage VREF.

[0146] It should be noted that in Fig. 12A In the embodiment of the present invention, when the overwrite candidate voltage VRe is not set outside the integrated circuit, or the overwrite candidate voltage VRe set outside the integrated circuit is higher than the preset candidate voltage VRi, the relationship between the rectification related signal VFF and the reference voltage VREF is as follows: Fig. 12B As shown by the long dashed line, the reference voltage VREF is determined by the preset candidate voltage VRi or the second candidate voltage VRH. When the overwrite candidate voltage VRe set outside the integrated circuit is lower than the preset candidate voltage VRi, the relationship between the rectification related signal VFF and the reference voltage VREF is as follows: Fig. 12B As shown by the solid line, the reference voltage VREF is determined by the overwrite candidate voltage VRe or the second candidate voltage VRH. In other words, the overwrite candidate voltage VRe is used to clamp the low level of the reference voltage VREF so that the low level of the reference voltage VREF is not higher than the overwrite candidate voltage VRe (if any). It should also be noted that in order to clearly represent the long dashed line, Fig. 12B It is intentionally made not to overlap with the solid line. In actual situations, after the voltage value of the rectification-related signal VFF is greater than the threshold voltage VTH, Fig. 12B The long dashed line overlaps with the solid line, and the same applies to the following embodiments.

[0147] Please refer to Fig.13A , Fig.13A It is a schematic diagram of a specific embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention. Fig.13A The reference voltage generating circuit 307 is similar to Fig. 12A The reference voltage generating circuit 306 is different in that Fig.13A In the embodiment of FIG. 5 , the diode D2 is coupled between the first candidate voltage VRL and the second candidate voltage VRH, so that the second candidate voltage VRH serves as the preset candidate voltage VRi.

[0148] Please also refer to Fig. 13B , Fig. 13B The reference voltage of the power factor correction control circuit of the present invention corresponds to the rectifier-related signal Fig.13A A relationship diagram of an embodiment of the present invention. Fig.13A In an embodiment of the present invention, the diode D1 and the diode D2 are used to select the lower voltage value between the preset candidate voltage VRi and the overwrite candidate voltage VRe. Fig. 13B As shown by the solid line curve, the voltage value of the overwrite candidate voltage VRe is lower than the preset candidate voltage VRi (and lower than the second candidate voltage VRH). In this embodiment, when the voltage value of the rectification-related signal VFF is not greater than the threshold voltage VTH, the selection circuit 11 selects the first candidate voltage VRL as the reference voltage VREF. The first candidate voltage VRL is determined by the diode D1 and the diode D2. Therefore, at this time, the reference voltage VREF is determined by the overwrite candidate voltage VRe with a lower voltage value. When the voltage value of the rectification-related signal VFF is greater than the threshold voltage VTH, the selection circuit 11 selects the second candidate voltage VRH (i.e., the preset candidate voltage VRi) as the reference voltage VREF.

[0149] It should be noted that in Fig.13A In the embodiment of the present invention, when the overwrite candidate voltage VRe is not set outside the integrated circuit, or the overwrite candidate voltage VRe set outside the integrated circuit is higher than the preset candidate voltage VRi, the relationship between the rectification related signal VFF and the reference voltage VREF is as follows: Fig. 13B As shown by the long dashed line, that is, no matter the voltage value of the rectification-related signal VFF is greater than or less than the threshold voltage VTH, the reference voltage VREF is determined by the preset candidate voltage VRi. On the other hand, when the overwrite candidate voltage VRe set outside the integrated circuit is lower than the preset candidate voltage VRi, the relationship between the rectification-related signal VFF and the reference voltage VREF is as follows: Fig. 13B As shown by the solid line, the reference voltage VREF is determined by the overwriting candidate voltage VRe or the second candidate voltage VRH (ie, the preset candidate voltage VRi).

[0150] Please refer to Fig.14 , Fig.14 It is a schematic diagram of a specific embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention. Fig.14 The reference voltage generating circuit 308 is similar to Fig.13A The reference voltage generating circuit 307 is different in that Fig.14In an embodiment, the reference voltage generating circuit 307 further includes a setting current source Ist. In an embodiment, the setting current source Ist is coupled to a setting resistor Rst outside the integrated circuit via a pin ST1 to provide a setting current at the pin ST1, thereby setting the overwrite candidate voltage VRe outside the integrated circuit. In an embodiment, the overwrite candidate voltage VRe is coupled to at least one of the plurality of diodes 152 via the pin ST1. In this embodiment, the overwrite candidate voltage VRe is coupled to the diode D1 via the pin ST1.

[0151] Please refer to Fig.15 , Fig.15 It is a schematic diagram of a specific embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention. Fig.15 The reference voltage generating circuit 309 is similar to Figure 8 The reference voltage generating circuit 302 is compared with Figure 8 The reference voltage generating circuit 302, in one embodiment, Fig.15 The reference voltage generating circuit 309 further includes a plurality of diodes 161 and a current source Id2. In one embodiment, the selection circuit 11 is used to select one of the first candidate voltage VRL and the second candidate voltage VRH as the preset candidate voltage VRi according to the comparison signal VCM. In one embodiment, the plurality of diodes 161 include a diode D3 and a diode D4, which are used to shunt the preset candidate voltage VRi and the overwrite candidate voltage VRe in parallel, thereby comparing the preset candidate voltage VRi and the overwrite candidate voltage VRe to select one of them as the reference voltage VREF. In this embodiment, the preset candidate voltage VRi is a fixed voltage built into the integrated circuit, and the overwrite candidate voltage VRe is generated in a manner similar to Fig.14 , which is generated outside the integrated circuit by setting the current source Ist and the setting resistor Rst, wherein the overwriting candidate voltage VRe is coupled to the diode D3 through the pin ST1.

[0152] Specifically, if Fig.15 As shown in the embodiment of the present invention, the diode D4 is forward coupled from the preset candidate voltage VRi to the reference voltage VREF, and the diode D3 is forward coupled from the overwrite candidate voltage VRe to the reference voltage VREF, thereby making the preset candidate voltage VRi and the overwrite candidate voltage VRe connected in parallel. In this embodiment, the current source Id2 is coupled between the reference voltage VREF and the ground potential to ensure that the diode D3 or the diode D4 is forward-conducted.

[0153] Please also refer to Fig.15 and Fig. 11B .exist Fig.15In the embodiment of the present invention, the higher voltage value of the preset candidate voltage VRi and the overwrite candidate voltage VRe can turn on the diode coupled thereto. Therefore, in the present embodiment, the diode D3 and the diode D4 are used to select the higher voltage value of the preset candidate voltage VRi and the overwrite candidate voltage VRe. Fig.15 The relationship between the reference voltage VREF and the rectification-related signal VFF is as follows: Fig. 11B For details, see Fig. 11B The description is not repeated here.

[0154] It should be noted that in Fig.15 In the embodiment of FIG. 1 , when the diode D3 and the diode D4 are reversely connected and the current source Id2 is coupled between the supply voltage and the reference voltage VREF, the relationship between the reference voltage VREF and the rectification-related signal VFF is as follows: Fig. 12B See Fig. 12A , Fig. 12B It should also be noted that the diode coupling methods shown in the specific embodiments of this specification are all for illustration and are not intended to limit the scope of the present invention.

[0155] Please refer to Fig.16 , Fig.16 It is a schematic diagram of an embodiment of a reference voltage generating circuit in a power factor correction control circuit of the present invention. Fig.16 The reference voltage generating circuit 310 is similar to Fig.15 The reference voltage generating circuit 309 is compared with Fig.15 The reference voltage generating circuit 309, in one embodiment, Fig.16 The reference voltage generating circuit 310 also includes a voltage divider circuit 20, the selection circuit 111 in the reference voltage generating circuit 310 is a multi-stage selection circuit, and the comparison circuit 101 in the reference voltage generating circuit 310 includes an analog-to-digital conversion circuit 17, a digital peak holding circuit 18, and a logic circuit 19.

[0156] In one embodiment, if Fig.16As shown, the analog-to-digital conversion circuit 17 is used to convert the rectification-related signal VFF into a digital rectification-related signal VFFd, the digital peak holding circuit 18 is used to sample and hold the peak value of the digital rectification-related signal VFFd to generate a sampling and holding signal VPH, and the logic circuit 19 is used to generate a comparison signal VCd according to the sampling and holding signal VPH (for example, re-mapping). In this embodiment, the comparison signal VCd is a multi-level digital signal. In one embodiment, the voltage divider circuit 20 includes a plurality of voltage divider resistors for generating n-level candidate voltages, wherein n is a positive integer greater than or equal to 3. In this embodiment, the voltage divider circuit 20 is used to generate a multi-level candidate voltage from a first candidate voltage VRL to a second candidate voltage VRH, wherein the first candidate voltage VRL and the second candidate voltage VRH are respectively the lowest value and the highest value of the n-level candidate voltages. In one embodiment, the selection circuit 111 is used to select one of the n-level candidate voltages as the preset candidate voltage VRi according to the comparison signal VCd. For other details of the reference voltage generating circuit 310 not mentioned above, please refer to Fig.15 The description is not repeated here.

[0157] Please also refer to Fig.16 and Fig.17A , Fig.17A The reference voltage of the power factor correction control circuit of the present invention corresponds to the sampling and holding signal Fig.16 A relationship diagram of an embodiment of the present invention. Fig.16 In an embodiment of the present invention, the diode D3 and the diode D4 are used to select the higher voltage value between the preset candidate voltage VRi and the overwrite candidate voltage VRe. Fig.17A As shown in the solid line curve of , the voltage value of the overwrite candidate voltage VRe is higher than the preset candidate voltage VRi, and lower than the second candidate voltage VRH. Fig.16 In the embodiment of the present invention, when the overwrite candidate voltage VRe is not set outside the integrated circuit, or the overwrite candidate voltage VRe set outside the integrated circuit is lower than the preset candidate voltage VRi, the relationship between the sample hold signal VPH and the reference voltage VREF is as follows: Fig.17A As shown by the long dashed line, the reference voltage VREF is determined by the preset candidate voltage VRi. When the overwrite candidate voltage VRe set outside the integrated circuit is higher than the preset candidate voltage VRi and lower than the second candidate voltage VRH, the relationship between the sample hold signal VPH and the reference voltage VREF is as follows: Fig.17A As shown by the solid line, the reference voltage VREF is overwritten by the candidate voltage VRe. In other words, the overwritten candidate voltage VRe is used to clamp the low level of the reference voltage VREF. In this embodiment, since the selection circuit 111 selects the n-level candidate voltage according to the comparison signal VCd, Fig.17A As shown, the reference voltage generating circuit 310 can generate a multi-level reference voltage VREF according to the rectification related signal VFF.

[0158] Please also refer to Fig.16 and Fig. 17B , Fig. 17B The output voltage and the rectified voltage in the power supply system of the present invention correspond to Fig.16 An operation waveform diagram of an embodiment of the present invention. Fig.17A As explained above, since the reference voltage VREF can be adjusted in multiple stages according to the rectification-related signal VFF, Fig. 17B As shown in FIG. 1 , the output voltage Vo1 can be adjusted in multiple steps according to the peak value of the rectified voltage VBD. Figure 3 , Fig. 17B The output voltage Vo1 is substantially positively correlated with the peak value of the rectified voltage VBD, which can further reduce the energy loss of the MOS element (switch Sw) in the power stage circuit 500 and reduce the size of the inductor L in the power stage circuit 500, further improving the conversion efficiency.

[0159] Please refer to Fig.18 , Fig.18 FIG. 1 is a block diagram of an embodiment of a power supply system of the present invention. Fig.18 In the power supply system 1018, the power factor correction conversion circuit 2018 further includes an auxiliary winding Wa. Fig.18 As shown, the auxiliary winding Wa is used to magnetically couple with the inductor L to generate an auxiliary voltage Vaux, thereby generating a rectification-related signal VFF, and the rectification-related signal VFF is connected to the inside of the power factor correction control circuit 3018 (integrated circuit) via the pin RF. In this embodiment, the auxiliary voltage Vaux and the rectified voltage VBD are in opposite phases. In one embodiment, the pin GD of the power factor correction control circuit 3018 is coupled to the ground potential. The internal operation details of the power factor correction control circuit 3018 will be described in the following embodiments, and the remaining operation details of the power factor correction conversion circuit 2018 are as described above.

[0160] Please refer to Fig.19A , Fig.19A It is a schematic diagram of a specific embodiment of a power factor correction conversion circuit in the power supply system of the present invention. Fig.19A The power factor correction control circuit 3019 in the power factor correction conversion circuit 2019 is Fig.18 A specific embodiment of the power factor correction control circuit 3018. In a specific embodiment, as Fig.19A As shown, the power factor correction control circuit 3019 further includes a clamping and detecting circuit 700. In one embodiment, the clamping and detecting circuit 700 is used to clamp the voltage of the rectified related signal VFF through the pin RF, and the clamping and detecting circuit 700 includes a transistor B1, a transistor B2, a transistor B3, a transistor M1, a transistor M2, a resistor Rvff and a diode Dz.

[0161] In one embodiment, transistor B1, transistor B2 and transistor B3 are bipolar junction transistors (BJT) of the same conductivity type, wherein transistor B1 and transistor B2 are diode-coupled BJTs, and transistor M1 and transistor M2 are MOS transistors of the same conductivity type. In one embodiment, diode Dz is a Zener diode, and diode Dz is used to clamp the voltage of the rectifier-related signal VFF through pin RF so that it is not lower than a preset negative voltage and not higher than a preset positive voltage. In this embodiment, the preset negative voltage is the opposite number of the forward bias voltage of the Zener diode, and the preset positive voltage is the opposite number of the reverse bias voltage of the Zener diode.

[0162] Please also refer to Fig.19A and Fig.19B , Fig.19B is corresponding to Fig.19A In one embodiment, the operation waveform diagram of Fig.19A As shown, the clamping and detecting circuit 700 generates a current IFFi through a common base amplifier composed of transistors B1, B2, B3, and diode Dz, wherein the current IFFi is related to the current IFF and to the rectified voltage VBD, and the resistor Rvff generates a voltage VFFi related to the rectified voltage VBD according to the current IFFi.

[0163] Specifically, in one embodiment, Fig.19B During the period from time point t2 to time point t3, the control signal Vg used to control the switch Sw is at a high level, the inductor current IL starts to rise, and the clamping and detection circuit 700 is used to clamp the rectification-related signal VFF at a level close to zero voltage. The level of the auxiliary voltage Vaux is a negative value, so the current IFF flows from the rectification-related signal VFF to the auxiliary voltage Vaux.

[0164] It should be noted that if Fig.19B As shown, from the waveform of the voltage VLX at one end of the inductor L and the waveform of the auxiliary voltage Vaux (k is a constant), it can be seen that since the auxiliary voltage Vaux is related to the rectified voltage VBD, and the current IFF is related to the auxiliary voltage Vaux, the current IFFi is related to the rectified voltage VBD, and thus the voltage VFFi is related to the rectified voltage VBD.

[0165] Please continue to refer to Fig.19AIn one embodiment, the reference voltage generating circuit 311 of the power factor correction control circuit 3019 further includes a DC converter 30 for generating a digital signal VFFid according to the voltage VFFi. Other operation details of the reference voltage generating circuit 311 are the same as those of the reference voltage generating circuit 308, please refer to the aforementioned Fig.14 Description.

[0166] Please refer to Fig. 20 , Fig. 20 It is a schematic diagram of an embodiment of a power factor correction conversion circuit in a power supply system of the present invention. Fig. 20 The power factor correction conversion circuit 2020 is similar to Fig.19A The power factor correction conversion circuit 2019, the difference is that in Fig. 20 In the embodiment of the present invention, the direction of magnetic coupling between the auxiliary winding Wa and the inductor L is the same as Fig.19A On the contrary, the auxiliary voltage Vaux and the rectified voltage VBD are in phase with each other. Another difference is that the reference voltage generating circuit 312 of the power factor correction control circuit 3020 directly generates the reference voltage VREF according to the rectified related signal VFF. Other operating details of the power factor correction control circuit 3020 are the same as those of the power factor correction control circuit 3019. Please refer to the aforementioned Fig.19A Description.

[0167] The present invention has been described above with respect to the preferred embodiment, but the above is only to make it easy for those skilled in the art to understand the content of the present invention, and is not used to limit the scope of rights of the present invention. The various embodiments described are not limited to individual applications, but can also be used in combination. For example, two or more embodiments can be used in combination, and part of the components in one embodiment can also be used to replace the corresponding components in another embodiment. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or calculating or generating an output result according to a certain signal", which is not limited to the signal itself, but also includes, when necessary, converting the signal to voltage and current, current and voltage, and / or ratio conversion, and then processing or calculating according to the converted signal to generate an output result. It can be seen from this that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations, and there are many combinations, which are not listed one by one here. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

Claims

1. A power factor correction control circuit for correcting the power factor of a rectifier power supply to generate an output power supply to a load, the power factor correction control circuit comprising: a reference voltage generating circuit for generating a reference voltage according to a rectified voltage of the rectified power source; and a feedback modulation circuit for generating a modulation control signal according to the reference voltage and a feedback signal related to an output voltage of the output power supply, so as to control at least one switch in a power stage circuit to switch an inductor in the power stage circuit, so as to adjust the output voltage; in, The reference voltage generating circuit selects one of at least two candidate voltages as the reference voltage according to the comparison between the rectified voltage and at least one determination threshold, so that the output voltage is at least partially positively correlated with the rectified voltage.

2. The power factor correction control circuit according to claim 1, wherein: The power factor correction control circuit is configured as an integrated circuit, and its features include: At least one of the at least two candidate voltages is generated within the integrated circuit; At least one of the at least two candidate voltages is generated external to the integrated circuit; or The at least two candidate voltages include two candidate voltages, wherein the two candidate voltages are both generated inside the integrated circuit.

3. The power factor correction control circuit according to claim 2, wherein: The at least two candidate voltages include a first candidate voltage and a second candidate voltage, wherein the first candidate voltage is generated outside the integrated circuit, and the second candidate voltage is generated inside the integrated circuit, wherein the at least one determination threshold includes a first determination threshold, and the reference voltage generating circuit includes: a comparison circuit for comparing a rectification-related signal with a threshold voltage to generate a comparison signal, wherein the rectification-related signal is related to the rectification voltage, and the threshold voltage is related to the first determination threshold; and A selection circuit selects one of the first candidate voltage and the second candidate voltage as the reference voltage according to the comparison signal.

4. The power factor correction control circuit according to claim 3, wherein: The reference voltage generating circuit also includes a plurality of diodes for connecting a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the first candidate voltage, wherein the overwrite candidate voltage is generated outside the integrated circuit and is an externally programmable value.

5. The power factor correction control circuit according to claim 4, wherein: One of the plurality of diodes is coupled between the first candidate voltage and the second candidate voltage, so that the second candidate voltage serves as the preset candidate voltage.

6. The power factor correction control circuit according to claim 4, wherein: The reference voltage generating circuit also includes a setting current source for providing a setting current to a setting pin of the integrated circuit, wherein the setting current is used to externally set the overwrite candidate voltage, wherein the overwrite candidate voltage is coupled to at least one of the plurality of diodes through the setting pin.

7. The power factor correction control circuit according to claim 3, wherein: The reference voltage generating circuit also includes a plurality of diodes, which are used to connect a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the reference voltage, wherein the overwrite candidate voltage is generated outside the integrated circuit and is an externally programmable value, wherein the selection circuit selects one of the first candidate voltage and the second candidate voltage as the preset candidate voltage according to the comparison signal.

8. The power factor correction control circuit according to claim 4, wherein: The overwriting candidate voltage is used to clamp the preset candidate voltage, so that the reference voltage is clamped at the overwriting candidate voltage.

9. The power factor correction control circuit according to claim 3, wherein: The rectification-related signal is generated by dividing and filtering the rectified voltage; or The rectification-related signal is generated by an auxiliary winding, wherein the auxiliary winding is magnetically coupled to the inductor, wherein the power stage circuit is used to switch the inductor to convert the rectified voltage to generate the output voltage.

10. The power factor correction control circuit according to claim 1, wherein: The power stage circuit operates in a boundary conduction mode or a discontinuous conduction mode.

11. A power supply system, comprising: a rectifier for converting an AC power source to generate a rectified power source; and a power factor correction conversion circuit for converting the rectified power supply to generate an output power supply for a load; in, The power factor correction conversion circuit comprises: A power stage circuit includes at least one switch and an inductor; and A power factor correction control circuit is used to correct the power factor of the rectifier power supply, and the power factor correction control circuit includes: a reference voltage generating circuit for generating a reference voltage according to a rectified voltage of the rectified power source; and a feedback modulation circuit for generating a modulation control signal according to the reference voltage and a feedback signal related to an output voltage of the output power source, so as to control the at least one switch to switch the inductor, so as to adjust the output voltage; The reference voltage generating circuit selects one of at least two candidate voltages as the reference voltage according to the comparison between the rectified voltage and at least one determination threshold, so that the output voltage is at least partially positively correlated with the rectified voltage.

12. The power supply system according to claim 11, wherein: The load includes: An isolated power conversion circuit includes a transformer, a primary-side switching circuit and a secondary-side switching circuit. The primary-side winding and the secondary-side winding of the transformer are respectively coupled to the primary-side switching circuit and the secondary-side switching circuit. The isolated power conversion circuit is used to convert the output power coupled to the primary-side switching circuit to generate another output power in the secondary-side switching circuit.

13. The power supply system according to claim 11, wherein: The power factor correction control circuit is configured as an integrated circuit, and its features include: At least one of the at least two candidate voltages is generated within the integrated circuit; At least one of the at least two candidate voltages is generated external to the integrated circuit; or The at least two candidate voltages include two candidate voltages, wherein the two candidate voltages are both generated inside the integrated circuit.

14. The power supply system according to claim 13, wherein: The at least two candidate voltages include a first candidate voltage and a second candidate voltage, wherein the first candidate voltage is generated outside the integrated circuit, and the second candidate voltage is generated inside the integrated circuit, wherein the at least one determination threshold includes a first determination threshold, and the reference voltage generating circuit includes: a comparison circuit for comparing a rectification-related signal with a threshold voltage to generate a comparison signal, wherein the rectification-related signal is related to the rectification voltage, and the threshold voltage is related to the first determination threshold; and A selection circuit selects one of the first candidate voltage and the second candidate voltage as the reference voltage according to the comparison signal.

15. The power supply system according to claim 14, wherein: The reference voltage generating circuit also includes a plurality of diodes for connecting a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the first candidate voltage, wherein the overwrite candidate voltage is generated outside the integrated circuit and is an externally programmable value.

16. The power supply system according to claim 15, wherein: One of the plurality of diodes is coupled between the first candidate voltage and the second candidate voltage, so that the second candidate voltage serves as the preset candidate voltage.

17. The power supply system according to claim 15, wherein: The reference voltage generating circuit also includes a setting current source for providing a setting current to a setting pin of the integrated circuit, wherein the setting current is used to externally set the overwrite candidate voltage, wherein the overwrite candidate voltage is coupled to at least one of the plurality of diodes through the setting pin.

18. The power supply system according to claim 14, wherein: The reference voltage generating circuit also includes a plurality of diodes, which are used to connect a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the reference voltage, wherein the overwrite candidate voltage is generated outside the integrated circuit and is an externally programmable value, wherein the selection circuit selects one of the first candidate voltage and the second candidate voltage as the preset candidate voltage according to the comparison signal.

19. The power supply system according to claim 15, wherein: The overwriting candidate voltage is used to clamp the preset candidate voltage, so that the reference voltage is clamped at the overwriting candidate voltage.

20. The power supply system according to claim 14, wherein: The rectification-related signal is generated by dividing and filtering the rectified voltage; or The rectification-related signal is generated by an auxiliary winding, wherein the auxiliary winding is magnetically coupled to an inductor, wherein the power stage circuit is used to switch the inductor to convert the rectified voltage to generate the output voltage.

21. The power supply system according to claim 11, wherein: The power stage circuit operates in a boundary conduction mode or a discontinuous conduction mode.

22. A control method for correcting a power factor of a rectified power source to generate an output power source for a load, comprising: Generating a reference voltage according to a rectified voltage of the rectified power supply; and Generate a modulation control signal according to the reference voltage and a feedback signal related to an output voltage of the output power supply to control at least one switch in a power stage circuit to switch an inductor in the power stage circuit to adjust the output voltage; in, The step of generating the reference voltage includes: selecting one of at least two candidate voltages as the reference voltage according to the comparison between the rectified voltage and at least one determination threshold, so that the output voltage is at least partially positively correlated with the rectified voltage.

23. The control method according to claim 22, wherein: The at least two candidate voltages include a first candidate voltage and a second candidate voltage, wherein the at least one determination threshold includes a first determination threshold, and the step of generating the reference voltage includes: Comparing a rectification-related signal with a threshold voltage to generate a comparison signal, wherein the rectification-related signal is related to the rectification voltage, and the threshold voltage is related to the first determination threshold; and One of the first candidate voltage and the second candidate voltage is selected as the reference voltage according to the comparison signal.

24. The control method according to claim 23, wherein: The step of generating the reference voltage also includes: connecting a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the first candidate voltage.

25. The control method according to claim 24, wherein: The step of generating the reference voltage also includes: using the second candidate voltage as the preset candidate voltage.

26. The control method according to claim 23, wherein: The step of generating the reference voltage also includes: connecting a preset candidate voltage and an overwrite candidate voltage in parallel, thereby comparing the preset candidate voltage and the overwrite candidate voltage to select one of them as the reference voltage, and selecting one of the first candidate voltage and the second candidate voltage as the preset candidate voltage according to the comparison signal, wherein the overwrite candidate voltage is a programmable value.

27. The control method according to claim 24, wherein: The step of generating the reference voltage also includes: clamping the preset candidate voltage with the overwriting candidate voltage, so that the reference voltage is clamped at the overwriting candidate voltage.

28. The control method according to claim 22, wherein: The method also includes: controlling the power stage circuit to operate in a boundary conduction mode or a discontinuous conduction mode.

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