Calculation circuit, calculation method, chip, and electronic device

Abstract

The invention discloses an operation circuit, an operation method, a chip and electronic equipment, and belongs to the technical field of chips. The operational circuit comprises a storage unit, an operational control unit and a multiplier, wherein the storage unit is respectively connected with the operational control unit and the multiplier; the storage unit is used for receiving and storing the base number and the index of the exponentiation sent by the upper-layer application; the operation control unit is used for determining an operation process based on the base number and the index, and the operation process comprises at least one multiplication operation; under the condition that any multiplication operation in the at least one multiplication operation is executed according to the operation process, the storage unit is controlled to input a multiplier of any multiplication operation into the multiplier; the multiplier is used for calculating a product result of the input multipliers and outputting the product result; and the storage unit is also used for storing the product result output by the multiplier. The operational circuit multiplexes the existing multiplier, is simple in design and easy to implement, and can circularly realize multiple times of multiplied exponentiation by only one multiplier, so that the chip area is saved.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a computing circuit, a computing method, a chip and an electronic device. Background Art

[0002] With the continuous advancement of chip technology, the speed of artificial intelligence computing has been greatly improved, providing a strong foundation for the development of artificial intelligence. NPU (Neural Network Processor) is a special acceleration chip for machine learning and artificial intelligence, which is a hot topic in current research. Among them, NPU uses a large number of computing units in the process of neural network computing, such as adders, multipliers, dividers and convolution circuits.

[0003] However, in addition to the above-mentioned computing units, the neural network operation process also involves power operations. p It means p times x are multiplied, where x is the base number and p is the exponent. Therefore, it is necessary to develop a dedicated arithmetic circuit for the chip to calculate the power. Summary of the invention

[0004] The present application provides an operation circuit, operation method, chip and electronic device for implementing power operation. The technical solution is as follows:

[0005] In one aspect, an operation circuit is provided, the operation circuit comprising: a storage unit, an operation control unit and a multiplier, the storage unit is connected to the operation control unit, and the storage unit is also connected to a first input terminal, a second input terminal and a first output terminal of the multiplier;

[0006] The storage unit is used to receive and store the base and exponent of the power operation sent by the upper layer application;

[0007] The operation control unit is configured to determine an operation flow based on the base and the exponent, wherein the operation flow includes at least one multiplication operation; when any multiplication operation in the at least one multiplication operation is performed according to the operation flow, control the storage unit to input a multiplier of the any multiplication operation to the first input terminal and the second input terminal;

[0008] The multiplier is used to calculate a product result of the multipliers inputted at the first input terminal and the second input terminal, and output the product result through the first output terminal;

[0009] The storage unit is also used to store the product result output by the first output terminal.

[0010] In a possible implementation manner, the operation process further includes at least one square root operation, and the operation circuit further includes: a square root extractor, and the storage unit is further connected to the third input terminal and the second output terminal of the square root extractor;

[0011] The operation control unit is further used to control the storage unit to input the radicand of any square root operation to the third input terminal when any square root operation in the at least one square root operation is performed according to the operation flow;

[0012] The square root extractor is used to calculate the square root result of the square root inputted at the third input terminal, and output the square root result through the second output terminal;

[0013] The storage unit is further used to store the square root result output by the second output terminal.

[0014] In a possible implementation manner, the operation flow further includes a division operation, and the operation circuit further includes: a divider, and the storage unit is further connected to the fourth input terminal, the fifth input terminal, and the third output terminal of the divider;

[0015] The operation control unit is further used to control the storage unit to input the dividend and divisor of the division operation to the fourth input terminal and the fifth input terminal when the division operation is performed according to the operation flow;

[0016] The divider is used to calculate a quotient result of the dividend inputted from the fourth input terminal and the divisor inputted from the fifth input terminal, and output the quotient result through the third output terminal;

[0017] The storage unit is also used to store the quotient result output by the third output terminal.

[0018] In a possible implementation, the data type of the exponent is a floating point number, and the floating point number includes a mantissa, a base, and an exponent;

[0019] The operation control unit is used to split the power operation into multiple sub-operations; and determine the operation flow according to the multiple sub-operations;

[0020] Among them, the multiple sub-operations include a first sub-operation, a second sub-operation and a third sub-operation, the first sub-operation is used to obtain a first result of the base raised to the power of the exponent, the second sub-operation is used to obtain a second result of the base raised to the power of the first result, and the third sub-operation is used to obtain a third result of the mantissa raised to the power of the second result.

[0021] In a possible implementation, the floating-point number further includes a sign, and when the sign indicates a negative number, the multiple sub-operations further include a fourth sub-operation, and the fourth sub-operation is used to obtain a reciprocal result of the third result.

[0022] In a possible implementation manner, the operation control unit is further connected to an enable terminal of the multiplier;

[0023] The operation control unit is further used to input a signal to the enable terminal of the multiplier according to the operation process;

[0024] The multiplier is further used to determine whether to work according to the signal input from the enable terminal.

[0025] In a possible implementation manner, the operation control unit is further configured to determine, when the operation process is completed, an operation result of the power operation in the data stored in the storage unit;

[0026] The storage unit is further configured to, when a result of the power operation is determined, send the result to the upper layer application.

[0027] On the other hand, a calculation method is provided, which is applied to a calculation circuit, wherein the calculation circuit comprises: a storage unit, a calculation control unit and a multiplier, wherein the storage unit is connected to the calculation control unit, and the storage unit is also connected to a first input terminal, a second input terminal and a first output terminal of the multiplier; the method comprises:

[0028] Receiving and storing the base and exponent of the power operation sent by the upper layer application through the storage unit;

[0029] determining, by the operation control unit, an operation flow based on the base and the exponent, the operation flow including at least one multiplication operation; and, when any multiplication operation in the at least one multiplication operation is performed according to the operation flow, controlling the storage unit to input a multiplier of the any multiplication operation to the first input terminal and the second input terminal;

[0030] Calculating a product result of the multipliers inputted at the first input terminal and the second input terminal through the multiplier, and outputting the product result through the first output terminal;

[0031] The storage unit stores the product result outputted from the first output terminal.

[0032] In a possible implementation, the operation process further includes at least one square root operation, the operation circuit further includes: a square rooter, and the storage unit is further connected to the third input terminal and the second output terminal of the square rooter; the method further includes:

[0033] When any square root operation in the at least one square root operation is performed according to the operation flow, the operation control unit controls the storage unit to input the square root of any square root operation to the third input terminal;

[0034] Calculate the square root result of the square root inputted at the third input terminal through the square root extractor, and output the square root result through the second output terminal;

[0035] The square root result outputted from the second output terminal is stored by the storage unit.

[0036] In a possible implementation, the operation flow further includes a division operation, the operation circuit further includes: a divider, and the storage unit is further connected to the fourth input terminal, the fifth input terminal and the third output terminal of the divider; the method further includes:

[0037] When the division operation is performed according to the operation flow, the operation control unit controls the storage unit to input the dividend and the divisor of the division operation to the fourth input terminal and the fifth input terminal;

[0038] Calculating a quotient of the dividend inputted from the fourth input terminal and the divisor inputted from the fifth input terminal through the divider, and outputting the quotient through the third output terminal;

[0039] The quotient result outputted from the third output terminal is stored by the storage unit.

[0040] In a possible implementation, the data type of the exponent is a floating point number, and the floating point number includes a mantissa, a base, and an exponent; and determining the operation process based on the base and the exponent by the operation control unit includes:

[0041] The power operation is split into multiple sub-operations by the operation control unit; the operation process is determined according to the multiple sub-operations; wherein the multiple sub-operations include a first sub-operation, a second sub-operation and a third sub-operation, the first sub-operation is used to obtain a first result of the base raised to the power of the exponent, the second sub-operation is used to obtain a second result of the base raised to the power of the first result, and the third sub-operation is used to obtain a third result of the mantissa raised to the power of the second result.

[0042] In a possible implementation, the floating-point number further includes a sign, and when the sign indicates a negative number, the multiple sub-operations further include a fourth sub-operation, and the fourth sub-operation is used to obtain a reciprocal result of the third result.

[0043] In a possible implementation manner, the operation control unit is further connected to an enable terminal of the multiplier; and the method further includes:

[0044] Inputting a signal to the enable terminal of the multiplier according to the operation flow through the operation control unit;

[0045] Whether to work is determined by the multiplier according to the signal input from the enable terminal.

[0046] In a possible implementation, the method further includes:

[0047] Determining, by the operation control unit, the operation result of the power operation in the data stored in the storage unit when the operation process is finished;

[0048] When the operation result of the exponentiation operation is determined by the storage unit, the operation result is sent to the upper layer application.

[0049] On the other hand, a chip is provided, wherein the chip includes the operation circuit as described in the above aspect.

[0050] On the other hand, an electronic device is provided, comprising the chip as described in the other hand.

[0051] In summary, the technical solution provided by this application can at least bring the following beneficial effects:

[0052] The operation circuit stores input, output and intermediate data through a storage unit, splits the power operation into an operation flow including at least one multiplication operation through an operation control unit, and executes the at least one multiplication operation in a cycle by reusing an existing multiplier according to the operation flow, thereby realizing the power operation. The operation circuit is simple in design and easy to implement, and only requires one multiplier to save chip area. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0054] Figure 1 is a schematic diagram of the structure of a computing circuit provided in an embodiment of the present application;

[0055] Figure 2 is a schematic diagram of the structure of another computing circuit provided in an embodiment of the present application;

[0056] Figure 3is a schematic diagram of the structure of another computing circuit provided in an embodiment of the present application;

[0057] Figure 4 is a schematic diagram of the structure of another computing circuit provided in an embodiment of the present application;

[0058] Figure 5 is a schematic diagram of the structure of another computing circuit provided in an embodiment of the present application;

[0059] Figure 6 is a schematic diagram of a chain multiplication operation provided in an embodiment of the present application;

[0060] Figure 7 It is a schematic diagram of a chained square root operation provided in an embodiment of the present application;

[0061] Figure 8 is a flow chart of a calculation method provided in an embodiment of the present application;

[0062] Fig. 9 is a schematic diagram of the structure of an NPU provided in an embodiment of the present application;

[0063] Fig.10 is a schematic diagram of the structure of a chip provided in an embodiment of the present application;

[0064] Fig.11 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0065] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0066] As the AI ​​technology revolution and industrial transformation continue to advance, data, algorithms, and computing power are the three major driving factors for the development of AI. In terms of computing power, with the continuous advancement of chip technology, the speed of AI computing has been greatly improved, providing a strong foundation for the development of AI. NPU, as a dedicated acceleration chip for machine learning and AI, is a hot topic in current research.

[0067] Among them, NPU uses a large number of computing units in the process of neural network operation, such as adders, multipliers, dividers and convolution circuits. However, in addition to the above computing units, the neural network operation process also involves power operation. Power can be expressed as x p It means p times x are multiplied, where x is the base number and p is the exponent. Therefore, it is necessary to develop a dedicated arithmetic circuit for the chip to calculate the power.

[0068] The embodiment of the present application provides an operation circuit for implementing exponentiation operation. The operation circuit can be used for any general numerical calculation or neural network operation requiring exponentiation operation. Figure 1 is a schematic diagram of a structure of a computing circuit provided in an embodiment of the present application. Figure 1 As shown, the operation circuit 00 includes a storage unit 01 , an operation control unit 02 and a multiplier 03 . The storage unit 01 is connected to the operation control unit 02 , and the storage unit 01 is also connected to the multiplier 03 .

[0069] Optionally, the multiplier 03 includes a first input terminal, a second input terminal and a first output terminal, and the storage unit 01 is also connected to the first input terminal, the second input terminal and the first output terminal of the multiplier 03. Figure 1 As shown, the first input terminal is represented by in0, the second input terminal is represented by in1, and the first output terminal is represented by out.

[0070] The storage unit 01 is used to receive and store the base and exponent of the power operation sent by the upper layer application. In the embodiment of the present application, the base is represented by x and the exponent is represented by p, such as Figure 1 As shown, the upper layer application inputs x and p to the storage unit 01, and the operation circuit 00 is used to calculate x according to the input x and p. p The upper layer application can calculate x for any p For applications, that is, when the upper-level application needs to calculate, x and p can be input into the storage unit 01 of the operation circuit 00.

[0071] The operation control unit 02 is connected to the storage unit 01 and can obtain the data layer stored in the storage unit 01. For the base and the exponent stored in the storage unit 01, the operation control unit 02 is used to determine the operation process based on the base and the exponent, and the operation process includes at least one multiplication operation; when any multiplication operation in the at least one multiplication operation is performed according to the operation process, the storage unit is controlled to input the multiplier of any multiplication operation to the first input terminal and the second input terminal.

[0072] In the embodiment of the present application, when the exponent p is a positive integer, the operation control unit 02 can split the exponentiation operation of into at least one multiplication operation, and then implement the exponentiation operation by multiple multiplications. 2 For example, the operation process includes a multiplication operation, that is, x*x. 3 For example, the operation process includes two multiplication operations, namely x*x and x 2 *x. 4 For example, the operation process includes two multiplication operations, namely x*x and x 2 *x 2 .

[0073] After determining the operation flow, the operation control unit 02 sequentially performs each operation according to the operation flow, and each time a multiplication operation is performed, the control storage unit 01 inputs the two multipliers of the multiplication operation into the first input terminal and the second input terminal of the multiplier 03. The multiplier 03 is used to calculate the product result of the multipliers input into the first input terminal and the second input terminal, and output the product result through the first output terminal. The storage unit 01 is also used to store the product result outputted from the first output terminal.

[0074] The multiplier 03 is an electronic device for performing multiplication operation on input data. Optionally, the multiplier 03 may also adopt any existing multiplier. The embodiment of the present application does not limit the type of the multiplier 03, including but not limited to analog multipliers, hardware multipliers or harmonic multipliers.

[0075] x 4 For example, the operation process includes two multiplication operations: x*x and x 2 *x 2 The storage unit 01 stores x, and the operation control unit 02 controls the storage unit 01 to input x to the first input terminal and the second input terminal of the multiplier 03. The multiplier 03 calculates x 2 And output, storage unit 01 increases storage x 2 The operation control unit 02 controls the storage unit 01 to input x to the first input terminal of the multiplier 03. 2 and the second input terminal input x 2 . Multiplier 03 calculates x 4 And output, storage unit 01 increases storage x 4 The intermediate data.

[0076] like Figure 1 As shown, the storage unit 01 is also used to send the result of the power operation, i.e., pow(x, p), to the upper-layer application. In a possible implementation, the operation control unit 02 is also used to determine the result of the power operation in the data stored in the storage unit 01 when the operation process ends; the storage unit 01 is used to send the result of the power operation to the upper-layer application when the result of the power operation is determined. Alternatively, the storage unit 01 is used to automatically send the intermediate data stored for the last time as the result of the power operation to the upper-layer application when the operation process ends.

[0077] The operation circuit stores input, output and intermediate data through a storage unit, splits the power operation into at least one multiplication operation through an operation control unit, and cyclically executes the at least one multiplication operation through a multiplier, thereby realizing the power operation. The operation circuit reuses the existing multiplier, and the design is simple and easy to implement. Since the operation control unit can split the operation process, only one multiplier is needed to cyclically realize the power operation of multiplication multiple times, saving chip area.

[0078] Figure 2 A schematic diagram of another structure of a computing circuit provided in an embodiment of the present application. Figure 2 As shown, the operation circuit 00 includes a storage unit 01, an operation control unit 02 and a multiplier 03, and also includes a square root 04, and the storage unit 01 is connected to the square root 04. Optionally, the square root 04 includes a third input terminal and a second output terminal, and the storage unit 01 is connected to the third input terminal and the second output terminal of the square root 04. Figure 2 As shown, the third input terminal of the square root generator 04 is also represented by in0, and the second output terminal is also represented by out.

[0079] When the exponent p is a fraction, the operation flow includes not only at least one multiplication operation but also at least one square root operation. Then the operation control unit 02 is further used to control the storage unit 01 to input the radicand of any square root operation to the third input terminal when any square root operation in the at least one square root operation is performed according to the operation flow.

[0080] The square root extractor 04 is used to calculate the square root result of the square root inputted at the third input terminal, and output the square root result through the second output terminal. The square root extractor 04 is an electronic device used to perform square root operation on input data. Optionally, the square root extractor 04 can also adopt any existing square root extractor, and the embodiment of the present application does not limit the type of the square root extractor 04. In this case, the storage unit 01 is also used to store the square root result outputted at the second output terminal.

[0081] For example, For example, the operation process includes two multiplication operations: x*x and x*x 2 , a square root operation is The storage unit 01 stores x, and the operation control unit 02 controls the storage unit 01 to input x to the first input terminal and the second input terminal of the multiplier 03. The multiplier 03 calculates x 2 And output, storage unit 01 increases storage x 2 The operation control unit 02 controls the storage unit 01 to input x to the first input terminal of the multiplier 03 and to input x to the second input terminal. 2 . Multiplier 03 calculates x 3And output, storage unit 01 increases storage x 3 The operation control unit 02 controls the storage unit 01 to input x to the third input terminal of the square root device 04. 3 . The square root 04 calculates And output, storage unit 01 increases storage The intermediate data.

[0082] Figure 3 A schematic diagram of another structure of a computing circuit provided in an embodiment of the present application. Figure 3 As shown, the operation circuit 00 includes a divider 05 in addition to a storage unit 01, an operation control unit 02 and a multiplier 03, and the storage unit 01 is also connected to the divider 05. Optionally, the divider 05 includes a fourth input terminal, a fifth input terminal and a third output terminal, and the storage unit 01 is connected to the fourth input terminal, the fifth input terminal and the third output terminal of the divider 05. Figure 3 As shown, the fourth input terminal of the divider 05 is also denoted by in0, the fifth input terminal is also denoted by in1, and the third output terminal is also denoted by out.

[0083] When the exponent p is a negative integer, the operation flow includes not only at least one multiplication operation but also one division operation. Then the operation control unit 02 is further used to control the storage unit to input the dividend and divisor of the division operation to the fourth input terminal and the fifth input terminal when the division operation is performed according to the operation flow. The dividend is 1, that is, x is calculated by the divider 05. |p| The reciprocal of , |p| represents the absolute value of p.

[0084] The divider 05 is used to calculate the quotient result of the dividend inputted at the fourth input terminal and the divisor inputted at the fifth input terminal, and output the quotient result through the third output terminal. The divider 05 is an electronic device used to perform a division operation on input data. Optionally, the divider 05 can also adopt any existing divider, and the embodiment of the present application does not limit the type of the divider 05. In this case, the storage unit 01 is also used to store the quotient result outputted at the third output terminal.

[0085] For example, x -4 For example, the operation process includes two multiplication operations: x*x and x 2 *x 2 , a division operation 1 / x 4 See above Figure 1 In the example process shown, the multiplier 03 can calculate x cyclically. 4 The operation control unit 02 controls the storage unit 01 to input 1 to the fourth input terminal of the divider 05 and input x to the fifth input terminal. 4 Divider 05 calculates x-4 And output, storage unit 01 increases storage x -4 The intermediate data.

[0086] Figure 4 A schematic diagram of another structure of a computing circuit provided in an embodiment of the present application. Figure 4 As shown, the operation circuit 00 includes Figure 1 In addition to the storage unit 01, the operation control unit 02 and the multiplier 03 shown in the figure, the above Figure 2 and Figure 3 The square root device 04 and the divider 05 are shown. Figure 4 The implementation of the operation circuit shown can be combined with the above Figure 2 and Figure 3 The implementation of the operation circuit shown is not described in detail here.

[0087] In a possible implementation, the operation control unit 02 is also connected to the enable terminal of the multiplier 03; the operation control unit 02 is also used to input a signal to the enable terminal of the multiplier 03 according to the operation process; the multiplier 03 is also used to determine whether to work according to the signal input to the enable terminal. Optionally, when the signal input to the enable terminal is at a high level, the multiplier 03 works; when the signal input to the enable terminal is at a low level, the multiplier 03 does not work. Thus, through the control of the enable terminal, the multiplier 03 can work when performing a multiplication operation, and stop working when not performing a multiplication operation, so as to avoid the waste of resources caused by the multiplier 03 being in an idle working state when not performing a multiplication operation.

[0088] In the case where the operation circuit 00 also includes a square rooter 04, the operation control unit 02 is also connected to the enable terminal of the square rooter 04; the operation control unit 02 is also used to input a signal to the enable terminal of the square rooter 04 according to the operation process; the square rooter 04 is also used to determine whether to work according to the signal input from the enable terminal. In the case where the operation circuit 00 also includes a divider 05, the operation control unit 02 is also connected to the enable terminal of the divider 05; the operation control unit 02 is also used to input a signal to the enable terminal of the divider 05 according to the operation process; the divider 05 is also used to determine whether to work according to the signal input from the enable terminal.

[0089] For example, see Figure 5 In the operation circuit shown in FIG. 1 , the operation control unit 02 is also connected to the enable terminal of the multiplier 03, the enable terminal of the square rooter 04, and the enable terminal of the divider 05, respectively. Figure 5 As shown in the figure, the enable terminal is represented by en. For example, the operation process includes two multiplication operations: x*x and x*x 2 , a square root operation is A division operation

[0090] When the operation control unit 02 performs the multiplication operation according to the operation flow, it inputs a high level signal to the enable terminal of the multiplier 03, and inputs a low level signal to the enable terminal of the square root 04 and the enable terminal of the divider 05, so that the multiplier 03 works, while the square root 04 and the divider 05 do not work. And the storage unit 01 is controlled to input x to the first input terminal and the second input terminal of the multiplier 03. The multiplier 03 calculates x 2 And output, storage unit 01 increases storage x 2 The operation control unit 02 controls the storage unit 01 to input x to the first input terminal of the multiplier 03 and to input x to the second input terminal. 2 . Multiplier 03 calculates x 3 And output, storage unit 01 increases storage x 3 The intermediate data.

[0091] When the operation control unit 02 executes the square root operation according to the operation flow, it inputs a high level signal to the enable terminal of the square root 04, and inputs a low level signal to the enable terminal of the multiplier 03 and the enable terminal of the divider 05, so that the square root 04 works, while the multiplier 03 and the divider 05 do not work. And the storage unit 01 is controlled to input x to the third input terminal of the square root 04. 3 . The square root 04 calculates And output, storage unit 01 increases storage The intermediate data.

[0092] When the operation control unit 02 performs the division and square root operation according to the operation flow, it inputs a high level signal to the enable terminal of the divider 05, and inputs a low level signal to the enable terminal of the multiplier 03 and the enable terminal of the square root 04, so that the divider 05 works, while the multiplier 03 and the square root 04 do not work. It also controls the storage unit 01 to input 1 to the fourth input terminal of the divider 05, and input 1 to the fifth input terminal. Divider 05 calculates And output, storage unit 01 increases storage The intermediate data.

[0093] The operation circuit provided in the embodiment of the present application can support the exponentiation of floating-point numbers, for example, at least one of the base or the exponent is a floating-point number. Floating-point numbers are digital representations of numbers belonging to a specific subset of rational numbers, and are used in computers to approximate any real number. Exemplarily, a floating-point number consists of four parts: a sign, a mantissa, a radix, and an exponent. In binary representation, the radix is ​​2, and the exponent is also called the exponent. Taking the data type of the exponent in the embodiment of the present application as a floating-point number as an example, p = (-1) S *M*2 E , S represents the sign bit, M represents the mantissa, E represents the actual value of the exponent, and p represents the value of the corresponding floating-point number. In this case, the calculation formula of the power operation can be shown as the following formula (1).

[0094]

[0095] In a possible implementation, the operation control unit 02 is used to split the power operation into multiple sub-operations; and determine the operation process according to the multiple sub-operations. The multiple sub-operations include a first sub-operation, a second sub-operation, and a third sub-operation. The first sub-operation is used to obtain a first result of the exponent of the base, that is, 2 E ; The second sub-operation is used to obtain the second result of the first result of the base, that is, The third sub-operation is used to obtain the third result of the mantissa of the second result, that is, In the case where the sign indicates a negative number, that is, S is 1, the plurality of sub-operations further includes a fourth sub-operation, which is used to obtain the reciprocal result of the third result, that is,

[0096] The present application embodiment does not limit the precision of floating point numbers, including but not limited to 16-bit, 32-bit or 64-bit floating point numbers. The more bits there are, the higher the precision of the floating point number. Taking a 16-bit floating point number (abbreviated as FP1 6) as an example, in a binary floating point number, S occupies 1 bit, E occupies 5 bits, and M occupies 10 bits. Then E can be expressed as e[4:0]. Since E has no corresponding sign bit, 2 E The actual value is 2 e[4：0]-15 , where 15 is the offset. M can be expressed as m[9:0], and the actual value of M is {2 0 +m[9]*2 -1 +m[8]*2 -2 +m[7]*2 -3 +m[6]*2 -4 +m[5]*2 -5 +m[4]*2 -6 +m[3]*2 -7 +m[2]*2-8 +m[1]*2 -9 +m[0]*2 -10}.

[0097] Thus, the first sub-operation 2 E Can be converted to 2 e[4：0]-15 , the second sub-operation Can be converted into Depending on the value of (e[4:0]-15), the operation flow includes different operation algorithms. When e[4:0]-15>0, the first sub-operation 2 e[4：0]-15 If the first result obtained is a positive integer, then The operation flow includes a multiplication operation, and the second result is obtained by multiplier 03. When e[4:0]-15=0, the first sub-operation 2 e[4：0]-15 The first calculated result is 1, then No need to calculate through other operators. When e[4:0]-15<0, the first sub-operation 2 e[4：0]-15 The first result obtained is a positive score, then The operation process includes a square root operation, and the second result is calculated by the square root device 04.

[0098] For example, with E=4, we solve For example, see Figure 6 , the result can be obtained by looping through multiplier 03 for 4 times. With E = -4, solve For example, see Figure 7 , the result can be obtained by looping the calculation four times through the square root 04. Figure 6 or Figure 7 It is shown in the form of chain operation, which is actually a circular chain operation implemented by the operation control unit 02 controlling a multiplier 03 or a square rooter 04.

[0099] Getting the second result After that, according to the actual value of M, the third sub-operation can be calculated and solved through the mixed operation of multiplier 03 and square rooter 04. When S is 0, the third result is the final solution of the power operation pow(x, p). Correspondingly, when S is 1, the fourth sub-operation is calculated by adding one division operation through divider 05. The fourth result is the final solution of the power operation pow(x, p).

[0100] In summary, the operation circuit provided in the embodiment of the present application is area optimized, using only one multiplier, one square rooter, and one divider. Moreover, the operation circuit can be implemented based on common mature circuits such as multipliers, square rooters, and dividers, and can be quickly built and implemented, reducing the complexity of circuit design. It avoids designing complex circuits from scratch, is also very conducive to the rapid convergence of functional verification, and the implementation process is flexible and convenient.

[0101] In addition, according to the actual target requirements for calculation accuracy, calculation performance and minimum area in the actual application scenario, the multiplier, square root and divider can be optimized separately. Users can replace the multiplier, square root and divider as needed. For example, according to the different calculation accuracy of floating-point numbers, multipliers, square root and dividers with different calculation speeds and different architectures such as single cycle or multi-cycle can be used to optimize accuracy, speed, area and power consumption. When the floating-point number being calculated is always greater than 0, the divider can even be removed to further save area.

[0102] The present application provides an operation method, which is applied to an operation circuit, wherein the operation circuit includes: a storage unit, an operation control unit and a multiplier, wherein the storage unit is connected to the operation control unit, and the storage unit is also connected to the first input terminal, the second input terminal and the first output terminal of the multiplier. Figure 1-Figure 5 The operational circuit shown. Figure 8 A flowchart of a calculation method provided in an embodiment of the present application, such as Figure 8 As shown, the method includes but is not limited to the following steps 801-804.

[0103] Step 801: Receive and store the base and exponent of the power operation sent by the upper layer application through a storage unit.

[0104] Step 802, determining an operation flow based on a base and an exponent through an operation control unit, the operation flow including at least one multiplication operation; when any multiplication operation in at least one multiplication operation is executed according to the operation flow, controlling the storage unit to input a multiplier of any multiplication operation to a first input terminal and a second input terminal.

[0105] Step 803: Calculate the product of the multipliers inputted at the first input terminal and the second input terminal through a multiplier, and output the product through a first output terminal.

[0106] Step 804: store the product result outputted from the first output terminal through a storage unit.

[0107] In a possible implementation, the operation process also includes at least one square root operation, and the operation circuit also includes: a square rooter, and the storage unit is also connected to the third input terminal and the second output terminal of the square rooter; the method also includes: when the operation control unit executes any square root operation in at least one square root operation according to the operation process, controlling the storage unit to input the square root of any square root operation to the third input terminal; calculating the square root result of the square root inputted at the third input terminal by the square rooter, and outputting the square root result by the second output terminal; and storing the square root result outputted at the second output terminal by the storage unit.

[0108] In a possible implementation, the operation process also includes a division operation, and the operation circuit also includes: a divider, and the storage unit is also connected to the fourth input terminal, the fifth input terminal and the third output terminal of the divider; the method also includes: when the operation control unit executes the division operation according to the operation process, controlling the storage unit to input the dividend and the divisor of the division operation to the fourth input terminal and the fifth input terminal; calculating the quotient result of the dividend input to the fourth input terminal and the divisor input to the fifth input terminal by the divider, and outputting the quotient result through the third output terminal; storing the quotient result output from the third output terminal by the storage unit.

[0109] In a possible implementation, the data type of the exponent is a floating point number, and the floating point number includes a mantissa, a base, and an exponent; the operation process is determined by an operation control unit based on the base and the exponent, including: splitting the power operation into multiple sub-operations by the operation control unit; determining the operation process according to the multiple sub-operations; wherein the multiple sub-operations include a first sub-operation, a second sub-operation, and a third sub-operation, the first sub-operation is used to obtain a first result of the base raised to the power of the exponent, the second sub-operation is used to obtain a second result of the base raised to the power of the first result, and the third sub-operation is used to obtain a third result of the second result raised to the power of the mantissa.

[0110] In a possible implementation, the floating-point number further includes a sign. When the sign indicates a negative number, the multiple sub-operations further include a fourth sub-operation, and the fourth sub-operation is used to obtain a reciprocal result of the third result.

[0111] In a possible implementation, the operation control unit is also connected to the enable terminal of the multiplier; the method further includes: inputting a signal to the enable terminal of the multiplier according to the operation process through the operation control unit; and determining whether to work according to the signal input from the enable terminal through the multiplier.

[0112] In a possible implementation, the method further includes: determining, by the operation control unit, a calculation result of the power operation in the data stored in the storage unit when the operation process is completed; and sending, by the storage unit, the calculation result of the power operation to an upper-layer application when the operation result is determined.

[0113] It should be understood that the method and circuit embodiment provided in the above embodiments belong to the same concept, and the specific implementation process and beneficial effects thereof are detailed in the circuit embodiment, which will not be repeated here.

[0114] Fig. 9 is an NPU provided in an embodiment of the present application, such as Fig. 9 As shown, the NPU includes Figure 1-5 Any of the arithmetic circuits 00 shown. Thus, the NPU can quickly calculate the power through the arithmetic circuit 00.

[0115] Fig.10 A chip 000 is provided in an embodiment of the present application, such as Fig.10 As shown, the chip includes Figure 1-5 Any of the arithmetic circuits 00 shown. Thus, the chip can quickly calculate powers through the arithmetic circuit 00.

[0116] Fig.11 Schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Fig.11 As shown, the electronic device includes Fig.10 The chip 000 is shown. Since the electronic device includes the above chip, the electronic device can quickly calculate the power through the chip.

[0117] It should be understood that the terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure, and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be the common meanings understood by people with ordinary skills in the field to which the present disclosure belongs.

[0118] For example, the words "first", "second" or "third" and similar words used in the patent application specification and claims of this disclosure do not indicate any order, quantity or importance, but are merely used to distinguish different components.

[0119] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.

[0120] Words such as “include” or “comprising” and the like mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.

[0121] "Up", "down", "left" or "right" etc. are only used to indicate relative position relationship. When the absolute position of the described object changes, the relative position relationship may also change accordingly. "Connected" or "coupled" refers to electrical connection.

[0122] "And / or" indicates that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship.

[0123] Technicians in the relevant field can clearly understand that for the convenience and simplicity of description, the specific working processes of the gate drive circuit, shift register unit, each circuit and each sub-circuit described above can refer to the corresponding processes in the method embodiment and will not be repeated here.

[0124] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A computing circuit, characterized in that: The operation circuit comprises: a storage unit, an operation control unit and a multiplier, wherein the storage unit is connected to the operation control unit, and the storage unit is also connected to a first input terminal, a second input terminal and a first output terminal of the multiplier; The storage unit is used to receive and store the base and exponent of the power operation sent by the upper layer application; The operation control unit is configured to determine an operation flow based on the base and the exponent, wherein the operation flow includes at least one multiplication operation; when any multiplication operation in the at least one multiplication operation is performed according to the operation flow, control the storage unit to input a multiplier of the any multiplication operation to the first input terminal and the second input terminal; The multiplier is used to calculate a product result of the multipliers inputted at the first input terminal and the second input terminal, and output the product result through the first output terminal; The storage unit is also used to store the product result output by the first output terminal.

2. The operation circuit according to claim 1, characterized in that: The operation process further includes at least one square root operation, and the operation circuit further includes: a square root device, and the storage unit is also connected to the third input terminal and the second output terminal of the square root device; The operation control unit is further used to control the storage unit to input the radicand of any square root operation to the third input terminal when any square root operation in the at least one square root operation is performed according to the operation flow; The square root extractor is used to calculate the square root result of the square root inputted at the third input terminal, and output the square root result through the second output terminal; The storage unit is further used to store the square root result output by the second output terminal.

3. The operation circuit according to claim 1, characterized in that: The operation flow also includes a division operation, and the operation circuit also includes: a divider, and the storage unit is also connected to the fourth input terminal, the fifth input terminal and the third output terminal of the divider; The operation control unit is further used to control the storage unit to input the dividend and divisor of the division operation to the fourth input terminal and the fifth input terminal when the division operation is performed according to the operation flow; The divider is used to calculate a quotient result of the dividend inputted from the fourth input terminal and the divisor inputted from the fifth input terminal, and output the quotient result through the third output terminal; The storage unit is also used to store the quotient result output by the third output terminal.

4. The operation circuit according to claim 1, characterized in that: The data type of the exponent is a floating point number, and the floating point number includes a mantissa, a base and an exponent; The operation control unit is used to split the power operation into multiple sub-operations; and determine the operation flow according to the multiple sub-operations; Among them, the multiple sub-operations include a first sub-operation, a second sub-operation and a third sub-operation, the first sub-operation is used to obtain a first result of the base raised to the power of the exponent, the second sub-operation is used to obtain a second result of the base raised to the power of the first result, and the third sub-operation is used to obtain a third result of the mantissa raised to the power of the second result.

5. The operation circuit according to claim 4, characterized in that: The floating point number further includes a sign, and when the sign indicates a negative number, the plurality of sub-operations further include a fourth sub-operation, and the fourth sub-operation is used to obtain a reciprocal result of the third result.

6. The operation circuit according to any one of claims 1 to 5, characterized in that: The operation control unit is also connected to the enable terminal of the multiplier; The operation control unit is further used to input a signal to the enable terminal of the multiplier according to the operation process; The multiplier is further used to determine whether to work according to the signal input from the enable terminal.

7. The operation circuit according to any one of claims 1 to 5, characterized in that: The operation control unit is further used to determine the operation result of the power operation in the data stored in the storage unit when the operation process is completed; The storage unit is further configured to, when a result of the power operation is determined, send the result to the upper layer application.

8. A computing method, characterized in that: The operation method is applied to an operation circuit, the operation circuit comprising: a storage unit, an operation control unit and a multiplier, the storage unit is connected to the operation control unit, and the storage unit is also connected to a first input terminal, a second input terminal and a first output terminal of the multiplier; the method comprises: Receiving and storing the base and exponent of the power operation sent by the upper layer application through the storage unit; determining, by the operation control unit, an operation flow based on the base and the exponent, the operation flow including at least one multiplication operation; and, when any multiplication operation in the at least one multiplication operation is performed according to the operation flow, controlling the storage unit to input a multiplier of the any multiplication operation to the first input terminal and the second input terminal; Calculating a product result of the multipliers inputted at the first input terminal and the second input terminal through the multiplier, and outputting the product result through the first output terminal; The storage unit stores the product result outputted from the first output terminal.

9. A chip, comprising the computing circuit according to any one of claims 1 to 7. 10 . An electronic device comprising the chip according to claim 9 .

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