Page access method and device

Abstract

The invention discloses a page access method and device.The method comprises the steps that after a first node determines that a first page is accessed, a first storage position mark of the first page can be determined firstly, and when the first page belongs to a page with the affiliation change frequency exceeding a preset numerical value within unit time, the first storage position mark points to a shared memory; the first node can perform read-write operation on the first page in the shared memory, that is, the high-conflict page accessed by multiple nodes does not need to be transmitted among multiple nodes, so that transmission resources can be saved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computer technology, and more particularly to a page access method and device. Background Art

[0002] In the data sharing architecture, the database uses a distributed buffer pool to solve the multi-machine expansion problem. The distributed cache is composed of multiple nodes. The access page may be in the local memory or in the memory of other nodes. If it needs to be read across nodes, the delay will be relatively large. If the owner of the access page belongs to this node, then this node has the control of this page and can read and write directly locally. If the owner of the page does not belong to this node, then the page must be read remotely to transfer control.

[0003] Currently, when a page needs to be modified, if it is determined that the owner of the page does not belong to the current node, the owner information of the page needs to be found in the cache page directory (PD) through the remote procedure call (RPC) process, and then the page is obtained from the owner. However, once the page needs to be read and written by multiple nodes, the page will be frequently transferred between these nodes, which is very costly. Summary of the invention

[0004] The present application provides a page access method and device for saving transmission resources.

[0005] A first aspect of the present application provides a page access method, the method comprising: a first node obtains an access instruction to a first page; the first node determines a first storage location flag of the first page according to the access instruction; when the first storage location flag points to a shared memory, the first node performs a read and write operation on the first page in the shared memory, and the number of ownership changes of the page in the shared memory within a unit time exceeds a preset value.

[0006] In the above aspect, after determining the access to the first page, the first node can first determine the first storage location flag of the first page. When the first page belongs to a page whose ownership changes exceed a preset value within a unit time, the first storage location flag points to the shared memory. The first node can perform read and write operations on the first page in the shared memory, that is, high-conflict pages accessed by multiple nodes do not need to be transmitted between multiple nodes, which can save transmission resources.

[0007] In one possible implementation, after the first node determines the first storage location flag of the first page according to the access instruction, the method further includes: when the first storage location flag points to the node memory and the local memory does not include the first page, the first node requests the first page from the second node, and the second node includes metadata corresponding to the first page; the first node receives a first message from the second node, the first message is determined by the metadata corresponding to the first page, and the first message indicates that the first page is in the shared memory; the first node points the first storage location flag to the shared memory according to the first message.

[0008] In the above possible implementation manner, the first storage location mark initially points to the node memory by default. At this time, the first page may be stored in the local memory of the first node, may be stored in the memory of other nodes, or may be stored in the shared memory. When the first node determines to access the first page, it can first determine whether the first page is in the local memory, that is, determine whether it is the owner of the first page. When it is determined that the local memory does not include the first page, the first node needs to request the first page from the second node where the cache page directory corresponding to the first page is located. The cache page directory corresponding to the first page contains the meta information of the first page. The second node can determine the storage location of the first page based on the meta information. When the meta information indicates that the first page is stored in the shared memory, the second node can send a first message indicating that the first page is in the shared memory to the first node, so that the first node can determine to change the first storage location mark to point to the shared memory. The first node can improve the accuracy of the storage location mark pointing by determining the storage location mark to the node where the meta information corresponding to the page is located.

[0009] In one possible implementation, the method also includes: the first node receives a second message from the second node, the second message indicates a change in the storage location of the second page, the second page is a page currently in the local memory, and the number of ownership changes of the second page within a unit time exceeds a preset value; the first node writes the second page from the local memory to the shared memory; the first node clears the second page in the local memory; the first node points the second storage location flag of the second page to the shared memory.

[0010] In the above possible implementation manner, the number of ownership changes of each page in a unit time is maintained by the PD corresponding to the page, that is, the number of page owner changes of the page is maintained. If the number of page owner changes of the page in a unit time exceeds a preset value, that is, the owner of the page changes frequently in a unit time, it means that the page will be transferred between multiple nodes, there is a waste of resources, and it needs to be transferred to the shared memory. Assuming that the meta information corresponding to the second page is in the second node, the second node will count the number of ownership changes of the second page in a unit time. If the number of ownership changes exceeds the preset value, it can be determined that the second page needs to be transferred to the shared memory. If the current second page is in the local memory of the first node, the second node can send a second message to the first node to indicate the change of the storage location of the second node. After receiving the second message, the first node can write the second page of the local memory to the shared memory, clear the second page in the local memory, and then adjust the second storage location flag corresponding to the second page to point to the shared memory. A method for converting a page from a private mode to a shared mode is provided, which reduces the transmission of high-conflict pages between nodes and improves the accuracy of the storage location flag.

[0011] In one possible implementation, the method also includes: when no other node modifies the third page within a unit time, the first node sends a third message to the second node, the third message indicates a change in the storage location of the third page, and the third page is a page in the shared memory; the first node stores the third page in the local memory; the first node clears the third page in the shared memory; the first node points the third storage location flag of the third page to the node memory.

[0012] In the above possible implementation, when a node modifies a page in the shared memory, the owner of the page is correspondingly changed to the node that performs the modification. Taking the third page in the shared memory as an example, when the first node accesses the third page in the shared memory, it can be determined whether the owner of the third page has changed within a unit time. When no other node modifies the third page within a unit time, that is, the owner of the third page has not changed within a unit time, it can be determined that the third page has become a page with relatively small multi-node access conflicts. The first node can instruct the second node to change the storage location of the third page through a third message, that is, the shared memory is changed to the node memory, and the first node stores the third page in the shared memory in the local memory, clears the third page in the shared memory, and then changes the point storage location flag corresponding to the third page to point to the node memory. A method for converting a page from a shared mode to a private mode is provided, which improves the flexibility of the solution and avoids low-conflict pages occupying shared resources.

[0013] In a possible implementation manner, after the first node obtains the access instruction to the first page, the method further includes: the first node locking the first page.

[0014] In the above possible implementation manner, after obtaining the access instruction to the first page, the first node may also lock the first page to prevent the access of other users from affecting the access of the current user.

[0015] In a possible implementation, before the first node determines the first storage location mark of the first page according to the access instruction, the method further includes: the first node determines that there is a local memory.

[0016] In the above possible implementation manner, before determining the storage location mark of the first page, the first node may also first determine whether there is local memory. Some nodes may not have local memory set. When the first node determines that there is no local memory, it may not need to determine the first storage location mark, and directly initiate a page request to the cache page target corresponding to the first page. The first node needs to determine the first storage location mark only when it determines that there is local memory, which improves the flexibility of the solution.

[0017] The second aspect of the present application provides a page access method, which includes: a second node receives a request for a first page from a first node; when the metadata corresponding to the first page indicates that the first page is in a shared memory, the second node sends a first message to the first node, and the first message indicates that the first page is in the shared memory.

[0018] In the above aspects, the first storage location mark initially points to the node memory by default. At this time, the first page may be stored in the local memory of the first node, or it may be stored in the memory of other nodes, or it may be stored in the shared memory. When the first node determines to access the first page, it can first determine whether the first page is in the local memory, that is, determine whether it is the owner of the first page. When it is determined that the local memory does not include the first page, the first node needs to request the first page from the second node where the PD corresponding to the first page is located. The PD corresponding to the first page contains the meta information of the first page. The second node can determine the storage location of the first page based on the meta information. When the meta information indicates that the first page is stored in the shared memory, the second node can send a first message to the first node indicating that the first page is in the shared memory, so that the first node can determine that the first storage location mark needs to be changed to point to the shared memory. The second node can indicate the storage location mark to the first node to improve the accuracy of the storage location mark pointing.

[0019] In a possible implementation, the method also includes: the second node counts the number of ownership changes of the second page within a unit time; when the number of ownership changes of the second page within a unit time exceeds a preset value, the second node sends a second message to the first node, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

[0020] In a possible implementation, before the second node sends the second message to the first node, the method further includes: the second node marking the storage location of the second page as shared memory.

[0021] In the above possible implementation manner, before sending the second message to the first node, the second node determines that the second page needs to be transferred to the shared memory. To facilitate other nodes to access the second page, the second node also needs to record that the second page is stored in the shared memory, such as marking the storage location of the second page as shared memory, to improve access efficiency.

[0022] In a possible implementation, the method further includes: the second node receives a third message from the first node, the third message indicates a change in the storage location of a third page, the third page being a page in the shared memory; the second node marks the storage location of the third page as node memory.

[0023] The third aspect of the present application provides a page access method, which includes: the second node counts the number of ownership changes of the second page within a unit time; when the number of ownership changes of the second page within a unit time exceeds a preset value, the second node sends a second message to the first node, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

[0024] In the above aspects, the number of ownership changes of each page in a unit time is maintained by the PD corresponding to the page, that is, the number of page owner changes of the page is maintained. If the number of page owner changes of the page in a unit time exceeds a preset value, that is, the owner of the page changes frequently in a unit time, it means that the page will be transferred between multiple nodes, there is a waste of resources, and it needs to be transferred to the shared memory. Assuming that the meta information corresponding to the second page is in the second node, the second node will count the number of ownership changes of the second page in a unit time. If the number of ownership changes exceeds the preset value, it can be determined that the second page needs to be transferred to the shared memory. If the current second page is in the local memory of the first node, the second node can send a second message to the first node to indicate the change of the storage location of the second node. After receiving the second message, the first node can write the second page of the local memory to the shared memory, clear the second page in the local memory, and then adjust the second storage location flag corresponding to the second page to point to the shared memory. The second node can indicate to the first node that the page is in the shared memory, and the node can read and write the first page in the shared memory, that is, the high-conflict page accessed by multiple nodes does not need to be transmitted between multiple nodes, which can save transmission resources.

[0025] In a possible implementation, the method further includes: the second node receives a request for the first page from the first node; when the meta-information corresponding to the first page indicates that the first page is in the shared memory, the second node sends a first message to the first node, and the first message indicates that the first page is in the shared memory.

[0026] In a fourth aspect, the present application provides a page access device that can implement the method in the first aspect or any possible implementation of the first aspect. The device includes corresponding units or modules for executing the above method. The units or modules included in the device can be implemented by software and / or hardware. The device can be, for example, a network device, or a chip, a chip system, or a processor that supports the network device to implement the above method, or a logic module or software that can implement all or part of the network device functions.

[0027] In a fifth aspect, the present application provides a page access device that can implement the method in the second aspect or any possible implementation of the second aspect. The device includes corresponding units or modules for executing the above method. The units or modules included in the device can be implemented by software and / or hardware. The device can be, for example, a network device, or a chip, a chip system, or a processor that supports the network device to implement the above method, or a logic module or software that can implement all or part of the network device functions.

[0028] In a sixth aspect, the present application provides a page access device that can implement the method in the third aspect or any possible implementation of the third aspect. The device includes corresponding units or modules for executing the above method. The units or modules included in the device can be implemented by software and / or hardware. The device can be, for example, a network device, or a chip, a chip system, or a processor that supports the network device to implement the above method, or a logic module or software that can implement all or part of the network device functions.

[0029] In a seventh aspect, the present application provides a computer device, including: a processor, the processor is coupled to a memory, the memory is used to store instructions, and when the instructions are executed by the processor, the computer device implements the method in the first aspect or any possible implementation of the first aspect. The computer device can be, for example, a network device, or a chip or chip system that supports the network device to implement the above method.

[0030] In an eighth aspect, the present application provides a computer device, including: a processor, the processor is coupled to a memory, the memory is used to store instructions, and when the instructions are executed by the processor, the computer device implements the method in the second aspect or any possible implementation of the second aspect. The computer device may be, for example, a network device, or a chip or chip system that supports the network device to implement the above method.

[0031] In a ninth aspect, the present application provides a computer device, including: a processor, the processor is coupled to a memory, the memory is used to store instructions, and when the instructions are executed by the processor, the computer device implements the method in the third aspect or any possible implementation of the third aspect. The computer device may be, for example, a network device, or a chip or chip system that supports the network device to implement the above method.

[0032] In the tenth aspect of the present application, a computer-readable storage medium is provided, which stores instructions. When the instructions are executed by a processor, the method provided by the first aspect or any possible implementation method of the first aspect, the second aspect or any possible implementation method of the second aspect, and the third aspect or any possible implementation method of the third aspect is implemented.

[0033] In the eleventh aspect of the present application, a computer program product is provided, which includes a computer program code. When the computer program code is executed on a computer, it implements the method provided by the first aspect or any possible implementation method of the first aspect, the second aspect or any possible implementation method of the second aspect, and the third aspect or any possible implementation method of the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 A storage system architecture diagram provided for an embodiment of the present application;

[0035] Figure 2 Another storage system architecture diagram provided for an embodiment of the present application;

[0036] Figure 3 A flowchart of a page access method provided in an embodiment of the present application;

[0037] Figure 4 A schematic diagram of a page reading process provided by an embodiment of the present application;

[0038] Figure 5 A schematic diagram of a page writing process provided in an embodiment of the present application;

[0039] Figure 6 A schematic diagram of switching from a node private page owner mode to a shared page owner mode provided in an embodiment of the present application;

[0040] Figure 7 A schematic diagram of switching from a node shared page owner mode to a private page owner mode provided in an embodiment of the present application;

[0041] Figure 8 A schematic diagram of two modes under multiple nodes provided in an embodiment of the present application;

[0042] Fig. 9 A schematic diagram of a private switching sharing structure provided in an embodiment of the present application;

[0043] Fig.10 A schematic diagram of the structure of a page access device provided in an embodiment of the present application;

[0044] Fig.11 A schematic diagram of the structure of another page access device provided in an embodiment of the present application;

[0045] Fig.12 A schematic diagram of the structure of another page access device provided in an embodiment of the present application;

[0046] Fig.13 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0047] The present application provides a page access method and device for saving transmission resources.

[0048] The following describes the embodiments of the present application in conjunction with the accompanying drawings. Obviously, the described embodiments are only embodiments of a part of the present application, rather than all embodiments. It is known to those skilled in the art that with the development of technology and the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0049] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0050] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0051] In addition, in order to better illustrate the present application, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present application can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present application.

[0052] See also Figure 1 ,like Figure 1 The storage system architecture diagram provided in the embodiment of the present application is shown. The storage system may be a data sharing architecture. The storage system includes a computing node cluster and a storage node cluster. The computing node cluster includes one or more computing nodes ( Figure 1 Three computing nodes are shown in the figure, but not limited to two computing nodes), and each computing node can communicate with each other. A computing node is a computing device, such as a server, a desktop computer, or a controller of a storage array. When a computing node receives a write data request sent by a user, it temporarily stores the data in the write data request in the memory. When the total amount of data in the memory reaches a certain threshold, the data stored in the memory can be sent to the storage node for persistent storage. Among them, the memory of the computing node cluster constitutes a distributed buffer pool.

[0053] Memory refers to the internal memory that directly exchanges data with the processor. It can read and write data at any time and at a very fast speed. It serves as a temporary data storage for the operating system or other running programs. Memory includes at least two types of memory. For example, memory can be either random access memory or read-only memory (ROM). For example, random access memory is dynamic random access memory (DRAM) or storage class memory (SCM). DRAM is a semiconductor memory, and like most random access memories (RAM), it is a volatile memory device. SCM is a composite storage technology that combines the characteristics of traditional storage devices and memory. Storage class memory can provide faster read and write speeds than hard disks, but the access speed is slower than DRAM, and the cost is cheaper than DRAM. However, DRAM and SCM are only exemplary descriptions in this embodiment, and memory can also include other random access memories, such as static random access memory (SRAM). As for the read-only memory, for example, it can be a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), etc. In addition, the memory can also be a dual in-line memory module or a dual-line memory module (DIMM), that is, a module composed of a dynamic random access memory (DRAM), or a solid state disk (SSD). In actual applications, multiple memories and different types of memories can be configured in a computing node. This embodiment does not limit the number and type of memory. In addition, the memory can be configured to have a power-saving function. The power-saving function means that when the system loses power and then powers on again, the data stored in the memory will not be lost. Memory with a power-saving function is called a non-volatile memory.

[0054] The storage node cluster includes one or more storage nodes, and any computing node can access any storage node in the storage node cluster through the network. The storage node includes a hard disk, which is used to store data and can be a magnetic disk or other types of storage media, such as a solid-state drive or a shingled magnetic recording hard disk. The storage node can write data to the hard disk or read data from the hard disk according to the read / write data request sent by the computing node.

[0055] Among them, another structural diagram of the storage system can be referred to Figure 2 As shown, the storage system includes multiple computer nodes and storage node clusters. Taking two computer nodes 1 and 2 as an example, each computing node includes a heap, an index, a cache page directory (PD) and a memory, wherein the memory can also be referred to as a local buffer pool. The local buffer pool is a configuration of a distributed buffer pool in each computing node. The local buffer pool includes a buffer tag (BufTag) and a buffer page description (BufDesc). Specifically, the meta information of a page is cached in a distributed manner in multiple computing nodes, that is, the meta information of each page is cached in the PD on any one of the multiple computing nodes, and each page is also cached in any one of the local buffer pools in the distributed buffer pool. Then, the computing node where the meta information of the cache page is located may be different from the computing node where the cache location of the cache page is located. In the local cache pool, BufTag represents the unique identifier of the cache page, and BufDesc represents the description information of the cache page. For example, BufDesc can carry ownByMe to represent whether the current node is the owner of the cache page. For example, ownByMe=true indicates that the current node is the owner of the cache page, and ownByMe=false indicates that the current node is not the owner of the cache page.

[0056] The heap uses an array to implement a binary tree. It does not use parent or child pointers. The heap sorts the data according to the "heap attribute", which determines the position of the tree nodes in the binary tree.

[0057] An index is a storage structure that sorts the values ​​of one or more columns in a database. It can include a set of values ​​of one or more columns in a table and a corresponding list of logical pointers to the data pages that identify these values ​​in the table.

[0058] Users can access pages through the heap and index. The computing node can determine whether the current computing node is the owner of the page to be accessed through the BufDesc in the local cache pool. If it is the owner of the page to be accessed, it can be read directly from the local cache pool. If it is not the owner of the page to be accessed, it can access the PD in the current node or other computing nodes through remote procedure call (RPC) to find the owner of the page to be accessed and read the page.

[0059] Currently, when a page needs to be modified, if it is determined that the owner of the page does not belong to this node, it is necessary to use the RPC process to find the owner information of the page in PD, and then obtain the page from the owner. However, once this page needs to be read and written by multiple computing nodes, the page will be frequently transferred between these computing nodes, and the transmission cost is relatively high.

[0060] In order to solve the above problems, an embodiment of the present application provides a page access method, which is described as follows.

[0061] The first node and the second node in the embodiment of the present application are Figure 1 and Figure 2 The compute nodes in .

[0062] See also Figure 3 ,like Figure 3 The figure is a flow chart of a page access method provided by an embodiment of the present application, the method comprising:

[0063] Step 301: A first node obtains an access instruction to a first page.

[0064] In this embodiment, the first page is the page that the user wants to visit. The way in which the first node obtains the access instruction to the first page can be the access instruction input by the user through the first node, or it can be the access instruction generated by the user through other devices. The first node obtains the access instruction from the other device, which is not limited here.

[0065] In a possible design, after obtaining the access instruction to the first page, the first node can also lock the first page to prevent the access of other users from affecting the access of the current user. The locking includes read lock and write lock. When the first node only reads the first page, the first page can be read locked. The user of the first node can read the first page but cannot modify the first page. The users of other nodes can also read the first page but cannot write it. When the first node writes the first page, the user of the first node can read the first page and modify the first page. The users of other nodes cannot read or write the first page.

[0066] Step 302: The first node determines a first storage location flag of the first page according to the access instruction.

[0067] In this embodiment, after the first node obtains the access instruction, it determines that the first page needs to be accessed, and then the storage location of the first page needs to be determined. The present application can set a storage location flag in the first node, and the storage location flag can be used to indicate the storage location of the page. Accordingly, for the first page, a first storage location flag corresponding to the first page is set in the first node, and the first storage location flag can indicate the storage location of the first page.

[0068] In a possible design, before determining the storage location mark of the first page, the first node may also determine whether there is local memory. Some nodes may not have local memory set. When the first node determines that there is no local memory, it does not need to determine the first storage location mark, and directly initiates a page request to the PD corresponding to the first page through the RPC process. The first node needs to determine the first storage location mark only when it determines that there is local memory.

[0069] Step 303: When the first storage location mark points to the shared memory, the first node performs a read and write operation on the first page in the shared memory, and the number of ownership changes of the page in the shared memory within a unit time exceeds a preset value.

[0070] In this embodiment, after determining the first storage location mark, the first node can determine whether the first storage location mark points to shared memory or node memory, wherein the node memory is the memory in each node, not just the memory of the first node, and the shared memory is a memory space that can be shared and accessed by one or more nodes equipped in the embodiment of the present application, which is independent of the node memory of each node. The shared memory only stores pages whose ownership changes exceed a preset value in a unit time, that is, the page owner (page owner) of the page changes frequently when it is stored in the node memory. When it is determined that the first storage location mark points to the shared memory, the first node can read and write the first page from the shared memory through the host interconnection protocol without transferring the control of the first page. Among them, the first storage location mark can point to the shared memory in a way that directly indicates the address in the shared memory. The host interconnection protocol can be remote direct memory access (RDMA) or compute express link (CXL). RDMA is taken as an example in the embodiment of the present application.

[0071] Exemplarily, the first storage location flag may directly indicate shared memory or node memory, or may be single-bit information, for example, "1" indicates shared memory, "0" indicates node memory, or "0" indicates shared memory, "1" indicates node memory. Among them, in the embodiment of the present application, the way in which the first node determines whether to point to the shared memory through the first storage location may also be that if the first node obtains the first storage location flag, it indicates that the first page is stored in the shared memory, and if the first storage location flag is not obtained, it indicates that the first page is stored in the node memory. Alternatively, if the first node obtains the first storage location flag, it indicates that the first page is stored in the node memory, and if the first storage location flag is not obtained, it indicates that the first page is stored in the shared memory. In the embodiment of the present application, the single-bit information of the first storage location flag is taken as an example.

[0072] In a possible design, the first storage location mark initially points to the node memory by default. At this time, the first page may be stored in the local memory of the first node, or in the memory of other nodes, or in the shared memory. When the first node determines to access the first page, it can first determine whether the first page is in the local memory, that is, determine whether it is the owner of the first page. When it is determined that the local memory does not include the first page, the first node needs to request the first page from the second node where the PD corresponding to the first page is located. The PD corresponding to the first page has the meta information of the first page, and the second node can determine the storage location of the first page according to the meta information. When the meta information indicates that the first page is stored in the shared memory, the second node can send a first message indicating that the first page is in the shared memory to the first node, so that the first node can determine that the first storage location mark needs to be changed to point to the shared memory. Among them, the second node can also directly indicate the address of the first page in the shared memory to the first node, which is not limited here. If the first node determines that the local memory includes the first page, the first page can be directly read and written from the local memory, or if the second node determines that the meta information corresponding to the first page points to the third node, the third node can be instructed to send the first page to the first node when the first page needs to be modified.

[0073] For example, a page reading process diagram executed by the first node in the embodiment of the present application can be referred to Figure 4As shown, step 401. Get the access instruction of the first page; step 402. Check whether the local memory exists, if so, execute step 403, if not, execute step 408; step 403. Locally add a page lock, which can be a read lock or a write lock; step 404. Determine whether the first storage location flag points to the shared memory, if so, execute step 405, if not, execute step 406; step 405. Execute the remote memory read process for the first page of the shared memory; step 406. Determine whether the first node is the owner of the first page, if so, execute step 407, if not, execute step 408; step 407. Directly read the first page locally; step 408. Determine the page owner from the cache page directory corresponding to the first page through the RPC process, and then read the first page from the page owner.

[0074] In another example, a page write process diagram executed by the first node in the embodiment of the present application can be referred to Figure 5 As shown, step 501. Get the access instruction of the first page; step 502. Check whether the local memory exists, if so, execute step 503, if not, execute step 508; step 503. Add a local page lock, which is a write lock; step 504. Determine whether the first storage location flag points to the shared memory, if so, execute step 505, if not, execute step 506; step 505. Execute the remote memory write process for the first page of the shared memory; step 506. Determine whether the first node is the owner of the first page, if so, execute step 507, if not, execute step 508; step 507. Read the first page directly locally; step 508. Determine the page owner from the cache page directory corresponding to the first page through the RPC process, and then read the first page from the page owner, and set the first node as the owner of the first page, and revoke the read authorization for other nodes, that is, release the read lock of other nodes.

[0075] In a possible design, the number of ownership changes of each page per unit time is maintained by the PD corresponding to the page, that is, the number of page owner changes of the page is maintained. If the number of page owner changes of the page per unit time exceeds a preset value, that is, the owner of the page changes frequently per unit time, it means that the page will be transferred between multiple nodes under the RPC process, which wastes resources and needs to be transferred to the shared memory. Assuming that the PD corresponding to the second page is in the second node, the second node will count the number of ownership changes of the second page per unit time. If the number of ownership changes exceeds the preset value, it can be determined that the second page needs to be transferred to the shared memory. If the current second page is in the local memory of the first node, the second node can send a second message to the first node to indicate the change of the storage location of the second node. After receiving the second message, the first node can write the second page of the local memory to the shared memory, clear the second page in the local memory, and then adjust the second storage location flag corresponding to the second page to point to the shared memory.

[0076] In one possible design, before sending the second message to the first node, the second node determines that the second page needs to be transferred to the shared memory. To facilitate other nodes to access the second page, the second node also needs to record that the second page is stored in the shared memory, such as marking the storage location of the second page as shared memory.

[0077] For example, a schematic diagram of switching from a node private page owner mode to a shared page owner mode in an embodiment of the present application is shown in FIG6 . Figure 6 The left side is the private page owner mode. Figure 6 The right side shows the shared page owner mode after switching. Among them, the PD corresponding to the second page will maintain the number of page owner changes of the second page per unit time. If the changes are frequent per unit time, the page owner node (first node) transfers the second page from the local memory to the page of the shared memory and changes the owner mode. Specifically, the PD locks itself through the RPC process and marks the storage location of the second page (page_directory->flag) as shared memory. The first node can write the second page to the shared memory through the remote memory write process, and invalidate the buffer of the second page in the local memory, and then adjust the pointer in bufDesc (the second storage location mark) to point to the shared memory, such as providing the remote memory direct access address (rdma_addr), and finally unlock the PD.

[0078] In one possible design, when a computing node modifies a page in a shared memory, the owner of the page is correspondingly changed to the node that performs the modification. Taking the third page in the shared memory as an example, when the first node accesses the third page in the shared memory, it can be determined whether the owner of the third page has changed within a unit time. When no other node modifies the third page within a unit time, that is, the owner of the third page has not changed within a unit time, it can be determined that the third page has become a page with relatively small multi-node access conflicts. The first node can instruct the second node to change the storage location of the third page through a third message, that is, the shared memory is changed to the node memory, and the first node stores the third page in the shared memory in the local memory, clears the third page in the shared memory, and then changes the point storage location flag corresponding to the third page to point to the node memory.

[0079] For example, the schematic diagram of switching from the node shared page owner mode to the private page owner mode in the embodiment of the present application is shown in FIG7 . Figure 7 The left side is the shared page owner mode. Figure 7 The right side shows the owner mode of the private page after switching. Among them, the owner_node_id of the shared page counted in the BufDesc of the first node (the node identifier of the last node to modify the second page), if the owner_node_id and the first node node_id remain unchanged within a unit of time, then the second page is determined to be a low-conflict page and can be migrated to the local memory, and the page owner mode is changed at the same time. Specifically, the PD is locked through the RPC process, and the storage location of the second page (page_directory->flag) is marked as node memory. The first node can write the second page to the local memory through the remote memory read process, invalidate the buffer of the second page in the shared memory through the RPC process, and then the first node adjusts the pointer in bufDesc (the second storage location mark) to point to the node memory, and finally unlocks the PD.

[0080] In an example, the schematic diagrams of the two modes under multiple nodes are as follows: Figure 8 As shown, assuming that page 1 is a high-conflict page and page 2 is a low-conflict page, nodes 1 and 3 that need to access page 1 can directly access page 1 in the shared memory. Node 2 that needs to access page 2 can directly read and write in the local memory or complete the read and write process to the owner of page 2 through the RPC process.

[0081] In one example, a schematic diagram of a private switching sharing structure can be referred to as Fig. 9As shown, the user can access the page through an application (Application, APP), and the application can be accessed through computing node 1 or computing node 2, wherein computing node 1 includes a local memory pool 1. When there is a high-conflict page 1 in the local memory pool 1, the page 1 can be migrated to the shared memory. The shared memory may include multiple memory nodes, and page 1 can be migrated to any memory node. At this time, under the cache identifier corresponding to the page 1, the pointer described by the cache page points to the storage location of the page 1 in the shared memory. Computing node 2 includes a local memory pool 2. When there is a high-conflict page 2 in the local memory pool 2, the page 2 can also be migrated to a memory node of the shared memory. When APP accesses page 1 through computing node 2, it can perform RDMA read and write operations on page 1 according to the storage location in the shared memory pointed to by the pointer described by the cache page under the cache identifier corresponding to the page 1. In the embodiment of the present application, the shared memory is a storage area outside the storage node cluster.

[0082] In the embodiment of the present application, after the first node determines the access to the first page, it can first determine the first storage location flag of the first page. When the first page belongs to a page whose ownership change times exceed a preset value within a unit time, the first storage location flag points to the shared memory. The first node can perform read and write operations on the first page in the shared memory. High-conflict pages accessed by multiple nodes do not need to be transmitted between multiple nodes, which can save transmission resources.

[0083] The page access method is described above, and the device for executing the method is described below.

[0084] See also Fig.10 ,like Fig.10 FIG. 1 is a schematic diagram of a structure of a page access device provided in an embodiment of the present application. The device 100 includes:

[0085] Processing unit 1001 is used to obtain an access instruction to the first page, determine a first storage location flag of the first page according to the access instruction, and when the first storage location flag points to a shared memory, perform read and write operations on the first page in the shared memory, and the number of ownership changes of the page in the shared memory per unit time exceeds a preset value.

[0086] The processing unit 1001 is used to execute Figure 3 Step 301 to step 302 in the method embodiment.

[0087] Optionally, the apparatus 100 further includes a transceiver unit 1002, and the transceiver unit 1002 is specifically configured to:

[0088] When the first storage location indicator points to the node memory and the local memory does not include the first page, requesting the first page from the second node, the second node including meta information corresponding to the first page;

[0089] receiving a first message from the second node, the first message being determined by meta information corresponding to the first page, the first message indicating that the first page is in the shared memory;

[0090] The processing unit 1001 is further configured to:

[0091] The first storage location marker is pointed to the shared memory according to the first message.

[0092] Optionally, the apparatus 100 further includes a transceiver unit 1002, and the transceiver unit 1002 is specifically configured to:

[0093] receiving a second message from the second node, the second message indicating that a storage location of a second page is changed, the second page is a page currently in the local memory, and the number of attribution changes of the second page within a unit time exceeds a preset value;

[0094] The processing unit 1001 is further configured to:

[0095] Write the second page from local memory to shared memory;

[0096] Clear the second page in local memory;

[0097] The second storage location mark of the second page is pointed to the shared memory.

[0098] Optionally, the apparatus 100 further includes a transceiver unit 1002, and the transceiver unit 1002 is specifically configured to:

[0099] When no other node modifies the third page within a unit time, a third message is sent to the second node, where the third message indicates changing the storage location of the third page, where the third page is a page in the shared memory;

[0100] The processing unit 1001 is further configured to:

[0101] Store the third page in local memory;

[0102] Clear the third page in shared memory;

[0103] The third storage location mark of the third page points to the node memory.

[0104] Optionally, the processing unit 1001 is further configured to:

[0105] Lock the first page.

[0106] Optionally, the processing unit 1001 is further configured to:

[0107] Make sure local memory exists.

[0108] See also Fig.11 ,like Fig.11 FIG. 1 is a schematic diagram of the structure of another page access device provided in an embodiment of the present application. The device 110 includes:

[0109] The transceiver unit 1101 is used to receive a request for a first page from a first node, and when the meta information corresponding to the first page indicates that the first page is in the shared memory, send a first message to the first node, the first message indicating that the first page is in the shared memory.

[0110] Optionally, the device 110 further includes a processing unit 1102, and the processing unit 1102 is specifically configured to:

[0111] Count the number of ownership changes of the second page within a unit time;

[0112] The transceiver unit 1101 is also used for:

[0113] When the number of ownership changes of the second page exceeds a preset value within a unit time, a second message is sent to the first node, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

[0114] Optionally, the processing unit 1102 is further configured to:

[0115] The storage location of the second page is marked as shared memory.

[0116] Optionally, the transceiver unit 1101 is further configured to:

[0117] receiving a third message from the first node, the third message indicating a change in a storage location of a third page, the third page being a page in the shared memory;

[0118] The device 110 further includes a processing unit 1102, which is specifically configured to:

[0119] The storage location of the third page is marked as node memory.

[0120] See also Fig.12 ,like Fig.12 FIG. 1 is a schematic diagram of the structure of another page access device provided in an embodiment of the present application. The device 120 includes:

[0121] The processing unit 1201 is used to count the number of ownership changes of the second page within a unit time;

[0122] The transceiver unit 1202 is used to send a second message to the first node when the number of ownership changes of the second page exceeds a preset value within a unit time. The second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

[0123] Optionally, the transceiver unit 1202 is further configured to:

[0124] receiving a request for a first page from a first node;

[0125] When the meta information corresponding to the first page indicates that the first page is in the shared memory, a first message is sent to the first node, where the first message indicates that the first page is in the shared memory.

[0126] Fig.13 1 is a possible logical structure diagram of a computer device 130 provided in an embodiment of the present application. The computer device 130 includes: a processor 1301, a communication interface 1302, a storage system 1303 and a bus 1304. The processor 1301, the communication interface 1302 and the storage system 1303 are interconnected via the bus 1304. In the embodiment of the present application, the processor 1301 is used to control and manage the actions of the computer device 130. For example, the processor 1301 is used to execute Figure 3 The steps performed by the first node or the second node in the method embodiment. The communication interface 1302 is used to support the computer device 130 to communicate. The storage system 1303 is used to store the program code and data of the computer device 130.

[0127] Among them, the processor 1301 can be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a transistor logic device, a hardware component or any combination thereof. It can implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the contents disclosed in this application. The processor 1301 can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a digital signal processor and a microprocessor, and so on. The bus 1304 can be a peripheral component interconnect standard (Peripheral Component Interconnect, PCI) bus or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.13 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0128] The transceiver unit 1002 in the apparatus 100 is equivalent to the communication interface 1302 in the computer device 130 , and the processing unit 1001 in the apparatus 100 is equivalent to the processor 1301 in the computer device 130 .

[0129] The transceiver unit 1101 in the apparatus 110 is equivalent to the communication interface 1302 in the computer device 130 , and the processing unit 1102 in the apparatus 110 is equivalent to the processor 1301 in the computer device 130 .

[0130] The transceiver unit 1202 in the apparatus 120 is equivalent to the communication interface 1302 in the computer device 130 , and the processing unit 1201 in the apparatus 120 is equivalent to the processor 1301 in the computer device 130 .

[0131] The computer device 130 of this embodiment may correspond to the above Figure 3 In the method embodiment, the first node or the second node, the communication interface 1302 in the computer device 130 can implement the above Figure 3 In the method embodiment, the functions of the first node or the second node and / or the various steps implemented are not repeated here for the sake of brevity.

[0132] It should be understood that the division of the units in the above device is only a division of logical functions. In actual implementation, they can be fully or partially integrated into one physical entity, or they can be physically separated. And the units in the device can all be implemented in the form of software calling through processing elements; they can also be all implemented in the form of hardware; some units can also be implemented in the form of software calling through processing elements, and some units can be implemented in the form of hardware. For example, each unit can be a separately established processing element, or it can be integrated in a certain chip of the device. In addition, it can also be stored in the memory in the form of a program, and called and executed by a certain processing element of the device. The function of the unit. In addition, all or part of these units can be integrated together, or they can be implemented independently. The processing element described here can also be a processor, which can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each unit above can be implemented by an integrated logic circuit of hardware in the processor element or in the form of software calling through a processing element.

[0133] In one example, the unit in any of the above devices may be one or more integrated circuits configured to implement the above method, such as: one or more application specific integrated circuits (ASIC), or one or more digital singnal processors (DSP), or one or more field programmable gate arrays (FPGA), or a combination of at least two of these integrated circuit forms. For another example, when the unit in the device can be implemented in the form of a processing element scheduler, the processing element can be a general-purpose processor, such as a central processing unit (CPU) or other processor that can call a program. For another example, these units can be integrated together and implemented in the form of a system-on-a-chip (SOC).

[0134] In another embodiment of the present application, a computer-readable storage medium is provided, in which computer-executable instructions are stored. When the processor of the device executes the computer-executable instructions, the device executes the method executed by the first node or the second node in the above method embodiment.

[0135] In another embodiment of the present application, a computer program product is further provided, the computer program product comprising computer executable instructions, the computer executable instructions being stored in a computer readable storage medium. When a processor of a device executes the computer executable instructions, the device executes the method executed by the first node or the second node in the above method embodiment.

[0136] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0137] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0138] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0139] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0140] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, read-only memory), random access memory (RAM, random access memory), disk or optical disk and other media that can store program code.

Claims

1. A page access method, characterized in that: include: The first node obtains an access instruction to the first page; The first node determines a first storage location flag of a first page according to the access instruction; When the first storage location mark points to the shared memory, the first node performs a read and write operation on the first page in the shared memory, and the number of ownership changes of the page in the shared memory exceeds a preset value within a unit time.

2. The method according to claim 1, characterized in that After the first node determines the first storage location flag of the first page according to the access instruction, the method further includes: When the first storage location indicator points to a node memory and the local memory does not include the first page, the first node requests the first page from a second node, and the second node includes meta information corresponding to the first page; The first node receives a first message from the second node, the first message is determined by meta information corresponding to the first page, and the first message indicates that the first page is in the shared memory; The first node points the first storage location marker to the shared memory according to the first message.

3. The method according to any one of claims 1 to 2, characterized in that: The method further comprises: The first node receives a second message from the second node, the second message indicating a change in a storage location of a second page, the second page being a page currently in the local memory, and the number of attribution changes of the second page within the unit time exceeds the preset value; The first node writes the second page from the local memory to the shared memory; The first node clears the second page in the local memory; The first node points the second storage location mark of the second page to the shared memory.

4. The method according to any one of claims 1 to 3, characterized in that: The method further comprises: When no other node modifies the third page within the unit time, the first node sends a third message to the second node, the third message indicating a change in the storage location of the third page, the third page being a page in the shared memory; The first node stores the third page in a local memory; The first node clears the third page in the shared memory; The first node points the third storage location mark of the third page to the node memory.

5. The method according to any one of claims 1 to 4, characterized in that: After the first node obtains the access instruction to the first page, the method further includes: The first node locks the first page.

6. The method according to any one of claims 1 to 5, characterized in that: Before the first node determines the first storage location mark of the first page according to the access instruction, the method further includes: The first node determines that there is a local memory.

7. A page access method, characterized in that: include: The second node receives a request for the first page from the first node; When the meta information corresponding to the first page indicates that the first page is in the shared memory, the second node sends a first message to the first node, where the first message indicates that the first page is in the shared memory.

8. The method according to claim 7, characterized in that The method further comprises: The second node counts the number of ownership changes of the second page within a unit time; When the number of ownership changes of the second page within the unit time exceeds a preset value, the second node sends a second message to the first node, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

9. The method according to claim 8, characterized in that Before the second node sends the second message to the first node, the method further includes: The second node marks the storage location of the second page as the shared memory.

10. The method according to any one of claims 7 to 9, characterized in that: The method further comprises: The second node receives a third message from the first node, the third message indicating a change in a storage location of a third page, the third page being a page in the shared memory; The second node marks the storage location of the third page as node memory.

11. A page access method, characterized in that: include: The second node counts the number of ownership changes of the second page within a unit time; When the number of ownership changes of the second page within the unit time exceeds a preset value, the second node sends a second message to the first node, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

12. The method according to claim 11, characterized in that The method further comprises: The second node receives a request for the first page from the first node; When the meta information corresponding to the first page indicates that the first page is in the shared memory, the second node sends a first message to the first node, where the first message indicates that the first page is in the shared memory.

13. A page access device, characterized in that: include: A processing unit is used to obtain an access instruction to a first page, determine a first storage location flag of the first page according to the access instruction, and when the first storage location flag points to a shared memory, perform read and write operations on the first page in the shared memory, and the number of ownership changes of the page in the shared memory per unit time exceeds a preset value.

14. The device according to claim 13, characterized in that The device further includes a transceiver unit, which is specifically configured to: When the first storage location indicator points to a node memory and the local memory does not include the first page, requesting the first page from a second node, the second node including meta information corresponding to the first page; receiving a first message from the second node, where the first message is determined by meta information corresponding to the first page, and the first message indicates that the first page is in the shared memory; The processing unit is also used for: The first storage location marker is pointed to the shared memory according to the first message.

15. The device according to any one of claims 13-14, characterized in that The device further includes a transceiver unit, which is specifically configured to: receiving a second message from a second node, the second message indicating a change in a storage location of a second page, the second page being a page currently in a local memory, and the number of attribution changes of the second page in the unit time exceeding the preset value; The processing unit is also used for: Writing the second page from the local memory to the shared memory; Clearing the second page in the local memory; The second storage location mark of the second page is pointed to the shared memory.

16. The device according to any one of claims 13 to 15, characterized in that: The device further includes a transceiver unit, which is specifically configured to: When no other node modifies the third page within the unit time, sending a third message to the second node, the third message indicating that the storage location of the third page is changed, and the third page is a page in the shared memory; The processing unit is also used for: Storing the third page in local memory; Clearing the third page in the shared memory; The third storage location mark of the third page is pointed to the node memory.

17. The device according to any one of claims 13 to 16, characterized in that: The processing unit is also used for: The first page is locked.

18. The device according to any one of claims 13 to 17, characterized in that: The processing unit is also used for: Make sure local memory exists.

19. A page access device, characterized in that: include: The transceiver unit is used to receive a request for a first page from a first node, and when the meta information corresponding to the first page indicates that the first page is in the shared memory, send a first message to the first node, wherein the first message indicates that the first page is in the shared memory.

20. The device according to claim 19, characterized in that The device further comprises a processing unit, wherein the processing unit is specifically configured to: Count the number of ownership changes of the second page within a unit time; The transceiver unit is also used for: When the number of ownership changes of the second page within the unit time exceeds a preset value, a second message is sent to the first node, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

21. The device according to claim 20, characterized in that The processing unit is also used for: The storage location of the second page is marked as the shared memory.

22. The device according to any one of claims 19 to 21, characterized in that The transceiver unit is also used for: receiving a third message from the first node, the third message indicating a change in a storage location of a third page, the third page being a page in the shared memory; The device further comprises a processing unit, wherein the processing unit is specifically configured to: The storage location of the third page is marked as a node memory.

23. A page access device, characterized in that: include: A processing unit, used to count the number of ownership changes of the second page within a unit time; A transceiver unit is used to send a second message to the first node when the number of ownership changes of the second page exceeds a preset value within the unit time, the second page is a page currently in the local memory of the first node, and the second message instructs the first node to change the storage location of the second page.

24. The device according to claim 23, characterized in that The transceiver unit is also used for: receiving a request for a first page from the first node; When the meta information corresponding to the first page indicates that the first page is in the shared memory, a first message is sent to the first node, where the first message indicates that the first page is in the shared memory.

25. A computer device, characterized in that: include: processor and memory, The processor is configured to execute instructions stored in the memory, so that the computer device performs the method according to any one of claims 1 to 6.

26. A computer device, characterized in that: include: processor and memory, The processor is configured to execute instructions stored in the memory, so that the computer device performs the method according to any one of claims 7 to 10.

27. A computer device, characterized in that: include: processor and memory, The processor is configured to execute instructions stored in the memory, so that the computer device performs the method according to any one of claims 11 to 12.

28. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed on the computer, the computer is caused to execute the method according to any one of claims 1 to 12.

29. A computer program product, characterized in that When the computer program product is executed on a computer, the computer performs the method according to any one of claims 1 to 12.

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