Data processing method and device for auxiliary debugging of processor
By obtaining and processing processor error report data on the Intel C600 platform, register feature recognition and error positioning, the problem of low parsing efficiency of downtime devices in the existing technology is solved, and the downtime devices are realized efficient analysis.
Patent Information
- Application Number
- CN202411014823.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-26
- Publication Date
- 2024-12-20
AI Technical Summary
In the prior art, the parsing tool performs processor exception error code analysis on downtime devices with low efficiency and accuracy, and cannot effectively resolve unconfigured processor errors.
A data processing method for processor assisted error detection is proposed. By obtaining error report data, it performs identification processing based on register characteristics, obtains register status data, and performs error detection and positioning processing to generate auxiliary error detection reports, which is suitable for Intel C600 platform.
It realizes efficient analysis of downtime devices, improves the efficiency of processor equipment error analysis, and solves the problem of low resolution of downtime devices in the existing technology.
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Figure CN119166396A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computers, and more specifically, to a data processing method and apparatus for processor-assisted error detection. Background Art
[0002] Machine Check Exception (MCE) Computer processors generate abnormal error codes during operation. The analysis tools for computer processing errors are usually some third-party software or developer tools. These tools can be used to parse and analyze the machine check exception error codes issued by the processor.
[0003] Common analysis tools in the prior art include:
[0004] 1. Intel Processor Diagnostic Tool: This is a free tool provided by Intel for diagnosing and testing Intel processors. It can detect and interpret MCE errors, providing explanations and recommendations for error codes.
[0005] 2. mcelog: An open-source Linux tool for detecting and parsing MCE errors in kernel logs. It parses error codes and provides human-readable error descriptions to help users identify and resolve issues.
[0006] 3. EDAC (Error Detection and Correction) tool: An open source tool for Linux systems that can be used to detect and correct memory and processor errors. It can parse and report MCE errors and provide relevant error information and suggestions.
[0007] 4. Third-party hardware monitoring software: Many third-party hardware monitoring software (such as HWiNFO and AIDA64) provide processor error analysis functions. They can read the processor's internal error logs and provide corresponding error code explanations and suggestions.
[0008] However, these analysis tools in the prior art need to be preset in advance and are of little use to devices that have already crashed, resulting in low efficiency and accuracy in parsing processor exception error codes.
[0009] This application is based on the design of auxiliary error detection on the Intel C600 platform to solve the problem of low efficiency and accuracy of the analysis tools in the prior art in parsing processor exception error codes of downed devices. Summary of the Invention
[0010] The main objective of this application is to provide a data processing method and apparatus for processor-assisted error detection, in order to solve the problem that the parsing tools in the prior art have low efficiency and accuracy in parsing processor abnormal error codes of crashed devices, and to achieve the technical effect of efficient parsing of crashed devices.
[0011] To achieve the above objectives, the first aspect of this application proposes a data processing method for processor-assisted error detection, applied to a processor-assisted error detection system, suitable for the Intel C600 platform, to parse processor MCE errors, including:
[0012] When the auxiliary error detection request data is obtained, error report data is obtained, wherein the error report data is report data for indicating an error of the error reporting processor;
[0013] Performing register feature-based identification processing on the error report data to obtain register status data, wherein the register status data is data used to represent the content of a processor register;
[0014] Perform error detection and positioning processing on the register status data, and generate an auxiliary error detection report based on the error detection and positioning result data.
[0015] In some optional embodiments of the present application, error detection and location processing is performed on the register state data to obtain error detection and location result data including:
[0016] The register status data is processed based on functional features to obtain first functional feature register status data, second functional feature register status data, and third functional feature register status data.
[0017] determining first error data according to the first functional feature register state data, wherein the first error data is data for indicating processor error hardware;
[0018] determining second error data according to the second functional feature register state data, wherein the second error data is state data for indicating a processor check exception;
[0019] determining third error data according to the third functional feature register state data, wherein the third error data is data for indicating an error state of a processor;
[0020] The error detection and positioning result data is obtained according to the first error data, the second error data and the third error data.
[0021] In some optional embodiments of the present application, performing error detection and positioning processing on the register state data, and generating an auxiliary error detection report based on the error detection and positioning result data includes:
[0022] Performing identification processing on the error detection and positioning result data to obtain error address data and error type data;
[0023] Performing matching processing on the error address data in the error detection and positioning result data based on the state data to obtain abnormality check state data and error state data corresponding to the error address data;
[0024] An auxiliary error detection report is generated according to the error address data and the corresponding error type data, the abnormal state data and the error state data.
[0025] In some optional embodiments of this application, after generating an auxiliary error detection report based on the error detection and localization result data, the method further includes generating solutions for processor errors based on the auxiliary error detection report, including:
[0026] Performing process type identification processing on the error report data to obtain process type data, wherein the process type is a process type used to indicate a corresponding process type of a processor error;
[0027] Match the solution measures corresponding to the process type data in the preset system error database to obtain measure suggestion data.
[0028] In some optional embodiments of this application, the error detection and location processing of the register state data includes:
[0029] performing an extraction process based on an error keyword on the register state data to obtain error keyword data;
[0030] Match the error location data corresponding to the error keyword data in the preset system error database to obtain error location result data, wherein the error location result data includes error address data and error type data.
[0031] According to a second aspect of this application, a data processing device for processor-assisted error detection is proposed, applied to a processor-assisted error detection system, suitable for the Intel C600 platform, to parse processor MCE errors, including:
[0032] a data acquisition module, configured to acquire error report data when the auxiliary error detection request data is acquired, wherein the error report data is report data for indicating an error of the error reporting processor;
[0033] The identification module is used to perform register feature-based identification processing on the error report data to obtain register status data, wherein the register status data is data used to represent the contents of the processor registers;
[0034] The error detection module is used to perform error detection and positioning processing on the register status data and generate an auxiliary error detection report according to the error detection and positioning result.
[0035] In some optional embodiments of the present application, the error detection module includes:
[0036] a functional feature identification module, configured to perform functional feature-based identification processing on the register state data to obtain first functional feature register state data, second functional feature register state data, and third functional feature register state data;
[0037] a first error detection module, configured to determine first error data according to the first functional feature register state data, wherein the first error data is data indicating processor error hardware;
[0038] a second error detection module, configured to determine second error data according to the second functional feature register state data, wherein the second error data is state data indicating a processor check exception;
[0039] a third error detection module, configured to determine third error data according to the third functional feature register state data, wherein the third error data is data for indicating an error state of the processor;
[0040] The error detection and location result data is obtained based on the first error data, the second error data, and the third error data.
[0041] According to a third aspect of the present application, a processor-assisted error detection system is proposed, characterized in that the processor-assisted error detection system is applicable to the Intel C600 platform to implement the analysis of processor MCE errors. The processor-assisted error detection system includes: a communication module and an error detection module, wherein:
[0042] The communication module is connected to the error processor device to obtain error report data from the error processor.
[0043] The error detection module executes the aforementioned data processing method for processor-assisted error detection to detect errors in the processor that reported an error.
[0044] According to a fourth aspect of the present application, a computer-readable storage medium is proposed, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the above-mentioned data processing method for processor-assisted error detection.
[0045] According to the fifth aspect of the present application, an electronic device is proposed, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor executes the above-mentioned data processing method for processor-assisted error detection.
[0046] The technical solutions provided by the embodiments of the present application may have the following beneficial effects:
[0047] In this application, a data processing method for processor auxiliary error detection is proposed for use on the Intel C600 platform to implement parsing of processor MCE errors, comprising: when auxiliary error detection request data is obtained, error report data is obtained, wherein the error report data is report data for indicating an error of the processor; register feature-based recognition processing is performed on the error report data to obtain register status data, wherein the register status data is data for indicating the contents of the processor register; error detection and positioning processing is performed on the register status data, and an auxiliary error detection report is generated based on the error detection and positioning results. By obtaining processor register data, error detection and positioning are performed on the register data to obtain processor error detection and positioning result data. This solves the problem of low efficiency of the existing analysis tools in parsing processor exception error codes for downed devices, and achieves the technical effect of efficient parsing of downed devices. Attached Figure Description
[0048] The drawings that constitute part of this application are used to provide a further understanding of this application and make other features, objects and advantages of this application more apparent. The illustrative embodiment drawings of this application and their descriptions are used to explain this application and do not constitute an improper limitation of this application. In the drawings:
[0049] Figure 1 This is a flowchart of a data processing method for processor-assisted error detection proposed in this application;
[0050] Figure 2 This is a flow chart of a data processing method for processor-assisted error detection proposed in this application;
[0051] Figure 3 A schematic diagram of a data processing device for processor-assisted error detection proposed in this application;
[0052] Figure 4 This is a schematic diagram of another data processing device for processor-assisted error detection proposed in this application. DETAILED DESCRIPTION
[0053] In order to enable those skilled in the art to better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.
[0054] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0055] In this application, terms such as "upper," "lower," "left," "right," "front," "back," "top," "bottom," "inner," "outer," "center," "vertical," "horizontal," "transverse," and "longitudinal" indicate positions or locations based on the positions or locations shown in the accompanying drawings. These terms are primarily intended to better describe this application and its embodiments and are not intended to limit the devices, elements, or components indicated to having a specific orientation, or to being constructed or operated in a specific orientation.
[0056] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.
[0057] Furthermore, the terms "installed," "disposed," "provided with," "connected," "connected," and "socketed" should be interpreted broadly. For example, "connected" can mean a fixed connection, a removable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be a direct connection, an indirect connection through an intermediary, or an internal communication between two devices, elements, or components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.
[0058] Existing analysis tools for Intel C600 CPU MCE (Machine Check Exception) errors are typically third-party software or developer tools. Common analysis tools such as Intel Processor Diagnostic Tool, mcelog, Error Detection and Correction, and third-party hardware monitoring software (such as HWiNFO and AIDA64) must be pre-configured with the processor device to analyze the processor error. This makes analysis difficult for processors that have not been configured with these analysis tools, and is of limited use for devices that have already crashed.
[0059] In response to the situation in the existing technology that parsing tools need to be pre-configured to perform effective parsing, this application proposes a data processing method for processor-assisted error detection, which is applied to the Intel C600 platform to achieve parsing of processor errors, regardless of whether they are pre-configured, thereby improving the efficiency of processor device error parsing.
[0060] In some optional embodiments of this application, a data processing method for processor-assisted error detection is proposed. Figure 1 This is a flowchart of a data processing method for processor-assisted error detection proposed in this application, such as... Figure 1 As shown, the method includes the following steps:
[0061] S101: When auxiliary error detection request data is obtained, obtain error report data;
[0062] Error report data is report data used to indicate errors in the error-reporting processor;
[0063] S102: Perform register feature-based identification processing on the error report data to obtain register status data;
[0064] Register status data is data used to represent the contents of processor registers;
[0065] S103: Perform error detection and location processing on the register status data, and generate an auxiliary error detection report based on the error detection and location results.
[0066] In some optional embodiments of this application, a data processing method for processor-assisted error detection is proposed to obtain error location result data by performing error detection processing based on register state information. Figure 2 This is a flowchart of a data processing method for processor-assisted error detection proposed in this application, such as... Figure 2 As shown, the method includes the following steps:
[0067] S201: performing functional feature-based identification processing on register state data to obtain first functional feature register state data, second functional feature register state data, and third functional feature register state data;
[0068] In an optional embodiment of the present application, the registers include global control and status registers and multiple error reporting register groups. Based on the information provided by different registers, the functions and data corresponding to different registers are identified, and processor error detection and positioning are performed based on the different registers and their corresponding data.
[0069] S202: Determine the first error data based on the status data of the first functional feature register;
[0070] The first error data is data for indicating the error hardware of the processor; the first function characteristic register provides information about the machine check architecture of the processor.
[0071] S203: Determine the second error data based on the status data of the second functional feature register;
[0072] The second error data is status data used to indicate a processor check exception. The second function feature register provides the current state of the processor after a machine check exception occurs. For example, the RIPV (restart IP valid) flag in the register, bit 0—indicates that when a machine check exception occurs, program execution can be reliably restarted at the instruction pointed to by the instruction pointer pushed on the stack. After clearing this flag, the program cannot be reliably restarted at the pushed instruction pointer. The EIPV (error IP valid) flag, bit 1—indicates that the instruction pointed to by the instruction pointer pushed on the stack when a machine check exception is generated is directly related to the error. After clearing this flag, the pointed-to instruction may not be related to the error. The MCIP (machine check in progress) flag, bit 2—indicates that a machine check exception has been generated. Software can set or clear this flag. When MCIP is set, the occurrence of a second machine check event will cause the processor to enter a shutdown state. LMCE_S (local machine check exception signaled), bit 3—indicates that a local machine check exception has been generated, which means that the current machine check event is only passed to this logical processor.
[0073] S204: Determine third error data according to the third functional feature register state data;
[0074] The third error data is data used to indicate the processor error status. The third feature register is an error status register. For example, if the VAL (valid) flag is set, the status data of each error status register contains information related to a machine check error. Software is responsible for clearing the error status register by explicitly writing a 0; writing a 1 causes a general protection exception.
[0075] S205: Obtain error detection and location result data based on the first error data, the second error data, and the third error data.
[0076] In some optional embodiments of the present application, a data processing method for processor-assisted debugging is proposed to generate an assisted debugging report based on debugging location result data. The method includes:
[0077] The error detection and positioning result data is identified and processed to obtain error address data and error type data; the error address data in the error detection and positioning result data is matched based on the status data to obtain abnormal check status data and error status data corresponding to the error address data; and an auxiliary error detection report is generated based on the error address data and the corresponding error type data, abnormal check status data, and error status data.
[0078] In some optional embodiments of the present application, a data processing method for processor-assisted error detection is provided. After generating an assisted error detection report based on error detection location data, the method further includes generating a solution for the processor error based on the assisted error detection report, including:
[0079] The error report data is processed based on process type identification to obtain process type data, wherein the process type is a process type used to represent the corresponding processor error; the solution measures corresponding to the process type data are matched in a preset system error database to obtain measure suggestion data.
[0080] In an optional embodiment of the present application, if the server error is a memory error, by identifying process-related data, including process types, process types include user space processes, operating system kernel processes and virtual machine processes, respectively, the solution to the server error is determined for the above process types and error report data, and the suggested solution is output.
[0081] In some optional embodiments of this application, a data processing method for processor-assisted error detection is proposed to perform error location processing on register state data. The method includes:
[0082] The register status data is processed based on error keywords to obtain error keyword data; the error location data corresponding to the error keyword data is matched in a preset system error database to obtain error location result data, wherein the error location result data includes error address data and error type data.
[0083] For example, error information is received, feature fields of the error information are extracted, and error keywords are extracted and processed to obtain error keyword data; the error detection data corresponding to the error keywords are stored in the preset system error database, and the corresponding processor error data is matched according to the error keywords to realize the positioning processing of the server error, wherein the processor error data includes the error address and error type.
[0084] In some optional embodiments of this application, a processor-assisted error detection system is proposed, applicable to the Intel C600 platform, to parse processor MCE errors. The processor-assisted error detection system includes: a communication module and an error detection module, wherein...
[0085] The communication module communicates with the error processor device to obtain error report data from the error processor; the error detection module executes data processing methods for processor-assisted error detection to achieve error detection of the error processor.
[0086] In some optional embodiments of the present application, a data processing device for processor-assisted error detection is proposed. Figure 3 This application provides a schematic diagram of a data processing device for processor-assisted error detection, as shown in the figure. Figure 3 As shown, including:
[0087] The data acquisition module 31 is used to acquire error report data when the auxiliary error detection request data is acquired, wherein the error report data is report data for indicating an error of the error reporting processor;
[0088] The identification module 32 is used to perform register feature-based identification processing on the error report data to obtain register status data, wherein the register status data is data used to represent the contents of the processor registers;
[0089] The error detection module 33 is used to perform error detection and positioning processing on the register status data, and generate an auxiliary error detection report according to the error detection and positioning result.
[0090] In some alternative embodiments of this application, a data processing apparatus for processor-assisted error detection is proposed. Figure 4 This application proposes a schematic diagram of a data processing device for processor-assisted error detection, such as Figure 4 As shown, including:
[0091] A function feature identification module 41 is configured to perform function feature-based identification processing on the register state data to obtain first function feature register state data, second function feature register state data, and third function feature register state data;
[0092] a first error detection module 42, configured to determine first error data according to the first functional feature register state data, wherein the first error data is data indicating processor error hardware;
[0093] A second error detection module 43 is configured to determine second error data according to the second functional feature register state data, wherein the second error data is state data indicating a processor check exception;
[0094] a third error detection module 44, configured to determine third error data according to the third functional feature register state data, wherein the third error data is data indicating an error state of the processor;
[0095] The error detection and positioning result module 45 is configured to obtain the error detection and positioning result data according to the first error data, the second error data, and the third error data.
[0096] The specific manner of executing the operations of each unit in the above embodiment has been described in detail in the embodiment of the method, and will not be elaborated on here.
[0097] In summary, in this application, the data processing method for processor assisted error detection is applied to the Intel C600 platform to implement the analysis of processor MCE errors. When the assisted error detection request data is obtained, the error report data is obtained, wherein the error report data is report data for indicating an error of the error reporting processor; the error report data is processed based on register features to obtain register status data, wherein the register status data is data for indicating the content of the processor register; the register status data is processed for error detection and positioning, and an assisted error detection report is generated according to the error detection and positioning result. By obtaining the processor register data, the register data is error detected and positioned to obtain the processor error detection and positioning result data. This solves the problem of low efficiency of the analysis tool in the prior art in parsing the processor exception error code of the downed device, and achieves the technical effect of efficient analysis of the downed device.
[0098] It should be noted that the steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and that, although a logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0099] Obviously, those skilled in the art should understand that the above-mentioned units or steps of the present application can be implemented using a general-purpose computing device. They can be concentrated on a single computing device or distributed across a network composed of multiple computing devices. Alternatively, they can be implemented using program codes executable by the computing device, so that they can be stored in a storage device and executed by the computing device, or they can be made into individual integrated circuit modules, or multiple modules or steps can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.
[0100] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.
Claims
1. A data processing method for processor-assisted error detection, characterized in that: Applied to the processor auxiliary error detection system, suitable for the Intel C600 platform to analyze the processor MCE error, including: When the auxiliary error detection request data is obtained, error report data is obtained, wherein the error report data is report data for indicating an error of the error reporting processor; Performing register feature-based identification processing on the error report data to obtain register status data, wherein the register status data is data used to represent the content of a processor register; Perform error detection and positioning processing on the register status data, and generate an auxiliary error detection report according to the error detection and positioning result data.
2. The data processing method according to claim 1, characterized in that: The register state data is subjected to error detection and positioning processing to obtain error detection and positioning result data including: Performing identification processing based on functional characteristics on the register state data to obtain first functional characteristic register state data, second functional characteristic register state data and third functional characteristic register state data; Determining first error data according to the first functional feature register state data, wherein the first error data is data for indicating processor error hardware; Determining second error data according to the second functional feature register state data, wherein the second error data is state data for indicating a processor check exception; Determining third error data according to the third functional characteristic register state data, wherein the third error data is data used to indicate an error state of a processor; The error detection and positioning result data is obtained according to the first error data, the second error data and the third error data.
3. The data processing method according to claim 1, characterized in that: Performing error detection and positioning processing on the register status data and generating an auxiliary error detection report according to the error detection and positioning result data includes: Performing identification processing on the error detection and positioning result data to obtain error address data and error type data; Performing matching processing based on the state data on the error address data in the error detection and positioning result data to obtain abnormal inspection state data and error state data corresponding to the error address data; An auxiliary error detection report is generated according to the error address data and the corresponding error type data, the abnormal state data and the error state data.
4. The data processing method according to claim 1, characterized in that: After generating an auxiliary debugging report according to the debugging location result data, the method further includes generating a solution for the processor error according to the auxiliary debugging report, including: Performing identification processing based on the process type on the error report data to obtain process type data, wherein the process type is used to indicate the process type corresponding to the processor error; The solution measures corresponding to the process type data are matched in a preset system error reporting database to obtain the solution suggestion data.
5. The data processing method according to claim 1, characterized in that: The error detection and positioning processing of the register status data includes: Performing extraction processing based on error keyword on the register state data to obtain error keyword data; The error detection and locating data corresponding to the error keyword data are matched in a preset system error reporting database to obtain error detection and locating result data, wherein the error detection and locating result data includes error address data and error type data.
6. A data processing device for processor-assisted error detection, characterized in that: Applied to the processor auxiliary error detection system, suitable for the Intel C600 platform to analyze the processor MCE error, including: A data acquisition module, used for acquiring error report data when the auxiliary error detection request data is acquired, wherein the error report data is report data for indicating an error of the error reporting processor; an identification module, configured to perform identification processing on the error report data based on register features to obtain register status data, wherein the register status data is data used to represent the content of a processor register; The error detection module is used to perform error detection and positioning processing on the register status data, and generate an auxiliary error detection report according to the error detection and positioning result.
7. The data processing device according to claim 6, characterized in that: The error detection module comprises: A functional feature identification module, used for performing functional feature-based identification processing on the register state data to obtain first functional feature register state data, second functional feature register state data and third functional feature register state data; A first error detection module, configured to determine first error data according to the first functional feature register state data, wherein the first error data is data for indicating processor error hardware; A second error detection module, configured to determine second error data according to the second functional feature register state data, wherein the second error data is state data for indicating a processor check exception; a third error detection module, used to determine third error data according to the third functional characteristic register state data, wherein the third error data is data used to indicate an error state of a processor; The error detection and positioning result data is obtained according to the first error data, the second error data and the third error data.
8. A processor-assisted debugging system, characterized in that: The processor-assisted error detection system is applicable to the Intel C600 platform to implement the analysis of processor MCE errors. The processor-assisted error detection system includes: a communication module and an error detection module, wherein: The communication module is in communication connection with the error reporting processor device to obtain error reporting data of the error reporting processor; The error detection module executes the data processing method for processor-assisted error detection according to any one of claims 1 to 5 to implement error detection of the error-reporting processor.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable the computer to execute the data processing method for processor-assisted error detection according to any one of claims 1 to 5.
10. An electronic device, characterized in that: include: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor executes the data processing method for processor-assisted error detection as described in any one of claims 1-5.
