Memory access anomaly analysis method and device, equipment and medium

Abstract

The invention discloses a memory access anomaly analysis method and device, equipment and a medium, and belongs to the technical field of computers, the method comprises the following steps: distributing a data migration memory for a data storage structure, and performing field and data hash value filling on a first memory access data protection tracking structure and a second memory access data protection tracking structure; according to the data migration memory allocated to the data storage structure, a read-write request of the allocated memory is judged; comparing the field hash values of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the updated and calculated corresponding field hash values according to a read-write request judgment result; and analyzing and positioning the memory access exception problem according to the comparison result. According to the method and the device, the memory access exception condition can be tracked and analyzed in a software mode, processor resources and JTAG equipment are not occupied, and meanwhile, the memory access exception problem can be positioned.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, equipment and medium for analyzing memory access anomalies. Background Art

[0002] At present, as a data storage device, the storage system needs to carry out a large amount of data transmission with the interconnected external devices and the hard disk under the storage system. In the traditional CPU intermediary mode, the reading and writing of peripheral data must be transferred through the CPU, which not only occupies CPU resources, but also limits the data transmission speed. With the leap in computer system processing power and the rise of data-intensive applications, this mode has gradually become a bottleneck of system performance.

[0003] With the emergence of Direct Memory Access (DMA) technology, a dedicated memory access controller (DMAC) is used to manage the data transfer process. Data transfer includes initiating requests, controlling transmission, and interrupting and notifying the CPU after the transmission is completed. This allows peripheral devices (such as hard disk drives, network interface cards, etc.) to exchange data directly with the system main memory without the need for continuous CPU intervention, thereby freeing up the CPU to focus on other computing tasks. This technology is widely used in storage system transmission scenarios, greatly reducing the burden on the CPU and improving the overall system performance.

[0004] However, since this technical solution does not require CPU processing during the data transfer process, it will bring a new problem. If there is an error in the direct memory access processing logic, such as DMA memory access out of bounds, it will destroy the memory state of the entire system. At the same time, since the CPU is not involved in the data transfer process, it cannot be recorded and observed through the CPU's MEM LOAD event, which will bring difficulties to problem troubleshooting. Summary of the invention

[0005] In order to overcome the above technical defects, the purpose of the present application is to provide a method, device, equipment and medium for analyzing memory access anomalies, the method comprising: obtaining an identifier of a memory access controller; creating a memory access data protection tracking structure according to the identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure and a second memory access data protection tracking structure; allocating data migration memory to the data storage structure, and filling the fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure; judging the read and write requests of the allocated memory according to the data migration memory allocated to the data storage structure; comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by the update according to the read and write request judgment results; analyzing and locating the memory access anomaly problem according to the comparison results. The present application can realize the tracking and analysis of memory access anomalies by software, without occupying processor resources and JTAG devices, and can locate the memory access anomaly problem at the same time.

[0006] The specific technical solutions provided by the embodiments of this application are as follows:

[0007] In a first aspect, the present application provides a method for analyzing memory access anomalies, the method comprising:

[0008] Get the identifier of the memory access controller;

[0009] Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0010] Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0011] judging a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure;

[0012] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0013] Analyze and locate abnormal memory access issues based on the comparison results.

[0014] In one embodiment, before obtaining the identifier of the memory access controller, the method includes:

[0015] Initializing the memory access controller;

[0016] The initializing the memory access controller includes:

[0017] The working mode, data transmission mode and addressing mode of the memory access controller are set.

[0018] In one embodiment, the filling of fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes:

[0019] Filling fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0020] Filling the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values;

[0021] The filling of fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes:

[0022] Filling the fields into the first memory access data protection tracking structure and the second memory access data protection tracking structure, wherein the fields include an identifier of a memory access controller, a memory access start address, and a memory access length;

[0023] The filling of the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values ​​includes:

[0024] When the first memory access data protection tracking structure is filled with data hash values, the identifier of the memory access controller, the memory access start address, and the hash value of the memory access length are filled into the first memory access data protection tracking structure;

[0025] When the data hash value is filled in the second memory access data protection tracking structure, the data hash value is filled in the second memory access data protection tracking structure according to the data transmission direction.

[0026] In one embodiment, filling the second memory access data protection tracking structure with a data hash value according to the data transmission direction includes:

[0027] When reading data from the memory access controller, the identifier of the memory access controller, the memory access start address and the hash value of the memory access length are obtained to obtain the data value to be stored;

[0028] Recalculating hash values ​​for the identifier hash value of the memory access controller, the memory access start address hash value, the memory access length hash value, and the data value to be stored;

[0029] Filling the recalculated memory access controller identifier, memory access start address, memory access length, and hash value of the data value to be stored into the second memory access data protection tracking structure;

[0030] When writing data to the memory access controller, the first threshold is filled into the hash value field of the second memory access data protection tracking structure.

[0031] In one of the embodiments, comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result, and analyzing and locating the memory access exception problem according to the comparison result, includes:

[0032] When reading data from the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0033] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the bus cycle is returned through the memory access controller;

[0034] When writing data to the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0035] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the corresponding field hash values ​​calculated by update are filled into the hash value field of the second memory access data protection tracking structure, and the bus cycle is returned through the memory access controller;

[0036] In response to the fact that the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding field hash values ​​calculated by update, a memory access exception occurs. The bus cycle is returned through the memory access controller, and the memory access exception problem is located based on the inconsistency in the field hash value comparison.

[0037] In one embodiment, locating the memory access exception problem according to the inconsistency of the field hash value comparison includes:

[0038] When the field hash value of the first memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, the memory access exception problem is located as a memory out-of-bounds error when writing data to the memory access controller;

[0039] When the field hash value of the first memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding additional field hash values ​​calculated by the update, and the memory access exception problem is located according to the comparison result of the additional field hash values;

[0040] The locating of the memory access exception problem according to the comparison result of the hash value of the additional field includes:

[0041] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are consistent with the corresponding additional field hash values ​​calculated by update, the memory access exception problem is located as the memory access content being modified during data migration;

[0042] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding additional field hash values ​​calculated by the update, the memory access exception problem is located as modifying the field hash value of the second memory access data protection tracking structure through additional memory access data.

[0043] In one embodiment, the identifier of the memory access controller includes a memory access controller ID, a vendor ID, a bus number, a device number, and a function number; the identifier of the memory access controller is arranged in a first order;

[0044] The memory access start address is a pointer to the start position of the memory data structure and is used for locating and tracking memory access exceptions;

[0045] The memory access length is used to record the size of the data migration memory allocated to the data storage structure.

[0046] In a second aspect, the present application further provides a memory access anomaly analysis device, the device comprising:

[0047] An acquisition module, used for acquiring an identifier of a memory access controller;

[0048] A creation module, used to create a memory access data protection tracking structure according to an identifier of the memory access controller, wherein the memory access data protection tracking structure includes a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0049] an allocation module, configured to allocate data migration memory to the data storage structure, and fill fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0050] A judgment module, used for judging the read and write requests of the allocated memory according to the data migration memory allocated to the data storage structure;

[0051] A comparison module, used for comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read and write request judgment result;

[0052] The analysis module is used to analyze and locate abnormal memory access problems based on the comparison results.

[0053] In a third aspect, a memory access exception analysis device is also provided, comprising:

[0054] one or more processors;

[0055] A storage device for storing one or more programs;

[0056] When the one or more programs are executed by the one or more processors, the one or more processors implement the memory access exception analysis method as described in any one of the first aspects.

[0057] In a fourth aspect, the present application further provides a computer device, the device comprising:

[0058] A memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the memory access anomaly analysis method as described in any one of the first aspects.

[0059] In a fifth aspect, the present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the memory access anomaly analysis method described in any one of the first aspects.

[0060] In a sixth aspect, the present application further provides a computer storage medium, the medium comprising:

[0061] A computer program is stored thereon, and when the computer program is executed by a processor, the steps of the memory access exception analysis method described in any one of the first aspects are implemented.

[0062] Compared with the related art, the method described in the technical solution provided in the embodiment of the present application includes: obtaining the identifier of the memory access controller; creating a memory access data protection tracking structure according to the identifier of the memory access controller, the memory access data protection tracking structure includes a first memory access data protection tracking structure, a data storage structure and a second memory access data protection tracking structure; allocating data migration memory to the data storage structure, and filling the fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure; judging the read and write request of the allocated memory according to the data migration memory allocated to the data storage structure; comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by the update according to the read and write request judgment result; analyzing and locating the memory access abnormality problem according to the comparison result. The present application can realize the tracking and analysis of memory access abnormality by software, does not occupy processor resources and JTAG devices, and can locate the memory access abnormality problem at the same time, has low technical cost, and can find the problem in time after the DMA transfer is completed, and does not need to save a large number of memory access addresses.

[0063] The technical solution provided in the embodiment of the present application distinguishes the storage system according to the DMA external devices involved, and proposes a memory access tracking and positioning method, which can capture the DMA access out-of-bounds situation in the first time when the DMA access out-of-bounds situation occurs, and identify the DMA peripheral that causes the abnormal DMA access memory operation based on the identification of related peripherals.

[0064] The DMA data protection tracking structure of the technical solution provided in the embodiment of the present application includes a DMA peripheral identifier, a DMA starting memory address, and a DMA memory length, which can quickly identify the peripherals and addresses where DMA memory access exceptions occur, and intuitively display the specific circumstances of the DMA memory access exceptions, without the need for a large amount of data screening; at the same time, the header and tail field hash values ​​are added, which can distinguish the categories of memory access tampering out-of-bounds exceptions, and can also distinguish whether the content to be read is tampered with or the content after writing is tampered with, that is, to locate the memory access exception. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0066] Figure 1 A memory distribution diagram of the memory access data protection tracking structure provided in Example 1 of the present application;

[0067] Figure 2 A first flow chart of the memory access exception analysis method provided in Embodiment 1 of the present application;

[0068] Figure 3 A second flow chart of the memory access exception analysis method provided in the second embodiment of the present application;

[0069] Figure 4 A specific flow chart of the memory access exception analysis method provided in Example 2 of the present application;

[0070] Figure 5 A structural diagram of a memory access anomaly analysis device provided in Embodiment 3 of the present application;

[0071] Figure 6 The exemplary system provided for Embodiment 7 of the present application can be used to implement the various embodiments described in the present application. DETAILED DESCRIPTION

[0072] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0073] It should be noted that, unless the context clearly requires otherwise, words such as “include”, “including” and similar words throughout the specification and claims should be interpreted as including rather than exclusive or exhaustive; that is, the meaning is “including but not limited to”.

[0074] Furthermore, in the description of the present application, unless otherwise specified, “plurality” means two or more.

[0075] In modern computing architecture, memory is the central hub for data exchange between the CPU and peripherals. Its access efficiency directly affects the system response speed and data processing capabilities. The introduction of DMA technology optimizes the memory access path, reduces the intermediate links in data transfer, ensures high-speed data transmission, and maintains low-latency operation of the system, which is crucial for building high-performance, real-time processing systems. The existence of DMA technology allows the CPU to focus on accessing memory data; the data transfer process is completed by DMA hardware.

[0076] However, since the CPU cannot perceive the data transfer process and cannot observe and record it through the CPU's memory LOAD events, it brings great difficulties to troubleshooting. For the DMA of network devices, related technologies use packet capture tools to track and record the address and range of DMA transfers. For some special DMA devices, there are dedicated JTAG devices that can capture the address of DMA access to memory. Since the amount of data in the DMA data transfer process is large and continuous, the amount of DMA address data captured by the packet capture tool is large, and it is impossible to timely discover the DMA access memory out-of-bounds situation when a problem occurs. Even if it is known which memory address data is wrong, a large amount of data screening is required to find the address of the problem. As for the use of dedicated JTAG devices to capture DMA access addresses, such devices are generally expensive and can continuously capture and save very little data. However, for storage scenarios, the amount of data in one second is in the order of G, that is, the amount of data is huge.

[0077] Currently, when using network packet capture tools to record data packets during DMA transmission, the addresses cannot be seen intuitively and the packets need to be parsed. Moreover, the amount of data recorded for all transmitted data packets is huge and data screening is required to discover some anomalies. Related technologies use special JTAG tools to capture the memory addresses accessed by DMA, which can only be recorded and cannot capture the access addresses, business modules, and peripherals when problems occur. In addition, the number of records is limited and the equipment is expensive.

[0078] Embodiment 1

[0079] The present application embodiment provides a method for analyzing memory access anomalies, such as Figure 1 , 2As shown, the method includes:

[0080] Get the identifier of the memory access controller;

[0081] Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0082] Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0083] judging a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure;

[0084] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0085] Analyze and locate abnormal memory access issues based on the comparison results.

[0086] Specifically, the present application aims to solve the problem in the related art that it is impossible to accurately capture DMA memory access out-of-bounds and the related peripherals involved. For the storage system, a DMA memory access tracking and positioning method is proposed according to the DMA peripherals involved. When DMA memory access out-of-bounds occurs, the DMA access out-of-bounds situation can be captured at the first time, and the DMA peripheral that causes the abnormal DMA memory access operation can be identified according to the identification of the related peripherals. It is mainly used for the analysis and positioning of DMA memory access abnormalities in storage systems and other scenarios where DMA is required for data transfer.

[0087] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0088] The present application can implement the tracking and analysis of abnormal memory access through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time, with low technical cost, and can promptly discover problems after DMA transfer is completed, without the need to save a large number of memory access addresses.

[0089] The technical solution provided in the embodiment of the present application distinguishes the storage system according to the DMA external devices involved, and proposes a memory access tracking and positioning method, which can capture the DMA access out-of-bounds situation in the first time when the DMA access out-of-bounds situation occurs, and identify the DMA peripheral that causes the abnormal DMA access memory operation based on the identification of related peripherals.

[0090] Embodiment 2

[0091] The present application embodiment provides a method for analyzing memory access anomalies, such as Figure 3 As shown, the method includes:

[0092] Step S01, initializing the memory access controller, includes:

[0093] The working mode, data transmission mode and addressing mode of the memory access controller are set.

[0094] Specifically, in order to achieve enhanced tracking and analysis of direct memory access (DMA) exceptions, this application focuses on integrating additional security identifiers and memory protection information when allocating DMA memory to ensure data integrity and effective monitoring of peripheral memory access activities.

[0095] First, the processor initializes the memory access controller and obtains the identifier of the DMA device, including the product ID, manufacturer ID, bus number, device number and function number. During the initialization process, the DMA operating mode, data transmission method and addressing mode will be set.

[0096] Step S02, obtaining an identifier of a memory access controller;

[0097] A memory access data protection tracking structure is created according to an identifier of the memory access controller, wherein the memory access data protection tracking structure includes a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure.

[0098] Specifically, a streamlined and efficient DMA data protection tracking data structure is created to store important information associated with each block of DMA memory;

[0099] It can be understood that after the actual DMA memory is allocated, the memory access data protection tracking structure includes three parts. The first half is the DMA memory header data protection tracking structure (the first memory access data protection tracking structure), the middle is the data part, which is the allocated DMA memory actually used for data transfer (data storage structure), and the second half is the DMA memory tail data protection tracking structure (the second memory access data protection tracking structure).

[0100] Step S03: Allocate data migration memory to the data storage structure, and fill fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure.

[0101] Step S03 also includes:

[0102] Step S031, filling fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0103] Filling the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values;

[0104] The filling of fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes:

[0105] Filling the fields into the first memory access data protection tracking structure and the second memory access data protection tracking structure, wherein the fields include an identifier of a memory access controller, a memory access start address, and a memory access length;

[0106] The filling of the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values ​​includes:

[0107] When the first memory access data protection tracking structure is filled with data hash values, the identifier of the memory access controller, the memory access start address, and the hash value of the memory access length are filled into the first memory access data protection tracking structure;

[0108] When the data hash value is filled in the second memory access data protection tracking structure, the data hash value is filled in the second memory access data protection tracking structure according to the data transmission direction.

[0109] Specifically, the processor then allocates memory for DMA to move data. After the allocation is completed, the processor fills the DMA device identifier, DMA memory start address and DMA memory length into the DMA data protection tracking data structure at the head and tail, and then fills the hash value calculated from the DMA device identifier, DMA memory start address and DMA memory length data into the DMA data protection tracking structure at the DMA memory head;

[0110] The hash value in the DMA data protection tracking structure at the end of the DMA memory is processed differently depending on the data transmission direction.

[0111] Step S032, when reading data from the memory access controller, obtaining the identifier of the memory access controller, the memory access start address and the hash value of the memory access length, and obtaining the data value to be stored;

[0112] Recalculating hash values ​​for the identifier hash value of the memory access controller, the memory access start address hash value, the memory access length hash value, and the data value to be stored;

[0113] Filling the recalculated memory access controller identifier, memory access start address, memory access length, and hash value of the data value to be stored into the second memory access data protection tracking structure;

[0114] When writing data to the memory access controller, the first threshold is filled into the hash value field of the second memory access data protection tracking structure.

[0115] Specifically, if the data DMA reads data, the calculated field hash value is calculated together with the actual data value to be stored, and the calculated result is filled into the hash value field in the DMA data protection tracking structure at the end of the DMA memory;

[0116] If the data is to be written from DMA, the memory data after allocation is not valid data, and the hash value field of the tail DMA data protection tracking structure is filled with an agreed value (first threshold), such as all F (0XFF), or any other agreed value.

[0117] Step S04, judging the read and write requests of the allocated memory according to the data migration memory allocated to the data storage structure;

[0118] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0119] Analyze and locate abnormal memory access issues based on the comparison results.

[0120] Specifically, after the processor completes DMA memory allocation and related data protection tracking structure field and hash value filling, it notifies the corresponding DMA device that the DMA memory has been allocated and filled and can be used normally.

[0121] Step S04 also includes:

[0122] Step S041, when reading data from the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0123] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the bus cycle is returned through the memory access controller;

[0124] When writing data to the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0125] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the corresponding field hash values ​​calculated by update are filled into the hash value field of the second memory access data protection tracking structure, and the bus cycle is returned through the memory access controller;

[0126] In response to the fact that the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding field hash values ​​calculated by update, a memory access exception occurs. The bus cycle is returned through the memory access controller, and the memory access exception problem is located based on the inconsistency in the field hash value comparison.

[0127] Specifically, after receiving the DMA memory transferred by the processor, the DMA device will first determine the read and write requests of the allocated DMA memory. If it is data that needs to be read in, the DMA device will read the field hash values ​​in the header and tail data content, and compare them with the recalculated field hash values ​​in the header and tail data content. If the hash values ​​are consistent, it means that there are no abnormalities such as memory access crossing the boundary, and the data can be read out from the DMA memory data. After the reading is completed, the DMA device returns the bus cycle and informs the processor that the DMA read request ends normally without abnormalities; if they are inconsistent, it indicates that the DMA memory data is damaged after the processor writes the data and before the DMA reads the data, then the processor is notified and the bus cycle occupied by the DMA is returned.

[0128] If it is determined that the allocated DMA memory is used to write data, the DMA device will also read the field hash values ​​in the header and tail data structures and compare them with the recalculated field hash values ​​in the header and tail data structures. If they are inconsistent, it indicates that a memory access exception has occurred before the data is written, and the processor will be notified and the bus cycle occupied by DMA will be returned; if they are consistent, it indicates that there is no exception and data can be written normally; after DMA writes the data to the data memory part, the recalculated field hash value containing the data area will be filled into the hash field in the tail data protection structure. After the above processing is completed, the processor will also be notified that the DMA data transfer is completed and the bus cycle will be returned.

[0129] Step S042, when the field hash value of the first memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by update, and the field hash value of the second memory access data protection tracking structure is consistent with the corresponding field hash value calculated by update, the memory access exception problem is located as a memory out-of-bounds when writing data to the memory access controller;

[0130] When the field hash value of the first memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding additional field hash values ​​calculated by the update, and the memory access exception problem is located according to the comparison result of the additional field hash values;

[0131] The locating of the memory access exception problem according to the comparison result of the hash value of the additional field includes:

[0132] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are consistent with the corresponding additional field hash values ​​calculated by update, the memory access exception problem is located as the memory access content being modified during data migration;

[0133] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding additional field hash values ​​calculated by the update, the memory access exception problem is located as modifying the field hash value of the second memory access data protection tracking structure through additional memory access data.

[0134] Specifically, after receiving a DMA data memory exception or completing data transmission, the processor will also read the field hash values ​​in the header and tail data protection structures and compare them with the recalculated field hash values. If the field hash value in the header data protection structure is incorrect, it is a memory out-of-bounds exception during the DMA writing process. At the same time, the corresponding DMA device can be obtained according to the tail DMA data protection tracking structure;

[0135] If the hash value of the field in the tail data protection structure is incorrect and the hash value of the field in the head data protection structure is correct, then compare the hash values ​​of other fields in the head and tail data protection structures. If the hash values ​​of other fields in the head and tail data protection structures are consistent with the recalculated hash values ​​of other fields, it indicates that the content has been tampered with after the DMA data is moved; if the hash values ​​of other fields in the head and tail data protection structures are inconsistent with the recalculated hash values ​​of other fields, it may be that other memory accesses have tampered with the field hash value of the tail data structure.

[0136] Step S05, the identifier of the memory access controller includes a memory access controller ID, a manufacturer ID, a bus number, a device number, and a function number; the identifier of the memory access controller is arranged in a first order;

[0137] The memory access start address is a pointer to the start position of the memory data structure and is used for locating and tracking memory access exceptions;

[0138] The memory access length is used to record the size of the data migration memory allocated to the data storage structure.

[0139] Specifically, the memory access data protection tracking structure includes, but is not limited to, the following key contents, which can be expanded: DMA peripheral identifier (device_id), the identifier is composed of an unsigned integer, which is used to clearly indicate the external device to which the allocated memory block is dedicated, the peripheral identifiers are arranged from left to right (first order), and different identifiers are constructed according to the product ID, manufacturer ID and bus number, device number, and function number;

[0140] The DMA memory start address (dma_start_addr) identifies a pointer to the starting position of the memory block, which is convenient for fast positioning and tracking;

[0141] DMA memory length (length) is used to record the size of the DMA memory area to be allocated, in bytes;

[0142] The DMA memory field hash value (hash_code) uses a 32-bit hash code to represent the original state of the memory block as the basis for integrity verification;

[0143] The hash value of the DMA memory block header data protection tracking data structure is calculated by hashing the peripheral identifier, DMA start address, and DMA memory length, and the result after calculation is written to the hash value position;

[0144] The hash value of the data protection tracking data structure at the end of the DMA memory block is calculated by adding the hash value of the data on the basis of the previous hash.

[0145] like Figure 4As shown, the streamlined and efficient DMA data protection tracking data structure of the present application is used to store important information associated with each block of DMA memory. The data structure includes but is not limited to the following key contents: a DMA peripheral identifier, which is composed of an unsigned integer to clearly indicate the peripheral that is exclusive to the allocated memory block; the peripheral identifier is constructed from left to right according to the product ID, manufacturer ID and bus number, device number, and function number to construct different identifiers; the DMA memory start address identifies a pointer to the starting position of the memory block, which is convenient for fast positioning and tracking; the DMA memory length is used to record the size of the DMA memory area to be allocated, in bytes; the DMA memory hash value uses a 32-bit hash code to represent the original state of the memory block as the basis for integrity verification; the field hash value of the DMA memory block header data protection tracking data structure mainly calculates the hash value of the peripheral identifier, DMA start address, and DMA memory length, and writes the calculated result to the hash value position; the field hash value of the DMA memory block tail data protection tracking data structure mainly adds the calculation of the hash value of the data on the basis of the front hash.

[0146] The actual data structure after DMA memory allocation will include three parts. The first half is the DMA memory header data protection tracking structure, the middle is the data part, which is the allocated DMA memory actually used for data transfer, and the second half is the DMA memory tail data protection tracking structure.

[0147] During the DMA data reading and writing process, the processor and DMA controller need to perform corresponding processing based on the judgment and comparison of the field hash value to determine which category the DMA memory access exception belongs to.

[0148] The present application can implement the tracking and analysis of abnormal memory access through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time, with low technical cost, and can promptly discover problems after DMA transfer is completed, without the need to save a large number of memory access addresses.

[0149] In addition, the memory access exception analysis method further includes:

[0150] Check the kernel log or error log of the operating system for DMA-related error information; check the debug output of the device driver to understand the DMA operation;

[0151] Use detection tools to check whether the data in the memory is consistent; confirm whether the memory leak problem is caused by DMA operation;

[0152] Confirm whether the DMA controller is configured correctly, including address alignment and data width;

[0153] Check whether the device has correctly initiated the DMA request and the request has been processed correctly;

[0154] Check whether there are logical errors or programming defects in the DMA-related codes in the driver;

[0155] Confirm whether the interrupt handler correctly handles the DMA completion interrupt;

[0156] Use hardware diagnostic tools to check for possible hardware failures;

[0157] Check the signal quality on the DMA bus with an oscilloscope tool;

[0158] Hardware-level debugging through JTAG or SWD interface. For complex DMA paths, a logic analyzer can be used to trace signals.

[0159] Set breakpoints before and after DMA operations to observe changes in memory status;

[0160] Use performance analysis tools to monitor the execution time of DMA operations and detect abnormal delays;

[0161] Try to reproduce the environment and conditions where the memory access exception occurs, and analyze the memory access exception.

[0162] When a DMA memory access exception occurs, it will cause system instability, data corruption and other problems. In the process of locating the problem, keep detailed records and eliminate each possible factor to determine the final memory access exception problem. If the problem still cannot be solved, you need to consider upgrading the hardware.

[0163] The method for memory access anomaly analysis provided in the embodiment of the present application may be further improved and optimized without departing from the technical solution of the present application, and these improvements and optimizations should also be regarded as within the scope of protection of the present application.

[0164] At the same time, the technical solution of the present application can be applied to fixed networks or mobile networks. According to the read and write request judgment results, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by the update, and the memory access abnormality problem is analyzed and located.

[0165] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0166] The present application can implement the tracking and analysis of abnormal memory access through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time, with low technical cost, and can promptly discover problems after DMA transfer is completed, without the need to save a large number of memory access addresses.

[0167] The technical solution provided in the embodiment of the present application distinguishes the storage system according to the DMA external devices involved, and proposes a memory access tracking and positioning method, which can capture the DMA access out-of-bounds situation in the first time when the DMA access out-of-bounds situation occurs, and identify the DMA peripheral that causes the abnormal DMA access memory operation based on the identification of related peripherals.

[0168] The DMA data protection tracking structure of the technical solution provided in the embodiment of the present application includes a DMA peripheral identifier, a DMA starting memory address, and a DMA memory length, which can quickly identify the peripherals and addresses where DMA memory access exceptions occur, and intuitively display the specific circumstances of the DMA memory access exceptions, without the need for a large amount of data screening; at the same time, the header and tail field hash values ​​are added, which can distinguish the categories of memory access tampering out-of-bounds exceptions, and can also distinguish whether the content to be read is tampered with or the content after writing is tampered with, that is, to locate the memory access exception.

[0169] Embodiment 3

[0170] The present application provides a memory access exception analysis device, such as Figure 5 As shown, the device includes a setting module, an acquisition module, a creation module, an allocation module, a judgment module, a comparison module, and an analysis module.

[0171] In this embodiment, the acquisition module is used to obtain an identifier of the memory access controller;

[0172] A creation module, used to create a memory access data protection tracking structure according to an identifier of the memory access controller, wherein the memory access data protection tracking structure includes a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0173] an allocation module, configured to allocate data migration memory to the data storage structure, and fill fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0174] A judgment module, used for judging the read and write requests of the allocated memory according to the data migration memory allocated to the data storage structure;

[0175] A comparison module, used for comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read and write request judgment result;

[0176] The analysis module is used to analyze and locate abnormal memory access problems based on the comparison results.

[0177] In one of the embodiments, a setting module is used to initialize the memory access controller;

[0178] The initializing the memory access controller includes:

[0179] The working mode, data transmission mode and addressing mode of the memory access controller are set.

[0180] In one of the embodiments, the allocation module is used to fill fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0181] Filling the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values;

[0182] The filling of fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes:

[0183] Filling the fields into the first memory access data protection tracking structure and the second memory access data protection tracking structure, wherein the fields include an identifier of a memory access controller, a memory access start address, and a memory access length;

[0184] The filling of the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values ​​includes:

[0185] When the first memory access data protection tracking structure is filled with data hash values, the identifier of the memory access controller, the memory access start address, and the hash value of the memory access length are filled into the first memory access data protection tracking structure;

[0186] When the data hash value is filled in the second memory access data protection tracking structure, the data hash value is filled in the second memory access data protection tracking structure according to the data transmission direction.

[0187] In one embodiment, the allocation module is used to obtain the identifier of the memory access controller, the memory access start address and the hash value of the memory access length when reading data from the memory access controller, and obtain the data value to be stored;

[0188] Recalculating hash values ​​for the identifier hash value of the memory access controller, the memory access start address hash value, the memory access length hash value, and the data value to be stored;

[0189] Filling the recalculated memory access controller identifier, memory access start address, memory access length, and hash value of the data value to be stored into the second memory access data protection tracking structure;

[0190] When writing data to the memory access controller, the first threshold is filled into the hash value field of the second memory access data protection tracking structure.

[0191] In one embodiment, the analysis module is used to compare the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by the update when reading data from the memory access controller;

[0192] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the bus cycle is returned through the memory access controller;

[0193] When writing data to the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0194] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the corresponding field hash values ​​calculated by update are filled into the hash value field of the second memory access data protection tracking structure, and the bus cycle is returned through the memory access controller;

[0195] In response to the fact that the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding field hash values ​​calculated by update, a memory access exception occurs. The bus cycle is returned through the memory access controller, and the memory access exception problem is located based on the inconsistency in the field hash value comparison.

[0196] In one of the embodiments, the analysis module is used to locate the memory access exception problem as a memory out-of-bounds when writing data to the memory access controller when the field hash value of the first memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update;

[0197] When the field hash value of the first memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding additional field hash values ​​calculated by the update, and the memory access exception problem is located according to the comparison result of the additional field hash values;

[0198] The locating of the memory access exception problem according to the comparison result of the hash value of the additional field includes:

[0199] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are consistent with the corresponding additional field hash values ​​calculated by update, the memory access exception problem is located as the memory access content being modified during data migration;

[0200] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding additional field hash values ​​calculated by the update, the memory access exception problem is located as modifying the field hash value of the second memory access data protection tracking structure through additional memory access data.

[0201] In one embodiment, the identifier of the memory access controller includes a memory access controller ID, a vendor ID, a bus number, a device number, and a function number; the identifier of the memory access controller is arranged in a first order;

[0202] The memory access start address is a pointer to the start position of the memory data structure and is used for locating and tracking memory access exceptions;

[0203] The memory access length is used to record the size of the data migration memory allocated to the data storage structure.

[0204] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0205] The present application can implement the tracking and analysis of abnormal memory access through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time, with low technical cost, and can promptly discover problems after DMA transfer is completed, without the need to save a large number of memory access addresses.

[0206] The DMA data protection tracking structure of the technical solution provided in the embodiment of the present application includes a DMA peripheral identifier, a DMA starting memory address, and a DMA memory length, which can quickly identify the peripherals and addresses where DMA memory access exceptions occur, and intuitively display the specific circumstances of the DMA memory access exceptions, without the need for a large amount of data screening; at the same time, the header and tail field hash values ​​are added, which can distinguish the categories of memory access tampering out-of-bounds exceptions, and can also distinguish whether the content to be read is tampered with or the content after writing is tampered with, that is, to locate the memory access exception.

[0207] Embodiment 4

[0208] The present invention also provides a memory access exception analysis device, comprising:

[0209] one or more processors;

[0210] A storage device for storing one or more programs;

[0211] When the one or more programs are executed by the one or more processors, the one or more processors execute the following memory access exception analysis method:

[0212] Get the identifier of the memory access controller;

[0213] Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0214] Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0215] judging a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure;

[0216] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0217] Analyze and locate abnormal memory access issues based on the comparison results.

[0218] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0219] The present application can implement the tracking and analysis of abnormal memory access through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time, with low technical cost, and can promptly discover problems after DMA transfer is completed, without the need to save a large number of memory access addresses.

[0220] Embodiment 5

[0221] The present application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following memory access exception analysis method can be executed:

[0222] Get the identifier of the memory access controller;

[0223] Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0224] Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0225] judging a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure;

[0226] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0227] Analyze and locate abnormal memory access issues based on the comparison results.

[0228] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0229] The present application can implement the tracking and analysis of abnormal memory access through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time, with low technical cost, and can promptly discover problems after DMA transfer is completed, without the need to save a large number of memory access addresses.

[0230] The technical solution provided in the embodiment of the present application distinguishes the storage system according to the DMA external devices involved, and proposes a memory access tracking and positioning method, which can capture the DMA access out-of-bounds situation in the first time when the DMA access out-of-bounds situation occurs, and identify the DMA peripheral that causes the abnormal DMA access memory operation based on the identification of related peripherals.

[0231] Embodiment 6

[0232] The present application also provides a computer program product, including a computer program, which can implement the following memory access exception analysis method when executed by a processor:

[0233] Get the identifier of the memory access controller;

[0234] Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0235] Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0236] judging a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure;

[0237] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0238] Analyze and locate abnormal memory access issues based on the comparison results.

[0239] The beneficial effects of the technical solution provided by the embodiment of the present application are:

[0240] The technical solution provided in the embodiment of the present application distinguishes the storage system according to the DMA external devices involved, and proposes a memory access tracking and positioning method, which can capture the DMA access out-of-bounds situation in the first time when the DMA access out-of-bounds situation occurs, and identify the DMA peripheral that causes the abnormal DMA access memory operation based on the identification of related peripherals.

[0241] The DMA data protection tracking structure of the technical solution provided in the embodiment of the present application includes a DMA peripheral identifier, a DMA starting memory address, and a DMA memory length, which can quickly identify the peripherals and addresses where DMA memory access exceptions occur, and intuitively display the specific circumstances of the DMA memory access exceptions, without the need for a large amount of data screening; at the same time, the header and tail field hash values ​​are added, which can distinguish the categories of memory access tampering out-of-bounds exceptions, and can also distinguish whether the content to be read is tampered with or the content after writing is tampered with, that is, to locate the memory access exception.

[0242] Embodiment 7

[0243] The present application provides a computer storage medium, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the following steps are implemented:

[0244] Get the identifier of the memory access controller;

[0245] Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure;

[0246] Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0247] judging a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure;

[0248] Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result;

[0249] Analyze and locate abnormal memory access issues based on the comparison results.

[0250] In one embodiment, before obtaining the identifier of the memory access controller, the method includes:

[0251] Initializing the memory access controller;

[0252] The initializing the memory access controller includes:

[0253] The working mode, data transmission mode and addressing mode of the memory access controller are set.

[0254] In one embodiment, the filling of fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes:

[0255] Filling fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure;

[0256] Filling the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values;

[0257] The filling of fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes:

[0258] Filling the fields into the first memory access data protection tracking structure and the second memory access data protection tracking structure, wherein the fields include an identifier of a memory access controller, a memory access start address, and a memory access length;

[0259] The filling of the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values ​​includes:

[0260] When the first memory access data protection tracking structure is filled with data hash values, the identifier of the memory access controller, the memory access start address, and the hash value of the memory access length are filled into the first memory access data protection tracking structure;

[0261] When the data hash value is filled in the second memory access data protection tracking structure, the data hash value is filled in the second memory access data protection tracking structure according to the data transmission direction.

[0262] In one embodiment, filling the second memory access data protection tracking structure with a data hash value according to the data transmission direction includes:

[0263] When reading data from the memory access controller, the identifier of the memory access controller, the memory access start address and the hash value of the memory access length are obtained to obtain the data value to be stored;

[0264] Recalculating hash values ​​for the identifier hash value of the memory access controller, the memory access start address hash value, the memory access length hash value, and the data value to be stored;

[0265] Filling the recalculated memory access controller identifier, memory access start address, memory access length, and hash value of the data value to be stored into the second memory access data protection tracking structure;

[0266] When writing data to the memory access controller, the first threshold is filled into the hash value field of the second memory access data protection tracking structure.

[0267] In one of the embodiments, comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated by update according to the read / write request judgment result, and analyzing and locating the memory access exception problem according to the comparison result, includes:

[0268] When reading data from the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0269] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the bus cycle is returned through the memory access controller;

[0270] When writing data to the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated by update;

[0271] In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by update, the memory access is normal, and the corresponding field hash values ​​calculated by update are filled into the hash value field of the second memory access data protection tracking structure, and the bus cycle is returned through the memory access controller;

[0272] In response to the fact that the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding field hash values ​​calculated by update, a memory access exception occurs. The bus cycle is returned through the memory access controller, and the memory access exception problem is located based on the inconsistency in the field hash value comparison.

[0273] In one embodiment, locating the memory access exception problem according to the inconsistency of the field hash value comparison includes:

[0274] When the field hash value of the first memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, the memory access exception problem is located as a memory out-of-bounds error when writing data to the memory access controller;

[0275] When the field hash value of the first memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding additional field hash values ​​calculated by the update, and the memory access exception problem is located according to the comparison result of the additional field hash values;

[0276] The locating of the memory access exception problem according to the comparison result of the hash value of the additional field includes:

[0277] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are consistent with the corresponding additional field hash values ​​calculated by update, the memory access exception problem is located as the memory access content being modified during data migration;

[0278] When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding additional field hash values ​​calculated by the update, the memory access exception problem is located as modifying the field hash value of the second memory access data protection tracking structure through additional memory access data.

[0279] In one embodiment, the identifier of the memory access controller includes a memory access controller ID, a vendor ID, a bus number, a device number, and a function number; the identifier of the memory access controller is arranged in a first order;

[0280] The memory access start address is a pointer to the start position of the memory data structure and is used for locating and tracking memory access exceptions;

[0281] The memory access length is used to record the size of the data migration memory allocated to the data storage structure.

[0282] The present application can implement tracking and analysis of abnormal memory access situations through software, without occupying processor resources and JTAG devices, and can locate abnormal memory access problems at the same time.

[0283] Figure 6 An exemplary system provided for Embodiment 7 of the present application that can be used to implement various embodiments described in the present application;

[0284] like Figure 6As shown, in some embodiments, the system can be used as any of the above-mentioned devices for memory access anomaly analysis in each of the described embodiments. In some embodiments, the system may include one or more computer-readable media (e.g., system memory or NVM / storage device) having results and one or more processors (e.g., (one or more) processors) coupled to the one or more computer-readable media and configured to execute the results to implement the module to perform the actions described in the present application.

[0285] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0286] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0287] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A memory access exception analysis method, characterized in that: The method comprises: Get the identifier of the memory access controller; Creating a memory access data protection tracking structure according to an identifier of the memory access controller, the memory access data protection tracking structure comprising a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure; Allocating data migration memory to the data storage structure, and filling fields and data hash values ​​in the first memory access data protection tracking structure and the second memory access data protection tracking structure; judging a read or write request for allocated memory according to the data migration memory allocated to the data storage structure; Comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the corresponding field hash values ​​calculated in an updated manner according to the read / write request judgment result; Analyze and locate memory access exceptions based on the comparison results.

2. The memory access anomaly analysis method according to claim 1, wherein: Before obtaining the identifier of the memory access controller, the method includes: Initializing the memory access controller; Initializing the memory access controller includes: The operating mode, data transmission mode and addressing mode of the memory access controller are set.

3. The memory access anomaly analysis method according to claim 1, wherein: The filling of fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes: Filling fields in the first memory access data protection tracking structure and the second memory access data protection tracking structure; Filling the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values; The filling fields of the first memory access data protection tracking structure and the second memory access data protection tracking structure includes: Filling the fields into the first memory access data protection tracking structure and the second memory access data protection tracking structure, wherein the fields include an identifier of a memory access controller, a memory access start address, and a memory access length; The filling of the first memory access data protection tracking structure and the second memory access data protection tracking structure with data hash values ​​includes: When the first memory access data protection tracking structure is filled with a data hash value, the hash value of the memory access controller identifier, the memory access start address, and the memory access length is filled into the first memory access data protection tracking structure; When the data hash value is filled in the second memory access data protection tracking structure, the data hash value is filled in the second memory access data protection tracking structure according to the data transmission direction.

4. The memory access anomaly analysis method according to claim 3, wherein: The filling of the second memory access data protection tracking structure with a data hash value according to the data transmission direction includes: When reading data from a memory access controller, the identifier of the memory access controller, the memory access start address, and the hash value of the memory access length are obtained to obtain the data value to be stored; Recalculating hash values ​​for the identifier hash value of the memory access controller, the memory access start address hash value, the memory access length hash value, and the data value to be stored; Filling the recalculated memory access controller identifier, memory access start address, memory access length, and hash value of the data value to be stored into the second memory access data protection tracking structure; When data is written to the memory access controller, the first threshold is filled into the second memory access data protection tracking structure.

5. The memory access anomaly analysis method according to claim 1, wherein: The step of comparing the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the updated corresponding field hash values ​​according to the read / write request judgment result, and analyzing and locating the memory access exception problem according to the comparison result includes: When reading data from the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated in the update; In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the corresponding field hash values ​​calculated by the update, the memory access is normal, and the bus cycle is returned through the memory access controller; When writing data to the memory access controller, the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding field hash values ​​calculated in the update; In response to the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure being consistent with the updated calculated corresponding field hash values, the memory access is normal, the updated calculated corresponding field hash values ​​are filled into the second memory access data protection tracking structure, and the bus cycle is returned through the memory access controller; In response to the fact that the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding field hash values ​​calculated by the update, a memory access exception occurs. The bus cycle is returned through the memory access controller, and the memory access exception problem is located based on the inconsistency of the field hash value comparison.

6. The memory access anomaly analysis method according to claim 5, wherein: The method of locating the memory access exception problem based on the inconsistency of the field hash value comparison includes: When the field hash value of the first memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, the memory access exception problem is located as a memory out-of-bounds occurrence when writing data to the memory access controller; When the field hash value of the first memory access data protection tracking structure is consistent with the corresponding field hash value calculated by the update, and the field hash value of the second memory access data protection tracking structure is inconsistent with the corresponding field hash value calculated by the update, the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are compared with the corresponding additional field hash values ​​calculated by the update, and the memory access exception problem is located according to the comparison result of the additional field hash values; The method of locating the memory access exception problem based on the comparison result of the hash value of the additional field includes: When the extra field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are consistent with the corresponding extra field hash values ​​calculated by the update, the memory access exception problem is located as the memory access content is modified during data migration; When the additional field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure are inconsistent with the corresponding additional field hash values ​​calculated by the update, the memory access exception problem is located as modifying the field hash value of the second memory access data protection tracking structure through additional memory access data.

7. The memory access anomaly analysis method according to claim 3, wherein: The identifier of the memory access controller includes a memory access controller ID, a manufacturer ID, a bus number, a device number, and a function number; The identifiers of the memory access controllers are arranged in a first order; The memory access start address is a pointer to the starting position of the memory data structure and is used for locating and tracking memory access exceptions; The memory access length is used to record the size of the data migration memory allocated to the data storage structure.

8. A memory access anomaly analysis device, characterized in that: The device comprises: An acquisition module, used to obtain an identifier of a memory access controller; A creation module, configured to create a memory access data protection tracking structure according to an identifier of the memory access controller, wherein the memory access data protection tracking structure includes a first memory access data protection tracking structure, a data storage structure, and a second memory access data protection tracking structure; an allocation module, configured to allocate data migration memory to the data storage structure, and fill fields and data hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure; A judgment module, configured to judge a read and write request of the allocated memory according to the data migration memory allocated to the data storage structure; a comparison module, configured to compare the field hash values ​​of the first memory access data protection tracking structure and the second memory access data protection tracking structure with the updated corresponding field hash values ​​according to the read / write request judgment result; The analysis module is used to analyze and locate memory access anomalies based on the comparison results.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the steps of the memory access exception analysis method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the memory access anomaly analysis method according to any one of claims 1 to 7 are implemented.

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