Program performance analysis method and device, medium and product

Abstract

The invention relates to the technical field of computers, and discloses a program performance analysis method and device, a medium and a product.The method comprises the steps that a user program is started, a sub-thread is created through the user program, and an idle target structural body is taken out from a structural body array; the asynchronous task performance data and the synchronous task performance data in the set code interval are counted and updated to the target structural body; detecting the updated target structure body data by using the sub-thread, and calculating the average utilization rate of a board card acceleration module in a time period in which the start and end of the asynchronous operation are located, and time consumption data from the start time to the end time of the synchronous operation; and obtaining the average utilization rate and the average transmission bandwidth of the board card acceleration module in the whole user program execution process according to the data calculated by the sub-threads. In this way, an actual execution scene can be fitted, the counted data has practicability and flexibility, the performance condition in the process is reflected more comprehensively, and accurate analysis of the program performance is achieved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a program performance analysis method, device, medium and product. Background Art

[0002] In the relevant technical solutions, the performance analysis of the program generally relies on the performance analysis tool provided by the board card manufacturer. The tool can count the number of calls to the board card runtime and operator library interfaces, execution time and other information during the execution of the user program. The statistical results are generally displayed through visualization tools according to the execution sequence. The runtime and operator information counted by the tool are in the board card software development kit (SDK), that is, the tool can only count the calls to the interfaces in the software development kit provided by the board card.

[0003] In addition to the tools provided by board vendors, some framework software also provides other performance analysis tools, which add specific performance statistics function codes. Their usage scenarios are relatively limited. They count the interface performance in the framework, and the statistical results only include information such as the number of interface calls and logic processing time, but cannot count data that can reflect the performance of the board. Summary of the invention

[0004] The purpose of the present invention is to provide a program performance analysis method, device, medium and product that can fit the actual execution scenario, make the statistical data practical and flexible, more comprehensively reflect the performance of the process, and realize accurate analysis of program performance.

[0005] In order to solve the above technical problems, the present invention provides a program performance analysis method, the method comprising:

[0006] Start the user program, create a child thread using the user program, and take out an idle target structure from the structure array;

[0007] Counting asynchronous task performance data and synchronous task performance data in a set code interval, and updating the asynchronous task performance data and the synchronous task performance data into a target structure;

[0008] Utilize the subthread to detect the updated target structure data, calculate the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation, and the time-consuming data from the start time to the end time of the synchronous operation;

[0009] According to the average utilization and time consumption data calculated by the sub-thread, combined with the asynchronous task performance data and the synchronous task performance data, the average utilization and average transmission bandwidth of the board acceleration module during the entire user program execution process are obtained.

[0010] In a first aspect, the program performance analysis method provided by the present invention further includes:

[0011] The subthread is used to record the idle time between two adjacent task operations, and according to the recorded idle time size, a set number of idle time information is counted as a potential optimization time interval; the idle time information includes idle duration, idle start time, operation name and operation sequence number.

[0012] On the other hand, in the program performance analysis method provided by the present invention, the asynchronous task performance data includes asynchronous execution time; and in the process of counting the asynchronous execution time, the following steps are included:

[0013] An asynchronous operation statistics interface is constructed using a structure including a first constructor and a first destructor;

[0014] Events are created and recorded in the first constructor and the first destructor respectively by using the asynchronous operation statistics interface, so as to calculate the asynchronous execution time through the interface provided by the software development kit.

[0015] On the other hand, in the program performance analysis method provided by the present invention, the synchronization task performance data includes the synchronization execution time; and in the process of counting the synchronization execution time, the following steps are included:

[0016] A structure including a second constructor and a second destructor is used to construct a synchronous operation statistics interface;

[0017] Using the synchronous operation statistics interface, calling the second constructor to record the start time of the statistics content, and when leaving the statistics content scope, calling the second destructor to record the end time of the statistics content;

[0018] The synchronization execution time is calculated according to the start time and the end time of the statistical content.

[0019] On the other hand, in the above-mentioned program performance analysis method provided by the present invention, while updating the asynchronous task performance data and the synchronous task performance data into the target structure, it also includes:

[0020] When the user program writes update data, the write operation wakes up the sub-thread in the blocked waiting state; when the user program performs a write operation, the sub-thread cannot perform a write operation at the same time;

[0021] When the user program does not write the update data, the child thread enters a blocking waiting state.

[0022] On the other hand, in the program performance analysis method provided by the present invention, in the process of the child thread detecting the updated target structure data, the method includes:

[0023] If the sub-thread detects that the updated operation is the start timing operation of the asynchronous operation, it queries the completion flag of the asynchronous operation end event in real time, and calculates the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation.

[0024] On the other hand, in the program performance analysis method provided by the present invention, if the child thread detects that the updated operation is the start timing operation of the asynchronous operation, the asynchronous operation end event completion flag is queried in real time, and the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation is calculated, including:

[0025] If the child thread detects an event that the user program writes an asynchronous operation and finds that the event starts to execute in the asynchronous task sequence, periodically detects and counts the utilization rate of the board acceleration module used by the child thread in real time until the user program updates the end event data and finds that the asynchronous operation end event is executed;

[0026] According to the statistical utilization of the board acceleration module, the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends is calculated.

[0027] On the other hand, in the program performance analysis method provided by the present invention, in the process of the child thread detecting the updated target structure data, it also includes:

[0028] If the child thread detects that what is updated is the end timing data of the synchronization operation, the time-consuming data from the start time to the end time of the synchronization operation is calculated.

[0029] On the other hand, in the above-mentioned program performance analysis method provided by the present invention, when the user program is operated by multiple processes, each process uses an accelerator card;

[0030] Each process creates a corresponding sub-thread; each sub-thread stores the corresponding accelerator card device number to distinguish different board data.

[0031] On the other hand, in the above-mentioned program performance analysis method provided by the present invention, the present invention also includes:

[0032] Create shared memory;

[0033] Correspondingly, after calculating the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation, it also includes:

[0034] The calculated average utilization and time consumption data, as well as the asynchronous task performance data and the synchronous task performance data are stored in a shared memory.

[0035] On the other hand, in the above-mentioned program performance analysis method provided by the present invention, according to the average utilization and time consumption data calculated by the sub-thread, combined with the asynchronous task performance data and the synchronous task performance data, the average utilization and average transmission bandwidth of the board acceleration module during the entire user program execution process are obtained, including:

[0036] Calculate the average utilization rate of the board acceleration module during the entire execution of the user program by using the operation time of each task operation saved by the sub-thread and the calculated average utilization rate;

[0037] The average transmission bandwidth during the entire execution of the user program is calculated using the amount of data transferred in each data transmission operation and the time consumption data calculated by the child thread.

[0038] On the other hand, in the program performance analysis method provided by the present invention, the average utilization rate of the board acceleration module during the entire user program execution process is calculated by using each operation time of each task operation saved by the sub-thread and the calculated average utilization rate, including:

[0039] The average utilization rate of the board acceleration module during the entire execution of the user program is obtained by multiplying the calculated average utilization rate by the operation time of each task operation saved by the sub-thread and then dividing the calculated average utilization rate by the total operation time;

[0040] Correspondingly, the average transmission bandwidth during the entire execution of the user program is calculated using the amount of data transferred in each data transmission operation and the time consumption data calculated by the child thread, including:

[0041] According to the amount of data transferred in each data transmission operation, the total amount of data transmitted in the data transmission operation task is obtained;

[0042] The average transmission bandwidth during the entire execution of the user program is obtained by dividing the total transmission data volume of the data transmission operation task by the time consumption data calculated by the sub-thread.

[0043] In order to solve the above technical problems, the present invention further provides a program performance analysis device, the device comprising:

[0044] Memory for storing computer programs;

[0045] A processor is used to implement the steps of the above-mentioned program performance analysis method when executing the computer program.

[0046] In order to solve the above technical problem, the present invention also provides a non-volatile storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above program performance analysis method are implemented.

[0047] In order to solve the above technical problem, the present invention also provides a computer program product, including a computer program / instruction, which implements the steps of the above program performance analysis method when executed by a processor.

[0048] It can be seen from the above technical scheme that the present invention provides a program performance analysis method, which includes: starting a user program, using the user program to create a child thread, and taking out an idle target structure from a structure array; counting the asynchronous task performance data and the synchronous task performance data in the set code interval, and updating the asynchronous task performance data and the synchronous task performance data to the target structure; using the child thread to detect the updated target structure data, calculate the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation; according to the average utilization and time-consuming data calculated by the child thread, combined with the asynchronous task performance data and the synchronous task performance data, obtain the average utilization of the board acceleration module and the average transmission bandwidth during the entire user program execution process.

[0049] The beneficial effect of the present invention lies in that the above-mentioned program performance analysis method provided by the present invention can perform performance data statistics based on the set code interval in accordance with the actual execution scenario, so that the granularity of the statistical data is smaller, more practical and flexible, and a more refined performance analysis is performed, avoiding the influence of other irrelevant logic parts on the final statistical results; and the statistics are the asynchronous task performance data and the synchronous task performance data, which can more comprehensively reflect the performance of the process; the sub-thread detection and updated structure data are used to calculate the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation, so that the tool can calculate the average utilization of the board acceleration module and the average transmission bandwidth during the entire program execution process, which can realize accurate analysis of program performance and lay a foundation for program optimization.

[0050] In addition, the present invention also provides corresponding program performance analysis equipment, non-volatile storage media and products for the program performance analysis method, which have the same or corresponding technical features as the above-mentioned program performance analysis method and have the same effects as above. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0052] Figure 1 A flowchart of a program performance analysis method provided by an embodiment of the present invention;

[0053] Figure 2 A schematic diagram of the logical architecture of each part of the program performance analysis method provided by an embodiment of the present invention;

[0054] Figure 3 A specific flow chart of the program performance analysis method provided by an embodiment of the present invention when counting asynchronous time;

[0055] Figure 4 A schematic diagram of the structure of a program performance analysis device provided by an embodiment of the present invention;

[0056] Figure 5 A schematic diagram of the structure of a program performance analysis device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0057] At present, the performance analysis of artificial intelligence programs generally relies on the performance analysis tools provided by the board vendors. This tool counts the relevant information of the user program on the board runtime and operator library interfaces during the execution process. The statistical results are generally displayed through visualization tools according to the execution sequence. The runtime and operator information counted by this tool are in the board software development kit, that is, the tool only counts the call status of the interface in the software development kit provided by the board. In addition to the tools of the board vendors, some framework software also provides other performance analysis tools, such as the profiler (a profiling tool) function of the pytorch (an open source deep learning framework for machine learning and deep learning) framework. Users need to add performance statistics function code before the python code that needs to count performance data. After the program is executed, the performance data summary information of the performance statistics part is displayed, including the number of calls of each interface, the total execution time, and the maximum and minimum time. This method can only be used in the pytorch framework, and the statistical place needs to be python code, and the usage scenario is relatively limited; the statistical results only include information such as the number of interface calls and time of each interface, but it is impossible to count data that can reflect the performance of the board.

[0058] In order to solve the above technical problems, the present invention provides a program performance analysis method. The technical scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all embodiments. Based on the embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the protection scope of the present invention.

[0059] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Figure 1 A flowchart of a program performance analysis method provided by an embodiment of the present invention is shown in FIG. Figure 1 As shown, the method comprises the following steps:

[0060] S101, start the user program, use the user program to create a child thread, and take out an idle target structure from the structure array.

[0061] It is understandable that a structure refers to a structured data composed of a group of data. The data type of a structure is composed of a group of different data called members (or fields, or elements), each of which can have different types. Structures are usually used to represent a number of data that are different in type but related. The structure array of the present invention can contain structures of multiple data lengths, and is used to implement data transfer between a user program and a child thread.

[0062] Figure 2 Schematic diagram of the logical architecture of each part of the program performance analysis method provided by the embodiment of the present invention. Figure 2 As shown, the execution subject of the present invention can be a program performance analysis tool, and the user program is started by the program performance analysis tool. The user program can create a sub-thread through the initialization function and take out the idle target structure from the structure array. After the user program is executed or exits midway, the tool counts the statistical information of the above sub-threads and processes and displays it.

[0063] It should be noted that the present invention can pre-call the statistical operation initialization interface for preparatory work such as sub-thread creation, and can also pre-add a statistical interface function. When the added statistical interface function is executed, the statistical interface function can obtain an idle target structure from the structure array.

[0064] S102: Count the asynchronous task performance data and the synchronous task performance data in the set code interval, and update the asynchronous task performance data and the synchronous task performance data into the target structure.

[0065] In implementation, the present invention can add a corresponding interface to any code segment that needs performance analysis to complete the data collection of the interface, and in order to analyze the performance of the local code segment in a targeted manner, the code interval of the statistical operation (i.e., the code interval that needs performance analysis) is controlled by providing statistical start and end interface functions. Before executing step S102 to statistically set the asynchronous task performance data and synchronous task performance data in the code interval, it can specifically include: adding statistical operation start and end control functions in the code interval of the performance to be analyzed; using the statistical start and end interface functions to locally select the program code to determine the code interval corresponding to the statistical operation. Among them, the statistical operation only counts the code performance within the statistical start and end range. Correspondingly, the asynchronous task performance data and synchronous task performance data in the set code interval are statistically set, and specifically can be the asynchronous task performance data and synchronous task performance data in the code interval corresponding to the statistical operation determined by the statistics. In this way, compared with the full statistics of the board card vendor tool from beginning to end, the granularity of the patent statistics is smaller, avoiding the influence of other irrelevant logic on the final statistical results; compared with the profiler statistical tool patent content of the pytorch framework, it can support multiple interval performance statistics, and the statistical operation is more flexible.

[0066] In practical applications, asynchronous task performance data can be understood as task performance summary data of asynchronous operations, which can include asynchronous execution time, operation name of asynchronous tasks, data transfer size, etc. Synchronous task performance data can be understood as task performance summary data of synchronous operations, which can include synchronous execution time, operation name of synchronous tasks, data transfer size, etc.

[0067] S103, using the child thread to detect the updated target structure data, calculate the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation, and the time-consuming data from the start time to the end time of the synchronous operation.

[0068] S104. According to the average utilization and time consumption data calculated by the child threads, combined with the asynchronous task performance data and the synchronous task performance data, the average utilization and average transmission bandwidth of the board acceleration module during the entire user program execution process are obtained.

[0069] In practical applications, the user program can be an artificial intelligence program. In the field of artificial intelligence, solutions are generally composed of multiple components, including one or more models / algorithms, various dependency packages and training and inference frameworks, and one or more acceleration cards. These contents together constitute a complete artificial intelligence system to solve specific problems. The present invention can perform performance analysis on artificial intelligence programs.

[0070] In the above-mentioned program performance analysis method provided by the embodiment of the present invention, it is possible to perform performance data statistics based on the set code interval in accordance with the actual execution scenario, so that the statistical data granularity is smaller, more practical and flexible, and a more refined performance analysis is performed, avoiding the influence of other irrelevant logic parts on the final statistical results; and the statistics are the asynchronous task performance data and the synchronous task performance data, which can more comprehensively reflect the performance of the process; the updated structure data is detected by the child thread to calculate the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation, so that the tool can calculate the average utilization of the board acceleration module and the average transmission bandwidth during the entire program execution process, which can realize accurate analysis of program performance and lay the foundation for program optimization.

[0071] It should be noted that, in the present invention, part of the developer's program execution time is the time on the server side, and the other part is the time consumed by the asynchronous operation sent to the accelerator card for execution. The present invention provides a set of interfaces for data statistics (for example, including asynchronous operation statistics interfaces and synchronous operation statistics interfaces) to count the asynchronous execution time (also referred to as asynchronous start and end time) and synchronous execution time (also referred to as synchronous start and end time), as well as the operation name of the task, wherein the size of the data transmitted is recorded for the interface through which the data is transmitted.

[0072] Furthermore, in a specific implementation, in the above-mentioned program performance analysis method provided in an embodiment of the present invention, step S102, in the process of counting the asynchronous execution time in the asynchronous task performance data, may specifically include: using a structure including a first constructor and a first destructor to construct an asynchronous operation statistics interface; using the asynchronous operation statistics interface to respectively create and record events in the first constructor and the first destructor, so as to calculate the asynchronous execution time through the interface provided by the software development kit.

[0073] It should be noted that event is a method provided by the accelerator card to handle asynchronous operations on the board. In practice, the asynchronous operation statistics interface can be understood as an interface for collecting asynchronous time, which can be a structure containing a constructor and a destructor. The statistics of asynchronous execution time need to rely on the event mechanism interface in the board software development kit to implement. Create an event in the constructor and destructor respectively and perform a record operation. When performing data processing later, the direct time calculation of the two events is completed through the interface provided by the software development kit, that is, the time of asynchronous execution of the task is calculated.

[0074] Furthermore, in the specific implementation, in the above-mentioned program performance analysis method provided by the embodiment of the present invention, step S102, in the process of counting the synchronization execution time in the synchronization task performance data, can specifically include: using a structure including a second constructor and a second destructor to construct a synchronization operation statistics interface; using the synchronization operation statistics interface to call the second constructor to record the start time of the statistical content, and when leaving the scope of the statistical content, calling the second destructor to record the end time of the statistical content; and counting the synchronization execution time according to the start time and end time of the statistical content.

[0075] In implementation, the synchronous operation statistics interface can be understood as an interface for collecting synchronous time. It can also be a structure containing a constructor and a destructor. Developers define the structure at the starting position where the synchronous execution time needs to be counted. At this time, the structure constructor will be called to complete the recording of the start time of the statistical content, and the destructor will be called to complete the recording of the end time when leaving the statistical content scope. Developers can adjust the scope through brackets.

[0076] The above synchronous execution time, asynchronous execution time, operation name, data size and other information are stored in a structure data type. The structure information is generated in real time during program execution. In order to be as close as possible to the actual timing scenario of the developer's program when performing performance statistics, the present invention can process the above generated target structure data in real time by creating a new thread.

[0077] Furthermore, in a specific implementation, in the above-mentioned program performance analysis method provided in an embodiment of the present invention, while executing step S102 to update the asynchronous task performance data and the synchronous task performance data into the target structure, it may also include: when the user program writes update data, the write operation wakes up the child thread in a blocked waiting state; when the user program performs a write operation, the child thread cannot write at the same time; when the user program does not write update data, the child thread enters a blocked waiting state.

[0078] In practice, in order to prevent the child threads from excessively occupying processor resources, the present invention implements a structure data type that supports write wake-up operations and read-write mutual exclusion through a semaphore mechanism and a lock mechanism. The function implemented by this data type is: when a program writes and updates the structure data, the write operation will simultaneously wake up other child threads that are blocked and waiting for data update. When the program is writing, other child threads cannot write at the same time. When the user program does not write the updated data, the child thread enters a blocked waiting state.

[0079] Furthermore, in the specific implementation, in the above-mentioned program performance analysis method provided by the embodiment of the present invention, step S103, in the process of the child thread detecting the updated target structure data, can specifically include: if the child thread detects that the updated is the start timing operation of the asynchronous operation, query the asynchronous operation end event completion flag in real time, and calculate the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends. In this way, the utilization rate of the board resources is obtained.

[0080] In the above steps, if the child thread detects that the updated operation is the start timing operation of the asynchronous operation, the asynchronous operation end event completion flag is queried in real time, and the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends is calculated. Specifically, it may include: if the child thread detects that the user program writes an asynchronous operation event and queries that the event starts to execute in the asynchronous task sequence, periodically detect and count the utilization rate of the board acceleration module used by the child thread in real time until the user program updates the end event data and queries that the asynchronous operation end event execution is completed; based on the statistical utilization rate of the board acceleration module, the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends is calculated.

[0081] In implementation, after the child thread wakes up, it detects an updated structure. If it is detected that the updated structure is the start timing operation of the asynchronous operation, that is, the user program inserts an event for recording the start time of the asynchronous execution, the child thread will detect in real time that the event has been completed, that is, the asynchronous operation starts to be executed on the acceleration module at this time. The child thread periodically detects the utilization rate of the acceleration module of the acceleration card used by the child thread in real time, and queries the asynchronous operation end event completion flag in real time. When the asynchronous operation end event is completed, that is, the asynchronous operation execution is completed at this time, the child thread stops the acceleration module utilization statistics, and calculates the average utilization rate in this time period and saves it.

[0082] Figure 3 The specific flow chart of the program performance analysis method provided by the embodiment of the present invention when counting asynchronous time. In implementation, Figure 3 As shown, when the child thread detects that the user program writes the start event of the asynchronous operation and queries that the event event starts to execute in the asynchronous task sequence, the child thread periodically collects the utilization of the board hardware acceleration module until the user program updates the end event data and queries that the end event execution is completed, then calculates the average utilization of the acceleration module in the process, and the child thread saves the utilization value for subsequent use. At this time, if there is new data update, then continue to execute the above operations until all updated data are completed. If there is no new data update, then the child thread enters a blocked waiting state until the next user program updates data to wake up the child thread.

[0083] Furthermore, in a specific implementation, in the above-mentioned program performance analysis method provided in an embodiment of the present invention, step S103, in the process of the child thread detecting the updated target structure data, may also include: if the child thread detects that the updated data is the end timing data of the synchronization operation, calculating the time-consuming data from the start time to the end time of the synchronization operation.

[0084] In implementation, if the child thread detects that the updated timing data is the end timing data of the synchronization operation, the child thread may calculate the time-consuming data from the start time to the end time of the synchronization operation and save it.

[0085] Furthermore, in the specific implementation, in the above-mentioned program performance analysis method provided in the embodiment of the present invention, if Figure 2 As shown in the figure, when the user program operates multiple processes, each process uses an accelerator card; each process creates a child thread, that is, Figure 2 Process 1 corresponds to subthread 1, and process N corresponds to subthread N; each subthread stores the corresponding accelerator card device number to distinguish different board data.

[0086] In the implementation, for AI distributed scenarios, user programs can operate for multiple processes, each process uses an accelerator card. At this time, each user process will create a sub-thread as mentioned above. In addition to saving the above information, the sub-thread will also save the accelerator card device number used by the thread to distinguish different board data. After the sub-thread is created, the program executes normally.

[0087] Furthermore, in the specific implementation, the program performance analysis method provided in the embodiment of the present invention may also include: creating a shared memory. The program performance analysis tool completes the creation of the shared memory so that each child thread can fill in and update the statistical data later, and then the tool starts the user program. The time-consuming data, utilization rate and other additional data stored in the structure calculated by the above synchronous operation and asynchronous operation can be saved in the shared memory allocated by the child thread after processing.

[0088] Correspondingly, after calculating the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time data from the start time to the end time of the synchronous operation, it can also include: saving the calculated average utilization and time data, as well as the asynchronous task performance data and the synchronous task performance data in shared memory.

[0089] like Figure 2As shown, each sub-thread and the tool complete data transfer through shared memory, and each sub-thread obtains and uses the corresponding shared memory space through the device number. After completing the data processing of each operation, the sub-thread can also aggregate and process the data of the same task. The sub-thread saves the data corresponding to different tasks in the shared memory in real time according to the agreed format by the task name. The saved information of each task with the name includes the total time of executing synchronous operations and / or the total time of asynchronous operations, the number of calls, the proportion of time spent in the entire operation, etc. of the corresponding operation, which is used as the performance summary data of the user program. If it is an operator operation, the average utilization rate and duration of each acceleration module are saved at the same time. If it is a data transmission operation, the amount of data transmitted each time is saved at the same time.

[0090] After the program ends, the program performance analysis tool can obtain the calculation results saved by the child threads of each process from the shared memory, and organize and output the statistical data of each operation content in the calculation results. The statistical data includes the name, total time, number of calls and other information of all synchronous or asynchronous operations called during the program execution.

[0091] Furthermore, in a specific implementation, in the above-mentioned program performance analysis method provided in an embodiment of the present invention, step S104 obtains the average utilization rate and average transmission bandwidth of the board acceleration module during the entire user program execution process based on the average utilization rate and time consumption data calculated by the child thread, combined with the asynchronous task performance data and the synchronous task performance data. Specifically, it may include: using the operation time of each task operation saved by the child thread and the calculated average utilization rate to calculate the average utilization rate of the board acceleration module during the entire user program execution process; using the amount of data transferred in each data transmission operation and the time consumption data calculated by the child thread to calculate the average transmission bandwidth during the entire user program execution process.

[0092] In the above steps, the average utilization rate of the board acceleration module during the entire user program execution process is calculated using the operation time of each task operation saved by the sub-thread and the calculated average utilization rate. Specifically, it may include: multiplying the operation time of each task operation saved by the sub-thread by the calculated average utilization rate and then dividing by the total operation time to obtain the average utilization rate of the board acceleration module during the entire user program execution process.

[0093] In implementation, the tool calculates the average utilization of the board acceleration module after the program ends, which is used for the performance evaluation of the user program. The average utilization formula can be: the time of each operation saved by the child thread multiplied by the average utilization of the board during the operation divided by the total time of each operation. The average utilization reflects the average utilization of the board acceleration module during the execution of the user program. The higher the value, the better the performance evaluation.

[0094] In addition, the above steps use the amount of data transferred in each data transfer operation and the time consumption data calculated by the child thread to calculate the average transmission bandwidth during the entire user program execution process, which may specifically include: obtaining the total amount of data transferred by the data transfer operation task based on the amount of data transferred in each data transfer operation; and obtaining the average transmission bandwidth during the entire user program execution process by dividing the total amount of data transferred by the time consumption data calculated by the child thread.

[0095] In implementation, the tool counts the average bandwidth of the transmission operation after the program ends, which is used to evaluate the transmission rate of the user program. The average transmission bandwidth calculation formula can be: the total amount of data transmitted by the data transmission operation task divided by the total time of the data transmission operation task. The higher the average transmission bandwidth value, the better the transmission efficiency.

[0096] Furthermore, in a specific implementation, the above-mentioned program performance analysis method provided in an embodiment of the present invention may also include: using a sub-thread to record the idle time between two adjacent task operations, and according to the recorded idle time size, counting a set number of idle time information as a potential optimization time interval; the idle time information includes idle duration, idle start time, operation name and operation sequence number.

[0097] In implementation, the performance evaluation content of the present invention may include the size of idle time in addition to the two evaluation performance data of the average utilization rate of the acceleration module and the average transmission bandwidth. In order to record the larger idle time intervals of the server side and the board side, the present invention can calculate the idle time between the end of the last operation and the start of the next operation in addition to processing the structure data of each operation in real time, that is, use the statistical data to obtain the duration of the task idle time period. The longer the idle time, the more potential there is for performance optimization. Whether the idle time can be optimized specifically requires developers to find the corresponding code logic according to the location information of the idle time for targeted analysis. The present invention can count and save the idle interval information of the number of idle intervals (such as the first 10) in front according to the size of the idle time; specifically, the duration of these 10 idle intervals and the operation sequence numbers and operation names before and after them can be recorded for positioning, and the first 10 idle data can be updated in real time.

[0098] It should be noted that all the final result data obtained by the present invention can be saved in the form of a file for data comparison and verification, and can be displayed on the execution terminal interface. After the program performance analysis tool outputs the final result, the program can exit.

[0099] In the above embodiments, the program performance analysis method is described in detail, and the present invention also provides corresponding embodiments of a program performance analysis device and a program performance analysis apparatus. It should be noted that the present invention describes the embodiments of the device part from two perspectives, one is based on the functional module perspective, and the other is based on the hardware perspective.

[0100] Figure 4 The schematic diagram of the structure of the program performance analysis device provided by the embodiment of the present invention is as follows. This embodiment is based on the perspective of functional modules, such as Figure 4 As shown, the device comprises:

[0101] The program startup module 10 is used to start the user program, create a child thread using the user program, and take out an idle target structure from the structure array;

[0102] A data statistics updating module 11 is used to count the asynchronous task performance data and the synchronous task performance data in a set code interval, and update the asynchronous task performance data and the synchronous task performance data into a target structure;

[0103] The sub-thread control module 12 is used to detect the updated target structure data using the sub-thread, calculate the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation;

[0104] The data calculation module 13 is used to obtain the average utilization rate and average transmission bandwidth of the board acceleration module during the entire user program execution process based on the average utilization rate and time consumption data calculated by the sub-threads, combined with the asynchronous task performance data and the synchronous task performance data.

[0105] In the above-mentioned program performance analysis device provided by the embodiment of the present invention, through the interaction of the above-mentioned four modules, performance data statistics based on the set code interval can be carried out in accordance with the actual execution scenario, so that the granularity of the statistical data is smaller, more practical and flexible, and more detailed performance analysis is carried out, avoiding the influence of other irrelevant logic parts on the final statistical results; and the statistics are the asynchronous task performance data and the synchronous task performance data, which can more comprehensively reflect the performance of the process; the sub-thread detection updated structure data is used to calculate the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation, so that the tool can calculate the average utilization of the board acceleration module and the average transmission bandwidth during the entire program execution process, which can realize accurate analysis of program performance and lay the foundation for program optimization.

[0106] Since the embodiments of the apparatus part correspond to the embodiments of the method part, the embodiments of the apparatus part refer to the description of the embodiments of the method part, which will not be described here. And it has the same beneficial effects as the above-mentioned program performance analysis method.

[0107] Furthermore, in a specific implementation, in the above-mentioned program performance analysis device provided by an embodiment of the present invention, the data statistics updating module 11 may specifically include:

[0108] An asynchronous execution time calculation unit is used to construct an asynchronous operation statistics interface using a structure including a first constructor and a first destructor; using the asynchronous operation statistics interface to create and record events in the first constructor and the first destructor respectively, so as to calculate the asynchronous execution time through an interface provided by a software development kit;

[0109] The synchronous execution time calculation unit is used to use a structure including a second constructor and a second destructor to construct a synchronous operation statistical interface; use the synchronous operation statistical interface to call the second constructor to record the start time of the statistical content, and when leaving the statistical content scope, call the second destructor to record the end time of the statistical content; according to the start time and end time of the statistical content, the synchronous execution time is calculated.

[0110] Furthermore, in a specific implementation, in the above-mentioned program performance analysis device provided by the embodiment of the present invention, the data statistics updating module 11 may further specifically include:

[0111] The child thread wake-up unit is used to wake up the child thread in the blocked waiting state by the write operation when the user program writes the updated data; when the user program performs the write operation, the child thread cannot perform the write operation at the same time; when the user program does not write the updated data, the child thread enters the blocked waiting state.

[0112] Furthermore, in a specific implementation, in the above-mentioned program performance analysis device provided in an embodiment of the present invention, the sub-thread control module 12 can be specifically used to query the asynchronous operation end event completion flag in real time if the sub-thread detects that the update is the start timing operation of the asynchronous operation, and calculate the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends; if the sub-thread detects that the update is the end timing data of the synchronous operation, calculate the time-consuming data from the start time to the end time of the synchronous operation.

[0113] Furthermore, in a specific implementation, in the above-mentioned program performance analysis device provided in an embodiment of the present invention, the data calculation module 13 can be specifically used to calculate the average utilization rate of the board acceleration module during the entire user program execution process by using the operation time of each task operation saved by the sub-thread and the calculated average utilization rate; and calculate the average transmission bandwidth during the entire user program execution process by using the amount of data transferred in each data transmission operation and the time-consuming data calculated by the sub-thread.

[0114] Furthermore, in a specific implementation, the program performance analysis device provided in the embodiment of the present invention may further include:

[0115] The potential optimization time interval statistics module is used to use a sub-thread to record the idle time between two adjacent task operations, and according to the recorded idle time size, count the set number of idle time information as the potential optimization time interval; the idle time information includes idle duration, idle start time, operation name and operation sequence number.

[0116] Figure 5 The schematic diagram of the structure of the program performance analysis device provided by the embodiment of the present invention is as follows. This embodiment is based on the hardware perspective, such as Figure 5 As shown, the program performance analysis device includes:

[0117] A memory 20, used for storing computer programs;

[0118] The processor 21 is used to implement the steps of the program performance analysis method mentioned in the above embodiment when executing a computer program.

[0119] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 can be implemented in at least one hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU; the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may also include an (Artificial Intelligence, AI) processor, which is used to process computing operations related to machine learning.

[0120] The memory 20 may include one or more non-volatile storage media, which may be non-transitory. The memory 20 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201, wherein, after the computer program is loaded and executed by the processor 21, it can implement the relevant steps of the program performance analysis method disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the program performance analysis method mentioned above.

[0121] In some embodiments, the program performance analysis device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26. Those skilled in the art will appreciate that Figure 5 The structure shown in does not constitute a limitation on the program performance analysis device, and may include more or fewer components than shown in the figure. The program performance analysis device provided by the embodiment of the present invention includes a memory and a processor. When the processor executes the program stored in the memory, it can implement the following method: the program performance analysis method, the effect is the same as above.

[0122] Finally, the present invention also provides an embodiment corresponding to a non-volatile storage medium. The non-volatile storage medium stores a computer program, and when the computer program is executed by a processor, the steps recorded in the above method embodiment are implemented.

[0123] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and executes all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code. The non-volatile storage medium provided by the present invention can implement the above-mentioned program performance analysis method, and the effect is the same as above.

[0124] Finally, the present invention also provides an embodiment corresponding to a computer program product. The computer program product includes a computer program / instruction, and when the computer program / instruction is executed by a processor, the steps described in the above program performance analysis method embodiment are implemented. The computer program product provided by the present invention can implement the above-mentioned program performance analysis method, and the effect is the same as above.

[0125] It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0126] The program performance analysis method, device, medium and product provided by the present invention are introduced in detail above. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A program performance analysis method, characterized in that: The method comprises: Start the user program, create a child thread using the user program, and take out an idle target structure from the structure array; Counting asynchronous task performance data and synchronous task performance data in a set code interval, and updating the asynchronous task performance data and the synchronous task performance data into a target structure; Utilize the subthread to detect the updated target structure data, calculate the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation, and the time-consuming data from the start time to the end time of the synchronous operation; According to the average utilization and time consumption data calculated by the sub-thread, combined with the asynchronous task performance data and the synchronous task performance data, the average utilization and average transmission bandwidth of the board acceleration module during the entire user program execution process are obtained.

2. The program performance analysis method according to claim 1, characterized in that: Also includes: The subthread is used to record the idle time between two adjacent task operations, and according to the recorded idle time size, a set number of idle time information is counted as a potential optimization time interval; the idle time information includes idle duration, idle start time, operation name and operation sequence number.

3. The program performance analysis method according to claim 1, characterized in that: The asynchronous task performance data includes asynchronous execution time; in the process of counting the asynchronous execution time, the following steps are included: An asynchronous operation statistics interface is constructed using a structure including a first constructor and a first destructor; Events are created and recorded in the first constructor and the first destructor respectively by using the asynchronous operation statistics interface, so as to calculate the asynchronous execution time through the interface provided by the software development kit.

4. The program performance analysis method according to claim 1, characterized in that: The synchronization task performance data includes synchronization execution time; in the process of counting the synchronization execution time, it includes: A structure including a second constructor and a second destructor is used to construct a synchronous operation statistics interface; Using the synchronous operation statistics interface, calling the second constructor to record the start time of the statistics content, and when leaving the statistics content scope, calling the second destructor to record the end time of the statistics content; The synchronization execution time is calculated according to the start time and the end time of the statistical content.

5. The program performance analysis method according to claim 1, characterized in that: When the asynchronous task performance data and the synchronous task performance data are updated to the target structure, it also includes: When the user program writes update data, the write operation wakes up the sub-thread in the blocked waiting state; when the user program performs a write operation, the sub-thread cannot perform a write operation at the same time; When the user program does not write the update data, the child thread enters a blocked waiting state.

6. The program performance analysis method according to claim 1, characterized in that: The process of the sub-thread detecting the updated target structure data includes: If the sub-thread detects that the updated operation is the start timing operation of the asynchronous operation, it queries the completion flag of the asynchronous operation end event in real time, and calculates the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation.

7. The program performance analysis method according to claim 6, characterized in that: If the sub-thread detects that the updated time is the start timing operation of the asynchronous operation, the asynchronous operation end event completion flag is queried in real time, and the average utilization rate of the board acceleration module in the time period of the start and end of the asynchronous operation is calculated, including: If the child thread detects an event that the user program writes an asynchronous operation and finds that the event starts to execute in the asynchronous task sequence, periodically detects and counts the utilization rate of the board acceleration module used by the child thread in real time until the user program updates the end event data and finds that the asynchronous operation end event is executed; According to the statistical utilization of the board acceleration module, the average utilization of the board acceleration module in the time period where the asynchronous operation starts and ends is calculated.

8. The program performance analysis method according to claim 6, characterized in that: In the process of the sub-thread detecting the updated target structure data, it also includes: If the child thread detects that what is updated is the end timing data of the synchronization operation, the time-consuming data from the start time to the end time of the synchronization operation is calculated.

9. The program performance analysis method according to claim 1, characterized in that: When the user program operates multiple processes, each process uses an accelerator card; Each process creates a corresponding sub-thread; each sub-thread stores the corresponding accelerator card device number to distinguish different board data.

10. The program performance analysis method according to claim 1, characterized in that: The present invention also includes: Create shared memory; Correspondingly, after calculating the average utilization rate of the board acceleration module in the time period where the asynchronous operation starts and ends, and the time-consuming data from the start time to the end time of the synchronous operation, it also includes: The calculated average utilization and time consumption data, as well as the asynchronous task performance data and the synchronous task performance data are stored in a shared memory.

11. The program performance analysis method according to claim 1, characterized in that: According to the average utilization and time consumption data calculated by the child thread, combined with the asynchronous task performance data and the synchronous task performance data, the average utilization and average transmission bandwidth of the board acceleration module during the entire user program execution process are obtained, including: Calculate the average utilization rate of the board acceleration module during the entire execution of the user program by using the operation time of each task operation saved by the sub-thread and the calculated average utilization rate; The average transmission bandwidth during the entire execution of the user program is calculated using the amount of data transferred in each data transmission operation and the time consumption data calculated by the child thread.

12. The program performance analysis method according to claim 11, characterized in that: Using each operation time of each task operation saved by the subthread and the calculated average utilization rate, the average utilization rate of the board acceleration module during the entire user program execution process is calculated, including: The average utilization rate of the board acceleration module during the entire execution of the user program is obtained by multiplying the calculated average utilization rate by the operation time of each task operation saved by the sub-thread and then dividing the calculated average utilization rate by the total operation time; Correspondingly, the average transmission bandwidth during the entire execution of the user program is calculated using the amount of data transferred in each data transmission operation and the time consumption data calculated by the child thread, including: According to the amount of data transferred in each data transmission operation, the total amount of data transmitted in the data transmission operation task is obtained; The average transmission bandwidth during the entire execution of the user program is obtained by dividing the total transmission data volume of the data transmission operation task by the time consumption data calculated by the sub-thread.

13. A program performance analysis device, characterized in that: The device comprises: Memory for storing computer programs; A processor, configured to implement the steps of the program performance analysis method as claimed in any one of claims 1 to 12 when executing the computer program.

14. A non-volatile storage medium, characterized in that: The non-volatile storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the program performance analysis method according to any one of claims 1 to 12 are implemented.

15. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the program performance analysis method according to any one of claims 1 to 12 are implemented.

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