Semiconductor device and method of manufacturing the same

Abstract

The invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a semiconductor module including a semiconductor chip; a cooling unit that cools the semiconductor module; a heat conduction layer interposed between the semiconductor module and the cooling part; the protective film covers the boundary of the semiconductor module and the heat conduction layer and the boundary of the cooling part and the heat conduction layer, and the water absorption rate of the protective film is lower than that of the heat conduction layer.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device. Background Art

[0002] Semiconductor devices using power semiconductor chips such as IGBT (Insulated Gate Bipolar Transistor) or MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) have been proposed in the past (e.g., Patent Documents 1 to 3). For example, Patent Document 1 discloses a power semiconductor device in which a module portion and a cooling portion are joined via a resin insulating member.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent No. 7154422

[0006] Patent Document 2: Japanese Patent No. 7134360

[0007] Patent Document 3: Japanese Patent Application Publication No. 2020-098882 Summary of the invention

[0008] Problem that the invention aims to solve

[0009] In the structure of Patent Document 1, moisture may penetrate from the boundary between the resin insulating component and the module part or the cooling part. Due to the penetration of moisture, problems such as reduced bonding strength between the module part and the cooling part or reduced insulation withstand voltage of the resin insulating component may occur. In view of the above situation, one method of the present disclosure is to suppress the penetration of moisture between the semiconductor module and the cooling part.

[0010] Solutions for solving problems

[0011] In order to solve the above problems, a semiconductor device involved in one embodiment of the present disclosure includes: a semiconductor module, which includes a semiconductor chip; a cooling unit, which cools the semiconductor module; a heat-conducting layer, which is interposed between the semiconductor module and the cooling unit; and a protective film, which covers the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer, wherein the water absorption rate of the protective film is lower than the water absorption rate of the heat-conducting layer.

[0012] A semiconductor device according to another embodiment of the present disclosure includes: a semiconductor module including a semiconductor chip; a cooling unit that cools the semiconductor module; a heat-conducting layer interposed between the semiconductor module and the cooling unit; and a protective film that covers a boundary between the semiconductor module and the heat-conducting layer and a boundary between the cooling unit and the heat-conducting layer, wherein a thickness of the protective film is smaller than a distance between the semiconductor module and the cooling unit.

[0013] A method for manufacturing a semiconductor device according to one embodiment of the present disclosure includes the following steps: a bonding step of bonding a semiconductor module including a semiconductor chip and a cooling unit for cooling the semiconductor module by using a heat conductive layer interposed between the semiconductor module and the cooling unit; and a protection step, performed after the bonding step, of forming a protection film that covers a boundary between the semiconductor module and the heat conductive layer, and a boundary between the cooling unit and the heat conductive layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a cross-sectional view of the semiconductor device according to the first embodiment.

[0015] Figure 2 The semiconductor module is located near the outer periphery ( Figure 1 A cross-sectional view obtained by enlarging the area α).

[0016] Figure 3 The diagram is an explanatory diagram of the process of manufacturing a semiconductor device.

[0017] Figure 4 It is a cross-sectional view of a semiconductor device according to a second embodiment.

[0018] Figure 5 It is an explanatory diagram of the process of manufacturing the semiconductor device of the second embodiment.

[0019] Figure 6 This is an enlarged cross-sectional view of the vicinity of the outer periphery of the semiconductor module in the semiconductor device according to the third embodiment.

[0020] Figure 7 is a cross-sectional view of a semiconductor device according to a modified example. DETAILED DESCRIPTION

[0021] The method for implementing the present disclosure is described with reference to the accompanying drawings. In addition, in each of the drawings, the size and scale of each element may be different from the actual product. In addition, the method described below is an illustrative method envisioned when implementing the present disclosure. Therefore, the scope of the present disclosure is not limited to the following illustrative method.

[0022] A: First Implementation

[0023] Figure 1 1 is a cross-sectional view of a semiconductor device 100 according to a first embodiment of the present disclosure. The semiconductor device 100 according to the first embodiment is a power semiconductor device constituting a power conversion device such as an inverter circuit. Figure 1 As illustrated, the semiconductor device 100 includes a semiconductor module 10 , a cooling unit 20 , a heat conduction layer 30 , and a protective film 40 .

[0024] In the following description, the Z axis is assumed. One direction along the Z axis is marked as the Z1 direction, and the opposite direction of the Z1 direction is marked as the Z2 direction. Hereinafter, the situation where any element of the semiconductor device 100 is visually recognized along one direction of the Z axis (the Z1 direction or the Z2 direction) is described as "top view".

[0025] In actual use scenarios, the semiconductor device 100 can be set in any direction, but in the following description, for convenience, the Z1 direction is assumed to be downward and the Z2 direction is assumed to be upward. Therefore, sometimes the surface of any element of the semiconductor device 100 facing the Z1 direction is recorded as the "lower surface", and the surface of the element facing the Z2 direction is recorded as the "upper surface".

[0026] The semiconductor module 10 is a power module including a mounting substrate 11, a semiconductor chip 12, a plurality of connection terminals 13, and a sealing body 14. The semiconductor chip 12 and the plurality of connection terminals 13 are mounted on the mounting substrate 11, and the semiconductor chip 12 is sealed by the sealing body 14. In the following description, one semiconductor chip 12 is focused on, but a plurality of semiconductor chips 12 may be mounted on the mounting substrate 11.

[0027] The mounting substrate 11 is an insulating substrate such as a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Brazing) substrate, or an IMS (Insulated Metal Substrate). Specifically, the mounting substrate 11 is composed of a stack of an insulating substrate 111, a metal layer 112, and a conductive pattern 113.

[0028] The insulating substrate 111 is a rectangular plate-shaped member formed of an insulating material. The insulating substrate 111 is formed of, for example, a resin material such as epoxy resin to which ceramic fillers are added. Alternatively, the insulating substrate 111 may be formed of, for example, a ceramic material such as alumina, zirconia, aluminum nitride, or silicon nitride.

[0029] The metal layer 112 is a rectangular plate-shaped member provided on the lower surface of the insulating substrate 111. The metal layer 112 is formed of a metal material with high thermal conductivity. The material of the metal layer 112 is arbitrary, and examples thereof include copper alone, copper alloy, and aluminum.

[0030] The conductive patterns 113 are conductive films formed on the upper surface of the insulating substrate 111. Each conductive pattern 113 is formed of a low-resistance conductive material. The material of each conductive pattern 113 is arbitrary, and examples thereof include copper alone, copper alloy, and aluminum.

[0031] The semiconductor chip 12 is a power semiconductor element provided on the mounting substrate 11. Specifically, the semiconductor chip 12 is bonded to the conductive pattern 113 by a bonding member 151 such as solder or sintered material. The semiconductor chip 12 functions as a switching element capable of switching on / off of current. The semiconductor chip 12 of the first embodiment is, for example, an IGBT (Insulated Gate Bipolar Transistor).

[0032] The semiconductor chip 12 includes a first electrode 121, a second electrode 122, and a control electrode (not shown). The first electrode 121 and the second electrode 122 are main electrodes for inputting or outputting a current as a control object. The first electrode 121 is a collector electrode constituting the lower surface of the semiconductor chip 12, and is electrically connected to the conductive pattern 113. The second electrode 122 is an emitter electrode constituting the upper surface of the semiconductor chip 12. The control electrode is a gate electrode to which a control voltage for controlling the on / off of the semiconductor chip 12 is applied, and together with the second electrode 122, constitutes the upper surface of the semiconductor chip 12.

[0033] The plurality of connection terminals 13 are conductors electrically connected to the semiconductor chip 12. Specifically, each connection terminal 13 is a lead frame for electrically connecting the semiconductor chip 12 to an external device (not shown). Each connection terminal 13 is formed of a conductive material such as copper or a copper alloy. The connection terminal 13a is bonded to the second electrode 122 of the semiconductor chip 12 via a bonding member 152. The connection terminal 13b is bonded to the conductive pattern 113 via a bonding member 153. The bonding members 152 and 153 are conductive materials such as solder or sintered materials.

[0034] The sealing body 14 is an insulating molded body covering the semiconductor chip 12. The sealing body 14 is formed of a hard resin material such as epoxy resin. The sealing body 14 of the first embodiment is a roughly rectangular parallelepiped structure including a top surface 141, a back surface 142 and a side surface 143. The top surface 141 is an upper surface facing the Z2 direction, and the back surface 142 is a lower surface facing the Z1 direction. The side surface 143 is an end surface connecting the top surface 141 and the back surface 142. Each connecting terminal 13 protrudes from the side surface 143 of the sealing body 14. A portion of the front end side of each connecting terminal 13 is bent in the Z2 direction.

[0035] The surface of the metal layer 112 is exposed from the back surface 142 of the sealing body 14 . Figure 1 The first surface F1 is the lower surface of the rectangular shape of the semiconductor module 10 facing the Z1 direction. The first surface F1 is formed by the surface of the metal layer 112 and the back surface 142 of the sealing body 14.

[0036] Figure 1 The cooling unit 20 is a structure for cooling the semiconductor module 10. For example, a heat sink for dissipating heat transferred from the semiconductor module 10 to the surroundings is used as the cooling unit 20. Alternatively, a radiator provided with a plurality of fins or a water cooling jacket provided with a flow path for circulating a refrigerant such as cooling water may be used as the cooling unit 20. Figure 1 The second surface F2 is an upper surface of the cooling unit 20 that has a rectangular shape and faces the Z2 direction.

[0037] The heat conductive layer 30 is a rectangular film body between the semiconductor module 10 and the cooling unit 20. The heat conductive layer 30 is formed in a thin plate, sheet or film shape, for example, and is provided between the semiconductor module 10 and the cooling unit 20. The first surface F1 of the semiconductor module 10 and the second surface F2 of the cooling unit 20 face each other via the heat conductive layer 30. The heat conductive layer 30 functions as an adhesive layer that bonds the first surface F1 and the second surface F2. The film thickness of the heat conductive layer 30 is, for example, an appropriate size of 10 μm or more and 300 μm or less.

[0038] The heat conductive layer 30 is formed of a material with high thermal conductivity. Specifically, the heat conductive layer 30 is formed of a thermosetting resin such as epoxy resin or polyimide resin, or a thermoplastic resin such as olefin. For example, fillers such as silver, aluminum, copper, silicon oxide (SiO2), aluminum oxide (Al2O3), boron nitride, aluminum nitride, and zinc oxide may be dispersed in the heat conductive layer 30. In addition, the heat conductive layer 30 is basically composed of a single layer, but it can also be composed of a plurality of layers formed of different materials.

[0039] In the above structure, heat generated in the semiconductor chip 12 is transferred to the cooling unit 20 via the mounting substrate 11 and the heat conductive layer 30. The heat conductive layer 30 functions as a heat dissipation layer for transferring heat from the semiconductor module 10 to the cooling unit 20.

[0040] Figure 2 2 is a cross-sectional view obtained by enlarging the vicinity of the outer periphery E1 of the semiconductor module 10. Figure 2 The picture shows Figure 1 The area α. Figure 2 As shown in the example, in a plan view, the outer periphery E3 of the heat conductive layer 30 is located between the outer periphery E1 of the semiconductor module 10 and the outer periphery E2 of the cooling unit 20. Specifically, the outer dimensions of the heat conductive layer 30 are larger than the outer dimensions of the first surface F1 of the semiconductor module 10, and the outer periphery E1 of the first surface F1 is located inside the outer periphery E3 of the heat conductive layer 30. In addition, the outer dimensions of the second surface F2 of the cooling unit 20 are larger than the outer dimensions of the heat conductive layer 30, and the outer periphery E2 of the second surface F2 is located outside the outer periphery E3 of the heat conductive layer 30. Figure 2 The outer peripheral portion 31 is a rectangular frame-shaped portion of the heat conductive layer 30 located outside the outer peripheral edge E1 of the semiconductor module 10 in a plan view.

[0041] The protective film 40 is a coating for preventing moisture from penetrating between the semiconductor module 10 and the cooling unit 20. The protective film 40 of the first embodiment covers and seals the portion where the semiconductor module 10 and the cooling unit 20 are joined. Specifically, the protective film 40 covers the boundary B1 between the semiconductor module 10 and the heat transfer layer 30, and the boundary B2 between the cooling unit 20 and the heat transfer layer 30.

[0042] Boundary B1 is a boundary between the semiconductor module 10 and the heat conducting layer 30. Specifically, boundary B1 is a portion where the side surface 143 of the semiconductor module 10 intersects with the upper surface 32 of the heat conducting layer 30. Boundary B2 is a boundary between the cooling unit 20 and the heat conducting layer 30. Specifically, boundary B2 is a portion where the second surface F2 of the cooling unit 20 intersects with the side surface 33 of the heat conducting layer 30.

[0043] The protective film 40 is formed from the side surface 143 of the semiconductor module 10 to the second surface F2 of the cooling unit 20 so as to cover both the boundary B1 and the boundary B2. Therefore, the protective film 40 covers the outer peripheral portion 31 of the heat conductive layer 30. The protective film 40 can also be expressed as a coating for protecting the heat conductive layer 30 or a coating for protecting the bonding between the heat conductive layer 30 and the semiconductor module 10 or the cooling unit 20.

[0044] The protective film 40 is formed of a material having higher water resistance and moisture resistance than the heat conductive layer 30. Specifically, the protective film 40 is formed of a resin material such as a polyurethane resin, a fluororesin, or a polyimide resin. As for the polyurethane resin, it is preferable to use an ether having particularly high water resistance and moisture resistance. Fillers such as silicon oxide (SiO2) or aluminum oxide (Al2O3) may also be dispersed in the resin material of the protective film 40.

[0045] As a result of using the above materials, the water absorption rate of the protective film 40 is lower than that of the thermal conductive layer 30. The water absorption rate is the ratio of the weight of water that an object can absorb to the weight of the object. That is, the protective film 40 is less likely to absorb water than the thermal conductive layer 30.

[0046] like Figure 2 As shown in the example, the film thickness T of the protective film 40 is smaller than the interval δ between the semiconductor module 10 and the cooling unit 20 (T<δ). The film thickness T of the protective film 40 is the average value of the size of the protective film 40 in the direction of the Z axis. The interval δ is the distance between the first surface F1 and the second surface F2. The film thickness of the thermal conductive layer 30 is equal to the interval δ. Therefore, the film thickness T of the protective film 40 is smaller than the film thickness of the thermal conductive layer 30.

[0047] As described above, in the first embodiment, the boundary B1 between the semiconductor module 10 and the heat conductive layer 30 and the boundary B2 between the cooling unit 20 and the heat conductive layer 30 are covered by the protective film 40. Therefore, it is possible to suppress the penetration of moisture between the semiconductor module 10 and the cooling unit 20. For example, as a result of suppressing the penetration of moisture into the boundary B1, the decrease in the bonding strength between the semiconductor module 10 (first surface F1) and the heat conductive layer 30 is suppressed. Similarly, as a result of suppressing the penetration of moisture into the boundary B2, the decrease in the bonding strength between the cooling unit 20 (second surface F2) and the heat conductive layer 30 is suppressed.

[0048] In addition, in the first embodiment, since the water absorption rate of the protective film 40 is lower than the water absorption rate of the heat conductive layer 30, the penetration of moisture into the heat conductive layer 30 is suppressed compared with the structure in which the water absorption rate of the protective film 40 is higher than the water absorption rate of the heat conductive layer 30. That is, it is possible to suppress the penetration of moisture into between the semiconductor module 10 and the cooling unit 20. Therefore, the degradation of the characteristics of the heat conductive layer 30 caused by water absorption is suppressed. For example, the reduction in the insulation of the heat conductive layer 30 caused by water absorption is suppressed. Therefore, the reduction in the insulation withstand voltage of the semiconductor device 100 can be suppressed. In addition, the reduction in heat dissipation caused by water absorption is suppressed. Therefore, the reduction in the heat dissipation performance of the semiconductor device 100 can be suppressed.

[0049] [Method of Manufacturing Semiconductor Device 100]

[0050] Figure 3 1 is an explanatory diagram of the process of manufacturing the semiconductor device 100 illustrated above. Figure 3 As illustrated, the manufacturing process of the semiconductor device 100 includes a bonding step P1 and a protecting step P2 .

[0051] In the bonding step P1, the semiconductor module 10 and the cooling unit 20 are bonded by using the heat conductive layer 30. Specifically, in the bonding step P1, one of the semiconductor module 10 and the cooling unit 20 is pressed toward the other with the heat conductive layer 30 interposed between the semiconductor module 10 and the cooling unit 20. The bonding step P1 is performed in a high temperature environment in which the heat conductive layer 30 is heated. By the heating and pressurization described above, the semiconductor module 10 and the cooling unit 20 are bonded via the heat conductive layer 30.

[0052] After the bonding step P1 is performed, the protection step P2 is performed. In the protection step P2, a protection film 40 covering the boundary B1 and the boundary B2 is formed. In the protection step P2, a liquid material modulated to a low viscosity is applied and the liquid material is solidified, thereby forming the protection film 40. Specifically, the viscosity of the liquid material before solidification used in the protection step P2 is, for example, 3 Pa·s or less. By applying a low-viscosity liquid material and solidifying the liquid material as described above, a uniform protection film 40 can be formed over a wide range.

[0053] When forming the protective film 40 in the protection step P2, for example, spray coating is used in which a liquid resin material is applied by spraying from a spray device and then solidified. In addition, when forming the protective film 40, for example, dispenser coating is used in which a liquid resin material is applied by spraying from a dispenser device and then solidified. The protective film 40 can be formed cheaply and simply by the coating technology exemplified above.

[0054] B: Second Implementation

[0055] In the following embodiments, the same reference numerals as those in the first embodiment are used for elements having the same functions as those in the first embodiment, and detailed descriptions thereof are appropriately omitted.

[0056] Figure 4 2 is a cross-sectional view of a semiconductor device 100 according to the second embodiment. In the second embodiment, the structure of the protection film 40 is different from that of the first embodiment. The structure other than the protection film 40 is the same as that of the first embodiment.

[0057] like Figure 4 As illustrated, the protective film 40 of the second embodiment not only covers the boundary B1 and the boundary B2 as in the first embodiment, but also covers the entire sealing body 14. Specifically, the protective film 40 covers the top surface 141 of the sealing body 14 located on the side opposite to the cooling unit 20, and the side surface 143 of the sealing body 14. The protective film 40 covers the entire area of ​​the top surface 141 and the entire area of ​​the side surface 143.

[0058] The protective film 40 of the second embodiment also covers a portion of each connection terminal 13 (13a, 13b). Specifically, the protective film 40 covers the portion of each connection terminal 13 except the front end portion 131. That is, the protective film 40 is continuous from the side surface 143 of the sealing body 14 to the surface of each connection terminal 13.

[0059] [Method of Manufacturing Semiconductor Device 100]

[0060] Figure 5 This is an explanatory diagram of the protection step P2 in the process of manufacturing the semiconductor device 100 of the second embodiment. After performing the bonding step P1 similar to the first embodiment, Figure 5 Protection process P2.

[0061] In the second embodiment, dip coating is used to form the protective film 40. In the dip coating, a liquid resin material 61 stored in a container 60 is used. The viscosity of the resin material 61 stored in the container 60 is, for example, 3 Pa·s or less.

[0062] Specifically, in the protection step P2, the semiconductor device 100' before the protective film 40 is formed is immersed in the resin material 61 in the container 60 to apply the resin material 61. For example, the semiconductor device 100' is immersed in the resin material 61 while the front end portion 131 of each connection terminal 13 is held. Therefore, the resin material 61 does not adhere to the front end portion 131 of each connection terminal 13. The resin material 61 applied in the above step is cured, thereby forming Figure 4 The protective film 40 is illustrated.

[0063] The same effect as that of the first embodiment can also be achieved in the second embodiment. In the second embodiment, not only the boundary B1 and the boundary B2 are covered by the protective film 40, but also the top surface 141 and the side surface 143 of the sealing body 14 that seals the semiconductor chip 12 are covered by the protective film 40. Therefore, it is possible to more effectively suppress the penetration of moisture between the semiconductor module 10 and the cooling unit 20. In addition, in the second embodiment, since the protective film 40 is formed by dip coating, the protective film 40 can be formed cheaply and simply as in the first embodiment in which the protective film 40 is formed by spray coating or dispensing machine coating.

[0064] C: Third embodiment

[0065] Figure 6 This is an enlarged cross-sectional view of the semiconductor module 10 in the semiconductor device 100 of the third embodiment near the outer periphery E1. In the third embodiment, the structure of the heat conduction layer 30 and the protective film 40 is different from that of the first embodiment. The structure other than the heat conduction layer 30 and the protective film 40 is the same as that of the first embodiment.

[0066] In the first embodiment, the outer periphery E3 of the heat conducting layer 30 is located outside the outer periphery E1 of the semiconductor module 10. Figure 6 As illustrated, the outer periphery E3 of the heat transfer layer 30 is located inside the outer periphery E1 of the semiconductor module 10. That is, the heat transfer layer 30 of the third embodiment does not include the outer periphery 31 of the first embodiment.

[0067] like Figure 6 As shown in the example, the boundary B1 between the semiconductor module 10 and the heat-conducting layer 30 is a portion where the first surface F1 of the semiconductor module 10 intersects the side surface 33 of the heat-conducting layer 30. As in the first embodiment, the boundary B2 between the cooling unit 20 and the heat-conducting layer 30 is a portion where the second surface F2 of the cooling unit 20 intersects the side surface 33 of the heat-conducting layer 30.

[0068] The protective film 40 of the third embodiment covers the boundary B1 and the boundary B2 described above. Figure 6 As shown in the example, the protective film 40 is formed across the first surface F1 of the semiconductor module 10, the side surface 33 of the heat conductive layer 30, and the second surface F2 of the cooling unit 20. That is, the protective film 40 of the third embodiment enters the recessed portion located outside the heat conductive layer 30 between the first surface F1 and the second surface F2.

[0069] The structure in which the water absorption rate of the protective film 40 is lower than the water absorption rate of the heat conductive layer 30 and the structure in which the film thickness T of the protective film 40 is smaller than the interval δ between the semiconductor module 10 and the cooling unit 20 are the same as those in the first embodiment. In addition, the manufacturing method of the semiconductor device 100 of the third embodiment is the same as that of the first embodiment. In addition, the semiconductor device 100 of the third embodiment can also be manufactured by the manufacturing method illustrated in the second embodiment. In the third embodiment, the same effects as those of the first embodiment can also be achieved.

[0070] Furthermore, in comparison with the third embodiment described above, in the first embodiment, the outer periphery 31 of the heat conductive layer 30 is located outside the outer periphery E1 of the semiconductor module 10, and the protective film 40 covers the outer periphery 31 of the heat conductive layer 30. Therefore, compared with the third embodiment in which the outer periphery E3 of the heat conductive layer 30 is located inside the outer periphery E1 of the semiconductor module 10, there is an advantage that moisture can be more effectively suppressed from penetrating between the semiconductor module 10 and the cooling unit 20.

[0071] D: Deformation

[0072] Specific variations of the above-described embodiments are exemplified below. Two or more embodiments arbitrarily selected from the following embodiments may be appropriately combined within a range that does not conflict.

[0073] (1) In the above-mentioned embodiments, the protective film 40 is exemplified as a single layer, but the protective film 40 may be composed of a plurality of layers formed of different materials. In addition, in the above-mentioned embodiments, the protective film 40 is exemplified as a resin material, but the material of the protective film 40 is not limited to the above examples. For example, it may be formed of an insulating inorganic material.

[0074] (2) The structure of the semiconductor module 10 is not limited to the examples in the above-mentioned embodiments. For example, the number or arrangement of the semiconductor chips 12, the number or arrangement of the conductive patterns 113, and the number or arrangement of the connection terminals 13 may be arbitrarily changed relative to the examples in the above-mentioned embodiments. The semiconductor module 10 is generally represented as an element including the semiconductor chip 12.

[0075] (3) In each of the above-mentioned embodiments, an embodiment in which the film thickness T of the protective film 40 is smaller than the interval δ between the semiconductor module 10 and the cooling unit 20 is exemplified, but the relationship between the film thickness T and the interval δ is not limited to the above-mentioned embodiment. For example, an embodiment in which the film thickness T of the protective film 40 is equal to the interval δ (T=δ), or an embodiment in which the film thickness T of the protective film 40 is greater than the interval δ (T>δ) can also be conceived. Similarly, an embodiment in which the film thickness T of the protective film 40 is equal to the film thickness of the heat conductive layer 30, or an embodiment in which the film thickness T is greater than the film thickness can also be conceived.

[0076] (4) In the above-mentioned embodiments, the heat conductive layer 30 formed in a thin plate, sheet or film shape is provided between the semiconductor module 10 and the cooling unit 20, but the form of the heat conductive layer 30 is not limited to the above-mentioned examples. For example, the heat conductive layer 30 may be formed by curing a liquid resin material applied between the semiconductor module 10 and the cooling unit 20.

[0077] (5) The method of manufacturing the protective film 40 is not limited to the methods exemplified in the above-mentioned embodiments. For example, when forming the protective film 40 in the protection step P2, spin coating may be used to apply a liquid resin material over a large area by rotating the semiconductor device 100' before forming the protective film 40.

[0078] (6) In the above-mentioned embodiments, the mounting substrate 11 is constituted by laminating the insulating substrate 111, the metal layer 112, and the conductive pattern 113, but the structure of the mounting substrate 11 is not limited to the above-mentioned embodiment. Figure 7 As illustrated, the mounting substrate 11 may be constituted only by the conductive pattern 114 . The surface of the conductive pattern 114 is exposed from the back surface 142 of the sealing body 14 . Figure 7 The first surface F1 is constituted by the surface of the conductive pattern 114 and the back surface 142 of the sealing body 14 . Figure 7The mounting substrate 11 (conductive pattern 114) is formed of a conductive material such as copper, copper alloy, aluminum, or aluminum alloy.

[0079] In such Figure 7 In the embodiment where the mounting substrate 11 does not have insulating properties as in the example of FIG. 1 , the heat conducting layer 30 is formed of an insulating material. Specifically, Figure 7 The heat conductive layer 30 is formed of, for example, a thermosetting resin such as epoxy resin or polyimide resin, or a thermoplastic resin such as olefin. For example, fillers such as silicon oxide (SiO2), aluminum oxide (Al2O3), boron nitride, aluminum nitride, and zinc oxide may be dispersed in the heat conductive layer 30. In addition, the heat conductive layer 30 is basically composed of a single layer, but may also be composed of a plurality of layers formed of different materials.

[0080] In addition, Figure 7 In the figure, for convenience, one conductive pattern 114 is shown as the mounting substrate 11 . However, in a mode in which a plurality of semiconductor chips 12 are provided, for example, the mounting substrate 11 may be composed of a plurality of conductive patterns 114 .

[0081] (7) In each of the above-mentioned methods, an IGBT is exemplified as the semiconductor chip 12, but the structure and type of the semiconductor chip 12 are not limited to the above examples. For example, an RC-IGBT (Reverse Conducting IGBT) including an IBGT and a FWD (Free Wheeling Diode) can also be used as the semiconductor chip 12. In addition, a MOSFET whose semiconductor layer is formed by silicon (Si) or silicon carbide (SiC) can also be used as the semiconductor chip 12. In the method in which the semiconductor chip 12 is a MOSFET, the first electrode 121 is a drain electrode and the second electrode 122 is a source electrode. In addition, the semiconductor chip 12 is not limited to a transistor. A diode such as an SBD (Schottky Barrier Diode) can also be used as the semiconductor chip 12.

[0082] E: Notes

[0083] According to the above-exemplified embodiment, for example, the following configurations can be understood.

[0084] A semiconductor device involved in one method (method 1) of the present disclosure comprises: a semiconductor module, which includes a semiconductor chip; a cooling unit, which cools the semiconductor module; a heat-conducting layer, which is interposed between the semiconductor module and the cooling unit; and a protective film, which covers the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer, wherein the water absorption rate of the protective film is lower than the water absorption rate of the heat-conducting layer. In the above method, the protective film is used to cover the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer. Therefore, it is possible to suppress the penetration of moisture into the space between the semiconductor module and the cooling unit. Since the water absorption rate of the protective film is lower than the water absorption rate of the heat-conducting layer, compared with a structure in which the water absorption rate of the protective film is higher than the water absorption rate of the heat-conducting layer, it is possible to significantly suppress the penetration of moisture into the space between the semiconductor module and the cooling unit.

[0085] Another embodiment (embodiment 2) of the present disclosure involves a semiconductor device comprising: a semiconductor module including a semiconductor chip; a cooling unit that cools the semiconductor module; a heat-conducting layer between the semiconductor module and the cooling unit; and a protective film that covers the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer, wherein the film thickness of the protective film is smaller than the interval between the semiconductor module and the cooling unit. In the above embodiment, the protective film is used to cover the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer. Therefore, it is possible to suppress the penetration of moisture between the semiconductor module and the cooling unit.

[0086] In a specific example of mode 2 (mode 3), the water absorption rate of the protective film is lower than the water absorption rate of the thermal conductive layer. In the above mode, since the water absorption rate of the protective film is lower than the water absorption rate of the thermal conductive layer, compared with a structure in which the water absorption rate of the protective film is higher than the water absorption rate of the thermal conductive layer, the effect of suppressing the penetration of water between the semiconductor module and the cooling unit is significant.

[0087] In a specific example (method 4) of any one of the methods 1 to 3, the heat conductive layer includes an outer peripheral portion located outside the outer peripheral edge of the semiconductor module when viewed from above, and the protective film covers the outer peripheral portion. In the above method, the outer peripheral portion of the heat conductive layer is located outside the outer peripheral edge of the semiconductor module, and the protective film covers the outer peripheral portion. Therefore, compared with a structure in which the outer peripheral edge of the heat conductive layer is located inside the outer peripheral edge of the semiconductor module, it is possible to more effectively suppress moisture from penetrating between the semiconductor module and the cooling unit.

[0088] In a specific example of any one of the methods 1 to 4 (method 5), the semiconductor module further includes: a sealing body that seals the semiconductor chip; and a connecting terminal that is electrically connected to the semiconductor chip and protrudes from the sealing body, and the protective film covers the surface of the sealing body on the side opposite to the cooling unit and the side of the sealing body. In the above method, not only the boundaries of the semiconductor module and the cooling unit with the heat conductive layer are covered by the protective film, but also the surface and side of the sealing body that seals the semiconductor chip are covered by the protective film. Therefore, it is possible to more effectively suppress the penetration of moisture between the semiconductor module and the cooling unit. In addition, by immersing the semiconductor module in a liquid resin material, a protective film can be formed cheaply and easily.

[0089] In a specific example (aspect 6) of any one of aspects 1 to 5, the protective film is formed of a polyurethane resin, a fluororesin, or a polyimide resin. As the polyurethane resin, an ether having particularly high water resistance and moisture resistance is preferred.

[0090] The manufacturing method involved in one method (method 7) of the present disclosure includes the following steps: a bonding step, in which a semiconductor module including a semiconductor chip and a cooling unit for cooling the semiconductor module are bonded using a heat-conducting layer interposed between the semiconductor module and the cooling unit; and a protection step, performed after the bonding step, for forming a protective film that covers the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer. In the above method, the boundary between the semiconductor module and the heat-conducting layer, and the boundary between the cooling unit and the heat-conducting layer are covered with a protective film. Therefore, it is possible to suppress moisture from penetrating between the semiconductor module and the cooling unit.

[0091] In a specific example of mode 7 (mode 8), in the protection step, the protection film is formed by spraying, dipping, dispensing or spin coating. In the above modes, the protection film can be formed by a cheap and simple coating technique such as spraying, dipping, dispensing or spin coating.

[0092] In a specific example of mode 7 or mode 8 (mode 9), in the protection step, a liquid material having a viscosity of 3 Pa·s or less is applied and the liquid material is solidified, thereby forming the protection film. In the above mode, a uniform protection film can be formed over a wide range by applying a liquid material having a viscosity of 3 Pa·s or less and solidifying the liquid material.

[0093] Description of Reference Numerals

[0094] 100: semiconductor device; 10: semiconductor module; 11: mounting substrate; 111: insulating substrate; 112: metal layer; 113, 114: conductive pattern; 12: semiconductor chip; 121: first electrode; 122: second electrode; 13 (13a, 13b): connecting terminal; 14: sealing body; 141: top surface; 142: back surface; 143: side surface; 151, 152, 153: bonding member; 20: cooling part; 30: heat conductive layer; 31: peripheral part; 32: upper surface; 33: side surface; 40: protective film; F1: first surface; F2: second surface; B1, B2: boundary.

Claims

1. A semiconductor device comprising: A semiconductor module comprising a semiconductor chip; a cooling unit for cooling the semiconductor module; a heat-conducting layer disposed between the semiconductor module and the cooling unit; and a protective film covering a boundary between the semiconductor module and the heat conducting layer and a boundary between the cooling unit and the heat conducting layer, in, The water absorption rate of the protective film is lower than the water absorption rate of the heat conductive layer.

2. A semiconductor device comprising: A semiconductor module comprising a semiconductor chip; a cooling unit for cooling the semiconductor module; a heat-conducting layer disposed between the semiconductor module and the cooling unit; and a protective film covering a boundary between the semiconductor module and the heat conducting layer and a boundary between the cooling unit and the heat conducting layer, in, The protective film has a thickness smaller than a distance between the semiconductor module and the cooling unit.

3. The semiconductor device according to claim 2, wherein: The water absorption rate of the protective film is lower than the water absorption rate of the heat conductive layer.

4. The semiconductor device according to any one of claims 1 to 3, wherein: The heat conductive layer includes an outer peripheral portion located outside the outer peripheral edge of the semiconductor module in a plan view. The protective film covers the outer peripheral portion.

5. The semiconductor device according to claim 1 or 2, wherein: The semiconductor module further comprises: a sealing body for sealing the semiconductor chip; and a connection terminal electrically connected to the semiconductor chip and protruding from the sealing body, The protective film covers a surface of the sealing body on a side opposite to the cooling portion and a side surface of the sealing body.

6. The semiconductor device according to claim 1 or 2, wherein: The protective film is formed of a polyurethane resin, a fluororesin, or a polyimide resin.

7. A method for manufacturing a semiconductor device, comprising the following steps: a bonding step of bonding a semiconductor module including a semiconductor chip and a cooling unit for cooling the semiconductor module by using a heat conductive layer interposed between the semiconductor module and the cooling unit; and The protection step is performed after the bonding step and is for forming a protection film that covers a boundary between the semiconductor module and the heat transfer layer and a boundary between the cooling unit and the heat transfer layer.

8. The method for manufacturing a semiconductor device according to claim 7, wherein: In the protection step, the protection film is formed by spray coating, dip coating, dispenser coating or spin coating.

9. The method for manufacturing a semiconductor device according to claim 7 or 8, wherein: In the protection step, a liquid material having a viscosity of 3 Pa·s or less is applied and then cured to form the protection film.

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