Packaging heat dissipation structure for 3D chip and design method

Abstract

The invention relates to the technical field of chip packaging, and particularly discloses a packaging heat dissipation structure facing a 3D chip and a design method, the packaging heat dissipation structure comprises a chip cover plate provided with a shell side heat dissipation flow channel and a shell side flow dividing and converging structure, and a chip substrate matched with the chip cover plate for use and connected with the chip cover plate; the sides, close to each other, of the chip cover plate and the chip substrate form an installation cavity used for installing a chip. Plate side heat dissipation structures which are used in cooperation with the shell side branch and confluence structures and connected with the shell side branch and confluence structures are integrated in the chip substrate. The invention further discloses a design method. According to the invention, the shell-side liquid cooling channel is directly designed in the chip cover plate to shorten the heat transfer path, the plate-side heat dissipation structure adopts a reinforced heat dissipation scheme, and the heat consumption is finally taken away by the cooling liquid on the side of the chip cover plate, so that the plate-side heat dissipation capability and the chip temperature uniformity are greatly improved, and the heat dissipation efficiency is improved. The problem of plate side heat dissipation of the 3D stacked chip and the problem of chip failure possibly caused by thermal stress can be effectively solved.

Description

Technical Field

[0001] The present invention relates to the field of chip packaging technology, and more specifically, to a packaging heat dissipation structure and a design method for a 3D chip. Background Art

[0002] At present, the heat dissipation paths of system-level SiP chips are divided into two sides: the shell side and the board side: the existing chip thermal design is mainly completed with the help of the shell side, the chip heat is transferred to the metal chip cover through the first interface material, and then to the heat dissipation fins through the second interface material, and finally to the environment through air cooling or liquid cooling; the board side refers to the chip heat first transferred to the PCB chip substrate, and then transferred to the environment by the PCB chip substrate. Since the thermal conductivity of the chip substrate is much lower than that of the metal chip cover, the thermal resistance of the board side heat dissipation path is large, and the heat dissipation capacity of the board side is limited under the traditional packaging structure. With the widespread application of 3D integration technology (such as TSV, silicon-free interconnection, RDL and other packaging technologies) in the SiP field, chip stacking has become a conventional design. The heat dissipation problem of the chip close to the board side away from the metal chip cover and the problem of chip failure caused by excessive thermal stress have become the biggest risk sources restricting the improvement of chip reliability.

[0003] Existing system-level chip packaging and thermal management solutions are difficult to support the above requirements:

[0004] Patent CN111180899A discloses a microsystem-based lightweight, high-density integrated antenna array architecture, which uses high-temperature co-fired ceramic HTCC with good thermal conductivity as the packaging chip substrate (thermal conductivity is about 18-25W / (m·K)). The chip heat is conducted to the metal chip cover through the chip substrate and finally dissipated by the heat sink fins. This solution only improves the thermal conductivity of the chip substrate, and the overall enhanced heat dissipation effect is limited.

[0005] Patent CN115172305A proposes a SiP integrated heat dissipation structure with an integrated liquid cooling plate. The liquid cooling plate is connected to the motherboard by welding, which effectively improves the heat dissipation effect. However, the heat dissipation structure has problems such as reduced integration and leakage risk caused by liquid cooling. Before it can be put into practical application, many problems need to be fully considered, such as the overall liquid circuit design of the system and the connection with the macro liquid circuit.

[0006] Patent CN109860131A proposes a system-level packaging structure with an internal heat dissipation device, which only strengthens the heat dissipation on the shell side by optimizing the metal chip cover boss, and the strengthening effect is very limited.

[0007] Patent CN115295513A proposes a chip heat dissipation structure with an integrated thermoelectric cooler. The cold end of the thermoelectric cooler is connected to the top of the chip to absorb heat, and the hot end is connected to the metal chip cover to dissipate heat. This solution concentrates the heat dissipation enhancement solution on the shell side, and does not sufficiently improve the heat dissipation performance of the 3D chip and board side.

[0008] The above solutions cannot meet the thermal management and thermal stress reliability requirements of the system-level chip. Summary of the invention

[0009] The technical problem to be solved by the present invention is to provide a packaging heat dissipation structure and design method for 3D chips;

[0010] The solution adopted by the present invention to solve the technical problem is:

[0011] A packaging heat dissipation structure for 3D chips, comprising a chip cover plate provided with a shell-side heat dissipation channel and a shell-side branching and converging structure, and a chip substrate used in conjunction with the chip cover plate and connected to each other; the chip cover plate and the chip substrate are close to each other to form a mounting cavity for mounting the chip;

[0012] A plate-side heat dissipation structure that cooperates with the shell-side branch and convergence structure and is interconnected is integrated in the chip substrate.

[0013] In some possible implementations,

[0014] An interface material is arranged at the bottom of the chip cover and at a position corresponding to the mounting cavity. The chip is mounted in the mounting cavity and is located on a side of the interface material away from the chip substrate. A sealing layer made of epoxy material or metal material is covered on the outside of the chip.

[0015] In some possible implementations,

[0016] The interface material has a thermal conductivity of 1 to 10 W / mK, a Young's modulus of 1 to 10 GPa, and a contact angle with the chip material of less than 60°.

[0017] In some possible implementations,

[0018] The shell-side flow dividing and converging structure comprises a shell-side flow dividing structure and a shell-side flow converging structure located on both sides of the shell-side heat dissipation channel and connected to each other;

[0019] The shell-side shunt structure and the shell-side shunt structure are respectively connected to two ends of the plate-side heat dissipation structure through heat-conducting joints.

[0020] In some possible implementations,

[0021] The plate-side heat dissipation structure is any one or more of a micro-channel, a heat pipe, a combination of multiple heat pipes, and a special-shaped heat spreader.

[0022] In some possible implementations,

[0023] When a special-shaped vapor chamber is used as the plate-side heat dissipation structure, the evaporation side and the condensation side of the special-shaped vapor chamber are arranged on the same side and on the side close to the chip cover plate.

[0024] In some possible implementations,

[0025] When the board-side heat dissipation structure is any one of a heat pipe, a combination of multiple heat pipes, and a special-shaped heat sink, the thermal conductive joint is a columnar thermal conductive structure;

[0026] When the heat dissipation structure on the board side is a micro-channel, the thermal conductive joint is a liquid cooling joint.

[0027] In some possible implementations,

[0028] The chip substrate is any one or more of an organic chip substrate, a ceramic chip substrate, and a metal chip substrate.

[0029] In some possible implementations,

[0030] A coolant inlet and a coolant outlet are provided on the chip cover plate, wherein the coolant inlet is communicated with the shell side shunt structure and one end of the shell side heat dissipation channel respectively, and the coolant outlet is communicated with the shell side shunt structure and the shell side heat dissipation channel.

[0031] The design method of the packaging heat dissipation structure for 3D chips described above specifically comprises the following steps:

[0032] Step S1: Obtain the total heat consumption and local heat flux density values ​​of the chip;

[0033] Step S2: setting the flow rate range, the upper temperature limit of the chip and the upper pressure drop limit;

[0034] Step S3: determining the required flow rate of the coolant according to the total heat consumption, and determining the equivalent hydraulic diameter of the shell-side heat dissipation channel according to the flow rate range;

[0035] Step S4: Optimizing the heat dissipation structure on the board side according to the local heat flux density value;

[0036] Step S5: Model and use simulation methods to simulate actual heat dissipation and flow conditions, and check whether the maximum chip temperature and system flow resistance meet the permitted upper limit requirements.

[0037] In some possible implementations,

[0038] When the local heat flux density is lower than Q, select any one of the heat pipes, multi-heat pipe combination, and special-shaped heat sink as the board-side heat dissipation structure according to the distribution of the chips;

[0039] Among them, for the local small-area projection single chip, a heat pipe is used as the board-side heat dissipation structure;

[0040] For large-area multi-chip projection, a multi-heat pipe combination or a special-shaped heat spreader is used as the board-side heat dissipation structure;

[0041] When the local heat flux exceeds Q, use any one of micro-channels, micro-channels and heat pipes, micro-channels and multiple heat pipes, and micro-channels and special-shaped heat sinks.

[0042] When 0<b≤0.5mm, Q=10W / cm 2 ;

[0043] When 0.5<b≤1.0, Q=20W / cm 2 ;

[0044] When b>1.0, Q=50W / cm 2 ;

[0045] b is the available thickness of the board-side heat dissipation structure.

[0046] Compared with the prior art, the present invention has the following beneficial effects:

[0047] In the present invention, the shell-side liquid cooling channel (shell-side heat dissipation channel and shell-side branch and convergence structure) is directly designed in the chip cover plate to shorten the heat transfer path. Secondly, the plate-side heat dissipation structure adopts an enhanced heat dissipation solution, and the heat consumption is finally taken away by the coolant on the chip cover plate side, which greatly improves the plate-side heat dissipation capacity and chip temperature uniformity, and can effectively solve the plate-side heat dissipation problem of 3D stacked chips and the chip failure problem that may be caused by thermal stress;

[0048] The present invention flexibly selects a heat dissipation solution and designs a heat dissipation structure according to the actual heat dissipation requirements of the chip and the available cooling resources, thereby optimizing the package heat dissipation structure suitable for a specific chip and effectively guiding engineering design. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1 It is a structural schematic diagram of the present invention;

[0050] Figure 2 The following is a flowchart of the design method of the present invention;

[0051] Figure 3 It is another structural schematic diagram of the present invention;

[0052] Figure 4 This is a schematic diagram of the structure of Example 1 of the present invention;

[0053] Figure 5 It is a schematic diagram of the structure of the special-shaped vapor chamber in the present invention;

[0054] Among them: 1-chip cover plate, 2-shell side heat dissipation channel, 3-shell side flow distribution and convergence structure, 31-shell side flow distribution structure, 32-shell side flow convergence structure, 4-interface material, 5-sealing layer, 6-chip, 7-bonding wire, 8-chip substrate, 9-board side heat dissipation structure, 91-first condensation side, 92-second condensation side, 93-evaporation side, 10-first thermal conductive joint, 11-second thermal conductive joint. DETAILED DESCRIPTION

[0055] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral body; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. The "first", "second" and similar words mentioned in this application do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, "one" or "one" and other similar words do not indicate a quantity restriction, but indicate the existence of at least one. In the implementation of this application, "and / or" describes the association relationship of the associated objects, indicating that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In the description of the embodiments of the present application, unless otherwise specified, the meaning of "multiple" refers to two or more. For example, multiple positioning columns refer to two or more positioning columns. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0056] The present invention is described in detail below.

[0057] like Figure 1-Figure 5 As shown:

[0058] A packaging heat dissipation structure for 3D chips, comprising a chip cover plate 1 provided with a shell-side heat dissipation channel 2 and a shell-side branch-flow structure 3, and a chip substrate 8 used in conjunction with the chip cover plate 1 and connected to each other; the chip cover plate 1 and the chip substrate 8 are close to each other to form a mounting cavity for mounting a chip 6; the shell-side heat dissipation channel 2 and the shell-side branch-flow structure 3 contain coolant, and heat dissipation is achieved through the coolant;

[0059] A board-side heat dissipation structure 9 that cooperates with the shell-side branch and convergence structure 3 and is interconnected is integrated in the chip substrate 8 .

[0060] The shell side heat dissipation channel 2 and the shell side branch flow structure 3 are arranged on the chip cover plate 1, which effectively shortens the heat transfer path; the shell side branch flow structure 3 and the plate side heat dissipation structure 9 ensure that the heat loss on the chip substrate 8 side will also be taken away by the coolant on the chip cover plate 1 side.

[0061] During operation, the chip 6 in the mounting cavity generates heat consumption, wherein the heat consumption generated on the shell side (chip cover plate 1 side) is taken away by the cooperation of the shell side heat dissipation channel 2 and the coolant; the heat consumption on the board side (chip substrate 8 side) is transported to the shell side branch and confluence structure 3 through the board side heat dissipation structure 9, and is taken away by the cooperation of the shell side branch and confluence structure 3 and the coolant, thereby achieving heat dissipation;

[0062] The present invention is different from the traditional chip 6 heat dissipation solution that the shell side heat loss to the chip cover plate 1 still needs to be transferred to the heat sink through the second interface material 4, and the shell side and board side independent heat dissipation path solution; in the present invention, the shell side heat dissipation structure is directly designed in the chip cover plate 1, and no external heat sink is required, which greatly shortens the heat transfer path. Secondly, the board side heat dissipation structure 9 serves as an enhanced heat dissipation solution, and the heat loss is finally taken away by the coolant in the chip cover plate 1, which greatly improves the board side heat dissipation capacity and the temperature uniformity of the chip 6, and can effectively solve the board side heat dissipation problem of the 3D stacked chip 6 and the chip 6 failure problem caused by thermal stress.

[0063] It should be noted that:

[0064] The chip cover plate 1 is connected to the chip substrate 8 by bonding, welding and screw connection; the chip cover plate 1 is made of Cu1100 or aluminum alloy, which mainly plays the role of enhancing heat transfer and improving temperature uniformity. In addition, the metal material is convenient for processing the flow channel structure and is suitable for various installation methods such as bonding, welding and screw connection.

[0065] The shell-side heat dissipation channel 2 is obtained by machining on the basis of the chip cover plate 1, and is sealed by brazing, electron beam welding or diffusion welding. As a liquid cooling main channel, it plays the role of heat dissipation on the shell side and ultimately takes away the heat loss of the chip 6. Usually, the heat flux density requirement for the shell-side heat dissipation channel 2 is relatively low, and a flat straight-through channel or a finned channel with a larger equivalent hydraulic diameter can be used as the shell-side heat dissipation channel 2, thereby reducing the structural complexity and further reducing the processing difficulty.

[0066] In some possible implementations,

[0067] An interface material 4 is provided at the bottom of the chip cover plate 1 and at a position corresponding to the mounting cavity. A chip 6 is mounted in the mounting cavity and is located on a side of the interface material 4 away from the chip substrate 8. A sealing layer 5 made of epoxy material or metal material is covered on the outer side of the chip 6.

[0068] The design of the interface material 4 will effectively reduce the effect of contact thermal resistance, which can effectively reduce the interface temperature difference, thereby reducing the operating temperature of the chip 6;

[0069] In addition to having a thermal conductivity that meets the requirements, the interface material 4 must also have good wettability to the chip 6 and the chip cover 1, appropriate modulus and elongation, no or only a small amount of volatile substances, good thermal stability and reliability. The above characteristics will help the interface material 4 to play a role in reducing the contact thermal resistance while avoiding failure of the chip 6 due to excessive thermal stress, aging, etc., and can be specifically adapted according to the use;

[0070] In principle, the selection of interface material related parameters should fully consider the matching characteristics of the contact material;

[0071] Specifically, the thermal conductivity of the interface material is 1 to 10 W / mK, the Young's modulus is 1 to 10 GPa, and the contact angle with the chip material is less than 60°;

[0072] The sealing layer 5 is used to seal the chip 6 mounted on the chip substrate 8, effectively improving the air tightness and isolating the external moisture;

[0073] The sealing layer 5 can be made of epoxy material or metal material; wherein the epoxy material is advantageous for thinning according to the packaging thickness requirement after sealing, thereby reducing the conduction thermal resistance;

[0074] Furthermore, when selecting the sealing layer 5, the thermal expansion coefficient matching with the contact material should be considered.

[0075] Preferably, when the sealing layer 5 is made of metal material, any one of indium and molybdenum can be selected, which helps to improve the heat transfer performance;

[0076] During operation, the shell-side heat consumption in the heat consumption is first transferred to the sealing layer 5 through the chip 6, then transferred to the chip cover plate 1 through the interface material 4, and finally transferred to the coolant in the shell-side heat dissipation channel 2 through convection heat transfer;

[0077] In some possible implementations,

[0078] The shell-side flow dividing and converging structure 3 includes a shell-side flow dividing structure 31 and a shell-side flow converging structure 32 located on both sides of the shell-side heat dissipation channel 2 and connected to each other;

[0079] The shell-side shunt structure 31 and the shell-side shunt structure 31 are respectively connected to two ends of the plate-side heat dissipation structure 9 through heat-conducting joints.

[0080] During operation, the heat consumption on the board side is first transferred to the chip substrate 8 through the chip 6, and then transferred to the heat conducting joint through the board side heat dissipation structure 9, and then combined with the coolant in the shell side branch and confluence structure 3 to achieve heat dissipation;

[0081] In some possible implementations,

[0082] The plate-side heat dissipation structure 9 is any one or more of a micro-channel, a heat pipe, a combination of multiple heat pipes, and a special-shaped heat spreader.

[0083] Further, the heat-conducting joint includes a first heat-conducting joint 10 connected to the shell-side flow-dividing structure 31 and a second heat-conducting joint 11 connected to the shell-side flow-collecting structure 32;

[0084] When the plate-side heat dissipation structure 9 is a micro-channel, the plate-side heat loss is first transferred from the chip 6 to the chip substrate 8, and then to the coolant in the micro-channel through convection heat transfer. The coolant in the micro-channel flows in from the shell-side shunt structure 31 of the chip cover plate 1 through the first thermal conductive joint 10 connected to the shell-side shunt structure 31, flows through the micro-channel, and then flows out to the shell-side merging structure 32 through the second thermal conductive joint 11 connected to the shell-side merging structure 32, completing the heat dissipation process.

[0085] When the plate-side heat dissipation structure 9 is any one of a heat pipe, a combination of multiple heat pipes, and a special-shaped heat sink, the thermal conductive joint is a columnar thermal conductive structure;

[0086] When the plate-side heat dissipation structure 9 is a micro-channel, the heat-conducting joint is a liquid-cooling joint;

[0087] Furthermore, the columnar heat-conducting structure is a copper column, which is easy to integrate with the chip substrate 8 and can quickly conduct heat loss to the shell side.

[0088] When the plate-side heat dissipation structure 9 is any one of a heat pipe, a combination of multiple heat pipes, and a special-shaped heat spreader, the plate-side heat loss is first transferred to the chip substrate 8, and then transferred to the heat pipe or the combination of multiple heat pipes or the special-shaped heat spreader through the chip substrate 8, and then transferred to the shell-side converging structure 32 and the shell-side shunt structure 31 through the columnar heat-conducting structure. At this time, the shell-side converging structure 32 and the shell-side shunt structure 31 both act as cold ends to dissipate the plate-side heat dissipation structure 9 through the columnar heat-conducting structure, and transfer the heat loss to the coolant in the shell-side converging structure 32 and the shell-side shunt structure 31;

[0089] In some possible implementations,

[0090] When a special-shaped vapor chamber is used as the plate-side heat dissipation structure 9 , the evaporation side 93 of the special-shaped vapor chamber is arranged on the same side as the condensation side and is arranged on a side close to the chip cover plate 1 .

[0091] This arrangement can effectively adapt to the structural form in which the chip 6 and the shell-side heat dissipation channel 2 are both located above the special-shaped heat spreader. The arrangement of the evaporation side 93 and the condensation side on the same side helps to reduce the thickness of the heat spreader, thereby facilitating the integration of the chip substrate 8; Figure 5 As shown, the condensation side includes a first condensation side 91 and a second condensation side 92 that are symmetrically arranged;

[0092] In addition, the evaporation side 93 and the condensation side of the special-shaped heat spreader are respectively placed at the projection position directly below or adjacent to the chip 6 and the columnar heat-conducting structure to shorten the heat dissipation path.

[0093] The chip substrate 8 is any one of an organic substrate, a ceramic substrate, and a metal substrate;

[0094] Furthermore, considering the board-side heat dissipation structure 9 and the processing technology, the chip substrate 8 can be any one of HTCC, LTCC and glass substrate.

[0095] In some possible implementations,

[0096] A coolant inlet and a coolant outlet are provided on the chip cover plate 1 , wherein the coolant inlet is respectively connected to the shell side shunt structure 31 and one end of the shell side heat dissipation channel 2 , and the coolant outlet is connected to the shell side shunt structure 31 and the shell side heat dissipation channel 2 .

[0097] The chip 6 described in the present invention is connected to the chip substrate 8 via a bonding wire 7 and can be any one of a stacked chip 6 and a high-power chip 6;

[0098] The design method of the package heat dissipation structure for the 3D chip 6 mentioned above flexibly selects the heat dissipation scheme and designs the heat dissipation structure according to the actual heat dissipation requirements of the chip 6 and the available cooling resources, and then optimizes the package heat dissipation structure suitable for the specific chip 6 to meet the use requirements and improve the reliability; specifically, the following steps are included:

[0099] Step S1: Obtain the total heat consumption and local heat flux density values ​​of chip 6;

[0100] Step S2: setting the flow rate range, the upper temperature limit and the upper pressure drop limit of the chip 6;

[0101] Step S3: determining the required flow rate of the coolant according to the total heat consumption, and determining the equivalent hydraulic diameter of the shell-side heat dissipation channel 2 according to the flow rate range; when the equivalent hydraulic diameter is not required or the equivalent hydraulic diameter is very small, no fins may be designed, and a plane straight-through channel may be used;

[0102] Step S4: Optimizing the board side heat dissipation structure 9 according to the local heat flux density value;

[0103] The step S4 specifically refers to: when the local heat flux density is lower than Q, according to the distribution of the chip 6, any one of a heat pipe, a combination of multiple heat pipes, and a special-shaped heat sink is selected as the board-side heat dissipation structure 9;

[0104] Wherein, for the heat dissipation of a single chip 6 projected in a local small area, a heat pipe is used as the board side heat dissipation structure 9, and for the heat dissipation of multiple chips 6 projected in a large area, a combination of multiple heat pipes or a special-shaped heat spreader is used as the board side heat dissipation structure 9;

[0105] When the local heat flux density exceeds Q, the board side heat dissipation structure 9 adopts any one of micro-channels, micro-channels and heat pipes, micro-channels and multiple heat pipes, micro-channels and special-shaped heat sinks. This setting is suitable for heat dissipation of high-power, large-area, multi-projection chips 6;

[0106] When any one of a micro-channel and a heat pipe, a micro-channel and a combination of multiple heat pipes, or a micro-channel and a special-shaped vapor chamber is used, the micro-channel is connected to the shell-side branch and confluence structure 3 through a liquid cooling joint, and the heat pipe or the combination of multiple heat pipes or the special-shaped vapor chamber is connected to the shell-side branch and confluence structure 3 through a columnar heat conduction structure, and the heat transfer paths are in a parallel relationship;

[0107] It should be noted that the dimension of the local heat flux Q is W / cm 2 , whose value varies with the available thickness b of the plate-side heat dissipation structure 9, and the dimension of the available thickness b is mm;

[0108] As b increases, the value of the local heat flux density Q increases. This is because as b increases, the heat dissipation capacity of the heat pipe and the heat spreader increases. As shown in Table 1, it is the corresponding relationship between the value of the local heat flux density Q and the change of the available thickness b.

[0109] b(mm) <![CDATA[Q(W / cm 2 )]]> 0＜b≤0.5 10 0.5＜b≤1.0 20 b＞1.0 50

[0110] Table 1

[0111] Step S5: Model and use simulation methods to simulate the actual heat dissipation and flow conditions, and check whether the maximum temperature of chip 6 and the system flow resistance meet the permitted upper limit requirements; if not, return to step S3 and continue the shell side heat dissipation structure design and the board side heat dissipation structure design.

[0112] Embodiment 1:

[0113] like Figure 4 As shown, a packaging heat dissipation structure for 3D chips has a size of 60mm×40mm×10mm, a chip 6 adopts a layer stacking structure, a chip substrate 8 adopts LTCC material, the mounting cavity is an embedded cavity, the chip 6 is respectively connected to the connection points at the step surface of the embedded cavity by bonding wires 7, and epoxy material is used to seal to ensure reliable connection, the chip substrate 8 integrates micro channels as a board-side heat dissipation structure 9, the equivalent hydraulic diameter of the micro channels ranges from 0.2mm to 1.0mm, and the micro channels are connected to the shell-side shunt structure 31 and the shell-side converging structure 32 through a thermal conductive joint (a first thermal conductive joint 10 and a second thermal conductive joint 11) with a flow diameter of 2mm-5mm;

[0114] The chip cover plate 1 is made of Cu1100 material and is processed with a shell-side heat dissipation channel 2 with fins. The chip cover plate 1 is fastened with screws after the liquid path of the chip substrate 8 is connected, and the interface material 4 is applied on the interface of the sealing layer 5.

[0115] The heat dissipation principle is explained as follows: the chip 6 generates heat consumption during operation, and is discharged through two heat transfer paths on the shell side and the plate side respectively;

[0116] The heat loss on the shell side is first transferred from the chip 6 to the sealing layer 5, then to the chip cover plate 1 through the interface material 4, and finally to the coolant in the chip cover plate 1 through convection heat transfer;

[0117] The heat loss on the board side is first transferred from the chip 6 to the chip substrate 8, and then mainly transferred to the coolant in the micro-channel through convection heat transfer. The coolant in the micro-channel flows into the shell-side branch and convergence structure 3 through the first thermal conductive joint 10, flows through the micro-channel, and then flows out to the shell-side convergence structure 32 through the second thermal conductive joint 11, completing the heat dissipation process.

[0118] It can be seen that, unlike the traditional chip 6 heat dissipation solution that the shell side heat loss to the chip cover plate 1 still needs to be transferred to the heat sink through the second interface material 4, and the shell side and board side independent heat dissipation path solution; in the packaging heat dissipation structure of the present invention, the shell side directly designs the liquid cooling flow channel in the chip cover plate 1, without the need for an external heat sink, which greatly shortens the heat transfer path. Secondly, the board side adopts an enhanced heat dissipation solution, and the heat loss is finally taken away by the shell side coolant, which greatly improves the board side heat dissipation capacity and chip 6 temperature uniformity, and can effectively solve the board side heat dissipation problem of 3D stacked chips 6 and the chip 6 failure problem caused by thermal stress.

[0119] The present invention is not limited to the above-mentioned specific embodiments, but extends to any new features or any new combination disclosed in this specification, as well as any new method or process steps or any new combination disclosed.

Claims

1. A packaging heat dissipation structure for 3D chips, characterized in that: It comprises a chip cover plate provided with a shell-side heat dissipation channel and a shell-side flow distribution and confluence structure, and a chip substrate used in conjunction with the chip cover plate and connected to each other; the chip cover plate and the chip substrate are close to each other to form a mounting cavity for mounting the chip; A plate-side heat dissipation structure that cooperates with the shell-side branch and convergence structure and is interconnected is integrated in the chip substrate.

2. A packaging and heat dissipation structure for 3D chips according to claim 1, characterized in that: An interface material is arranged at the bottom of the chip cover and at a position corresponding to the mounting cavity. The chip is mounted in the mounting cavity and is located on a side of the interface material away from the chip substrate. A sealing layer made of epoxy material or metal material is covered on the outside of the chip.

3. A packaging and heat dissipation structure for 3D chips according to claim 2, characterized in that: The interface material has a thermal conductivity of 1 to 10 W / mK, a Young's modulus of 1 to 10 GPa, and a contact angle with the chip material of less than 60°.

4. The packaging and heat dissipation structure for 3D chips according to claim 1, characterized in that: The shell-side flow dividing and converging structure comprises a shell-side flow dividing structure and a shell-side flow converging structure located on both sides of the shell-side heat dissipation channel and connected to each other; The shell-side shunt structure and the shell-side shunt structure are respectively connected to two ends of the plate-side heat dissipation structure through heat-conducting joints.

5. A packaging and heat dissipation structure for 3D chips according to claim 4, characterized in that: The plate-side heat dissipation structure is any one of a micro-channel, a heat pipe, a combination of multiple heat pipes, and a special-shaped heat spreader.

6. The packaging and heat dissipation structure for 3D chips according to claim 5, characterized in that: When a special-shaped vapor chamber is used as the plate-side heat dissipation structure, the evaporation side and the condensation side of the special-shaped vapor chamber are arranged on the same side and on the side close to the chip cover plate.

7. The packaging and heat dissipation structure for 3D chips according to claim 5, characterized in that: When the board-side heat dissipation structure is any one of a heat pipe, a combination of multiple heat pipes, and a special-shaped heat sink, the thermal conductive joint is a columnar thermal conductive structure; When the heat dissipation structure on the board side is a micro-channel, the thermal conductive joint is a liquid cooling joint.

8. A packaging and heat dissipation structure for 3D chips according to any one of claims 4 to 7, characterized in that: A coolant inlet and a coolant outlet are provided on the chip cover plate, wherein the coolant inlet is communicated with the shell side shunt structure and one end of the shell side heat dissipation channel respectively, and the coolant outlet is communicated with the shell side shunt structure and the shell side heat dissipation channel.

9. A design method for a packaging heat dissipation structure for a 3D chip based on any one of claims 1 to 8, characterized in that: Specifically include the following steps: Step S1: Obtain the total heat consumption and local heat flux density values ​​of the chip; Step S2: setting the flow rate range, the upper temperature limit of the chip and the upper pressure drop limit; Step S3: determining the required flow rate of the coolant according to the total heat consumption, and determining the equivalent hydraulic diameter of the shell-side heat dissipation channel according to the flow rate range; Step S4: Optimizing the heat dissipation structure on the board side according to the local heat flux density value; Step S5: Model and use simulation methods to simulate actual heat dissipation and flow conditions, and check whether the maximum chip temperature and system flow resistance meet the permitted upper limit requirements.

10. The design method of a packaging heat dissipation structure for a 3D chip according to claim 9, characterized in that: The step S4 specifically refers to: When the local heat flux density is lower than Q, select any one of the heat pipes, multi-heat pipe combination, and special-shaped heat sink as the board-side heat dissipation structure according to the distribution of the chips; Among them, for the local small-area projection single chip, a heat pipe is used as the board-side heat dissipation structure; For large-area multi-chip projection, a multi-heat pipe combination or a special-shaped heat spreader is used as the board-side heat dissipation structure; When the local heat flux density exceeds Q, the chip board side heat dissipation structure adopts any one of micro-channels, micro-channels and heat pipes, micro-channels and multiple heat pipes, micro-channels and special-shaped heat sinks; When 0<b≤0.5mm, Q=10W / cm 2 ; When 0.5<b≤1.0, Q=20W / cm 2 ; When b>1.0, Q=50W / cm 2 ; b is the available thickness of the board-side heat dissipation structure.

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