Chip structure and chip test system thereof

Abstract

The invention discloses a chip structure and a chip test system thereof, and belongs to the technical field of chips, the chip structure comprises a chip main body, the chip main body comprises a chip packaging body, a pin lead body and a chip core body, the chip core body comprises a chip module, pin contact columns are uniformly arranged at the bottom of the chip module, the pin lead body comprises an inner conductor and an outer buffer body, and the inner conductor is connected with the outer buffer body. The chip packaging body comprises a packaging base, a packaging chip seat and a packaging cover body connected with the packaging chip seat, and the packaging cover body is connected with the packaging chip seat through a combination body. According to the invention, the chip is designed, the chip is carried and combined through the chip packaging body, the pin contact columns are in contact with the pin contacts through the inner conductors through the pin lead bodies, the signal connection effect is ensured, and the external buffer body arranged outside and used for insulation can also set independent spaces for different pin contact columns, so that the signal connection effect is improved. The condition that the contact columns of the pins are wrongly connected under the action of conductive foreign matters is avoided, and the reliability of chip wiring is ensured.

Description

Technical Field

[0001] This invention relates to the field of chip technology, and in particular to a chip structure and its chip testing system. Background Technology

[0002] The manufacturing process of integrated circuits can generally be divided into wafer fabrication, wafer testing, packaging, and final testing. Before chip packaging, electrical performance tests are usually performed on the integrated circuits on the wafer to determine their quality. After the packaging process is completed, the integrated circuits must undergo another electrical performance test to screen out defective products caused by poor packaging, thereby further improving the yield of the final product.

[0003] Current pin-based chips require multiple tests before use. The pins are easily damaged when they come into contact with the test contacts, causing pin failure. Furthermore, current pin-based chips are mainly connected to the circuit board through the encapsulation layer between the chips. In extreme environments, when the encapsulation layer cracks, poor pin contact is likely to occur. Based on this, a chip structure and its chip testing system are proposed. Summary of the Invention

[0004] The purpose of this invention is to solve the problems of existing pin chips, which require multiple tests before use, and the pins are easily damaged when in contact with test contacts, causing pin failure. Furthermore, the current pin chips are mainly connected to the circuit board through the encapsulation layer between the chips. In extreme environments, when the encapsulation layer cracks, poor pin contact is likely to occur. Therefore, this invention proposes a chip structure and a chip testing system.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: A chip structure includes a chip body, which includes a chip package, pin conductors, and a chip core. The chip core includes a chip module, and pin contacts are uniformly arranged at the bottom of the chip module. The pin conductors include an inner conductor and an outer buffer. The chip package includes a package base, a package chip socket, and a package cover connected to the package chip socket. The package cover is connected to the package chip socket through an assembly.

[0006] Preferably, the packaging base is provided with a plurality of positioning plug-in bases, and the bottom of the chip core is provided with positioning plugs that are adapted to the positioning plug-in bases; The packaging base is provided with a positioning frame that is adapted to the chip core.

[0007] Preferably, pin contacts are evenly distributed on the packaged chip socket, and metal contacts are provided at the pin contacts.

[0008] Preferably, both the inner conductor and the outer buffer are hexagonal in shape. The outer buffer is sleeved on the outside of the inner conductor and connected to the inner conductor through an insulating contact post. The bottom of the outer buffer is provided with an isolation foot to improve heat dissipation.

[0009] Preferably, the encapsulation base is arranged in a "rectangular frame" shape, adjacent outer buffers are connected to each other, and the outermost outer buffer is connected to the inner wall of the encapsulation base.

[0010] A chip testing system includes a test stand mounted on a test bench, a detection body above the test stand that matches the number of pin contacts, and an electric push rod on one side of the test stand. The output end of the electric push rod drives the detection body to contact the pin contacts via a control drive component.

[0011] Preferably, the detection body includes a detection disk and an arc-shaped conductive metal body disposed around the detection disk; The test seat has an internal cavity, and the test disk is connected to a rotating gear via a rotating shaft that passes through the cavity.

[0012] Preferably, the control drive component includes a control push plate fixedly connected to the output end of the electric push rod, and the control push plate is fixedly connected with a plurality of drive racks, which are respectively meshed with rotating gears on both sides.

[0013] Compared with the prior art, the beneficial effects of the present invention are as follows: 1. This invention is designed for chips. The chip is carried and assembled by a chip package. The pin contacts are connected to the pin points through the pin wires via the inner conductor to ensure signal connection. The external buffer for insulation can also provide independent space for different pin contacts, avoiding misconnection of pin contacts due to the action of conductive foreign objects, and ensuring the reliability of chip wiring.

[0014] 2. The chip testing system of this invention, compared with the existing testing system, adopts a lateral connection to induce lateral wear during the testing process, which does not affect the normal installation of the chip, ensuring that the test can be carried out while ensuring the chip's subsequent use. Attached Figure Description

[0015] Figure 1 This is an assembly diagram of a chip structure proposed in this invention; Figure 2 This is a schematic diagram of the main structure of the pin conductor in a chip structure proposed in this invention; Figure 3 This is a schematic diagram of the independent structure of the pin conductor in a chip structure proposed in this invention; Figure 4This is a schematic diagram of the main cross-sectional structure of a chip structure proposed in this invention; Figure 5 for Figure 4 Enlarged structural diagram at point A; Figure 6 This is a three-dimensional structural diagram of a chip testing system proposed in this invention; Figure 7 This is a schematic diagram of the structure of the control driver in a chip testing system proposed in this invention.

[0016] In the diagram: 1. Chip module; 2. Pin contact post; 3. Inner conductor; 4. Outer buffer; 5. Package base; 6. Package chip holder; 7. Package cover; 8. Assembly; 9. Positioning plug base; 10. Positioning plug; 11. Positioning frame; 12. Metal contact seat; 13. Insulated contact post; 14. Isolation foot; 15. Test seat; 16. Electric push rod; 17. Detection disc; 18. Arc-shaped conductive metal body; 19. Rotating gear; 20. Control push plate; 21. Drive rack. Detailed Implementation

[0017] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0018] Example 1, refer to Figures 1 to 5 A chip structure includes a chip body, which includes a chip package, pin conductors, and a chip core. The chip core includes a chip module 1, and pin contacts 2 are uniformly arranged at the bottom of the chip module 1. The pin contacts 2 and the chip module 1 are existing pin chip technologies, which will not be described in detail here.

[0019] The pin conductor includes an inner conductor 3 and an outer buffer 4. Both the inner conductor 3 and the outer buffer 4 are hexagonal. The outer buffer 4 is sleeved on the outside of the inner conductor 3 and is connected to the inner conductor 3 through an insulating contact post 13. The bottom of the outer buffer 4 is provided with an isolation foot 14 to improve heat dissipation.

[0020] The bottom of the outer buffer 4 has a gap, which allows for heat dissipation of the chip module 1 during use. The gap also provides sufficient buffer space when the chip is subjected to pressure or vibration, ensuring heat dissipation while absorbing energy and reducing vibration, and ensuring the connection is secure.

[0021] The encapsulation base 5 is arranged in the shape of a "rectangular frame", and the adjacent outer buffers 4 are connected to each other. The outermost outer buffer 4 is connected to the inner wall of the encapsulation base 5. The size of the packaging base 5 is adapted to that of the chip module 1; The chip package includes a package base 5, a package chip holder 6, and a package cover 7 connected to the package chip holder 6. The package cover 7 is connected to the package chip holder 6 via an assembly 8.

[0022] It is worth noting that the assembly 8 is set in an L-shaped frame, and it is installed and connected to the packaged chip socket 6 by adhesive plastic encapsulation. After installation, the packaged chip socket 6 and the package cover 7 form a certain protective effect to ensure the protection of the internal pin wires and chip core.

[0023] Furthermore, the packaging base 5 is provided with multiple positioning plug-in bases 9, the bottom of the chip core is provided with positioning plug-in 10 adapted to the positioning plug-in base 9, and the packaging base 5 is provided with a positioning frame 11 adapted to the chip core.

[0024] The chip socket 6 is uniformly provided with pin contacts, and metal contacts 12 are provided at the pin contacts. The metal contacts 12 are hexagonal and are adapted to the inner conductor 3. The inner diameter of the metal contacts is the outer diameter of the inner conductor 3, and the outer diameter of the metal contacts is the inner diameter of the outer buffer 4. This allows them to perfectly fill the gap between the inner conductor 3 and the outer buffer 4. Compared to existing methods where pins directly contact the contacts, this solution connects the pin contacts 2 to the pin contacts via the inner conductor 3. This ensures signal continuity and prevents disconnection of the pin contacts 2 during vibration, thus guaranteeing tight wiring. Furthermore, the external buffer 4, used for insulation, allows for independent spaces for different pin contacts 2, preventing misconnection of the pin contacts 2 due to conductive foreign objects (debris, liquids), and ensuring the reliability of the chip wiring.

[0025] Example 2, reference Figures 6 to 7 A chip testing system includes a test stand 15 set on a test bench, and a detection body adapted to the number of pin contacts 2 is set on the test stand 15. The detection body can be set with various models to adapt to the chip model. An electric push rod 16 is provided on one side of the test base 15. The output end of the electric push rod 16 drives the test body to contact the pin contact post 2 through the linkage drive component.

[0026] The detection body includes a detection disk 17 and an arc-shaped conductive metal body 18 disposed around the detection disk 17; The test holder 15 has a cavity inside, and the test plate 17 is connected to a rotating gear 19 through a rotating shaft that passes through the cavity. The rotating shaft is rotatably connected to the inner wall of the cavity, so that the rotational power of the rotating gear 19 is transmitted to the test plate 17.

[0027] The control drive unit includes a control push plate 20 fixedly connected to the output end of the electric push rod 16. The control push plate 20 is fixedly connected to multiple drive racks 21, which are respectively meshed with rotating gears 19 on both sides.

[0028] In this solution, when testing the chip, the chip is placed on a test socket 15 that matches its model. Due to the hexagonal design of the inner conductor 3, it has corners and edges. This ensures that the arc-shaped conductive metal body 18 on the test body is at the corner. At this time, the chip is moved down so that the inner conductor 3 is fitted over the arc-shaped conductive metal body 18. The two are in a non-contact state, so there will be no wear on the pins of the chip. At this time, the electric push rod 16 drives the connected control push plate 20 to move, which in turn drives multiple drive racks 21 to rotate. During the rotation of the drive racks 21, the detection body connected to the rotating gear 19 will rotate. At this time, the arc-shaped conductive metal body 18, which was originally located at the corner of the inner conductor 3, will rotate and contact the edge of the inner conductor 3 to achieve signal connection for chip detection. The wear caused at this time is lateral wear. During installation, it is necessary to insert it vertically into the metal layer, so it will not affect the chip pins. The chip testing system can effectively avoid pin wear, ensuring that the test can be carried out while ensuring the later use of the chip.

[0029] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A chip structure, characterized in that: The invention comprises a chip body, wherein the chip body comprises a chip package, a pin wire body and a chip core body, wherein the chip core body comprises a chip module (1), wherein pin contact pillars (2) are evenly arranged at the bottom of the chip module (1), wherein the pin wire body comprises an inner conductor (3) and an outer buffer body (4), and wherein the chip package comprises a package base (5), a package chip seat (6) and a package cover body (7) connected to the package chip seat (6), wherein the package cover body (7) is connected to the package chip seat (6) via a combination body (8).

2. A chip structure according to claim 1, characterized in that: A plurality of positioning plug-in bases (9) are arranged on the packaging base (5), and a positioning plug-in (10) adapted to the positioning plug-in base (9) is arranged at the bottom of the chip core body; The packaging base (5) is provided with a positioning frame (11) adapted to the chip core body.

3. A chip structure according to claim 1, characterized in that: Pin contacts are evenly arranged on the package chip seat (6), and metal contact seats (12) are arranged at the pin contacts.

4. A chip structure according to claim 1, characterized in that: The inner conductor (3) and the outer buffer body (4) are both arranged in a hexagonal shape; the outer buffer body (4) is sleeved outside the inner conductor (3) and connected to the inner conductor (3) via an insulating contact column (13); and an isolation support foot (14) is provided at the bottom of the outer buffer body (4).

5. A chip structure according to claim 1, characterized in that: The packaging base (5) is arranged in a "rectangular frame" shape, adjacent outer buffer bodies (4) are connected to each other, and the outermost outer buffer body (4) is connected to the inner wall of the packaging base (5).

6. A chip testing system according to any one of the chip structures of claims 1-5, characterized in that: The invention comprises a test seat (15) arranged on a test bench, wherein a detection body having a number matching that of the pin contact posts (2) is arranged above the test seat (15), and an electric push rod (16) is arranged on one side of the test seat (15), wherein an output end of the electric push rod (16) drives the detection body to contact the pin contact posts (2) through a joint control driving member.

7. A chip testing system according to claim 6, characterized in that: The detection body comprises a detection plate (17) and an arc-shaped conductive metal body (18) arranged around the detection plate (17); The test seat (15) has a cavity inside, and the detection disc (17) is connected to a rotating gear (19) via a rotating shaft that penetrates the cavity.

8. A chip testing system according to claim 7, characterized in that: The interlocking drive member comprises an interlocking push plate (20) fixedly connected to the output end of the electric push rod (16), the interlocking push plate (20) being fixedly connected to a plurality of driving gear rods (21), the driving gear rods (21) being respectively meshed and connected to the rotating gears (19) on both sides.

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