Preparation method of selective emitter, selective emitter cell and preparation process

Abstract

This invention discloses a method for preparing a selective emitter, a selective emitter cell, and its fabrication process. The selective emitter preparation method includes: texturing a silicon wafer; oxidizing the texturized silicon wafer to form an oxide layer on its surface; performing boron diffusion on the oxidized silicon wafer at a diffusion temperature not exceeding 900℃; laser doping advancement on the metal grid area of ​​the boron-diffused silicon wafer, resulting in heavy doping in the laser-doped area and light doping in the non-laser-doped area; and oxidizing and cleaning the laser-doped silicon wafer. This invention simplifies the process by first oxidizing the texturized silicon wafer to form an oxide layer, then performing the boron diffusion process, and finally using laser doping advancement, eliminating the high-temperature advancement process of boron diffusion. This simplifies the process flow, saves production costs, reduces the impact of high temperatures on the silicon substrate quality, lowers the process defect rate, effectively solves the problem of insufficient optimization in the non-laser-doped area, and increases the cell's conversion efficiency.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, and in particular to a method for preparing a selective emitter, a selective emitter cell, and the same preparation process. Background Technology

[0002] Selective emitter (SE) technology is an innovative solar cell manufacturing process that involves high-concentration doping in the region of the silicon wafer where it contacts the metal grid lines, while using low-concentration doping in the remaining areas. To achieve high efficiency in solar cells, researchers have designed various cell structures, among which the selective emitter structure is one of the important means to improve efficiency. Introducing selective emitter technology into the fabrication of solar cells optimizes the emitter region by heavily doping the electrode contact area and lightly doping between the electrodes, reducing recombination in the diffusion layer, and decreasing the contact resistance between the metal electrodes and the silicon wafer. This increases the output current and voltage of the solar cell, thereby improving its conversion efficiency.

[0003] However, in the actual fabrication process of solar cells, especially when using selective emitter technology, existing technical solutions still face many challenges:

[0004] 1. Process Complexity and Cost Issues: While traditional boron diffusion processes combined with laser boron doping technology can achieve a certain degree of selective doping, the three-step deposition and propulsion process is cumbersome, increasing both the production cycle and process cost. The large oxygen propulsion step, in particular, is not only difficult to control but also leads to high energy consumption and material waste.

[0005] 2. Insufficient optimization of non-laser regions: Existing boron diffusion + laser boron doping technology mainly focuses on optimizing the laser region to achieve heavy doping, but lacks effective optimization methods for non-laser regions. This leads to excessively high surface concentration and severe recombination in non-laser regions, affecting the overall improvement of battery efficiency.

[0006] 3. Damage to the substrate quality: Repeated high-temperature diffusion processes cause thermal damage to the silicon substrate material, affecting its crystal structure and electrical properties, thus limiting further improvements in battery efficiency. Furthermore, the high-temperature process may introduce other impurities and defects, further reducing the battery's stability and reliability.

[0007] Therefore, existing solar cell fabrication technologies face challenges in achieving selective emitter structures, including complex processes, high costs, insufficient optimization of non-laser regions, and damage to the substrate quality, which limit further improvements in cell efficiency. Summary of the Invention

[0008] In view of the shortcomings of the prior art, the purpose of this invention is to provide a method for preparing a selective emitter, a selective emitter battery and its preparation process.

[0009] To achieve the above objectives, the present invention adopts the following technical solution:

[0010] In a first aspect, the present invention provides a method for preparing a selective emitter, the method comprising the following steps:

[0011] (1) Texturing the silicon wafer and oxidizing the texturized silicon wafer to form an oxide layer on the surface of the silicon wafer;

[0012] (2) Boron diffusion is performed on the oxidized silicon wafer at a diffusion temperature not higher than 900℃;

[0013] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0014] (4) Oxidation repair and cleaning of laser-doped silicon wafers.

[0015] The selective emitter preparation method of the present invention involves oxidizing a texturized silicon wafer to form an oxide layer that can block boron diffusion into the silicon substrate. Further, the oxidation temperature in step (1) is 800–1000°C, and the oxide layer thickness is 10–20 nm. An oxide layer thickness of 10 nm–20 nm can just block boron diffusion below 900°C. An oxide layer thinner than 10 nm requires an excessively low oxidation temperature, which could lead to problems with boron diffusion due to the large temperature difference compared to existing methods. An oxide layer thicker than 20 nm requires an excessively high oxidation temperature, and to match the doping, the boron diffusion temperature needs to be increased to achieve the effect of just blocking boron doping, thus increasing costs. Oxidation at 800–1000°C can just form an oxide layer of 10 nm–20 nm, avoiding resource waste and saving production costs.

[0016] In the boron diffusion process, only the deposition diffusion step is performed, without a high-temperature propagation step, and the diffusion temperature does not exceed 900℃. This reduces the surface concentration in the non-laser region, resulting in low recombination, and also reduces the impact of high temperature on the silicon substrate quality. Furthermore, by eliminating three high-temperature propagation steps, the complexity of the process is reduced, and production costs are also lowered. Further, in step (2), the diffusion temperature is 860–900℃. Controlling the diffusion temperature between 860–900℃ perfectly matches the 10nm–20nm oxide layer, effectively blocking boron diffusion, avoiding resource waste, and saving production costs.

[0017] Furthermore, in step (2), the sheet resistance of diffusion is controlled between 5000 and 10000 Ω / sq. By controlling the sheet resistance of diffusion, it is ensured that the oxide layer plays a role in blocking boron doping. If the sheet resistance of diffusion is less than 5000 Ω / sq, it indicates that boron has been doped into the silicon substrate and the oxide layer has not played a role in blocking boron doping.

[0018] Step (3) is the laser doping process. By blocking the oxide layer, the non-laser region is lightly doped, thus optimizing the laser and non-laser regions, reducing recombination in the diffusion layer, and consequently reducing the contact resistance between the metal electrode and the silicon wafer. Preferably, laser doping is advanced in the metal gate area on the boron-diffused silicon wafer, resulting in heavy doping in the laser region and light doping in the non-laser region.

[0019] Furthermore, the sheet resistance of the silicon wafer after oxidation repair in step (4) is 250-280 Ω / sq.

[0020] Furthermore, the oxidation repair temperature in step (4) is 800-1000℃, which saves production costs.

[0021] Furthermore, texturing is performed using N-type or P-type crystalline silicon as a substrate.

[0022] In a second aspect, the present invention provides a process for preparing a selective emitter cell using the method for preparing the selective emitter described in the first aspect, the process comprising the following steps:

[0023] (1) The silicon wafer is texturized, and the texturized silicon wafer is oxidized to form an oxide layer on the surface of the silicon wafer;

[0024] (2) Boron diffusion is performed on the oxidized silicon wafer, and the diffusion temperature is not higher than 900℃;

[0025] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0026] (4) Oxidation repair and cleaning of laser-doped silicon wafers;

[0027] (5) Remove the borosilicate glass BSG layer on the back of the silicon wafer and perform alkaline polishing, and deposit a tunneling oxide layer and an amorphous silicon passivation layer sequentially on the back of the silicon wafer.

[0028] (6) Remove the PSG and BSG layers on the back and front sides of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0029] (7) Deposit anti-reflection layers on the front and back sides of the silicon wafer respectively;

[0030] (8) Print metal electrodes on the front and back sides of the silicon wafer.

[0031] Furthermore, in step (8), the metal electrode on the front side of the silicon wafer is an Ag paste electrode formed by printing and sintering, and the Ag paste electrode does not contain Al powder.

[0032] Furthermore, the front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrode is treated with light-assisted micro-conducting.

[0033] Thirdly, the present invention provides a selective emitter battery, which is prepared using the preparation process described in the second aspect.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] (1) This invention first oxidizes the texturized silicon wafer to generate an oxide layer to block boron from diffusing into the silicon substrate. Then, a boron diffusion process is performed at a diffusion temperature not exceeding 900°C, eliminating the need for a high-temperature propulsion process for boron diffusion, simplifying the process flow, reducing the impact of high temperature on the quality of the silicon substrate, and then laser doping is performed to make the laser region heavily doped and the non-laser region lightly doped due to the obstruction of the oxide layer. This optimizes the laser and non-laser regions, reduces the recombination of the diffusion layer, thereby reducing the contact resistance between the metal electrode and the silicon wafer, increasing the output current and voltage of the solar cell, and thus increasing the photoelectric conversion efficiency of the cell.

[0036] (2) The present invention uses pure Ag paste electrodes printed and sintered on the front side of silicon wafers and photo-assisted micro-conducting treatment of the front Ag paste electrodes to reduce the metal diffusion penetration depth, reduce the metal region recombination current density, and increase the open circuit voltage, thereby improving the reliability of the battery and increasing the conversion efficiency of the battery.

[0037] (3) The selective emission electrode battery prepared based on the selective emission electrode preparation method provided by the present invention has excellent conversion efficiency and lifespan. Attached Figure Description

[0038] To more clearly illustrate the technical solutions of the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 This is a process flow diagram of the fabrication process of a selective emission electrode provided in Embodiment 1 of the present invention;

[0040] Figure 2 This is a process flow diagram of a selective emitter cell provided in Embodiment 1 of the present invention. Detailed Implementation

[0041] The technical solution of the present invention will be clearly and completely described below with reference to specific embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present invention.

[0042] Example 1

[0043] This embodiment provides a method for preparing a selective emitter, such as... Figure 1 As shown, the preparation method includes the following steps:

[0044] (1) Texturing the N-type silicon wafer and oxidizing the texturized N-type silicon wafer at a temperature of 800℃ to form a 10nm oxide layer on the surface of the silicon wafer to prevent boron from diffusing into the silicon substrate.

[0045] (2) Boron diffusion is performed on the oxidized silicon wafer, which involves only a deposition diffusion step and no high-temperature propagation step. The boron diffusion temperature is 860℃ and the sheet resistance is 5000Ω / sq.

[0046] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0047] (4) The silicon wafer after laser doping is oxidized and cleaned. The oxidation repair temperature is 800℃.

[0048] This embodiment also provides a selective emitter cell fabrication process, such as... Figure 2 As shown, the preparation process includes the following steps:

[0049] (a) After performing steps (1)-(4), the borosilicate glass BSG layer on the back of the silicon wafer is removed and alkaline polishing is performed, and a tunneling oxide layer and an amorphous silicon passivation layer are deposited sequentially on the back of the silicon wafer.

[0050] (b) Remove the PSG and BSG layers on the back side and front side of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0051] (c) Deposit antireflection layers on the front and back sides of the silicon wafer, respectively;

[0052] (d) Metal electrodes are printed on the front and back sides of the silicon wafer and then sintered to complete the preparation; wherein the metal electrodes on the front side of the silicon wafer are Ag paste electrodes formed by printing and sintering, and the Ag paste electrodes do not contain Al powder. The front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrodes are treated with light-assisted micro-conducting.

[0053] Example 2

[0054] This embodiment provides a method for preparing a selective emitter, which includes the following steps:

[0055] (1) Texturing the N-type silicon wafer and oxidizing the texturized N-type silicon wafer at a temperature of 900℃ to form a 15nm oxide layer on the surface of the silicon wafer to prevent boron from diffusing into the silicon substrate.

[0056] (2) Boron diffusion is performed on the oxidized silicon wafer, which involves only a deposition diffusion step and no high-temperature propagation step. The boron diffusion temperature is 860℃ and the sheet resistance is 7500Ω / sq.

[0057] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0058] (4) The silicon wafer after laser doping is oxidized and cleaned. The oxidation repair temperature is 900℃.

[0059] This embodiment also provides a selective emitter cell fabrication process, which includes the following steps:

[0060] (a) After performing steps (1)-(4), the borosilicate glass BSG layer on the back of the silicon wafer is removed and alkaline polishing is performed, and a tunneling oxide layer and an amorphous silicon passivation layer are deposited sequentially on the back of the silicon wafer.

[0061] (b) Remove the PSG and BSG layers on the back side and front side of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0062] (c) Deposit antireflection layers on the front and back sides of the silicon wafer, respectively;

[0063] (d) Metal electrodes are printed on the front and back sides of the silicon wafer and then sintered to complete the preparation; wherein the metal electrodes on the front side of the silicon wafer are Ag paste electrodes formed by printing and sintering, and the Ag paste electrodes do not contain Al powder. The front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrodes are treated with light-assisted micro-conducting.

[0064] Example 3

[0065] This embodiment provides a method for preparing a selective emitter, which includes the following steps:

[0066] (1) Texturing the N-type silicon wafer, oxidizing the texturized N-type silicon wafer at a temperature of 1000℃ to form a 20nm oxide layer on the surface of the silicon wafer;

[0067] (2) Boron diffusion is performed on the oxidized silicon wafer, wherein only the deposition diffusion step is performed and there is no high temperature propulsion step. The boron diffusion temperature is 900℃ and the sheet resistance is 10000Ω / sq.

[0068] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0069] (4) The silicon wafer after laser doping is oxidized and cleaned. The oxidation repair temperature is 1000℃.

[0070] This embodiment also provides a selective emitter cell fabrication process, which includes the following steps:

[0071] (a) After performing steps (1)-(4), the borosilicate glass BSG layer on the back of the silicon wafer is removed and alkaline polishing is performed, and a tunneling oxide layer and an amorphous silicon passivation layer are deposited sequentially on the back of the silicon wafer.

[0072] (b) Remove the PSG and BSG layers on the back side and front side of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0073] (c) Deposit antireflection layers on the front and back sides of the silicon wafer, respectively;

[0074] (d) Metal electrodes are printed on the front and back sides of the silicon wafer and then sintered to complete the preparation; wherein the metal electrodes on the front side of the silicon wafer are Ag paste electrodes formed by printing and sintering, and the Ag paste electrodes do not contain Al powder. The front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrodes are treated with light-assisted micro-conducting.

[0075] Example 4

[0076] This embodiment provides a method for preparing a selective emitter, which includes the following steps:

[0077] (1) Texturing the P-type silicon wafer and oxidizing the texturized P-type silicon wafer at a temperature of 800℃ to form a 10nm oxide layer on the surface of the silicon wafer to prevent boron from diffusing into the silicon substrate.

[0078] (2) Boron diffusion is performed on the oxidized silicon wafer, which involves only a deposition diffusion step and no high-temperature propagation step. The boron diffusion temperature is 860℃ and the sheet resistance is 5000Ω / sq.

[0079] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0080] (4) The silicon wafer after laser doping is oxidized and cleaned. The oxidation repair temperature is 800℃.

[0081] This embodiment also provides a selective emitter cell fabrication process, which includes the following steps:

[0082] (a) After performing steps (1)-(4), the borosilicate glass BSG layer on the back of the silicon wafer is removed and alkaline polishing is performed, and a tunneling oxide layer and an amorphous silicon passivation layer are deposited sequentially on the back of the silicon wafer.

[0083] (b) Remove the PSG and BSG layers on the back side and front side of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0084] (c) Deposit antireflection layers on the front and back sides of the silicon wafer, respectively;

[0085] (d) Metal electrodes are printed on the front and back sides of the silicon wafer and then sintered to complete the preparation; wherein the metal electrodes on the front side of the silicon wafer are Ag paste electrodes formed by printing and sintering, and the Ag paste electrodes do not contain Al powder. The front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrodes are treated with light-assisted micro-conducting.

[0086] Example 5

[0087] This embodiment provides a method for preparing a selective emitter, which includes the following steps:

[0088] (1) Texturing the N-type silicon wafer, oxidizing the texturized N-type silicon wafer at a temperature of 750℃ to form an 8nm oxide layer on the surface of the silicon wafer;

[0089] (2) Boron diffusion is performed on the oxidized silicon wafer, wherein only the deposition diffusion step is performed and there is no high temperature propagation step. The boron diffusion temperature is 800℃ and the sheet resistance is 4500Ω / sq.

[0090] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0091] (4) The silicon wafer after laser doping is oxidized and cleaned. The oxidation repair temperature is 750℃.

[0092] This embodiment also provides a selective emitter cell fabrication process, which includes the following steps:

[0093] (a) After performing steps (1)-(4), the borosilicate glass BSG layer on the back of the silicon wafer is removed and alkaline polishing is performed, and a tunneling oxide layer and an amorphous silicon passivation layer are deposited sequentially on the back of the silicon wafer.

[0094] (b) Remove the PSG and BSG layers on the back side and front side of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0095] (c) Deposit antireflection layers on the front and back sides of the silicon wafer, respectively;

[0096] (d) Metal electrodes are printed on the front and back sides of the silicon wafer and then sintered to complete the preparation; wherein the metal electrodes on the front side of the silicon wafer are Ag paste electrodes formed by printing and sintering, and the Ag paste electrodes do not contain Al powder. The front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrodes are treated with light-assisted micro-conducting.

[0097] Example 6

[0098] This embodiment provides a method for preparing a selective emitter, which includes the following steps:

[0099] (1) Texturing the N-type silicon wafer, oxidizing the texturized N-type silicon wafer at a temperature of 1050℃ to form a 22nm oxide layer on the surface of the silicon wafer;

[0100] (2) Boron diffusion is performed on the oxidized silicon wafer, wherein only the deposition diffusion step is performed and there is no high-temperature propulsion step. The boron diffusion temperature is 900℃ and the sheet resistance is 10500Ω / sq.

[0101] (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped.

[0102] (4) The silicon wafer after laser doping is oxidized and cleaned. The oxidation repair temperature is 1100℃.

[0103] This embodiment also provides a selective emitter cell fabrication process, which includes the following steps:

[0104] (a) After performing steps (1)-(4), the borosilicate glass BSG layer on the back of the silicon wafer is removed and alkaline polishing is performed, and a tunneling oxide layer and an amorphous silicon passivation layer are deposited sequentially on the back of the silicon wafer.

[0105] (b) Remove the PSG and BSG layers on the back side and front side of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer;

[0106] (c) Deposit antireflection layers on the front and back sides of the silicon wafer, respectively;

[0107] (d) Metal electrodes are printed on the front and back sides of the silicon wafer and then sintered to complete the preparation; wherein the metal electrodes on the front side of the silicon wafer are Ag paste electrodes formed by printing and sintering, and the Ag paste electrodes do not contain Al powder. The front side of the silicon wafer is printed with pure Ag paste, dried and sintered, and the front Ag paste electrodes are treated with light-assisted micro-conducting.

[0108] Comparative Example 1

[0109] The difference between this comparative example and Example 1 is that the oxidation process in step (1) is omitted, and the boron diffusion process in step (2) is carried out directly. The rest of the preparation methods and parameters are the same as those in Example 1.

[0110] Comparative Example 2

[0111] The difference between this comparative example and Example 1 is that the boron diffusion process in step (2) includes a deposition diffusion step and a high-temperature advance step, and the diffusion temperature is 950°C. The remaining preparation methods and parameters are consistent with those in Example 1.

[0112] Comparative Example 3

[0113] The difference between this comparative example and Example 1 is that the front side of the silicon wafer is printed and sintered with AgAl paste electrode in step (d), and the front side AgAl paste electrode is not photo-assisted micro-conducting. The rest of the preparation methods and parameters are the same as in Example 1.

[0114] Performance testing

[0115] The electrical performance of the N-type batteries prepared in Examples 1-6 and Comparative Examples 1-3 was tested.

[0116] The test method was as follows: the parameters of the solar cell were measured using an IV tester, and the results are shown in Table 1.

[0117] Table 1. Battery test results for the examples and comparative examples.

[0118]

[0119] Performance test data conclusions analysis:

[0120] As shown in the table above, this invention eliminates the high-temperature propulsion process for boron diffusion, simplifying the process flow, saving production costs, reducing the impact of high temperatures on silicon substrate quality, lowering the process defect rate, and achieving performance improvement. It effectively solves the problem of insufficient optimization in non-laser regions. Furthermore, the battery fabricated based on the selective emitter preparation method provided by this invention exhibits excellent conversion efficiency and lifespan.

[0121] First, comparing Example 1 (which oxidizes to form a 10nm oxide layer at 800°C and performs boron diffusion at 860°C with a diffusion sheet resistance of 5000Ω / sq) with Example 5 (which oxidizes to form an 8nm oxide layer at 750°C and performs boron diffusion at 800°C with a diffusion sheet resistance of 4500Ω / sq), Example 1 allows for more complete diffusion of the boron source in the oxide layer, resulting in better laser doping. After removing the oxide layer, the doping is more uniform, leading to better cell efficiency. Example 5, with its lower boron diffusion temperature, results in less boron diffusing into the oxide layer, and the laser doping... The low boron doping level leads to low battery efficiency. Compared with Example 6, which formed a 22nm oxide layer at 1050°C and performed boron diffusion at 900°C with a diffusion sheet resistance of 10500Ω / sq, Example 6 had an excessively thick oxide layer at high temperature. Diffusion at 900°C resulted in uneven boron source diffusion in the oxide layer. Laser doping further led to uneven boron doping in the silicon substrate, and the surface concentration was high when the oxide layer was removed. In contrast, in Example 1, the boron source was uniformly located in the oxide layer, and the boron doping was uniform with a low surface concentration and low recombination.

[0122] Secondly, comparing Example 1 and Comparative Examples 1-3, Comparative Example 1 directly performs the boron diffusion process without step (1) of oxide layer formation, which is similar to the production line process. However, the lower boron diffusion temperature and the absence of boron advance will lead to a high surface concentration, resulting in a large recombination when the battery is made, which will reduce the various battery indicators. In Comparative Example 2, step (2) of boron diffusion process includes a deposition diffusion step and a high-temperature advance step, and the diffusion temperature is 950°C. This results in the same process as the production line. If the post-oxidation temperature reaches 1040°C, it will be a mass-produced wafer source. In Comparative Example 3, step (d) involves printing and sintering AgAl paste electrodes on the front side of the silicon wafer, without using photo-assisted micro-conducting treatment of the front AgAl paste electrodes. Compared with the photo-assisted micro-conducting treatment of the front Ag paste, the AgAl paste has a higher compatibility, lower opening voltage, and lower efficiency.

[0123] This invention simplifies the process by first generating a 10-20nm oxide layer on the texturized silicon wafer to prevent boron diffusion into the silicon substrate; then performing boron diffusion with only a deposition diffusion step and no high-temperature advance step at a temperature not exceeding 900℃, reducing the impact of high temperature on the silicon substrate quality, and thus reducing process complexity and cost; furthermore, laser doping is performed on the metal gate area of ​​the silicon wafer, resulting in heavy doping in the laser region and light doping in the non-laser region due to the oxide layer's obstruction, thus optimizing the laser and non-laser regions; and the oxidation at 800-1000℃ can... This effectively blocks boron diffusion, saving production costs. By controlling the diffusion sheet resistance between 5000 and 10000 Ω / sq, the oxide layer ensures that it effectively blocks boron doping. A low diffusion sheet resistance indicates that boron has been doped into the silicon substrate. Furthermore, by printing and sintering pure Ag paste electrodes on the front side of the silicon wafer and using photo-assisted micro-conducting to process the Ag paste electrodes on the front side, the metal diffusion penetration depth is reduced, the recombination current density in the metal region is reduced, and the open-circuit voltage is increased, improving battery reliability and reducing the contact resistance between the metal electrode and the p-type doped layer, thereby improving the battery's fairing and conversion efficiency.

[0124] The present invention has been further described above with reference to specific embodiments. However, it should be understood that the specific description herein should not be construed as limiting the nature and scope of the present invention. Various modifications made to the above embodiments by those skilled in the art after reading this specification are all within the scope of protection of the present invention.

Claims

1. A method for preparing a selective emitter, characterized in that, The preparation method includes the following steps: (1) Texturing the silicon wafer and oxidizing the texturized silicon wafer to form an oxide layer on the surface of the silicon wafer; (2) Boron diffusion is performed on the oxidized silicon wafer at a diffusion temperature not exceeding 900℃; (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped; (4) Perform oxidation repair and cleaning on the laser-doped silicon wafer; The oxidation temperature in step (1) is 800~1000℃, and the thickness of the oxide layer is 10~20nm; In step (2), only the deposition and diffusion step is performed, without the high-temperature propulsion step.

2. The preparation method according to claim 1, characterized in that, The diffusion temperature in step (2) is 860-900℃.

3. The preparation method according to claim 1, characterized in that, In step (2), the sheet resistance of diffusion is controlled between 5000 and 10000 Ω / sq.

4. The preparation method according to claim 1, characterized in that, The sheet resistance of the silicon wafer after oxidation repair in step (4) is 250~280 Ω / sq.

5. The preparation method according to claim 1, characterized in that, The temperature for oxidation repair in step (4) is 800~1000℃.

6. A fabrication process for a solar cell based on the selective emitter fabrication method according to any one of claims 1-5, characterized in that, The preparation process includes the following steps: (1) Texturing the silicon wafer and oxidizing the texturized silicon wafer to form an oxide layer on the surface of the silicon wafer; (2) Boron diffusion is performed on the oxidized silicon wafer, and the diffusion temperature is not higher than 900℃; (3) Laser doping is performed on the metal gate area on the silicon wafer after boron diffusion, so that the laser area is heavily doped and the non-laser area is lightly doped; (4) Perform oxidation repair and cleaning on the laser-doped silicon wafer; (5) Remove the borosilicate glass BSG layer on the back of the silicon wafer and perform alkaline polishing, and deposit a tunneling oxide layer and an amorphous silicon passivation layer sequentially on the back of the silicon wafer; (6) Remove the PSG and BSG layers on the back and front sides of the silicon wafer, and deposit an aluminum oxide passivation layer on the front side of the silicon wafer; (7) Deposit antireflection layers on the front and back sides of the silicon wafer respectively; (8) Print metal electrodes on the front and back sides of the silicon wafer.

7. The preparation process according to claim 6, characterized in that, The metal electrode on the front side in step (8) is an Ag paste electrode formed by printing and sintering, and the Ag paste electrode does not contain Al powder.

8. The preparation process according to claim 7, characterized in that, The silicon wafer is printed with pure Ag paste on the front side, dried and sintered, and the front Ag paste electrode is processed by light-assisted micro-conducting.

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