Phase locking method of network-building type inverter, electronic equipment and network-building type inverter

Abstract

The invention provides a phase locking method of a network-building type inverter, electronic equipment and the network-building type inverter, and relates to the technical field of network building. The method comprises the steps of obtaining power grid voltage; when the power grid voltage meets the low voltage ride-through condition, controlling a double-phase-locked-loop structure of the grid-connected inverter to be switched from a voltage source type phase-locked loop to a current source type phase-locked loop, and performing phase locking according to the current source type phase-locked loop; wherein the double-phase-locked-loop structure comprises a voltage source type phase-locked loop and a current source type phase-locked loop; and when the power grid voltage is in a normal state, phase locking is performed according to the voltage source type phase-locked loop. According to the invention, when a low voltage ride-through fault occurs in the power grid, normal phase locking can be carried out, so that the frequency is recovered to be stable, thereby greatly reducing the power peak when the voltage of the power grid is recovered to be normal, and improving the reliability of grid connection of the grid-forming inverter.

Description

Technical Field

[0001] The present invention relates to the field of networking technology, and in particular to a phase locking method of a networking inverter, electronic equipment and a networking inverter. Background Art

[0002] With the continuous increase in the utilization rate of new energy inverters, their penetration rate in the power grid is getting higher and higher. However, most new energy sources adopt the grid-following control principle, which greatly reduces the damping and inertia characteristics provided by traditional power stations in the power grid, and reduces the power grid's ability to cope with frequency or voltage disturbances. To solve this problem, grid-building inverters came into being. The grid-building control technology is the virtual synchronous generator (VSG) control technology. This control method can imitate the operation process of the virtual synchronous generator, so that the inverter has inertia and damping characteristics, improve the frequency and voltage support function of the power grid, and improve the stability of the power grid.

[0003] In the related technology, the grid-connected inverter uses a voltage source phase-locked loop for phase locking. The voltage source phase-locked loop is an active power-frequency phase-locked loop. However, when a low voltage ride-through fault occurs in the power grid, the active power of the inverter will be rapidly reduced, causing the voltage source phase-locked loop to become abnormal and the frequency of the inverter to become unstable. When the power grid returns to normal, a huge phase angle difference will be generated, resulting in a large power spike, reducing the reliability of the inverter's grid connection. Summary of the invention

[0004] The embodiments of the present invention provide a phase locking method, electronic device and grid-type inverter for a grid-type inverter, so as to solve the problem that the existing phase locking method is prone to phase locking abnormality when a low voltage ride-through fault occurs in the power grid, thereby generating a large power spike when the power grid returns to normal, thereby reducing the reliability of the inverter grid connection.

[0005] In a first aspect, an embodiment of the present invention provides a phase locking method for a grid-connected inverter, comprising:

[0006] Get the grid voltage;

[0007] When the grid voltage meets the low voltage ride-through condition, the dual phase-locked loop structure controlling the grid-connected inverter switches from a voltage source phase-locked loop to a current source phase-locked loop, and phase-locks according to the current source phase-locked loop;

[0008] The dual phase-locked loop structure includes a voltage source phase-locked loop and a current source phase-locked loop; when the grid voltage is in a normal state, phase locking is performed according to the voltage source phase-locked loop.

[0009] In a possible implementation, the dual phase-locked loop structure of the grid-connected inverter is switched from a voltage source phase-locked loop to a current source phase-locked loop, including:

[0010] The current output value of the voltage source phase-locked loop is used as the current output value of the current source phase-locked loop, and the current output value of the voltage source phase-locked loop is used as the current output value of the integral link in the current source phase-locked loop.

[0011] In a possible implementation, after the dual phase-locked loop structure of the grid-connected inverter is switched from a voltage source phase-locked loop to a current source phase-locked loop and phase-locked according to the current source phase-locked loop, the phase-locked method of the grid-connected inverter further includes:

[0012] When the grid voltage no longer meets the low voltage ride-through condition, the dual phase-locked loop structure is controlled to switch from the current source phase-locked loop back to the voltage source phase-locked loop, and phase-locked according to the voltage source phase-locked loop.

[0013] In a possible implementation, controlling the dual phase-locked loop structure to switch from a current source phase-locked loop to a voltage source phase-locked loop includes:

[0014] The current output value of the current source phase-locked loop is used as the current output value of the voltage source phase-locked loop, and the current output value of the current source phase-locked loop is used as the current output value of the integral link in the voltage source phase-locked loop.

[0015] In a possible implementation, when the grid voltage is in a normal state, the voltage source phase-locked loop and the current source phase-locked loop operate simultaneously, and the output of the voltage source phase-locked loop is used as the output of the dual phase-locked loop structure.

[0016] In a possible implementation, the voltage source phase-locked loop is an active power-frequency phase-locked loop, and the current source phase-locked loop is a grid-connected voltage phase-locked loop.

[0017] In a possible implementation, when the grid voltage is less than or equal to a preset low voltage threshold, it is determined that the grid voltage meets the low voltage ride-through condition; when the grid voltage is greater than the preset low voltage threshold, it is determined that the grid voltage does not meet the low voltage ride-through condition.

[0018] In a second aspect, an embodiment of the present invention provides a phase locking device for a grid-type inverter, comprising:

[0019] An acquisition module, used for acquiring grid voltage;

[0020] A control module, used for controlling the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop when the grid voltage meets the low voltage ride-through condition, and performing phase locking according to the current source phase-locked loop;

[0021] The dual phase-locked loop structure includes a voltage source phase-locked loop and a current source phase-locked loop; when the grid voltage is in a normal state, phase locking is performed according to the voltage source phase-locked loop.

[0022] In a third aspect, an embodiment of the present invention provides an electronic device, comprising a memory and a processor, the memory being used to store a computer program, the processor being used to call and run the computer program stored in the memory, and executing the phase-locked method of a grid-type inverter as described in the first aspect or any possible implementation method of the first aspect.

[0023] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the steps of the phase-locking method of the grid-type inverter as described in the first aspect or any possible implementation method of the first aspect.

[0024] In a fifth aspect, an embodiment of the present invention provides a grid-connected inverter, comprising the electronic device as described in the third aspect.

[0025] The embodiment of the present invention provides a phase-locking method, electronic device and a grid-type inverter for a grid-type inverter. When the grid voltage is in a normal state, the method performs phase locking according to a voltage source phase-locked loop. When the grid voltage meets the low voltage ride-through condition, that is, when a low voltage ride-through fault occurs in the grid, the voltage source phase-locked loop is switched to a current source phase-locked loop, and phase locking is performed according to the current source phase-locked loop. Therefore, when a low voltage ride-through fault occurs in the grid, the phase can be locked normally, so that the frequency can be restored to stability, thereby greatly reducing the power peak when the grid voltage returns to normal, and improving the reliability of the grid connection of the grid-type inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0027] Figure 1 1 is a flow chart of a phase locking method for a grid-connected inverter provided by an embodiment of the present invention;

[0028] Figure 2 is a schematic diagram of a dual phase-locked loop structure provided by an embodiment of the present invention;

[0029] Figure 3 It is a schematic diagram of the change of active power and frequency using a voltage source phase-locked loop for phase locking;

[0030] Figure 4 It is a schematic diagram of the changes in active power and frequency when the phase-locking method of the grid-type inverter provided by the embodiment of the present invention is used to perform phase-locking;

[0031] Figure 5 is a structural schematic diagram of a phase locking device of a grid-type inverter provided in an embodiment of the present invention;

[0032] Figure 6 is a schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0033] The present application is described more clearly below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the effects of the present application, but are not intended to limit the present application in any form. It should be noted that, for those of ordinary skill in the art, several variations and improvements may be made without departing from the concept of the present application. These all fall within the scope of protection of the present application.

[0034] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0035] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0036] In the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and should not be understood as indicating or implying relative importance.

[0037] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0038] In addition, the “plurality” mentioned in the embodiments of the present application should be interpreted as two or more.

[0039] As mentioned above, in the related art, the grid-type inverter uses a voltage source phase-locked loop for phase locking, and the voltage source phase-locked loop is an active power-frequency phase-locked loop. The grid-type inverter is equivalent to a voltage source. According to the calculation formula of the active power of the voltage source, the active power of the grid-type inverter is positively correlated with the grid voltage. Therefore, when a low voltage crossing fault occurs in the grid, the active power of the inverter will be rapidly lowered due to the drop in the grid voltage, causing the voltage source phase-locked loop to become abnormal and the inverter frequency to become unstable. When the grid returns to normal, a huge phase angle difference will be generated, resulting in a large power spike, which may cause the inverter to be disconnected from the grid and reduce the reliability of the inverter's grid connection.

[0040] In order to solve the above problems, an embodiment of the present application provides a phase-locking method for a grid-type inverter. When the grid voltage meets the low voltage ride-through condition, that is, when a low voltage ride-through fault occurs in the grid, the method switches from a voltage source phase-locked loop to a current source phase-locked loop, and performs phase locking according to the current source phase-locked loop. Therefore, when a low voltage ride-through fault occurs in the grid, the phase can be locked normally, so that the frequency can be restored to stability, thereby greatly reducing the power spike when the grid voltage returns to normal, and improving the reliability of the grid connection of the grid-type inverter.

[0041] Reference below Figure 2 The phase locking method of the grid-type inverter provided according to the exemplary embodiment of the present application is described. The embodiments of the present application can be applied to any applicable scenario.

[0042] It should be noted that the embodiments of the present application can be applied to electronic devices, and the electronic devices can be servers, computers or controllers, etc., that is, the phase-locking method of the grid-type inverter provided by the exemplary embodiments of the present application can be executed on devices such as servers, computers or controllers.

[0043] It should be noted that the phase locking method for a grid-type inverter provided according to the exemplary embodiment of the present application can be executed on the same device or on different devices.

[0044] See also Figure 1 , which shows a flow chart of implementing a phase-locking method for a grid-type inverter provided by an embodiment of the present invention. The above-mentioned phase-locking method for a grid-type inverter may include:

[0045] In S101 , the grid voltage is obtained.

[0046] In the embodiment of the present application, the grid voltage can be collected by a voltage sampling device, and whether a low voltage ride-through fault occurs in the grid can be determined by real-time monitoring of the grid voltage.

[0047] In S102, when the grid voltage meets the low voltage ride-through condition, the dual phase-locked loop structure of the grid-connected inverter is controlled to switch from a voltage source phase-locked loop to a current source phase-locked loop, and phase-locking is performed according to the current source phase-locked loop;

[0048] The dual phase-locked loop structure includes a voltage source phase-locked loop and a current source phase-locked loop; when the grid voltage is in a normal state, phase locking is performed according to the voltage source phase-locked loop.

[0049] The grid-connected inverter in this embodiment is a grid-connected inverter, which is equivalent to a voltage source. Under normal circumstances, a voltage source phase-locked loop is used for phase locking.

[0050] The dual phase-locked loop structure can be a structure for realizing the phase-locked function in the control loop of the grid-connected inverter. It can switch between a voltage source phase-locked loop and a current source phase-locked loop, and can select a phase-locked loop that can perform stable phase locking according to the grid voltage.

[0051] In this embodiment, when the grid voltage does not meet the low voltage ride-through condition, it is considered that the grid voltage is in a normal state and the grid does not have a low voltage ride-through fault. At this time, the voltage source phase-locked loop can be phase-locked normally, so the voltage source phase-locked loop can be phase-locked, that is, the output value of the voltage source phase-locked loop is used as the output value of the dual phase-locked loop structure.

[0052] When the grid voltage meets the low voltage ride-through condition, that is, the grid has a low voltage ride-through fault, as mentioned above, at this time, the voltage source phase-locked loop may fail. In order to ensure normal phase locking, the dual phase-locked loop structure can be controlled to switch from the voltage source phase-locked loop to the current source phase-locked loop, and phase-locked according to the current source phase-locked loop, that is, the output value of the current source phase-locked loop is used as the output value of the dual phase-locked loop structure.

[0053] In the embodiment of the present application, when the grid voltage is in a normal state, phase-locked loop is used for phase-locking. When the grid voltage meets the low voltage ride-through condition, that is, when a low voltage ride-through fault occurs in the grid, the voltage source phase-locked loop is switched to a current source phase-locked loop, and phase-locked according to the current source phase-locked loop is performed. Therefore, when a low voltage ride-through fault occurs in the grid, the phase can be locked normally, so that the frequency can be restored to stability, thereby greatly reducing the power spike when the grid voltage returns to normal, and improving the reliability of the grid-connected inverter.

[0054] In some embodiments, when the grid voltage is less than or equal to a preset low voltage threshold, it is determined that the grid voltage meets the low voltage ride-through condition; when the grid voltage is greater than the preset low voltage threshold, it is determined that the grid voltage does not meet the low voltage ride-through condition.

[0055] The preset low voltage threshold is lower than the rated voltage of the power grid, and its value can be set according to actual needs. For example, the preset low voltage threshold can be 70% or 75% of the rated voltage of the power grid, and so on.

[0056] In this embodiment, when the grid voltage is greater than the preset low voltage threshold, it can be considered that the grid voltage is in a normal state.

[0057] In some embodiments, the voltage source phase-locked loop is an active power-frequency phase-locked loop, and the current source phase-locked loop is a grid-connected voltage phase-locked loop.

[0058] The voltage source phase-locked loop can also be called a mesh phase-locked loop, and the current source phase-locked loop can also be called a follow-mesh phase-locked loop.

[0059] The voltage source phase-locked loop uses a power self-synchronization method to perform phase locking. Specifically, when there is a power difference between the active power sampling value and the active power set value, the power difference is calculated by the droop swing equation to obtain an angular frequency increment, and based on the angular frequency increment and the feedforward angular frequency, the first actual voltage angular frequency can be obtained.

[0060] The voltage source phase-locked loop does not need to extract the grid voltage and can operate stably when the grid frequency fluctuates greatly. However, when the grid frequency deviation continues to increase, the output active power of the inverter will increase. At this time, since the voltage source phase-locked loop cannot quickly keep up with the grid phase, the output active power of the inverter will continue to increase and even exceed the hardware limit of the inverter, resulting in hanging and trawling. Therefore, under special working conditions, it is necessary to consider switching between the voltage source phase-locked loop and the current source phase-locked loop.

[0061] The current source phase-locked loop extracts the positive sequence of the three-phase voltage of the power grid to obtain the q-axis voltage in the rotor coordinate system, and then controls the q-axis voltage to 0 through PI (Proportional Integral) to obtain the second actual voltage angular frequency. Among them, the positive sequence extraction can be performed through a double second-order generalized integrator.

[0062] For example, see Figure 2 , in the active power-frequency phase-locked loop, the active power reference value P Ref Subtract the active power sampling value P Fdb , get the power difference; divide the power difference by the rated angular frequency ω to get the angular frequency increment; subtract the feedforward angular frequency from the angular frequency increment to get the angular frequency difference; divide the angular frequency difference by the virtual inertia coefficient J to get the first parameter, perform an integral operation on the first parameter, and get the first actual voltage angular frequency ω pfl Among them, the first actual voltage angular frequency ω pfl The feedforward angular frequency is obtained by multiplying by the damping coefficient D. 1 / s represents the integral operation.

[0063] In the grid-connected voltage phase-locked loop, the three-phase voltage U abc Perform positive sequence extraction to obtain the q-axis voltage U q + ;q-axis voltage reference value U qRef Subtract the q-axis voltage U q + Get the voltage difference; input the voltage difference into the preset PI controller to get the second actual voltage angular frequency ω pll Among them, the q-axis voltage reference value U qRef Can be 0.

[0064] Wherein, the preset PI controller includes a proportional module and an integral module, and the output of the preset PI controller is the output of the proportional module plus the output of the integral module. Exemplarily, the expression of the preset PI controller can be u(t)=Kp*e(t)+Ki*∫e(t)dt; wherein, u(t) is the output of the preset PI controller, which represents the aforementioned second actual voltage angular frequency in this embodiment; Kp*e(t) is the output of the proportional module; Kp is the proportional gain coefficient; e(t) is the error, which represents the aforementioned voltage difference in this embodiment; Ki*∫e(t)dt is the output of the integral module; Ki is the integral gain coefficient.

[0065] It should be noted that the voltage source phase-locked loop and the current source phase-locked loop in the embodiments of the present application output the actual voltage angular frequency. If you want to output the actual voltage phase angle, you can add an integration operation to the output position of the dual phase-locked loop structure, perform an integration operation on the actual voltage angular frequency, and obtain the actual voltage phase angle.

[0066] In some embodiments, in S102, controlling the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop includes:

[0067] The current output value of the voltage source phase-locked loop is used as the current output value of the current source phase-locked loop, and the current output value of the voltage source phase-locked loop is used as the current output value of the integral link in the current source phase-locked loop.

[0068] In this embodiment, when the voltage source phase-locked loop is switched to the current source phase-locked loop, since it is uncertain whether the output results of the voltage source phase-locked loop and the current source phase-locked loop are the same, if the voltage source phase-locked loop is directly switched to the current source phase-locked loop, that is, directly Figure 2 The current source phase-locked loop is selected in the two-choice channel. When the current source phase-locked loop is used for phase locking, the angular frequency obtained by the phase locking may suddenly change, causing the inverter control to become unstable.

[0069] In order to achieve smooth switching between the two phase-locked loops, when switching the voltage source phase-locked loop to the current source phase-locked loop, it is necessary to use the current output value of the voltage source phase-locked loop as the current output value of the current source phase-locked loop, that is, assign the current output value of the voltage source phase-locked loop to the output of the current source phase-locked loop as the current output value of the current source phase-locked loop, so that the current source phase-locked loop can maintain the same output value as the voltage source phase-locked loop at the current moment. At the same time, the current output value of the voltage source phase-locked loop is used as the current output value of the integral link in the current source phase-locked loop, that is, the current output value of the voltage source phase-locked loop is assigned to the output of the integral link in the current source phase-locked loop as the current output value of the integral link in the current source phase-locked loop, so as to avoid the current source phase-locked loop because its output item of the integral link is a cumulative value and cannot change suddenly, and the total output value at the subsequent moment will have a large deviation from the total output value assigned at the current moment after following the change of the output item of the integral link, thereby causing the total output value of the current source phase-locked loop to have a sudden change at the subsequent moment, and then causing the problem of control instability. Afterwards, the control two-choice channel selects the current source phase-locked loop, and the phase is locked according to the current source phase-locked loop, that is, the output of the current source phase-locked loop is used as the output of the dual phase-locked loop structure.

[0070] Among them, see Figure 2 , the integral link in the current source phase-locked loop refers to the integral module of the preset PI controller in the current source phase-locked loop. Using the current output value of the voltage source phase-locked loop as the current output value of the integral link in the current source phase-locked loop means using the current output value of the voltage source phase-locked loop as the current output value of the integral module of the preset PI controller in the current source phase-locked loop, that is, assigning the current output value of the voltage source phase-locked loop to the output of the integral module of the preset PI controller in the current source phase-locked loop as the current output value of the integral module of the preset PI controller in the current source phase-locked loop. After these operations, the subsequent current source phase-locked loop can perform phase-locked operation based on the current output value of the voltage source phase-locked loop to achieve smooth switching.

[0071] The embodiment of the present application uses the current output value of the voltage source phase-locked loop as the current output value of the current source phase-locked loop, and uses the current output value of the voltage source phase-locked loop as the current output value of the integral link in the current source phase-locked loop, so as to achieve smooth switching from the voltage source phase-locked loop to the current source phase-locked loop, ensure the stable operation of the inverter, and avoid sudden changes in the angular frequency obtained by phase locking, which would affect the grid-connected reliability of the inverter.

[0072] In some embodiments, in the above S102, after controlling the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop and performing phase locking according to the current source phase-locked loop, the phase locking method of the grid-connected inverter further includes:

[0073] When the grid voltage no longer meets the low voltage ride-through condition, the dual phase-locked loop structure is controlled to switch from the current source phase-locked loop back to the voltage source phase-locked loop, and phase-locked according to the voltage source phase-locked loop.

[0074] After the voltage source phase-locked loop is switched to the current source phase-locked loop, this embodiment can monitor in real time whether the grid voltage has returned to a normal state. When it is detected that the grid voltage is greater than a preset low voltage threshold, it is considered that the grid voltage no longer meets the low voltage ride-through condition and the grid voltage has returned to a normal state. At this time, the dual phase-locked loop structure can be controlled to switch from the current source phase-locked loop back to the voltage source phase-locked loop, and phase-locked according to the voltage source phase-locked loop, that is, the output value of the voltage source phase-locked loop is used as the output value of the dual phase-locked loop structure.

[0075] In some embodiments, the control of the dual phase-locked loop structure is switched from a current source phase-locked loop to a voltage source phase-locked loop, including:

[0076] The current output value of the current source phase-locked loop is used as the current output value of the voltage source phase-locked loop, and the current output value of the current source phase-locked loop is used as the current output value of the integral link in the voltage source phase-locked loop.

[0077] In this embodiment, when the current source phase-locked loop is switched to the voltage source phase-locked loop, since it is uncertain whether the output results of the voltage source phase-locked loop and the current source phase-locked loop are the same, if the current source phase-locked loop is directly switched to the voltage source phase-locked loop, that is, directly Figure 2 The voltage source phase-locked loop is selected in the two-choice channel. When the voltage source phase-locked loop is used for phase locking, the angular frequency obtained by the phase locking may suddenly change, causing the inverter control to become unstable.

[0078] In order to achieve smooth switching between the two phase-locked loops, when switching the current source phase-locked loop back to the voltage source phase-locked loop, it is necessary to use the current output value of the current source phase-locked loop as the current output value of the voltage source phase-locked loop, that is, assign the current output value of the current source phase-locked loop to the output of the voltage source phase-locked loop as the current output value of the voltage source phase-locked loop, so that the voltage source phase-locked loop can maintain the same output value as the current source phase-locked loop at the current moment. At the same time, the current output value of the current source phase-locked loop is used as the current output value of the integral link in the voltage source phase-locked loop, that is, the current output value of the current source phase-locked loop is assigned to the output of the integral link in the voltage source phase-locked loop as the current output value of the integral link in the voltage source phase-locked loop, so as to avoid the voltage source phase-locked loop because its output item of the integral link is a cumulative value and cannot change suddenly, and the total output value at the subsequent moment will have a large deviation from the total output value assigned at the current moment after following the change of the output item of the integral link, thereby causing the total output value of the voltage source phase-locked loop to have a sudden change at the subsequent moment, and then causing the problem of control instability. Afterwards, the control two-choice channel selects the voltage source phase-locked loop, and phase-locks according to the voltage source phase-locked loop, that is, the output of the voltage source phase-locked loop is used as the output of the dual phase-locked loop structure.

[0079] Among them, see Figure 2 , the integral link in the voltage source phase-locked loop refers to the 1 / Js module in the voltage source phase-locked loop. Using the current output value of the current source phase-locked loop as the current output value of the integral link in the voltage source phase-locked loop means using the current output value of the current source phase-locked loop as the current output value of the 1 / Js module in the voltage source phase-locked loop, that is, assigning the current output value of the current source phase-locked loop to the output of the 1 / Js module in the voltage source phase-locked loop as the current output value of the 1 / Js module in the voltage source phase-locked loop. After these operations, the subsequent voltage source phase-locked loop can perform phase-locked operation based on the current output value of the current source phase-locked loop to achieve smooth switching.

[0080] The embodiment of the present application uses the current output value of the current source phase-locked loop as the current output value of the voltage source phase-locked loop, and uses the current output value of the current source phase-locked loop as the current output value of the integral link in the voltage source phase-locked loop, so as to achieve smooth switching of the current source phase-locked loop to the voltage source phase-locked loop, ensure the stable operation of the inverter, avoid sudden changes in the angular frequency obtained by phase locking, and affect the grid-connected reliability of the inverter.

[0081] In some embodiments, when the grid voltage is in a normal state, the voltage source phase-locked loop and the current source phase-locked loop operate simultaneously, and the output of the voltage source phase-locked loop is used as the output of the dual phase-locked loop structure.

[0082] When the grid voltage is in a normal state, the voltage source phase-locked loop and the current source phase-locked loop operate simultaneously, so that when the grid voltage meets the low voltage ride-through condition, there is no need to wait for the current source phase-locked loop to operate, and the phase-locked loop can be switched in time. When the grid voltage is in a normal state, the output of the voltage source phase-locked loop is used as the output of the dual phase-locked loop structure to ensure the inertia and damping function of the virtual synchronous generator.

[0083] In some possible implementations, when the grid voltage meets the low voltage ride-through condition, the voltage source phase-locked loop and the current source phase-locked loop operate simultaneously, so that when the grid voltage returns to normal, the phase-locked loop can be switched in time without waiting for the voltage source phase-locked loop to start operating.

[0084] In related experiments, see Figure 3 , Figure 3 The figure shows the active power and frequency variation diagram of the voltage source phase-locked loop. Figure 3 The upper part shows the active power curve, and the lower part shows the frequency curve. If the voltage source phase-locked loop is always used for phase locking, when the grid experiences low voltage ride-through, the grid voltage drops rapidly to 0.1 times the rated grid voltage, and the active power is reduced from the active power reference value to near 0. At this time, in order to increase the active power, the network construction algorithm rapidly increases the frequency until it reaches the limit of 52Hz, causing the voltage source phase-locked loop to fail, and generating a large power spike when the grid exits low voltage ride-through.

[0085] Figure 4 A schematic diagram of active power and frequency changes when phase locking is performed using the method provided in an embodiment of the present application is shown. Figure 4 The upper part shows the active power curve, and the lower part shows the frequency curve. Figure 4 At 20 seconds, the grid drops and enters low voltage ride-through. At this time, the active power decreases and the frequency increases suddenly. At this time, the current source phase-locked loop is switched, and the frequency gradually returns to stability. When the grid recovers from the low voltage ride-through state, the active power peak decreases and the system quickly returns to stability.

[0086] The embodiment of the present application uses a grid-following phase-locking method during the low voltage ride-through process of the power grid, so that the inverter phase-locking frequency is restored to stability, which greatly reduces the power spike during the low voltage ride-through recovery and improves the reliability of the inverter.

[0087] It should be understood that the order of execution of the steps in the above embodiment does not necessarily mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present invention.

[0088] The following is an embodiment of the device of the present invention. For details not described in detail therein, reference may be made to the corresponding method embodiment described above.

[0089] Figure 5 The structure diagram of the phase locking device of the grid-type inverter provided by the embodiment of the present invention is shown. For the convenience of description, only the part related to the embodiment of the present invention is shown, which is described in detail as follows:

[0090] like Figure 5 As shown, the phase locking device 30 of the grid-type inverter may include: an acquisition module 31 and a control module 32 .

[0091] An acquisition module 31 is used to acquire the grid voltage;

[0092] The control module 32 is used to control the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop when the grid voltage meets the low voltage ride-through condition, and perform phase locking according to the current source phase-locked loop;

[0093] The dual phase-locked loop structure includes a voltage source phase-locked loop and a current source phase-locked loop; when the grid voltage is in a normal state, phase locking is performed according to the voltage source phase-locked loop.

[0094] In a possible implementation, in the control module 32, controlling the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop includes:

[0095] The current output value of the voltage source phase-locked loop is used as the current output value of the current source phase-locked loop, and the current output value of the voltage source phase-locked loop is used as the current output value of the integral link in the current source phase-locked loop.

[0096] In a possible implementation, in the control module 32, after controlling the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop and performing phase locking according to the current source phase-locked loop, it also includes:

[0097] When the grid voltage no longer meets the low voltage ride-through condition, the dual phase-locked loop structure is controlled to switch from the current source phase-locked loop back to the voltage source phase-locked loop, and phase-locked according to the voltage source phase-locked loop.

[0098] In a possible implementation, in the control module 32, controlling the dual phase-locked loop structure to switch from a current source phase-locked loop to a voltage source phase-locked loop includes:

[0099] The current output value of the current source phase-locked loop is used as the current output value of the voltage source phase-locked loop, and the current output value of the current source phase-locked loop is used as the current output value of the integral link in the voltage source phase-locked loop.

[0100] In a possible implementation, when the grid voltage is in a normal state, the voltage source phase-locked loop and the current source phase-locked loop operate simultaneously, and the output of the voltage source phase-locked loop is used as the output of the dual phase-locked loop structure.

[0101] In a possible implementation, the voltage source phase-locked loop is an active power-frequency phase-locked loop, and the current source phase-locked loop is a grid-connected voltage phase-locked loop.

[0102] In a possible implementation, when the grid voltage is less than or equal to a preset low voltage threshold, it is determined that the grid voltage meets the low voltage ride-through condition; when the grid voltage is greater than the preset low voltage threshold, it is determined that the grid voltage does not meet the low voltage ride-through condition.

[0103] Figure 6 Schematic diagram of an electronic device provided by an embodiment of the present invention. Figure 6 As shown, the electronic device 4 of this embodiment includes: a processor 40 and a memory 41. The memory 41 is used to store a computer program 42, and the processor 40 is used to call and run the computer program 42 stored in the memory 41 to perform the steps in the above-mentioned embodiments of the phase-locking method of each grid-type inverter, such as Figure 1 Alternatively, the processor 40 is used to call and run the computer program 42 stored in the memory 41 to implement the functions of each module / unit in the above-mentioned device embodiments, for example Figure 5 The functions of each module are shown.

[0104] Exemplarily, the computer program 42 may be divided into one or more modules / units, which are stored in the memory 41 and executed by the processor 40 to implement the present invention. The one or more modules / units may be a series of computer program instruction segments capable of implementing specific functions, which are used to describe the execution process of the computer program 42 in the electronic device 4. For example, the computer program 42 may be divided into Figure 5 The modules shown.

[0105] The electronic device 4 may include, but is not limited to, a processor 40 and a memory 41. Those skilled in the art will appreciate that Figure 6 It is only an example of the electronic device 4 and does not constitute a limitation of the electronic device 4. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the electronic device may also include input and output devices, network access devices, buses, etc.

[0106] The processor 40 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.

[0107] The memory 41 may be an internal storage unit of the electronic device 4, such as a hard disk or memory of the electronic device 4. The memory 41 may also be an external storage device of the electronic device 4, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. equipped on the electronic device 4. Further, the memory 41 may also include both an internal storage unit and an external storage device of the electronic device 4. The memory 41 is used to store the computer program and other programs and data required by the electronic device. The memory 41 may also be used to temporarily store data that has been output or is to be output.

[0108] The technicians in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example for illustration. In practical applications, the above-mentioned function allocation can be completed by different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiment can be integrated in a processing unit, or each unit can exist physically separately, or two or more units can be integrated in one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the aforementioned method embodiment, which will not be repeated here.

[0109] Corresponding to the above-mentioned electronic device, an embodiment of the present application further provides a grid-connected inverter, comprising the above-mentioned electronic device.

[0110] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0111] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0112] In the embodiments provided by the present invention, it should be understood that the disclosed devices / electronic devices and methods can be implemented in other ways. For example, the device / electronic device embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0113] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0114] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0115] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, the steps of the above-mentioned phase-locking method embodiments of each grid-type inverter can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device that can carry the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium.

[0116] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A phase locking method for a grid-type inverter, characterized in that: include: Get the grid voltage; When the grid voltage meets the low voltage ride-through condition, the dual phase-locked loop structure of the grid-connected inverter is controlled to switch from a voltage source phase-locked loop to a current source phase-locked loop, and phase-lock is performed according to the current source phase-locked loop; Wherein, the dual phase-locked loop structure includes the voltage source phase-locked loop and the current source phase-locked loop; When the grid voltage is in a normal state, phase locking is performed according to the voltage source phase locked loop.

2. The phase locking method of the grid-type inverter according to claim 1, characterized in that: The dual phase-locked loop structure for controlling the grid-connected inverter is switched from a voltage source phase-locked loop to a current source phase-locked loop, comprising: The current output value of the voltage source phase-locked loop is used as the current output value of the current source phase-locked loop, and the current output value of the voltage source phase-locked loop is used as the current output value of the integral link in the current source phase-locked loop.

3. The phase locking method of the grid-type inverter according to claim 1, characterized in that: After the dual phase-locked loop structure for controlling the grid-connected inverter is switched from a voltage source phase-locked loop to a current source phase-locked loop, and phase-locking is performed according to the current source phase-locked loop, the phase-locking method for the grid-connected inverter further includes: When the grid voltage no longer meets the low voltage ride-through condition, the dual phase-locked loop structure is controlled to switch from the current source phase-locked loop back to the voltage source phase-locked loop, and phase-locking is performed according to the voltage source phase-locked loop.

4. The phase locking method of the grid-type inverter according to claim 3, characterized in that: The controlling the dual phase-locked loop structure to switch from the current source phase-locked loop back to the voltage source phase-locked loop includes: The current output value of the current source phase-locked loop is used as the current output value of the voltage source phase-locked loop, and the current output value of the current source phase-locked loop is used as the current output value of the integral link in the voltage source phase-locked loop.

5. The phase locking method of a grid-type inverter according to any one of claims 1 to 4, characterized in that: When the grid voltage is in a normal state, the voltage source phase locked loop and the current source phase locked loop operate simultaneously, and the output of the voltage source phase locked loop is used as the output of the dual phase locked loop structure.

6. The phase locking method of a grid-connected inverter according to any one of claims 1 to 4, characterized in that: The voltage source phase locked loop is an active power-frequency phase locked loop, and the current source phase locked loop is a grid-connected voltage phase locked loop.

7. The phase locking method of a grid-connected inverter according to any one of claims 1 to 4, characterized in that: When the grid voltage is less than or equal to a preset low voltage threshold, determining that the grid voltage satisfies the low voltage ride-through condition; When the grid voltage is greater than the preset low voltage threshold, it is determined that the grid voltage does not satisfy the low voltage ride-through condition.

8. A phase locking device for a grid-type inverter, characterized in that: include: An acquisition module, used for acquiring grid voltage; A control module, used for controlling the dual phase-locked loop structure of the grid-connected inverter to switch from a voltage source phase-locked loop to a current source phase-locked loop when the grid voltage meets the low voltage ride-through condition, and performing phase locking according to the current source phase-locked loop; Wherein, the dual phase-locked loop structure includes the voltage source phase-locked loop and the current source phase-locked loop; When the grid voltage is in a normal state, phase locking is performed according to the voltage source phase locked loop.

9. An electronic device, characterized in that: It comprises a memory and a processor, wherein the memory is used to store a computer program, and the processor is used to call and run the computer program stored in the memory to execute the phase-locking method of the grid-type inverter as described in any one of claims 1 to 7.

10. A grid-connected inverter, characterized in that: Comprising the electronic device as claimed in claim 9.

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